i2c-nuc900.c 14 KB

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  1. /*
  2. * linux/drivers/i2c/busses/i2c-nuc900.c
  3. *
  4. * Copyright (c) 2010 Nuvoton technology corporation.
  5. *
  6. * This driver based on S3C2410 I2C driver of Ben Dooks <ben-Y5A6D6n0/KfQXOPxS62xeg@public.gmane.org>.
  7. * Written by Wan ZongShun <mcuos.com-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation;version 2 of the License.
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/i2c.h>
  17. #include <linux/init.h>
  18. #include <linux/time.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/delay.h>
  21. #include <linux/errno.h>
  22. #include <linux/err.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/clk.h>
  25. #include <linux/cpufreq.h>
  26. #include <linux/slab.h>
  27. #include <linux/io.h>
  28. #include <mach/mfp.h>
  29. #include <mach/i2c.h>
  30. /* nuc900 i2c registers offset */
  31. #define CSR 0x00
  32. #define DIVIDER 0x04
  33. #define CMDR 0x08
  34. #define SWR 0x0C
  35. #define RXR 0x10
  36. #define TXR 0x14
  37. /* nuc900 i2c CSR register bits */
  38. #define IRQEN 0x003
  39. #define I2CBUSY 0x400
  40. #define I2CSTART 0x018
  41. #define IRQFLAG 0x004
  42. #define ARBIT_LOST 0x200
  43. #define SLAVE_ACK 0x800
  44. /* nuc900 i2c CMDR register bits */
  45. #define I2C_CMD_START 0x10
  46. #define I2C_CMD_STOP 0x08
  47. #define I2C_CMD_READ 0x04
  48. #define I2C_CMD_WRITE 0x02
  49. #define I2C_CMD_NACK 0x01
  50. /* i2c controller state */
  51. enum nuc900_i2c_state {
  52. STATE_IDLE,
  53. STATE_START,
  54. STATE_READ,
  55. STATE_WRITE,
  56. STATE_STOP
  57. };
  58. /* i2c controller private data */
  59. struct nuc900_i2c {
  60. spinlock_t lock;
  61. wait_queue_head_t wait;
  62. struct i2c_msg *msg;
  63. unsigned int msg_num;
  64. unsigned int msg_idx;
  65. unsigned int msg_ptr;
  66. unsigned int irq;
  67. enum nuc900_i2c_state state;
  68. void __iomem *regs;
  69. struct clk *clk;
  70. struct device *dev;
  71. struct resource *ioarea;
  72. struct i2c_adapter adap;
  73. };
  74. /* nuc900_i2c_master_complete
  75. *
  76. * complete the message and wake up the caller, using the given return code,
  77. * or zero to mean ok.
  78. */
  79. static inline void nuc900_i2c_master_complete(struct nuc900_i2c *i2c, int ret)
  80. {
  81. dev_dbg(i2c->dev, "master_complete %d\n", ret);
  82. i2c->msg_ptr = 0;
  83. i2c->msg = NULL;
  84. i2c->msg_idx++;
  85. i2c->msg_num = 0;
  86. if (ret)
  87. i2c->msg_idx = ret;
  88. wake_up(&i2c->wait);
  89. }
  90. /* irq enable/disable functions */
  91. static inline void nuc900_i2c_disable_irq(struct nuc900_i2c *i2c)
  92. {
  93. unsigned long tmp;
  94. tmp = readl(i2c->regs + CSR);
  95. writel(tmp & ~IRQEN, i2c->regs + CSR);
  96. }
  97. static inline void nuc900_i2c_enable_irq(struct nuc900_i2c *i2c)
  98. {
  99. unsigned long tmp;
  100. tmp = readl(i2c->regs + CSR);
  101. writel(tmp | IRQEN, i2c->regs + CSR);
  102. }
  103. /* nuc900_i2c_message_start
  104. *
  105. * put the start of a message onto the bus
  106. */
  107. static void nuc900_i2c_message_start(struct nuc900_i2c *i2c,
  108. struct i2c_msg *msg)
  109. {
  110. unsigned int addr = (msg->addr & 0x7f) << 1;
  111. if (msg->flags & I2C_M_RD)
  112. addr |= 0x1;
  113. writel(addr & 0xff, i2c->regs + TXR);
  114. writel(I2C_CMD_START | I2C_CMD_WRITE, i2c->regs + CMDR);
  115. }
  116. static inline void nuc900_i2c_stop(struct nuc900_i2c *i2c, int ret)
  117. {
  118. dev_dbg(i2c->dev, "STOP\n");
  119. /* stop the transfer */
  120. i2c->state = STATE_STOP;
  121. writel(I2C_CMD_STOP, i2c->regs + CMDR);
  122. nuc900_i2c_master_complete(i2c, ret);
  123. nuc900_i2c_disable_irq(i2c);
  124. }
  125. /* helper functions to determine the current state in the set of
  126. * messages we are sending
  127. */
  128. /* is_lastmsg()
  129. *
  130. * returns TRUE if the current message is the last in the set
  131. */
  132. static inline int is_lastmsg(struct nuc900_i2c *i2c)
  133. {
  134. return i2c->msg_idx >= (i2c->msg_num - 1);
  135. }
  136. /* is_msglast
  137. *
  138. * returns TRUE if we this is the last byte in the current message
  139. */
  140. static inline int is_msglast(struct nuc900_i2c *i2c)
  141. {
  142. return i2c->msg_ptr == i2c->msg->len-1;
  143. }
  144. /* is_msgend
  145. *
  146. * returns TRUE if we reached the end of the current message
  147. */
  148. static inline int is_msgend(struct nuc900_i2c *i2c)
  149. {
  150. return i2c->msg_ptr >= i2c->msg->len;
  151. }
  152. /* i2c_nuc900_irq_nextbyte
  153. *
  154. * process an interrupt and work out what to do
  155. */
  156. static void i2c_nuc900_irq_nextbyte(struct nuc900_i2c *i2c,
  157. unsigned long iicstat)
  158. {
  159. unsigned char byte;
  160. switch (i2c->state) {
  161. case STATE_IDLE:
  162. dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__);
  163. break;
  164. case STATE_STOP:
  165. dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);
  166. nuc900_i2c_disable_irq(i2c);
  167. break;
  168. case STATE_START:
  169. /* last thing we did was send a start condition on the
  170. * bus, or started a new i2c message
  171. */
  172. if (iicstat & SLAVE_ACK &&
  173. !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
  174. /* ack was not received... */
  175. dev_dbg(i2c->dev, "ack was not received\n");
  176. nuc900_i2c_stop(i2c, -ENXIO);
  177. break;
  178. }
  179. if (i2c->msg->flags & I2C_M_RD)
  180. i2c->state = STATE_READ;
  181. else
  182. i2c->state = STATE_WRITE;
  183. /* terminate the transfer if there is nothing to do
  184. * as this is used by the i2c probe to find devices.
  185. */
  186. if (is_lastmsg(i2c) && i2c->msg->len == 0) {
  187. nuc900_i2c_stop(i2c, 0);
  188. break;
  189. }
  190. if (i2c->state == STATE_READ)
  191. goto prepare_read;
  192. /* fall through to the write state, as we will need to
  193. * send a byte as well
  194. */
  195. case STATE_WRITE:
  196. /* we are writing data to the device... check for the
  197. * end of the message, and if so, work out what to do
  198. */
  199. if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
  200. if (iicstat & SLAVE_ACK) {
  201. dev_dbg(i2c->dev, "WRITE: No Ack\n");
  202. nuc900_i2c_stop(i2c, -ECONNREFUSED);
  203. break;
  204. }
  205. }
  206. retry_write:
  207. if (!is_msgend(i2c)) {
  208. byte = i2c->msg->buf[i2c->msg_ptr++];
  209. writeb(byte, i2c->regs + TXR);
  210. writel(I2C_CMD_WRITE, i2c->regs + CMDR);
  211. } else if (!is_lastmsg(i2c)) {
  212. /* we need to go to the next i2c message */
  213. dev_dbg(i2c->dev, "WRITE: Next Message\n");
  214. i2c->msg_ptr = 0;
  215. i2c->msg_idx++;
  216. i2c->msg++;
  217. /* check to see if we need to do another message */
  218. if (i2c->msg->flags & I2C_M_NOSTART) {
  219. if (i2c->msg->flags & I2C_M_RD) {
  220. /* cannot do this, the controller
  221. * forces us to send a new START
  222. * when we change direction
  223. */
  224. nuc900_i2c_stop(i2c, -EINVAL);
  225. }
  226. goto retry_write;
  227. } else {
  228. /* send the new start */
  229. nuc900_i2c_message_start(i2c, i2c->msg);
  230. i2c->state = STATE_START;
  231. }
  232. } else {
  233. /* send stop */
  234. nuc900_i2c_stop(i2c, 0);
  235. }
  236. break;
  237. case STATE_READ:
  238. /* we have a byte of data in the data register, do
  239. * something with it, and then work out wether we are
  240. * going to do any more read/write
  241. */
  242. byte = readb(i2c->regs + RXR);
  243. i2c->msg->buf[i2c->msg_ptr++] = byte;
  244. prepare_read:
  245. if (is_msglast(i2c)) {
  246. /* last byte of buffer */
  247. if (is_lastmsg(i2c))
  248. writel(I2C_CMD_READ | I2C_CMD_NACK,
  249. i2c->regs + CMDR);
  250. } else if (is_msgend(i2c)) {
  251. /* ok, we've read the entire buffer, see if there
  252. * is anything else we need to do
  253. */
  254. if (is_lastmsg(i2c)) {
  255. /* last message, send stop and complete */
  256. dev_dbg(i2c->dev, "READ: Send Stop\n");
  257. nuc900_i2c_stop(i2c, 0);
  258. } else {
  259. /* go to the next transfer */
  260. dev_dbg(i2c->dev, "READ: Next Transfer\n");
  261. i2c->msg_ptr = 0;
  262. i2c->msg_idx++;
  263. i2c->msg++;
  264. writel(I2C_CMD_READ, i2c->regs + CMDR);
  265. }
  266. } else {
  267. writel(I2C_CMD_READ, i2c->regs + CMDR);
  268. }
  269. break;
  270. }
  271. }
  272. /* nuc900_i2c_irq
  273. *
  274. * top level IRQ servicing routine
  275. */
  276. static irqreturn_t nuc900_i2c_irq(int irqno, void *dev_id)
  277. {
  278. struct nuc900_i2c *i2c = dev_id;
  279. unsigned long status;
  280. status = readl(i2c->regs + CSR);
  281. writel(status | IRQFLAG, i2c->regs + CSR);
  282. if (status & ARBIT_LOST) {
  283. /* deal with arbitration loss */
  284. dev_err(i2c->dev, "deal with arbitration loss\n");
  285. goto out;
  286. }
  287. if (i2c->state == STATE_IDLE) {
  288. dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
  289. goto out;
  290. }
  291. /* pretty much this leaves us with the fact that we've
  292. * transmitted or received whatever byte we last sent
  293. */
  294. i2c_nuc900_irq_nextbyte(i2c, status);
  295. out:
  296. return IRQ_HANDLED;
  297. }
  298. /* nuc900_i2c_set_master
  299. *
  300. * get the i2c bus for a master transaction
  301. */
  302. static int nuc900_i2c_set_master(struct nuc900_i2c *i2c)
  303. {
  304. int timeout = 400;
  305. while (timeout-- > 0) {
  306. if (((readl(i2c->regs + SWR) & I2CSTART) == I2CSTART) &&
  307. ((readl(i2c->regs + CSR) & I2CBUSY) == 0)) {
  308. return 0;
  309. }
  310. msleep(1);
  311. }
  312. return -ETIMEDOUT;
  313. }
  314. /* nuc900_i2c_doxfer
  315. *
  316. * this starts an i2c transfer
  317. */
  318. static int nuc900_i2c_doxfer(struct nuc900_i2c *i2c,
  319. struct i2c_msg *msgs, int num)
  320. {
  321. unsigned long iicstat, timeout;
  322. int spins = 20;
  323. int ret;
  324. ret = nuc900_i2c_set_master(i2c);
  325. if (ret != 0) {
  326. dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
  327. ret = -EAGAIN;
  328. goto out;
  329. }
  330. spin_lock_irq(&i2c->lock);
  331. i2c->msg = msgs;
  332. i2c->msg_num = num;
  333. i2c->msg_ptr = 0;
  334. i2c->msg_idx = 0;
  335. i2c->state = STATE_START;
  336. nuc900_i2c_message_start(i2c, msgs);
  337. spin_unlock_irq(&i2c->lock);
  338. timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
  339. ret = i2c->msg_idx;
  340. /* having these next two as dev_err() makes life very
  341. * noisy when doing an i2cdetect
  342. */
  343. if (timeout == 0)
  344. dev_dbg(i2c->dev, "timeout\n");
  345. else if (ret != num)
  346. dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
  347. /* ensure the stop has been through the bus */
  348. dev_dbg(i2c->dev, "waiting for bus idle\n");
  349. /* first, try busy waiting briefly */
  350. do {
  351. iicstat = readl(i2c->regs + CSR);
  352. } while ((iicstat & I2CBUSY) && --spins);
  353. /* if that timed out sleep */
  354. if (!spins) {
  355. msleep(1);
  356. iicstat = readl(i2c->regs + CSR);
  357. }
  358. if (iicstat & I2CBUSY)
  359. dev_warn(i2c->dev, "timeout waiting for bus idle\n");
  360. out:
  361. return ret;
  362. }
  363. /* nuc900_i2c_xfer
  364. *
  365. * first port of call from the i2c bus code when an message needs
  366. * transferring across the i2c bus.
  367. */
  368. static int nuc900_i2c_xfer(struct i2c_adapter *adap,
  369. struct i2c_msg *msgs, int num)
  370. {
  371. struct nuc900_i2c *i2c = (struct nuc900_i2c *)adap->algo_data;
  372. int retry;
  373. int ret;
  374. nuc900_i2c_enable_irq(i2c);
  375. for (retry = 0; retry < adap->retries; retry++) {
  376. ret = nuc900_i2c_doxfer(i2c, msgs, num);
  377. if (ret != -EAGAIN)
  378. return ret;
  379. dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
  380. udelay(100);
  381. }
  382. return -EREMOTEIO;
  383. }
  384. /* declare our i2c functionality */
  385. static u32 nuc900_i2c_func(struct i2c_adapter *adap)
  386. {
  387. return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING;
  388. }
  389. /* i2c bus registration info */
  390. static const struct i2c_algorithm nuc900_i2c_algorithm = {
  391. .master_xfer = nuc900_i2c_xfer,
  392. .functionality = nuc900_i2c_func,
  393. };
  394. /* nuc900_i2c_probe
  395. *
  396. * called by the bus driver when a suitable device is found
  397. */
  398. static int __devinit nuc900_i2c_probe(struct platform_device *pdev)
  399. {
  400. struct nuc900_i2c *i2c;
  401. struct nuc900_platform_i2c *pdata;
  402. struct resource *res;
  403. int ret;
  404. pdata = pdev->dev.platform_data;
  405. if (!pdata) {
  406. dev_err(&pdev->dev, "no platform data\n");
  407. return -EINVAL;
  408. }
  409. i2c = kzalloc(sizeof(struct nuc900_i2c), GFP_KERNEL);
  410. if (!i2c) {
  411. dev_err(&pdev->dev, "no memory for state\n");
  412. return -ENOMEM;
  413. }
  414. strlcpy(i2c->adap.name, "nuc900-i2c0", sizeof(i2c->adap.name));
  415. i2c->adap.owner = THIS_MODULE;
  416. i2c->adap.algo = &nuc900_i2c_algorithm;
  417. i2c->adap.retries = 2;
  418. i2c->adap.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
  419. spin_lock_init(&i2c->lock);
  420. init_waitqueue_head(&i2c->wait);
  421. /* find the clock and enable it */
  422. i2c->dev = &pdev->dev;
  423. i2c->clk = clk_get(&pdev->dev, NULL);
  424. if (IS_ERR(i2c->clk)) {
  425. dev_err(&pdev->dev, "cannot get clock\n");
  426. ret = -ENOENT;
  427. goto err_noclk;
  428. }
  429. dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);
  430. clk_enable(i2c->clk);
  431. /* map the registers */
  432. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  433. if (res == NULL) {
  434. dev_err(&pdev->dev, "cannot find IO resource\n");
  435. ret = -ENOENT;
  436. goto err_clk;
  437. }
  438. i2c->ioarea = request_mem_region(res->start, resource_size(res),
  439. pdev->name);
  440. if (i2c->ioarea == NULL) {
  441. dev_err(&pdev->dev, "cannot request IO\n");
  442. ret = -ENXIO;
  443. goto err_clk;
  444. }
  445. i2c->regs = ioremap(res->start, resource_size(res));
  446. if (i2c->regs == NULL) {
  447. dev_err(&pdev->dev, "cannot map IO\n");
  448. ret = -ENXIO;
  449. goto err_ioarea;
  450. }
  451. dev_dbg(&pdev->dev, "registers %p (%p, %p)\n",
  452. i2c->regs, i2c->ioarea, res);
  453. /* setup info block for the i2c core */
  454. i2c->adap.algo_data = i2c;
  455. i2c->adap.dev.parent = &pdev->dev;
  456. mfp_set_groupg(&pdev->dev, NULL);
  457. clk_get_rate(i2c->clk);
  458. ret = (i2c->clk.apbfreq)/(pdata->bus_freq * 5) - 1;
  459. writel(ret & 0xffff, i2c->regs + DIVIDER);
  460. /* find the IRQ for this unit (note, this relies on the init call to
  461. * ensure no current IRQs pending
  462. */
  463. i2c->irq = ret = platform_get_irq(pdev, 0);
  464. if (ret <= 0) {
  465. dev_err(&pdev->dev, "cannot find IRQ\n");
  466. goto err_iomap;
  467. }
  468. ret = request_irq(i2c->irq, nuc900_i2c_irq, IRQF_SHARED,
  469. dev_name(&pdev->dev), i2c);
  470. if (ret != 0) {
  471. dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq);
  472. goto err_iomap;
  473. }
  474. /* Note, previous versions of the driver used i2c_add_adapter()
  475. * to add the bus at any number. We now pass the bus number via
  476. * the platform data, so if unset it will now default to always
  477. * being bus 0.
  478. */
  479. i2c->adap.nr = pdata->bus_num;
  480. ret = i2c_add_numbered_adapter(&i2c->adap);
  481. if (ret < 0) {
  482. dev_err(&pdev->dev, "failed to add bus to i2c core\n");
  483. goto err_irq;
  484. }
  485. platform_set_drvdata(pdev, i2c);
  486. dev_info(&pdev->dev, "%s: NUC900 I2C adapter\n",
  487. dev_name(&i2c->adap.dev));
  488. return 0;
  489. err_irq:
  490. free_irq(i2c->irq, i2c);
  491. err_iomap:
  492. iounmap(i2c->regs);
  493. err_ioarea:
  494. release_resource(i2c->ioarea);
  495. kfree(i2c->ioarea);
  496. err_clk:
  497. clk_disable(i2c->clk);
  498. clk_put(i2c->clk);
  499. err_noclk:
  500. kfree(i2c);
  501. return ret;
  502. }
  503. /* nuc900_i2c_remove
  504. *
  505. * called when device is removed from the bus
  506. */
  507. static int __devexit nuc900_i2c_remove(struct platform_device *pdev)
  508. {
  509. struct nuc900_i2c *i2c = platform_get_drvdata(pdev);
  510. i2c_del_adapter(&i2c->adap);
  511. free_irq(i2c->irq, i2c);
  512. clk_disable(i2c->clk);
  513. clk_put(i2c->clk);
  514. iounmap(i2c->regs);
  515. release_resource(i2c->ioarea);
  516. kfree(i2c->ioarea);
  517. kfree(i2c);
  518. return 0;
  519. }
  520. static struct platform_driver nuc900_i2c_driver = {
  521. .probe = nuc900_i2c_probe,
  522. .remove = __devexit_p(nuc900_i2c_remove),
  523. .driver = {
  524. .owner = THIS_MODULE,
  525. .name = "nuc900-i2c0",
  526. },
  527. };
  528. static int __init i2c_adap_nuc900_init(void)
  529. {
  530. return platform_driver_register(&nuc900_i2c_driver);
  531. }
  532. static void __exit i2c_adap_nuc900_exit(void)
  533. {
  534. platform_driver_unregister(&nuc900_i2c_driver);
  535. }
  536. subsys_initcall(i2c_adap_nuc900_init);
  537. module_exit(i2c_adap_nuc900_exit);
  538. MODULE_DESCRIPTION("NUC900 I2C Bus driver");
  539. MODULE_AUTHOR("Wan ZongShun, <mcuos.com-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>");
  540. MODULE_LICENSE("GPL");
  541. MODULE_ALIAS("platform:nuc900-i2c0");