bfin_gpio.c 31 KB

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  1. /*
  2. * GPIO Abstraction Layer
  3. *
  4. * Copyright 2006-2010 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2 or later
  7. */
  8. #include <linux/delay.h>
  9. #include <linux/module.h>
  10. #include <linux/err.h>
  11. #include <linux/proc_fs.h>
  12. #include <linux/seq_file.h>
  13. #include <asm/blackfin.h>
  14. #include <asm/gpio.h>
  15. #include <asm/portmux.h>
  16. #include <linux/irq.h>
  17. #include <asm/irq_handler.h>
  18. #if ANOMALY_05000311 || ANOMALY_05000323
  19. enum {
  20. AWA_data = SYSCR,
  21. AWA_data_clear = SYSCR,
  22. AWA_data_set = SYSCR,
  23. AWA_toggle = SYSCR,
  24. AWA_maska = BFIN_UART_SCR,
  25. AWA_maska_clear = BFIN_UART_SCR,
  26. AWA_maska_set = BFIN_UART_SCR,
  27. AWA_maska_toggle = BFIN_UART_SCR,
  28. AWA_maskb = BFIN_UART_GCTL,
  29. AWA_maskb_clear = BFIN_UART_GCTL,
  30. AWA_maskb_set = BFIN_UART_GCTL,
  31. AWA_maskb_toggle = BFIN_UART_GCTL,
  32. AWA_dir = SPORT1_STAT,
  33. AWA_polar = SPORT1_STAT,
  34. AWA_edge = SPORT1_STAT,
  35. AWA_both = SPORT1_STAT,
  36. #if ANOMALY_05000311
  37. AWA_inen = TIMER_ENABLE,
  38. #elif ANOMALY_05000323
  39. AWA_inen = DMA1_1_CONFIG,
  40. #endif
  41. };
  42. /* Anomaly Workaround */
  43. #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
  44. #else
  45. #define AWA_DUMMY_READ(...) do { } while (0)
  46. #endif
  47. static struct gpio_port_t * const gpio_array[] = {
  48. #if defined(BF533_FAMILY) || defined(BF538_FAMILY)
  49. (struct gpio_port_t *) FIO_FLAG_D,
  50. #elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  51. (struct gpio_port_t *) PORTFIO,
  52. (struct gpio_port_t *) PORTGIO,
  53. (struct gpio_port_t *) PORTHIO,
  54. #elif defined(BF561_FAMILY)
  55. (struct gpio_port_t *) FIO0_FLAG_D,
  56. (struct gpio_port_t *) FIO1_FLAG_D,
  57. (struct gpio_port_t *) FIO2_FLAG_D,
  58. #elif defined(CONFIG_BF54x)
  59. (struct gpio_port_t *)PORTA_FER,
  60. (struct gpio_port_t *)PORTB_FER,
  61. (struct gpio_port_t *)PORTC_FER,
  62. (struct gpio_port_t *)PORTD_FER,
  63. (struct gpio_port_t *)PORTE_FER,
  64. (struct gpio_port_t *)PORTF_FER,
  65. (struct gpio_port_t *)PORTG_FER,
  66. (struct gpio_port_t *)PORTH_FER,
  67. (struct gpio_port_t *)PORTI_FER,
  68. (struct gpio_port_t *)PORTJ_FER,
  69. #else
  70. # error no gpio arrays defined
  71. #endif
  72. };
  73. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  74. static unsigned short * const port_fer[] = {
  75. (unsigned short *) PORTF_FER,
  76. (unsigned short *) PORTG_FER,
  77. (unsigned short *) PORTH_FER,
  78. };
  79. # if !defined(BF537_FAMILY)
  80. static unsigned short * const port_mux[] = {
  81. (unsigned short *) PORTF_MUX,
  82. (unsigned short *) PORTG_MUX,
  83. (unsigned short *) PORTH_MUX,
  84. };
  85. static const
  86. u8 pmux_offset[][16] = {
  87. # if defined(CONFIG_BF52x)
  88. { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
  89. { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
  90. { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
  91. # elif defined(CONFIG_BF51x)
  92. { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
  93. { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
  94. { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
  95. # endif
  96. };
  97. # endif
  98. #elif defined(BF538_FAMILY)
  99. static unsigned short * const port_fer[] = {
  100. (unsigned short *) PORTCIO_FER,
  101. (unsigned short *) PORTDIO_FER,
  102. (unsigned short *) PORTEIO_FER,
  103. };
  104. #endif
  105. #define RESOURCE_LABEL_SIZE 16
  106. static struct str_ident {
  107. char name[RESOURCE_LABEL_SIZE];
  108. } str_ident[MAX_RESOURCES];
  109. #if defined(CONFIG_PM)
  110. static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
  111. # ifdef BF538_FAMILY
  112. static unsigned short port_fer_saved[3];
  113. # endif
  114. #endif
  115. static void gpio_error(unsigned gpio)
  116. {
  117. printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
  118. }
  119. static void set_label(unsigned short ident, const char *label)
  120. {
  121. if (label) {
  122. strncpy(str_ident[ident].name, label,
  123. RESOURCE_LABEL_SIZE);
  124. str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
  125. }
  126. }
  127. static char *get_label(unsigned short ident)
  128. {
  129. return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
  130. }
  131. static int cmp_label(unsigned short ident, const char *label)
  132. {
  133. if (label == NULL) {
  134. dump_stack();
  135. printk(KERN_ERR "Please provide none-null label\n");
  136. }
  137. if (label)
  138. return strcmp(str_ident[ident].name, label);
  139. else
  140. return -EINVAL;
  141. }
  142. #define map_entry(m, i) reserved_##m##_map[gpio_bank(i)]
  143. #define is_reserved(m, i, e) (map_entry(m, i) & gpio_bit(i))
  144. #define reserve(m, i) (map_entry(m, i) |= gpio_bit(i))
  145. #define unreserve(m, i) (map_entry(m, i) &= ~gpio_bit(i))
  146. #define DECLARE_RESERVED_MAP(m, c) static unsigned short reserved_##m##_map[c]
  147. DECLARE_RESERVED_MAP(gpio, GPIO_BANK_NUM);
  148. DECLARE_RESERVED_MAP(peri, DIV_ROUND_UP(MAX_RESOURCES, GPIO_BANKSIZE));
  149. DECLARE_RESERVED_MAP(gpio_irq, GPIO_BANK_NUM);
  150. inline int check_gpio(unsigned gpio)
  151. {
  152. #if defined(CONFIG_BF54x)
  153. if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
  154. || gpio == GPIO_PH14 || gpio == GPIO_PH15
  155. || gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
  156. return -EINVAL;
  157. #endif
  158. if (gpio >= MAX_BLACKFIN_GPIOS)
  159. return -EINVAL;
  160. return 0;
  161. }
  162. static void port_setup(unsigned gpio, unsigned short usage)
  163. {
  164. #if defined(BF538_FAMILY)
  165. /*
  166. * BF538/9 Port C,D and E are special.
  167. * Inverted PORT_FER polarity on CDE and no PORF_FER on F
  168. * Regular PORT F GPIOs are handled here, CDE are exclusively
  169. * managed by GPIOLIB
  170. */
  171. if (gpio < MAX_BLACKFIN_GPIOS || gpio >= MAX_RESOURCES)
  172. return;
  173. gpio -= MAX_BLACKFIN_GPIOS;
  174. if (usage == GPIO_USAGE)
  175. *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
  176. else
  177. *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  178. SSYNC();
  179. return;
  180. #endif
  181. if (check_gpio(gpio))
  182. return;
  183. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  184. if (usage == GPIO_USAGE)
  185. *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  186. else
  187. *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
  188. SSYNC();
  189. #elif defined(CONFIG_BF54x)
  190. if (usage == GPIO_USAGE)
  191. gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
  192. else
  193. gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
  194. SSYNC();
  195. #endif
  196. }
  197. #ifdef BF537_FAMILY
  198. static const s8 port_mux[] = {
  199. [GPIO_PF0] = 3,
  200. [GPIO_PF1] = 3,
  201. [GPIO_PF2] = 4,
  202. [GPIO_PF3] = 4,
  203. [GPIO_PF4] = 5,
  204. [GPIO_PF5] = 6,
  205. [GPIO_PF6] = 7,
  206. [GPIO_PF7] = 8,
  207. [GPIO_PF8 ... GPIO_PF15] = -1,
  208. [GPIO_PG0 ... GPIO_PG7] = -1,
  209. [GPIO_PG8] = 9,
  210. [GPIO_PG9] = 9,
  211. [GPIO_PG10] = 10,
  212. [GPIO_PG11] = 10,
  213. [GPIO_PG12] = 10,
  214. [GPIO_PG13] = 11,
  215. [GPIO_PG14] = 11,
  216. [GPIO_PG15] = 11,
  217. [GPIO_PH0 ... GPIO_PH15] = -1,
  218. [PORT_PJ0 ... PORT_PJ3] = -1,
  219. [PORT_PJ4] = 1,
  220. [PORT_PJ5] = 1,
  221. [PORT_PJ6 ... PORT_PJ9] = -1,
  222. [PORT_PJ10] = 0,
  223. [PORT_PJ11] = 0,
  224. };
  225. static int portmux_group_check(unsigned short per)
  226. {
  227. u16 ident = P_IDENT(per);
  228. u16 function = P_FUNCT2MUX(per);
  229. s8 offset = port_mux[ident];
  230. u16 m, pmux, pfunc;
  231. if (offset < 0)
  232. return 0;
  233. pmux = bfin_read_PORT_MUX();
  234. for (m = 0; m < ARRAY_SIZE(port_mux); ++m) {
  235. if (m == ident)
  236. continue;
  237. if (port_mux[m] != offset)
  238. continue;
  239. if (!is_reserved(peri, m, 1))
  240. continue;
  241. if (offset == 1)
  242. pfunc = (pmux >> offset) & 3;
  243. else
  244. pfunc = (pmux >> offset) & 1;
  245. if (pfunc != function) {
  246. pr_err("pin group conflict! request pin %d func %d conflict with pin %d func %d\n",
  247. ident, function, m, pfunc);
  248. return -EINVAL;
  249. }
  250. }
  251. return 0;
  252. }
  253. static void portmux_setup(unsigned short per)
  254. {
  255. u16 ident = P_IDENT(per);
  256. u16 function = P_FUNCT2MUX(per);
  257. s8 offset = port_mux[ident];
  258. u16 pmux;
  259. if (offset == -1)
  260. return;
  261. pmux = bfin_read_PORT_MUX();
  262. if (offset != 1)
  263. pmux &= ~(1 << offset);
  264. else
  265. pmux &= ~(3 << 1);
  266. pmux |= (function << offset);
  267. bfin_write_PORT_MUX(pmux);
  268. }
  269. #elif defined(CONFIG_BF54x)
  270. inline void portmux_setup(unsigned short per)
  271. {
  272. u16 ident = P_IDENT(per);
  273. u16 function = P_FUNCT2MUX(per);
  274. u32 pmux;
  275. pmux = gpio_array[gpio_bank(ident)]->port_mux;
  276. pmux &= ~(0x3 << (2 * gpio_sub_n(ident)));
  277. pmux |= (function & 0x3) << (2 * gpio_sub_n(ident));
  278. gpio_array[gpio_bank(ident)]->port_mux = pmux;
  279. }
  280. inline u16 get_portmux(unsigned short per)
  281. {
  282. u16 ident = P_IDENT(per);
  283. u32 pmux = gpio_array[gpio_bank(ident)]->port_mux;
  284. return (pmux >> (2 * gpio_sub_n(ident)) & 0x3);
  285. }
  286. static int portmux_group_check(unsigned short per)
  287. {
  288. return 0;
  289. }
  290. #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  291. static int portmux_group_check(unsigned short per)
  292. {
  293. u16 ident = P_IDENT(per);
  294. u16 function = P_FUNCT2MUX(per);
  295. u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
  296. u16 pin, gpiopin, pfunc;
  297. for (pin = 0; pin < GPIO_BANKSIZE; ++pin) {
  298. if (offset != pmux_offset[gpio_bank(ident)][pin])
  299. continue;
  300. gpiopin = gpio_bank(ident) * GPIO_BANKSIZE + pin;
  301. if (gpiopin == ident)
  302. continue;
  303. if (!is_reserved(peri, gpiopin, 1))
  304. continue;
  305. pfunc = *port_mux[gpio_bank(ident)];
  306. pfunc = (pfunc >> offset) & 3;
  307. if (pfunc != function) {
  308. pr_err("pin group conflict! request pin %d func %d conflict with pin %d func %d\n",
  309. ident, function, gpiopin, pfunc);
  310. return -EINVAL;
  311. }
  312. }
  313. return 0;
  314. }
  315. inline void portmux_setup(unsigned short per)
  316. {
  317. u16 ident = P_IDENT(per);
  318. u16 function = P_FUNCT2MUX(per);
  319. u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
  320. u16 pmux;
  321. pmux = *port_mux[gpio_bank(ident)];
  322. if (((pmux >> offset) & 3) == function)
  323. return;
  324. pmux &= ~(3 << offset);
  325. pmux |= (function & 3) << offset;
  326. *port_mux[gpio_bank(ident)] = pmux;
  327. SSYNC();
  328. }
  329. #else
  330. # define portmux_setup(...) do { } while (0)
  331. static int portmux_group_check(unsigned short per)
  332. {
  333. return 0;
  334. }
  335. #endif
  336. #ifndef CONFIG_BF54x
  337. /***********************************************************
  338. *
  339. * FUNCTIONS: Blackfin General Purpose Ports Access Functions
  340. *
  341. * INPUTS/OUTPUTS:
  342. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  343. *
  344. *
  345. * DESCRIPTION: These functions abstract direct register access
  346. * to Blackfin processor General Purpose
  347. * Ports Regsiters
  348. *
  349. * CAUTION: These functions do not belong to the GPIO Driver API
  350. *************************************************************
  351. * MODIFICATION HISTORY :
  352. **************************************************************/
  353. /* Set a specific bit */
  354. #define SET_GPIO(name) \
  355. void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
  356. { \
  357. unsigned long flags; \
  358. flags = hard_local_irq_save(); \
  359. if (arg) \
  360. gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
  361. else \
  362. gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
  363. AWA_DUMMY_READ(name); \
  364. hard_local_irq_restore(flags); \
  365. } \
  366. EXPORT_SYMBOL(set_gpio_ ## name);
  367. SET_GPIO(dir) /* set_gpio_dir() */
  368. SET_GPIO(inen) /* set_gpio_inen() */
  369. SET_GPIO(polar) /* set_gpio_polar() */
  370. SET_GPIO(edge) /* set_gpio_edge() */
  371. SET_GPIO(both) /* set_gpio_both() */
  372. #define SET_GPIO_SC(name) \
  373. void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
  374. { \
  375. unsigned long flags; \
  376. if (ANOMALY_05000311 || ANOMALY_05000323) \
  377. flags = hard_local_irq_save(); \
  378. if (arg) \
  379. gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
  380. else \
  381. gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
  382. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  383. AWA_DUMMY_READ(name); \
  384. hard_local_irq_restore(flags); \
  385. } \
  386. } \
  387. EXPORT_SYMBOL(set_gpio_ ## name);
  388. SET_GPIO_SC(maska)
  389. SET_GPIO_SC(maskb)
  390. SET_GPIO_SC(data)
  391. void set_gpio_toggle(unsigned gpio)
  392. {
  393. unsigned long flags;
  394. if (ANOMALY_05000311 || ANOMALY_05000323)
  395. flags = hard_local_irq_save();
  396. gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
  397. if (ANOMALY_05000311 || ANOMALY_05000323) {
  398. AWA_DUMMY_READ(toggle);
  399. hard_local_irq_restore(flags);
  400. }
  401. }
  402. EXPORT_SYMBOL(set_gpio_toggle);
  403. /*Set current PORT date (16-bit word)*/
  404. #define SET_GPIO_P(name) \
  405. void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
  406. { \
  407. unsigned long flags; \
  408. if (ANOMALY_05000311 || ANOMALY_05000323) \
  409. flags = hard_local_irq_save(); \
  410. gpio_array[gpio_bank(gpio)]->name = arg; \
  411. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  412. AWA_DUMMY_READ(name); \
  413. hard_local_irq_restore(flags); \
  414. } \
  415. } \
  416. EXPORT_SYMBOL(set_gpiop_ ## name);
  417. SET_GPIO_P(data)
  418. SET_GPIO_P(dir)
  419. SET_GPIO_P(inen)
  420. SET_GPIO_P(polar)
  421. SET_GPIO_P(edge)
  422. SET_GPIO_P(both)
  423. SET_GPIO_P(maska)
  424. SET_GPIO_P(maskb)
  425. /* Get a specific bit */
  426. #define GET_GPIO(name) \
  427. unsigned short get_gpio_ ## name(unsigned gpio) \
  428. { \
  429. unsigned long flags; \
  430. unsigned short ret; \
  431. if (ANOMALY_05000311 || ANOMALY_05000323) \
  432. flags = hard_local_irq_save(); \
  433. ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
  434. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  435. AWA_DUMMY_READ(name); \
  436. hard_local_irq_restore(flags); \
  437. } \
  438. return ret; \
  439. } \
  440. EXPORT_SYMBOL(get_gpio_ ## name);
  441. GET_GPIO(data)
  442. GET_GPIO(dir)
  443. GET_GPIO(inen)
  444. GET_GPIO(polar)
  445. GET_GPIO(edge)
  446. GET_GPIO(both)
  447. GET_GPIO(maska)
  448. GET_GPIO(maskb)
  449. /*Get current PORT date (16-bit word)*/
  450. #define GET_GPIO_P(name) \
  451. unsigned short get_gpiop_ ## name(unsigned gpio) \
  452. { \
  453. unsigned long flags; \
  454. unsigned short ret; \
  455. if (ANOMALY_05000311 || ANOMALY_05000323) \
  456. flags = hard_local_irq_save(); \
  457. ret = (gpio_array[gpio_bank(gpio)]->name); \
  458. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  459. AWA_DUMMY_READ(name); \
  460. hard_local_irq_restore(flags); \
  461. } \
  462. return ret; \
  463. } \
  464. EXPORT_SYMBOL(get_gpiop_ ## name);
  465. GET_GPIO_P(data)
  466. GET_GPIO_P(dir)
  467. GET_GPIO_P(inen)
  468. GET_GPIO_P(polar)
  469. GET_GPIO_P(edge)
  470. GET_GPIO_P(both)
  471. GET_GPIO_P(maska)
  472. GET_GPIO_P(maskb)
  473. #ifdef CONFIG_PM
  474. DECLARE_RESERVED_MAP(wakeup, GPIO_BANK_NUM);
  475. static const unsigned int sic_iwr_irqs[] = {
  476. #if defined(BF533_FAMILY)
  477. IRQ_PROG_INTB
  478. #elif defined(BF537_FAMILY)
  479. IRQ_PF_INTB_WATCH, IRQ_PORTG_INTB, IRQ_PH_INTB_MAC_TX
  480. #elif defined(BF538_FAMILY)
  481. IRQ_PORTF_INTB
  482. #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  483. IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB
  484. #elif defined(BF561_FAMILY)
  485. IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB
  486. #else
  487. # error no SIC_IWR defined
  488. #endif
  489. };
  490. /***********************************************************
  491. *
  492. * FUNCTIONS: Blackfin PM Setup API
  493. *
  494. * INPUTS/OUTPUTS:
  495. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  496. * type -
  497. * PM_WAKE_RISING
  498. * PM_WAKE_FALLING
  499. * PM_WAKE_HIGH
  500. * PM_WAKE_LOW
  501. * PM_WAKE_BOTH_EDGES
  502. *
  503. * DESCRIPTION: Blackfin PM Driver API
  504. *
  505. * CAUTION:
  506. *************************************************************
  507. * MODIFICATION HISTORY :
  508. **************************************************************/
  509. int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl)
  510. {
  511. unsigned long flags;
  512. if (check_gpio(gpio) < 0)
  513. return -EINVAL;
  514. flags = hard_local_irq_save();
  515. if (ctrl)
  516. reserve(wakeup, gpio);
  517. else
  518. unreserve(wakeup, gpio);
  519. set_gpio_maskb(gpio, ctrl);
  520. hard_local_irq_restore(flags);
  521. return 0;
  522. }
  523. int bfin_pm_standby_ctrl(unsigned ctrl)
  524. {
  525. u16 bank, mask, i;
  526. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  527. mask = map_entry(wakeup, i);
  528. bank = gpio_bank(i);
  529. if (mask)
  530. bfin_internal_set_wake(sic_iwr_irqs[bank], ctrl);
  531. }
  532. return 0;
  533. }
  534. void bfin_gpio_pm_hibernate_suspend(void)
  535. {
  536. int i, bank;
  537. #ifdef BF538_FAMILY
  538. for (i = 0; i < ARRAY_SIZE(port_fer_saved); ++i)
  539. port_fer_saved[i] = *port_fer[i];
  540. #endif
  541. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  542. bank = gpio_bank(i);
  543. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  544. gpio_bank_saved[bank].fer = *port_fer[bank];
  545. #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  546. gpio_bank_saved[bank].mux = *port_mux[bank];
  547. #else
  548. if (bank == 0)
  549. gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
  550. #endif
  551. #endif
  552. gpio_bank_saved[bank].data = gpio_array[bank]->data;
  553. gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
  554. gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
  555. gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
  556. gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
  557. gpio_bank_saved[bank].both = gpio_array[bank]->both;
  558. gpio_bank_saved[bank].maska = gpio_array[bank]->maska;
  559. }
  560. #ifdef BFIN_SPECIAL_GPIO_BANKS
  561. bfin_special_gpio_pm_hibernate_suspend();
  562. #endif
  563. AWA_DUMMY_READ(maska);
  564. }
  565. void bfin_gpio_pm_hibernate_restore(void)
  566. {
  567. int i, bank;
  568. #ifdef BF538_FAMILY
  569. for (i = 0; i < ARRAY_SIZE(port_fer_saved); ++i)
  570. *port_fer[i] = port_fer_saved[i];
  571. #endif
  572. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  573. bank = gpio_bank(i);
  574. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  575. #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  576. *port_mux[bank] = gpio_bank_saved[bank].mux;
  577. #else
  578. if (bank == 0)
  579. bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
  580. #endif
  581. *port_fer[bank] = gpio_bank_saved[bank].fer;
  582. #endif
  583. gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
  584. gpio_array[bank]->data_set = gpio_bank_saved[bank].data
  585. & gpio_bank_saved[bank].dir;
  586. gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
  587. gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
  588. gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
  589. gpio_array[bank]->both = gpio_bank_saved[bank].both;
  590. gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
  591. }
  592. #ifdef BFIN_SPECIAL_GPIO_BANKS
  593. bfin_special_gpio_pm_hibernate_restore();
  594. #endif
  595. AWA_DUMMY_READ(maska);
  596. }
  597. #endif
  598. #else /* CONFIG_BF54x */
  599. #ifdef CONFIG_PM
  600. int bfin_pm_standby_ctrl(unsigned ctrl)
  601. {
  602. return 0;
  603. }
  604. void bfin_gpio_pm_hibernate_suspend(void)
  605. {
  606. int i, bank;
  607. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  608. bank = gpio_bank(i);
  609. gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
  610. gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
  611. gpio_bank_saved[bank].data = gpio_array[bank]->data;
  612. gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
  613. gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set;
  614. }
  615. }
  616. void bfin_gpio_pm_hibernate_restore(void)
  617. {
  618. int i, bank;
  619. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  620. bank = gpio_bank(i);
  621. gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
  622. gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
  623. gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
  624. gpio_array[bank]->data_set = gpio_bank_saved[bank].data
  625. & gpio_bank_saved[bank].dir;
  626. gpio_array[bank]->dir_set = gpio_bank_saved[bank].dir;
  627. }
  628. }
  629. #endif
  630. unsigned short get_gpio_dir(unsigned gpio)
  631. {
  632. return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)));
  633. }
  634. EXPORT_SYMBOL(get_gpio_dir);
  635. #endif /* CONFIG_BF54x */
  636. /***********************************************************
  637. *
  638. * FUNCTIONS: Blackfin Peripheral Resource Allocation
  639. * and PortMux Setup
  640. *
  641. * INPUTS/OUTPUTS:
  642. * per Peripheral Identifier
  643. * label String
  644. *
  645. * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
  646. *
  647. * CAUTION:
  648. *************************************************************
  649. * MODIFICATION HISTORY :
  650. **************************************************************/
  651. int peripheral_request(unsigned short per, const char *label)
  652. {
  653. unsigned long flags;
  654. unsigned short ident = P_IDENT(per);
  655. /*
  656. * Don't cares are pins with only one dedicated function
  657. */
  658. if (per & P_DONTCARE)
  659. return 0;
  660. if (!(per & P_DEFINED))
  661. return -ENODEV;
  662. BUG_ON(ident >= MAX_RESOURCES);
  663. flags = hard_local_irq_save();
  664. /* If a pin can be muxed as either GPIO or peripheral, make
  665. * sure it is not already a GPIO pin when we request it.
  666. */
  667. if (unlikely(!check_gpio(ident) && is_reserved(gpio, ident, 1))) {
  668. if (system_state == SYSTEM_BOOTING)
  669. dump_stack();
  670. printk(KERN_ERR
  671. "%s: Peripheral %d is already reserved as GPIO by %s !\n",
  672. __func__, ident, get_label(ident));
  673. hard_local_irq_restore(flags);
  674. return -EBUSY;
  675. }
  676. if (unlikely(is_reserved(peri, ident, 1))) {
  677. /*
  678. * Pin functions like AMC address strobes my
  679. * be requested and used by several drivers
  680. */
  681. #ifdef CONFIG_BF54x
  682. if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) {
  683. #else
  684. if (!(per & P_MAYSHARE)) {
  685. #endif
  686. /*
  687. * Allow that the identical pin function can
  688. * be requested from the same driver twice
  689. */
  690. if (cmp_label(ident, label) == 0)
  691. goto anyway;
  692. if (system_state == SYSTEM_BOOTING)
  693. dump_stack();
  694. printk(KERN_ERR
  695. "%s: Peripheral %d function %d is already reserved by %s !\n",
  696. __func__, ident, P_FUNCT2MUX(per), get_label(ident));
  697. hard_local_irq_restore(flags);
  698. return -EBUSY;
  699. }
  700. }
  701. if (unlikely(portmux_group_check(per))) {
  702. hard_local_irq_restore(flags);
  703. return -EBUSY;
  704. }
  705. anyway:
  706. reserve(peri, ident);
  707. portmux_setup(per);
  708. port_setup(ident, PERIPHERAL_USAGE);
  709. hard_local_irq_restore(flags);
  710. set_label(ident, label);
  711. return 0;
  712. }
  713. EXPORT_SYMBOL(peripheral_request);
  714. int peripheral_request_list(const unsigned short per[], const char *label)
  715. {
  716. u16 cnt;
  717. int ret;
  718. for (cnt = 0; per[cnt] != 0; cnt++) {
  719. ret = peripheral_request(per[cnt], label);
  720. if (ret < 0) {
  721. for ( ; cnt > 0; cnt--)
  722. peripheral_free(per[cnt - 1]);
  723. return ret;
  724. }
  725. }
  726. return 0;
  727. }
  728. EXPORT_SYMBOL(peripheral_request_list);
  729. void peripheral_free(unsigned short per)
  730. {
  731. unsigned long flags;
  732. unsigned short ident = P_IDENT(per);
  733. if (per & P_DONTCARE)
  734. return;
  735. if (!(per & P_DEFINED))
  736. return;
  737. flags = hard_local_irq_save();
  738. if (unlikely(!is_reserved(peri, ident, 0))) {
  739. hard_local_irq_restore(flags);
  740. return;
  741. }
  742. if (!(per & P_MAYSHARE))
  743. port_setup(ident, GPIO_USAGE);
  744. unreserve(peri, ident);
  745. set_label(ident, "free");
  746. hard_local_irq_restore(flags);
  747. }
  748. EXPORT_SYMBOL(peripheral_free);
  749. void peripheral_free_list(const unsigned short per[])
  750. {
  751. u16 cnt;
  752. for (cnt = 0; per[cnt] != 0; cnt++)
  753. peripheral_free(per[cnt]);
  754. }
  755. EXPORT_SYMBOL(peripheral_free_list);
  756. /***********************************************************
  757. *
  758. * FUNCTIONS: Blackfin GPIO Driver
  759. *
  760. * INPUTS/OUTPUTS:
  761. * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
  762. * label String
  763. *
  764. * DESCRIPTION: Blackfin GPIO Driver API
  765. *
  766. * CAUTION:
  767. *************************************************************
  768. * MODIFICATION HISTORY :
  769. **************************************************************/
  770. int bfin_gpio_request(unsigned gpio, const char *label)
  771. {
  772. unsigned long flags;
  773. if (check_gpio(gpio) < 0)
  774. return -EINVAL;
  775. flags = hard_local_irq_save();
  776. /*
  777. * Allow that the identical GPIO can
  778. * be requested from the same driver twice
  779. * Do nothing and return -
  780. */
  781. if (cmp_label(gpio, label) == 0) {
  782. hard_local_irq_restore(flags);
  783. return 0;
  784. }
  785. if (unlikely(is_reserved(gpio, gpio, 1))) {
  786. if (system_state == SYSTEM_BOOTING)
  787. dump_stack();
  788. printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
  789. gpio, get_label(gpio));
  790. hard_local_irq_restore(flags);
  791. return -EBUSY;
  792. }
  793. if (unlikely(is_reserved(peri, gpio, 1))) {
  794. if (system_state == SYSTEM_BOOTING)
  795. dump_stack();
  796. printk(KERN_ERR
  797. "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
  798. gpio, get_label(gpio));
  799. hard_local_irq_restore(flags);
  800. return -EBUSY;
  801. }
  802. if (unlikely(is_reserved(gpio_irq, gpio, 1))) {
  803. printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
  804. " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
  805. }
  806. #ifndef CONFIG_BF54x
  807. else { /* Reset POLAR setting when acquiring a gpio for the first time */
  808. set_gpio_polar(gpio, 0);
  809. }
  810. #endif
  811. reserve(gpio, gpio);
  812. set_label(gpio, label);
  813. hard_local_irq_restore(flags);
  814. port_setup(gpio, GPIO_USAGE);
  815. return 0;
  816. }
  817. EXPORT_SYMBOL(bfin_gpio_request);
  818. void bfin_gpio_free(unsigned gpio)
  819. {
  820. unsigned long flags;
  821. if (check_gpio(gpio) < 0)
  822. return;
  823. might_sleep();
  824. flags = hard_local_irq_save();
  825. if (unlikely(!is_reserved(gpio, gpio, 0))) {
  826. if (system_state == SYSTEM_BOOTING)
  827. dump_stack();
  828. gpio_error(gpio);
  829. hard_local_irq_restore(flags);
  830. return;
  831. }
  832. unreserve(gpio, gpio);
  833. set_label(gpio, "free");
  834. hard_local_irq_restore(flags);
  835. }
  836. EXPORT_SYMBOL(bfin_gpio_free);
  837. #ifdef BFIN_SPECIAL_GPIO_BANKS
  838. DECLARE_RESERVED_MAP(special_gpio, gpio_bank(MAX_RESOURCES));
  839. int bfin_special_gpio_request(unsigned gpio, const char *label)
  840. {
  841. unsigned long flags;
  842. flags = hard_local_irq_save();
  843. /*
  844. * Allow that the identical GPIO can
  845. * be requested from the same driver twice
  846. * Do nothing and return -
  847. */
  848. if (cmp_label(gpio, label) == 0) {
  849. hard_local_irq_restore(flags);
  850. return 0;
  851. }
  852. if (unlikely(is_reserved(special_gpio, gpio, 1))) {
  853. hard_local_irq_restore(flags);
  854. printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
  855. gpio, get_label(gpio));
  856. return -EBUSY;
  857. }
  858. if (unlikely(is_reserved(peri, gpio, 1))) {
  859. hard_local_irq_restore(flags);
  860. printk(KERN_ERR
  861. "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
  862. gpio, get_label(gpio));
  863. return -EBUSY;
  864. }
  865. reserve(special_gpio, gpio);
  866. reserve(peri, gpio);
  867. set_label(gpio, label);
  868. hard_local_irq_restore(flags);
  869. port_setup(gpio, GPIO_USAGE);
  870. return 0;
  871. }
  872. EXPORT_SYMBOL(bfin_special_gpio_request);
  873. void bfin_special_gpio_free(unsigned gpio)
  874. {
  875. unsigned long flags;
  876. might_sleep();
  877. flags = hard_local_irq_save();
  878. if (unlikely(!is_reserved(special_gpio, gpio, 0))) {
  879. gpio_error(gpio);
  880. hard_local_irq_restore(flags);
  881. return;
  882. }
  883. unreserve(special_gpio, gpio);
  884. unreserve(peri, gpio);
  885. set_label(gpio, "free");
  886. hard_local_irq_restore(flags);
  887. }
  888. EXPORT_SYMBOL(bfin_special_gpio_free);
  889. #endif
  890. int bfin_gpio_irq_request(unsigned gpio, const char *label)
  891. {
  892. unsigned long flags;
  893. if (check_gpio(gpio) < 0)
  894. return -EINVAL;
  895. flags = hard_local_irq_save();
  896. if (unlikely(is_reserved(peri, gpio, 1))) {
  897. if (system_state == SYSTEM_BOOTING)
  898. dump_stack();
  899. printk(KERN_ERR
  900. "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
  901. gpio, get_label(gpio));
  902. hard_local_irq_restore(flags);
  903. return -EBUSY;
  904. }
  905. if (unlikely(is_reserved(gpio, gpio, 1)))
  906. printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved by %s! "
  907. "(Documentation/blackfin/bfin-gpio-notes.txt)\n",
  908. gpio, get_label(gpio));
  909. reserve(gpio_irq, gpio);
  910. set_label(gpio, label);
  911. hard_local_irq_restore(flags);
  912. port_setup(gpio, GPIO_USAGE);
  913. return 0;
  914. }
  915. void bfin_gpio_irq_free(unsigned gpio)
  916. {
  917. unsigned long flags;
  918. if (check_gpio(gpio) < 0)
  919. return;
  920. flags = hard_local_irq_save();
  921. if (unlikely(!is_reserved(gpio_irq, gpio, 0))) {
  922. if (system_state == SYSTEM_BOOTING)
  923. dump_stack();
  924. gpio_error(gpio);
  925. hard_local_irq_restore(flags);
  926. return;
  927. }
  928. unreserve(gpio_irq, gpio);
  929. set_label(gpio, "free");
  930. hard_local_irq_restore(flags);
  931. }
  932. static inline void __bfin_gpio_direction_input(unsigned gpio)
  933. {
  934. #ifdef CONFIG_BF54x
  935. gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio);
  936. #else
  937. gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
  938. #endif
  939. gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
  940. }
  941. int bfin_gpio_direction_input(unsigned gpio)
  942. {
  943. unsigned long flags;
  944. if (unlikely(!is_reserved(gpio, gpio, 0))) {
  945. gpio_error(gpio);
  946. return -EINVAL;
  947. }
  948. flags = hard_local_irq_save();
  949. __bfin_gpio_direction_input(gpio);
  950. AWA_DUMMY_READ(inen);
  951. hard_local_irq_restore(flags);
  952. return 0;
  953. }
  954. EXPORT_SYMBOL(bfin_gpio_direction_input);
  955. void bfin_gpio_irq_prepare(unsigned gpio)
  956. {
  957. #ifdef CONFIG_BF54x
  958. unsigned long flags;
  959. #endif
  960. port_setup(gpio, GPIO_USAGE);
  961. #ifdef CONFIG_BF54x
  962. flags = hard_local_irq_save();
  963. __bfin_gpio_direction_input(gpio);
  964. hard_local_irq_restore(flags);
  965. #endif
  966. }
  967. void bfin_gpio_set_value(unsigned gpio, int arg)
  968. {
  969. if (arg)
  970. gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
  971. else
  972. gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
  973. }
  974. EXPORT_SYMBOL(bfin_gpio_set_value);
  975. int bfin_gpio_direction_output(unsigned gpio, int value)
  976. {
  977. unsigned long flags;
  978. if (unlikely(!is_reserved(gpio, gpio, 0))) {
  979. gpio_error(gpio);
  980. return -EINVAL;
  981. }
  982. flags = hard_local_irq_save();
  983. gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
  984. gpio_set_value(gpio, value);
  985. #ifdef CONFIG_BF54x
  986. gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio);
  987. #else
  988. gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
  989. #endif
  990. AWA_DUMMY_READ(dir);
  991. hard_local_irq_restore(flags);
  992. return 0;
  993. }
  994. EXPORT_SYMBOL(bfin_gpio_direction_output);
  995. int bfin_gpio_get_value(unsigned gpio)
  996. {
  997. #ifdef CONFIG_BF54x
  998. return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)));
  999. #else
  1000. unsigned long flags;
  1001. if (unlikely(get_gpio_edge(gpio))) {
  1002. int ret;
  1003. flags = hard_local_irq_save();
  1004. set_gpio_edge(gpio, 0);
  1005. ret = get_gpio_data(gpio);
  1006. set_gpio_edge(gpio, 1);
  1007. hard_local_irq_restore(flags);
  1008. return ret;
  1009. } else
  1010. return get_gpio_data(gpio);
  1011. #endif
  1012. }
  1013. EXPORT_SYMBOL(bfin_gpio_get_value);
  1014. /* If we are booting from SPI and our board lacks a strong enough pull up,
  1015. * the core can reset and execute the bootrom faster than the resistor can
  1016. * pull the signal logically high. To work around this (common) error in
  1017. * board design, we explicitly set the pin back to GPIO mode, force /CS
  1018. * high, and wait for the electrons to do their thing.
  1019. *
  1020. * This function only makes sense to be called from reset code, but it
  1021. * lives here as we need to force all the GPIO states w/out going through
  1022. * BUG() checks and such.
  1023. */
  1024. void bfin_reset_boot_spi_cs(unsigned short pin)
  1025. {
  1026. unsigned short gpio = P_IDENT(pin);
  1027. port_setup(gpio, GPIO_USAGE);
  1028. gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
  1029. AWA_DUMMY_READ(data_set);
  1030. udelay(1);
  1031. }
  1032. #if defined(CONFIG_PROC_FS)
  1033. static int gpio_proc_show(struct seq_file *m, void *v)
  1034. {
  1035. int c, irq, gpio;
  1036. for (c = 0; c < MAX_RESOURCES; c++) {
  1037. irq = is_reserved(gpio_irq, c, 1);
  1038. gpio = is_reserved(gpio, c, 1);
  1039. if (!check_gpio(c) && (gpio || irq))
  1040. seq_printf(m, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c,
  1041. get_label(c), (gpio && irq) ? " *" : "",
  1042. get_gpio_dir(c) ? "OUTPUT" : "INPUT");
  1043. else if (is_reserved(peri, c, 1))
  1044. seq_printf(m, "GPIO_%d: \t%s \t\tPeripheral\n", c, get_label(c));
  1045. else
  1046. continue;
  1047. }
  1048. return 0;
  1049. }
  1050. static int gpio_proc_open(struct inode *inode, struct file *file)
  1051. {
  1052. return single_open(file, gpio_proc_show, NULL);
  1053. }
  1054. static const struct file_operations gpio_proc_ops = {
  1055. .open = gpio_proc_open,
  1056. .read = seq_read,
  1057. .llseek = seq_lseek,
  1058. .release = single_release,
  1059. };
  1060. static __init int gpio_register_proc(void)
  1061. {
  1062. struct proc_dir_entry *proc_gpio;
  1063. proc_gpio = proc_create("gpio", S_IRUGO, NULL, &gpio_proc_ops);
  1064. return proc_gpio != NULL;
  1065. }
  1066. __initcall(gpio_register_proc);
  1067. #endif
  1068. #ifdef CONFIG_GPIOLIB
  1069. static int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
  1070. {
  1071. return bfin_gpio_direction_input(gpio);
  1072. }
  1073. static int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
  1074. {
  1075. return bfin_gpio_direction_output(gpio, level);
  1076. }
  1077. static int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
  1078. {
  1079. return bfin_gpio_get_value(gpio);
  1080. }
  1081. static void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
  1082. {
  1083. return bfin_gpio_set_value(gpio, value);
  1084. }
  1085. static int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
  1086. {
  1087. return bfin_gpio_request(gpio, chip->label);
  1088. }
  1089. static void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
  1090. {
  1091. return bfin_gpio_free(gpio);
  1092. }
  1093. static int bfin_gpiolib_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
  1094. {
  1095. return gpio + GPIO_IRQ_BASE;
  1096. }
  1097. static struct gpio_chip bfin_chip = {
  1098. .label = "BFIN-GPIO",
  1099. .direction_input = bfin_gpiolib_direction_input,
  1100. .get = bfin_gpiolib_get_value,
  1101. .direction_output = bfin_gpiolib_direction_output,
  1102. .set = bfin_gpiolib_set_value,
  1103. .request = bfin_gpiolib_gpio_request,
  1104. .free = bfin_gpiolib_gpio_free,
  1105. .to_irq = bfin_gpiolib_gpio_to_irq,
  1106. .base = 0,
  1107. .ngpio = MAX_BLACKFIN_GPIOS,
  1108. };
  1109. static int __init bfin_gpiolib_setup(void)
  1110. {
  1111. return gpiochip_add(&bfin_chip);
  1112. }
  1113. arch_initcall(bfin_gpiolib_setup);
  1114. #endif