mxser.c 69 KB

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  1. /*
  2. * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
  3. *
  4. * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
  5. * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
  6. *
  7. * This code is loosely based on the 1.8 moxa driver which is based on
  8. * Linux serial driver, written by Linus Torvalds, Theodore T'so and
  9. * others.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  17. * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
  18. * www.moxa.com.
  19. * - Fixed x86_64 cleanness
  20. */
  21. #include <linux/module.h>
  22. #include <linux/errno.h>
  23. #include <linux/signal.h>
  24. #include <linux/sched.h>
  25. #include <linux/timer.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/tty.h>
  28. #include <linux/tty_flip.h>
  29. #include <linux/serial.h>
  30. #include <linux/serial_reg.h>
  31. #include <linux/major.h>
  32. #include <linux/string.h>
  33. #include <linux/fcntl.h>
  34. #include <linux/ptrace.h>
  35. #include <linux/ioport.h>
  36. #include <linux/mm.h>
  37. #include <linux/delay.h>
  38. #include <linux/pci.h>
  39. #include <linux/bitops.h>
  40. #include <linux/slab.h>
  41. #include <linux/ratelimit.h>
  42. #include <asm/io.h>
  43. #include <asm/irq.h>
  44. #include <asm/uaccess.h>
  45. #include "mxser.h"
  46. #define MXSER_VERSION "2.0.5" /* 1.14 */
  47. #define MXSERMAJOR 174
  48. #define MXSER_BOARDS 4 /* Max. boards */
  49. #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
  50. #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
  51. #define MXSER_ISR_PASS_LIMIT 100
  52. /*CheckIsMoxaMust return value*/
  53. #define MOXA_OTHER_UART 0x00
  54. #define MOXA_MUST_MU150_HWID 0x01
  55. #define MOXA_MUST_MU860_HWID 0x02
  56. #define WAKEUP_CHARS 256
  57. #define UART_MCR_AFE 0x20
  58. #define UART_LSR_SPECIAL 0x1E
  59. #define PCI_DEVICE_ID_POS104UL 0x1044
  60. #define PCI_DEVICE_ID_CB108 0x1080
  61. #define PCI_DEVICE_ID_CP102UF 0x1023
  62. #define PCI_DEVICE_ID_CP112UL 0x1120
  63. #define PCI_DEVICE_ID_CB114 0x1142
  64. #define PCI_DEVICE_ID_CP114UL 0x1143
  65. #define PCI_DEVICE_ID_CB134I 0x1341
  66. #define PCI_DEVICE_ID_CP138U 0x1380
  67. #define C168_ASIC_ID 1
  68. #define C104_ASIC_ID 2
  69. #define C102_ASIC_ID 0xB
  70. #define CI132_ASIC_ID 4
  71. #define CI134_ASIC_ID 3
  72. #define CI104J_ASIC_ID 5
  73. #define MXSER_HIGHBAUD 1
  74. #define MXSER_HAS2 2
  75. /* This is only for PCI */
  76. static const struct {
  77. int type;
  78. int tx_fifo;
  79. int rx_fifo;
  80. int xmit_fifo_size;
  81. int rx_high_water;
  82. int rx_trigger;
  83. int rx_low_water;
  84. long max_baud;
  85. } Gpci_uart_info[] = {
  86. {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
  87. {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
  88. {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
  89. };
  90. #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
  91. struct mxser_cardinfo {
  92. char *name;
  93. unsigned int nports;
  94. unsigned int flags;
  95. };
  96. static const struct mxser_cardinfo mxser_cards[] = {
  97. /* 0*/ { "C168 series", 8, },
  98. { "C104 series", 4, },
  99. { "CI-104J series", 4, },
  100. { "C168H/PCI series", 8, },
  101. { "C104H/PCI series", 4, },
  102. /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
  103. { "CI-132 series", 4, MXSER_HAS2 },
  104. { "CI-134 series", 4, },
  105. { "CP-132 series", 2, },
  106. { "CP-114 series", 4, },
  107. /*10*/ { "CT-114 series", 4, },
  108. { "CP-102 series", 2, MXSER_HIGHBAUD },
  109. { "CP-104U series", 4, },
  110. { "CP-168U series", 8, },
  111. { "CP-132U series", 2, },
  112. /*15*/ { "CP-134U series", 4, },
  113. { "CP-104JU series", 4, },
  114. { "Moxa UC7000 Serial", 8, }, /* RC7000 */
  115. { "CP-118U series", 8, },
  116. { "CP-102UL series", 2, },
  117. /*20*/ { "CP-102U series", 2, },
  118. { "CP-118EL series", 8, },
  119. { "CP-168EL series", 8, },
  120. { "CP-104EL series", 4, },
  121. { "CB-108 series", 8, },
  122. /*25*/ { "CB-114 series", 4, },
  123. { "CB-134I series", 4, },
  124. { "CP-138U series", 8, },
  125. { "POS-104UL series", 4, },
  126. { "CP-114UL series", 4, },
  127. /*30*/ { "CP-102UF series", 2, },
  128. { "CP-112UL series", 2, },
  129. };
  130. /* driver_data correspond to the lines in the structure above
  131. see also ISA probe function before you change something */
  132. static struct pci_device_id mxser_pcibrds[] = {
  133. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
  134. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
  135. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
  136. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
  137. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
  138. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
  139. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
  140. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
  141. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
  142. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
  143. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
  144. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
  145. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
  146. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
  147. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
  148. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
  149. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
  150. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
  151. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
  152. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
  153. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
  154. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
  155. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
  156. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
  157. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
  158. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 },
  159. { }
  160. };
  161. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
  162. static unsigned long ioaddr[MXSER_BOARDS];
  163. static int ttymajor = MXSERMAJOR;
  164. /* Variables for insmod */
  165. MODULE_AUTHOR("Casper Yang");
  166. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
  167. module_param_array(ioaddr, ulong, NULL, 0);
  168. MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
  169. module_param(ttymajor, int, 0);
  170. MODULE_LICENSE("GPL");
  171. struct mxser_log {
  172. int tick;
  173. unsigned long rxcnt[MXSER_PORTS];
  174. unsigned long txcnt[MXSER_PORTS];
  175. };
  176. struct mxser_mon {
  177. unsigned long rxcnt;
  178. unsigned long txcnt;
  179. unsigned long up_rxcnt;
  180. unsigned long up_txcnt;
  181. int modem_status;
  182. unsigned char hold_reason;
  183. };
  184. struct mxser_mon_ext {
  185. unsigned long rx_cnt[32];
  186. unsigned long tx_cnt[32];
  187. unsigned long up_rxcnt[32];
  188. unsigned long up_txcnt[32];
  189. int modem_status[32];
  190. long baudrate[32];
  191. int databits[32];
  192. int stopbits[32];
  193. int parity[32];
  194. int flowctrl[32];
  195. int fifo[32];
  196. int iftype[32];
  197. };
  198. struct mxser_board;
  199. struct mxser_port {
  200. struct tty_port port;
  201. struct mxser_board *board;
  202. unsigned long ioaddr;
  203. unsigned long opmode_ioaddr;
  204. int max_baud;
  205. int rx_high_water;
  206. int rx_trigger; /* Rx fifo trigger level */
  207. int rx_low_water;
  208. int baud_base; /* max. speed */
  209. int type; /* UART type */
  210. int x_char; /* xon/xoff character */
  211. int IER; /* Interrupt Enable Register */
  212. int MCR; /* Modem control register */
  213. unsigned char stop_rx;
  214. unsigned char ldisc_stop_rx;
  215. int custom_divisor;
  216. unsigned char err_shadow;
  217. struct async_icount icount; /* kernel counters for 4 input interrupts */
  218. int timeout;
  219. int read_status_mask;
  220. int ignore_status_mask;
  221. int xmit_fifo_size;
  222. int xmit_head;
  223. int xmit_tail;
  224. int xmit_cnt;
  225. struct ktermios normal_termios;
  226. struct mxser_mon mon_data;
  227. spinlock_t slock;
  228. };
  229. struct mxser_board {
  230. unsigned int idx;
  231. int irq;
  232. const struct mxser_cardinfo *info;
  233. unsigned long vector;
  234. unsigned long vector_mask;
  235. int chip_flag;
  236. int uart_type;
  237. struct mxser_port ports[MXSER_PORTS_PER_BOARD];
  238. };
  239. struct mxser_mstatus {
  240. tcflag_t cflag;
  241. int cts;
  242. int dsr;
  243. int ri;
  244. int dcd;
  245. };
  246. static struct mxser_board mxser_boards[MXSER_BOARDS];
  247. static struct tty_driver *mxvar_sdriver;
  248. static struct mxser_log mxvar_log;
  249. static int mxser_set_baud_method[MXSER_PORTS + 1];
  250. static void mxser_enable_must_enchance_mode(unsigned long baseio)
  251. {
  252. u8 oldlcr;
  253. u8 efr;
  254. oldlcr = inb(baseio + UART_LCR);
  255. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  256. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  257. efr |= MOXA_MUST_EFR_EFRB_ENABLE;
  258. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  259. outb(oldlcr, baseio + UART_LCR);
  260. }
  261. #ifdef CONFIG_PCI
  262. static void mxser_disable_must_enchance_mode(unsigned long baseio)
  263. {
  264. u8 oldlcr;
  265. u8 efr;
  266. oldlcr = inb(baseio + UART_LCR);
  267. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  268. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  269. efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
  270. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  271. outb(oldlcr, baseio + UART_LCR);
  272. }
  273. #endif
  274. static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
  275. {
  276. u8 oldlcr;
  277. u8 efr;
  278. oldlcr = inb(baseio + UART_LCR);
  279. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  280. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  281. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  282. efr |= MOXA_MUST_EFR_BANK0;
  283. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  284. outb(value, baseio + MOXA_MUST_XON1_REGISTER);
  285. outb(oldlcr, baseio + UART_LCR);
  286. }
  287. static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
  288. {
  289. u8 oldlcr;
  290. u8 efr;
  291. oldlcr = inb(baseio + UART_LCR);
  292. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  293. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  294. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  295. efr |= MOXA_MUST_EFR_BANK0;
  296. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  297. outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
  298. outb(oldlcr, baseio + UART_LCR);
  299. }
  300. static void mxser_set_must_fifo_value(struct mxser_port *info)
  301. {
  302. u8 oldlcr;
  303. u8 efr;
  304. oldlcr = inb(info->ioaddr + UART_LCR);
  305. outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
  306. efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
  307. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  308. efr |= MOXA_MUST_EFR_BANK1;
  309. outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
  310. outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
  311. outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
  312. outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
  313. outb(oldlcr, info->ioaddr + UART_LCR);
  314. }
  315. static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
  316. {
  317. u8 oldlcr;
  318. u8 efr;
  319. oldlcr = inb(baseio + UART_LCR);
  320. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  321. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  322. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  323. efr |= MOXA_MUST_EFR_BANK2;
  324. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  325. outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
  326. outb(oldlcr, baseio + UART_LCR);
  327. }
  328. #ifdef CONFIG_PCI
  329. static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
  330. {
  331. u8 oldlcr;
  332. u8 efr;
  333. oldlcr = inb(baseio + UART_LCR);
  334. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  335. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  336. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  337. efr |= MOXA_MUST_EFR_BANK2;
  338. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  339. *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
  340. outb(oldlcr, baseio + UART_LCR);
  341. }
  342. #endif
  343. static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
  344. {
  345. u8 oldlcr;
  346. u8 efr;
  347. oldlcr = inb(baseio + UART_LCR);
  348. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  349. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  350. efr &= ~MOXA_MUST_EFR_SF_MASK;
  351. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  352. outb(oldlcr, baseio + UART_LCR);
  353. }
  354. static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
  355. {
  356. u8 oldlcr;
  357. u8 efr;
  358. oldlcr = inb(baseio + UART_LCR);
  359. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  360. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  361. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  362. efr |= MOXA_MUST_EFR_SF_TX1;
  363. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  364. outb(oldlcr, baseio + UART_LCR);
  365. }
  366. static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
  367. {
  368. u8 oldlcr;
  369. u8 efr;
  370. oldlcr = inb(baseio + UART_LCR);
  371. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  372. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  373. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  374. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  375. outb(oldlcr, baseio + UART_LCR);
  376. }
  377. static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
  378. {
  379. u8 oldlcr;
  380. u8 efr;
  381. oldlcr = inb(baseio + UART_LCR);
  382. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  383. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  384. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  385. efr |= MOXA_MUST_EFR_SF_RX1;
  386. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  387. outb(oldlcr, baseio + UART_LCR);
  388. }
  389. static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
  390. {
  391. u8 oldlcr;
  392. u8 efr;
  393. oldlcr = inb(baseio + UART_LCR);
  394. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  395. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  396. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  397. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  398. outb(oldlcr, baseio + UART_LCR);
  399. }
  400. #ifdef CONFIG_PCI
  401. static int __devinit CheckIsMoxaMust(unsigned long io)
  402. {
  403. u8 oldmcr, hwid;
  404. int i;
  405. outb(0, io + UART_LCR);
  406. mxser_disable_must_enchance_mode(io);
  407. oldmcr = inb(io + UART_MCR);
  408. outb(0, io + UART_MCR);
  409. mxser_set_must_xon1_value(io, 0x11);
  410. if ((hwid = inb(io + UART_MCR)) != 0) {
  411. outb(oldmcr, io + UART_MCR);
  412. return MOXA_OTHER_UART;
  413. }
  414. mxser_get_must_hardware_id(io, &hwid);
  415. for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
  416. if (hwid == Gpci_uart_info[i].type)
  417. return (int)hwid;
  418. }
  419. return MOXA_OTHER_UART;
  420. }
  421. #endif
  422. static void process_txrx_fifo(struct mxser_port *info)
  423. {
  424. int i;
  425. if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
  426. info->rx_trigger = 1;
  427. info->rx_high_water = 1;
  428. info->rx_low_water = 1;
  429. info->xmit_fifo_size = 1;
  430. } else
  431. for (i = 0; i < UART_INFO_NUM; i++)
  432. if (info->board->chip_flag == Gpci_uart_info[i].type) {
  433. info->rx_trigger = Gpci_uart_info[i].rx_trigger;
  434. info->rx_low_water = Gpci_uart_info[i].rx_low_water;
  435. info->rx_high_water = Gpci_uart_info[i].rx_high_water;
  436. info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
  437. break;
  438. }
  439. }
  440. static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
  441. {
  442. static unsigned char mxser_msr[MXSER_PORTS + 1];
  443. unsigned char status = 0;
  444. status = inb(baseaddr + UART_MSR);
  445. mxser_msr[port] &= 0x0F;
  446. mxser_msr[port] |= status;
  447. status = mxser_msr[port];
  448. if (mode)
  449. mxser_msr[port] = 0;
  450. return status;
  451. }
  452. static int mxser_carrier_raised(struct tty_port *port)
  453. {
  454. struct mxser_port *mp = container_of(port, struct mxser_port, port);
  455. return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
  456. }
  457. static void mxser_dtr_rts(struct tty_port *port, int on)
  458. {
  459. struct mxser_port *mp = container_of(port, struct mxser_port, port);
  460. unsigned long flags;
  461. spin_lock_irqsave(&mp->slock, flags);
  462. if (on)
  463. outb(inb(mp->ioaddr + UART_MCR) |
  464. UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
  465. else
  466. outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
  467. mp->ioaddr + UART_MCR);
  468. spin_unlock_irqrestore(&mp->slock, flags);
  469. }
  470. static int mxser_set_baud(struct tty_struct *tty, long newspd)
  471. {
  472. struct mxser_port *info = tty->driver_data;
  473. int quot = 0, baud;
  474. unsigned char cval;
  475. if (!info->ioaddr)
  476. return -1;
  477. if (newspd > info->max_baud)
  478. return -1;
  479. if (newspd == 134) {
  480. quot = 2 * info->baud_base / 269;
  481. tty_encode_baud_rate(tty, 134, 134);
  482. } else if (newspd) {
  483. quot = info->baud_base / newspd;
  484. if (quot == 0)
  485. quot = 1;
  486. baud = info->baud_base/quot;
  487. tty_encode_baud_rate(tty, baud, baud);
  488. } else {
  489. quot = 0;
  490. }
  491. info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
  492. info->timeout += HZ / 50; /* Add .02 seconds of slop */
  493. if (quot) {
  494. info->MCR |= UART_MCR_DTR;
  495. outb(info->MCR, info->ioaddr + UART_MCR);
  496. } else {
  497. info->MCR &= ~UART_MCR_DTR;
  498. outb(info->MCR, info->ioaddr + UART_MCR);
  499. return 0;
  500. }
  501. cval = inb(info->ioaddr + UART_LCR);
  502. outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
  503. outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
  504. outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
  505. outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
  506. #ifdef BOTHER
  507. if (C_BAUD(tty) == BOTHER) {
  508. quot = info->baud_base % newspd;
  509. quot *= 8;
  510. if (quot % newspd > newspd / 2) {
  511. quot /= newspd;
  512. quot++;
  513. } else
  514. quot /= newspd;
  515. mxser_set_must_enum_value(info->ioaddr, quot);
  516. } else
  517. #endif
  518. mxser_set_must_enum_value(info->ioaddr, 0);
  519. return 0;
  520. }
  521. /*
  522. * This routine is called to set the UART divisor registers to match
  523. * the specified baud rate for a serial port.
  524. */
  525. static int mxser_change_speed(struct tty_struct *tty,
  526. struct ktermios *old_termios)
  527. {
  528. struct mxser_port *info = tty->driver_data;
  529. unsigned cflag, cval, fcr;
  530. int ret = 0;
  531. unsigned char status;
  532. cflag = tty->termios->c_cflag;
  533. if (!info->ioaddr)
  534. return ret;
  535. if (mxser_set_baud_method[tty->index] == 0)
  536. mxser_set_baud(tty, tty_get_baud_rate(tty));
  537. /* byte size and parity */
  538. switch (cflag & CSIZE) {
  539. case CS5:
  540. cval = 0x00;
  541. break;
  542. case CS6:
  543. cval = 0x01;
  544. break;
  545. case CS7:
  546. cval = 0x02;
  547. break;
  548. case CS8:
  549. cval = 0x03;
  550. break;
  551. default:
  552. cval = 0x00;
  553. break; /* too keep GCC shut... */
  554. }
  555. if (cflag & CSTOPB)
  556. cval |= 0x04;
  557. if (cflag & PARENB)
  558. cval |= UART_LCR_PARITY;
  559. if (!(cflag & PARODD))
  560. cval |= UART_LCR_EPAR;
  561. if (cflag & CMSPAR)
  562. cval |= UART_LCR_SPAR;
  563. if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
  564. if (info->board->chip_flag) {
  565. fcr = UART_FCR_ENABLE_FIFO;
  566. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  567. mxser_set_must_fifo_value(info);
  568. } else
  569. fcr = 0;
  570. } else {
  571. fcr = UART_FCR_ENABLE_FIFO;
  572. if (info->board->chip_flag) {
  573. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  574. mxser_set_must_fifo_value(info);
  575. } else {
  576. switch (info->rx_trigger) {
  577. case 1:
  578. fcr |= UART_FCR_TRIGGER_1;
  579. break;
  580. case 4:
  581. fcr |= UART_FCR_TRIGGER_4;
  582. break;
  583. case 8:
  584. fcr |= UART_FCR_TRIGGER_8;
  585. break;
  586. default:
  587. fcr |= UART_FCR_TRIGGER_14;
  588. break;
  589. }
  590. }
  591. }
  592. /* CTS flow control flag and modem status interrupts */
  593. info->IER &= ~UART_IER_MSI;
  594. info->MCR &= ~UART_MCR_AFE;
  595. if (cflag & CRTSCTS) {
  596. info->port.flags |= ASYNC_CTS_FLOW;
  597. info->IER |= UART_IER_MSI;
  598. if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
  599. info->MCR |= UART_MCR_AFE;
  600. } else {
  601. status = inb(info->ioaddr + UART_MSR);
  602. if (tty->hw_stopped) {
  603. if (status & UART_MSR_CTS) {
  604. tty->hw_stopped = 0;
  605. if (info->type != PORT_16550A &&
  606. !info->board->chip_flag) {
  607. outb(info->IER & ~UART_IER_THRI,
  608. info->ioaddr +
  609. UART_IER);
  610. info->IER |= UART_IER_THRI;
  611. outb(info->IER, info->ioaddr +
  612. UART_IER);
  613. }
  614. tty_wakeup(tty);
  615. }
  616. } else {
  617. if (!(status & UART_MSR_CTS)) {
  618. tty->hw_stopped = 1;
  619. if ((info->type != PORT_16550A) &&
  620. (!info->board->chip_flag)) {
  621. info->IER &= ~UART_IER_THRI;
  622. outb(info->IER, info->ioaddr +
  623. UART_IER);
  624. }
  625. }
  626. }
  627. }
  628. } else {
  629. info->port.flags &= ~ASYNC_CTS_FLOW;
  630. }
  631. outb(info->MCR, info->ioaddr + UART_MCR);
  632. if (cflag & CLOCAL) {
  633. info->port.flags &= ~ASYNC_CHECK_CD;
  634. } else {
  635. info->port.flags |= ASYNC_CHECK_CD;
  636. info->IER |= UART_IER_MSI;
  637. }
  638. outb(info->IER, info->ioaddr + UART_IER);
  639. /*
  640. * Set up parity check flag
  641. */
  642. info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  643. if (I_INPCK(tty))
  644. info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  645. if (I_BRKINT(tty) || I_PARMRK(tty))
  646. info->read_status_mask |= UART_LSR_BI;
  647. info->ignore_status_mask = 0;
  648. if (I_IGNBRK(tty)) {
  649. info->ignore_status_mask |= UART_LSR_BI;
  650. info->read_status_mask |= UART_LSR_BI;
  651. /*
  652. * If we're ignore parity and break indicators, ignore
  653. * overruns too. (For real raw support).
  654. */
  655. if (I_IGNPAR(tty)) {
  656. info->ignore_status_mask |=
  657. UART_LSR_OE |
  658. UART_LSR_PE |
  659. UART_LSR_FE;
  660. info->read_status_mask |=
  661. UART_LSR_OE |
  662. UART_LSR_PE |
  663. UART_LSR_FE;
  664. }
  665. }
  666. if (info->board->chip_flag) {
  667. mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
  668. mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
  669. if (I_IXON(tty)) {
  670. mxser_enable_must_rx_software_flow_control(
  671. info->ioaddr);
  672. } else {
  673. mxser_disable_must_rx_software_flow_control(
  674. info->ioaddr);
  675. }
  676. if (I_IXOFF(tty)) {
  677. mxser_enable_must_tx_software_flow_control(
  678. info->ioaddr);
  679. } else {
  680. mxser_disable_must_tx_software_flow_control(
  681. info->ioaddr);
  682. }
  683. }
  684. outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
  685. outb(cval, info->ioaddr + UART_LCR);
  686. return ret;
  687. }
  688. static void mxser_check_modem_status(struct tty_struct *tty,
  689. struct mxser_port *port, int status)
  690. {
  691. /* update input line counters */
  692. if (status & UART_MSR_TERI)
  693. port->icount.rng++;
  694. if (status & UART_MSR_DDSR)
  695. port->icount.dsr++;
  696. if (status & UART_MSR_DDCD)
  697. port->icount.dcd++;
  698. if (status & UART_MSR_DCTS)
  699. port->icount.cts++;
  700. port->mon_data.modem_status = status;
  701. wake_up_interruptible(&port->port.delta_msr_wait);
  702. if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
  703. if (status & UART_MSR_DCD)
  704. wake_up_interruptible(&port->port.open_wait);
  705. }
  706. if (port->port.flags & ASYNC_CTS_FLOW) {
  707. if (tty->hw_stopped) {
  708. if (status & UART_MSR_CTS) {
  709. tty->hw_stopped = 0;
  710. if ((port->type != PORT_16550A) &&
  711. (!port->board->chip_flag)) {
  712. outb(port->IER & ~UART_IER_THRI,
  713. port->ioaddr + UART_IER);
  714. port->IER |= UART_IER_THRI;
  715. outb(port->IER, port->ioaddr +
  716. UART_IER);
  717. }
  718. tty_wakeup(tty);
  719. }
  720. } else {
  721. if (!(status & UART_MSR_CTS)) {
  722. tty->hw_stopped = 1;
  723. if (port->type != PORT_16550A &&
  724. !port->board->chip_flag) {
  725. port->IER &= ~UART_IER_THRI;
  726. outb(port->IER, port->ioaddr +
  727. UART_IER);
  728. }
  729. }
  730. }
  731. }
  732. }
  733. static int mxser_activate(struct tty_port *port, struct tty_struct *tty)
  734. {
  735. struct mxser_port *info = container_of(port, struct mxser_port, port);
  736. unsigned long page;
  737. unsigned long flags;
  738. page = __get_free_page(GFP_KERNEL);
  739. if (!page)
  740. return -ENOMEM;
  741. spin_lock_irqsave(&info->slock, flags);
  742. if (!info->ioaddr || !info->type) {
  743. set_bit(TTY_IO_ERROR, &tty->flags);
  744. free_page(page);
  745. spin_unlock_irqrestore(&info->slock, flags);
  746. return 0;
  747. }
  748. info->port.xmit_buf = (unsigned char *) page;
  749. /*
  750. * Clear the FIFO buffers and disable them
  751. * (they will be reenabled in mxser_change_speed())
  752. */
  753. if (info->board->chip_flag)
  754. outb((UART_FCR_CLEAR_RCVR |
  755. UART_FCR_CLEAR_XMIT |
  756. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
  757. else
  758. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  759. info->ioaddr + UART_FCR);
  760. /*
  761. * At this point there's no way the LSR could still be 0xFF;
  762. * if it is, then bail out, because there's likely no UART
  763. * here.
  764. */
  765. if (inb(info->ioaddr + UART_LSR) == 0xff) {
  766. spin_unlock_irqrestore(&info->slock, flags);
  767. if (capable(CAP_SYS_ADMIN)) {
  768. set_bit(TTY_IO_ERROR, &tty->flags);
  769. return 0;
  770. } else
  771. return -ENODEV;
  772. }
  773. /*
  774. * Clear the interrupt registers.
  775. */
  776. (void) inb(info->ioaddr + UART_LSR);
  777. (void) inb(info->ioaddr + UART_RX);
  778. (void) inb(info->ioaddr + UART_IIR);
  779. (void) inb(info->ioaddr + UART_MSR);
  780. /*
  781. * Now, initialize the UART
  782. */
  783. outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
  784. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  785. outb(info->MCR, info->ioaddr + UART_MCR);
  786. /*
  787. * Finally, enable interrupts
  788. */
  789. info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
  790. if (info->board->chip_flag)
  791. info->IER |= MOXA_MUST_IER_EGDAI;
  792. outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
  793. /*
  794. * And clear the interrupt registers again for luck.
  795. */
  796. (void) inb(info->ioaddr + UART_LSR);
  797. (void) inb(info->ioaddr + UART_RX);
  798. (void) inb(info->ioaddr + UART_IIR);
  799. (void) inb(info->ioaddr + UART_MSR);
  800. clear_bit(TTY_IO_ERROR, &tty->flags);
  801. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  802. /*
  803. * and set the speed of the serial port
  804. */
  805. mxser_change_speed(tty, NULL);
  806. spin_unlock_irqrestore(&info->slock, flags);
  807. return 0;
  808. }
  809. /*
  810. * This routine will shutdown a serial port
  811. */
  812. static void mxser_shutdown_port(struct tty_port *port)
  813. {
  814. struct mxser_port *info = container_of(port, struct mxser_port, port);
  815. unsigned long flags;
  816. spin_lock_irqsave(&info->slock, flags);
  817. /*
  818. * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
  819. * here so the queue might never be waken up
  820. */
  821. wake_up_interruptible(&info->port.delta_msr_wait);
  822. /*
  823. * Free the xmit buffer, if necessary
  824. */
  825. if (info->port.xmit_buf) {
  826. free_page((unsigned long) info->port.xmit_buf);
  827. info->port.xmit_buf = NULL;
  828. }
  829. info->IER = 0;
  830. outb(0x00, info->ioaddr + UART_IER);
  831. /* clear Rx/Tx FIFO's */
  832. if (info->board->chip_flag)
  833. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
  834. MOXA_MUST_FCR_GDA_MODE_ENABLE,
  835. info->ioaddr + UART_FCR);
  836. else
  837. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
  838. info->ioaddr + UART_FCR);
  839. /* read data port to reset things */
  840. (void) inb(info->ioaddr + UART_RX);
  841. if (info->board->chip_flag)
  842. SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  843. spin_unlock_irqrestore(&info->slock, flags);
  844. }
  845. /*
  846. * This routine is called whenever a serial port is opened. It
  847. * enables interrupts for a serial port, linking in its async structure into
  848. * the IRQ chain. It also performs the serial-specific
  849. * initialization for the tty structure.
  850. */
  851. static int mxser_open(struct tty_struct *tty, struct file *filp)
  852. {
  853. struct mxser_port *info;
  854. int line;
  855. line = tty->index;
  856. if (line == MXSER_PORTS)
  857. return 0;
  858. info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
  859. if (!info->ioaddr)
  860. return -ENODEV;
  861. tty->driver_data = info;
  862. return tty_port_open(&info->port, tty, filp);
  863. }
  864. static void mxser_flush_buffer(struct tty_struct *tty)
  865. {
  866. struct mxser_port *info = tty->driver_data;
  867. char fcr;
  868. unsigned long flags;
  869. spin_lock_irqsave(&info->slock, flags);
  870. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  871. fcr = inb(info->ioaddr + UART_FCR);
  872. outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  873. info->ioaddr + UART_FCR);
  874. outb(fcr, info->ioaddr + UART_FCR);
  875. spin_unlock_irqrestore(&info->slock, flags);
  876. tty_wakeup(tty);
  877. }
  878. static void mxser_close_port(struct tty_port *port)
  879. {
  880. struct mxser_port *info = container_of(port, struct mxser_port, port);
  881. unsigned long timeout;
  882. /*
  883. * At this point we stop accepting input. To do this, we
  884. * disable the receive line status interrupts, and tell the
  885. * interrupt driver to stop checking the data ready bit in the
  886. * line status register.
  887. */
  888. info->IER &= ~UART_IER_RLSI;
  889. if (info->board->chip_flag)
  890. info->IER &= ~MOXA_MUST_RECV_ISR;
  891. outb(info->IER, info->ioaddr + UART_IER);
  892. /*
  893. * Before we drop DTR, make sure the UART transmitter
  894. * has completely drained; this is especially
  895. * important if there is a transmit FIFO!
  896. */
  897. timeout = jiffies + HZ;
  898. while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
  899. schedule_timeout_interruptible(5);
  900. if (time_after(jiffies, timeout))
  901. break;
  902. }
  903. }
  904. /*
  905. * This routine is called when the serial port gets closed. First, we
  906. * wait for the last remaining data to be sent. Then, we unlink its
  907. * async structure from the interrupt chain if necessary, and we free
  908. * that IRQ if nothing is left in the chain.
  909. */
  910. static void mxser_close(struct tty_struct *tty, struct file *filp)
  911. {
  912. struct mxser_port *info = tty->driver_data;
  913. struct tty_port *port = &info->port;
  914. if (tty->index == MXSER_PORTS || info == NULL)
  915. return;
  916. if (tty_port_close_start(port, tty, filp) == 0)
  917. return;
  918. mutex_lock(&port->mutex);
  919. mxser_close_port(port);
  920. mxser_flush_buffer(tty);
  921. mxser_shutdown_port(port);
  922. clear_bit(ASYNCB_INITIALIZED, &port->flags);
  923. mutex_unlock(&port->mutex);
  924. /* Right now the tty_port set is done outside of the close_end helper
  925. as we don't yet have everyone using refcounts */
  926. tty_port_close_end(port, tty);
  927. tty_port_tty_set(port, NULL);
  928. }
  929. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
  930. {
  931. int c, total = 0;
  932. struct mxser_port *info = tty->driver_data;
  933. unsigned long flags;
  934. if (!info->port.xmit_buf)
  935. return 0;
  936. while (1) {
  937. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  938. SERIAL_XMIT_SIZE - info->xmit_head));
  939. if (c <= 0)
  940. break;
  941. memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
  942. spin_lock_irqsave(&info->slock, flags);
  943. info->xmit_head = (info->xmit_head + c) &
  944. (SERIAL_XMIT_SIZE - 1);
  945. info->xmit_cnt += c;
  946. spin_unlock_irqrestore(&info->slock, flags);
  947. buf += c;
  948. count -= c;
  949. total += c;
  950. }
  951. if (info->xmit_cnt && !tty->stopped) {
  952. if (!tty->hw_stopped ||
  953. (info->type == PORT_16550A) ||
  954. (info->board->chip_flag)) {
  955. spin_lock_irqsave(&info->slock, flags);
  956. outb(info->IER & ~UART_IER_THRI, info->ioaddr +
  957. UART_IER);
  958. info->IER |= UART_IER_THRI;
  959. outb(info->IER, info->ioaddr + UART_IER);
  960. spin_unlock_irqrestore(&info->slock, flags);
  961. }
  962. }
  963. return total;
  964. }
  965. static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
  966. {
  967. struct mxser_port *info = tty->driver_data;
  968. unsigned long flags;
  969. if (!info->port.xmit_buf)
  970. return 0;
  971. if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  972. return 0;
  973. spin_lock_irqsave(&info->slock, flags);
  974. info->port.xmit_buf[info->xmit_head++] = ch;
  975. info->xmit_head &= SERIAL_XMIT_SIZE - 1;
  976. info->xmit_cnt++;
  977. spin_unlock_irqrestore(&info->slock, flags);
  978. if (!tty->stopped) {
  979. if (!tty->hw_stopped ||
  980. (info->type == PORT_16550A) ||
  981. info->board->chip_flag) {
  982. spin_lock_irqsave(&info->slock, flags);
  983. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  984. info->IER |= UART_IER_THRI;
  985. outb(info->IER, info->ioaddr + UART_IER);
  986. spin_unlock_irqrestore(&info->slock, flags);
  987. }
  988. }
  989. return 1;
  990. }
  991. static void mxser_flush_chars(struct tty_struct *tty)
  992. {
  993. struct mxser_port *info = tty->driver_data;
  994. unsigned long flags;
  995. if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
  996. (tty->hw_stopped && info->type != PORT_16550A &&
  997. !info->board->chip_flag))
  998. return;
  999. spin_lock_irqsave(&info->slock, flags);
  1000. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1001. info->IER |= UART_IER_THRI;
  1002. outb(info->IER, info->ioaddr + UART_IER);
  1003. spin_unlock_irqrestore(&info->slock, flags);
  1004. }
  1005. static int mxser_write_room(struct tty_struct *tty)
  1006. {
  1007. struct mxser_port *info = tty->driver_data;
  1008. int ret;
  1009. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1010. return ret < 0 ? 0 : ret;
  1011. }
  1012. static int mxser_chars_in_buffer(struct tty_struct *tty)
  1013. {
  1014. struct mxser_port *info = tty->driver_data;
  1015. return info->xmit_cnt;
  1016. }
  1017. /*
  1018. * ------------------------------------------------------------
  1019. * friends of mxser_ioctl()
  1020. * ------------------------------------------------------------
  1021. */
  1022. static int mxser_get_serial_info(struct tty_struct *tty,
  1023. struct serial_struct __user *retinfo)
  1024. {
  1025. struct mxser_port *info = tty->driver_data;
  1026. struct serial_struct tmp = {
  1027. .type = info->type,
  1028. .line = tty->index,
  1029. .port = info->ioaddr,
  1030. .irq = info->board->irq,
  1031. .flags = info->port.flags,
  1032. .baud_base = info->baud_base,
  1033. .close_delay = info->port.close_delay,
  1034. .closing_wait = info->port.closing_wait,
  1035. .custom_divisor = info->custom_divisor,
  1036. .hub6 = 0
  1037. };
  1038. if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
  1039. return -EFAULT;
  1040. return 0;
  1041. }
  1042. static int mxser_set_serial_info(struct tty_struct *tty,
  1043. struct serial_struct __user *new_info)
  1044. {
  1045. struct mxser_port *info = tty->driver_data;
  1046. struct tty_port *port = &info->port;
  1047. struct serial_struct new_serial;
  1048. speed_t baud;
  1049. unsigned long sl_flags;
  1050. unsigned int flags;
  1051. int retval = 0;
  1052. if (!new_info || !info->ioaddr)
  1053. return -ENODEV;
  1054. if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
  1055. return -EFAULT;
  1056. if (new_serial.irq != info->board->irq ||
  1057. new_serial.port != info->ioaddr)
  1058. return -EINVAL;
  1059. flags = port->flags & ASYNC_SPD_MASK;
  1060. if (!capable(CAP_SYS_ADMIN)) {
  1061. if ((new_serial.baud_base != info->baud_base) ||
  1062. (new_serial.close_delay != info->port.close_delay) ||
  1063. ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
  1064. return -EPERM;
  1065. info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
  1066. (new_serial.flags & ASYNC_USR_MASK));
  1067. } else {
  1068. /*
  1069. * OK, past this point, all the error checking has been done.
  1070. * At this point, we start making changes.....
  1071. */
  1072. port->flags = ((port->flags & ~ASYNC_FLAGS) |
  1073. (new_serial.flags & ASYNC_FLAGS));
  1074. port->close_delay = new_serial.close_delay * HZ / 100;
  1075. port->closing_wait = new_serial.closing_wait * HZ / 100;
  1076. tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  1077. if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
  1078. (new_serial.baud_base != info->baud_base ||
  1079. new_serial.custom_divisor !=
  1080. info->custom_divisor)) {
  1081. if (new_serial.custom_divisor == 0)
  1082. return -EINVAL;
  1083. baud = new_serial.baud_base / new_serial.custom_divisor;
  1084. tty_encode_baud_rate(tty, baud, baud);
  1085. }
  1086. }
  1087. info->type = new_serial.type;
  1088. process_txrx_fifo(info);
  1089. if (test_bit(ASYNCB_INITIALIZED, &port->flags)) {
  1090. if (flags != (port->flags & ASYNC_SPD_MASK)) {
  1091. spin_lock_irqsave(&info->slock, sl_flags);
  1092. mxser_change_speed(tty, NULL);
  1093. spin_unlock_irqrestore(&info->slock, sl_flags);
  1094. }
  1095. } else {
  1096. retval = mxser_activate(port, tty);
  1097. if (retval == 0)
  1098. set_bit(ASYNCB_INITIALIZED, &port->flags);
  1099. }
  1100. return retval;
  1101. }
  1102. /*
  1103. * mxser_get_lsr_info - get line status register info
  1104. *
  1105. * Purpose: Let user call ioctl() to get info when the UART physically
  1106. * is emptied. On bus types like RS485, the transmitter must
  1107. * release the bus after transmitting. This must be done when
  1108. * the transmit shift register is empty, not be done when the
  1109. * transmit holding register is empty. This functionality
  1110. * allows an RS485 driver to be written in user space.
  1111. */
  1112. static int mxser_get_lsr_info(struct mxser_port *info,
  1113. unsigned int __user *value)
  1114. {
  1115. unsigned char status;
  1116. unsigned int result;
  1117. unsigned long flags;
  1118. spin_lock_irqsave(&info->slock, flags);
  1119. status = inb(info->ioaddr + UART_LSR);
  1120. spin_unlock_irqrestore(&info->slock, flags);
  1121. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  1122. return put_user(result, value);
  1123. }
  1124. static int mxser_tiocmget(struct tty_struct *tty)
  1125. {
  1126. struct mxser_port *info = tty->driver_data;
  1127. unsigned char control, status;
  1128. unsigned long flags;
  1129. if (tty->index == MXSER_PORTS)
  1130. return -ENOIOCTLCMD;
  1131. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1132. return -EIO;
  1133. control = info->MCR;
  1134. spin_lock_irqsave(&info->slock, flags);
  1135. status = inb(info->ioaddr + UART_MSR);
  1136. if (status & UART_MSR_ANY_DELTA)
  1137. mxser_check_modem_status(tty, info, status);
  1138. spin_unlock_irqrestore(&info->slock, flags);
  1139. return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
  1140. ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
  1141. ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
  1142. ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
  1143. ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
  1144. ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  1145. }
  1146. static int mxser_tiocmset(struct tty_struct *tty,
  1147. unsigned int set, unsigned int clear)
  1148. {
  1149. struct mxser_port *info = tty->driver_data;
  1150. unsigned long flags;
  1151. if (tty->index == MXSER_PORTS)
  1152. return -ENOIOCTLCMD;
  1153. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1154. return -EIO;
  1155. spin_lock_irqsave(&info->slock, flags);
  1156. if (set & TIOCM_RTS)
  1157. info->MCR |= UART_MCR_RTS;
  1158. if (set & TIOCM_DTR)
  1159. info->MCR |= UART_MCR_DTR;
  1160. if (clear & TIOCM_RTS)
  1161. info->MCR &= ~UART_MCR_RTS;
  1162. if (clear & TIOCM_DTR)
  1163. info->MCR &= ~UART_MCR_DTR;
  1164. outb(info->MCR, info->ioaddr + UART_MCR);
  1165. spin_unlock_irqrestore(&info->slock, flags);
  1166. return 0;
  1167. }
  1168. static int __init mxser_program_mode(int port)
  1169. {
  1170. int id, i, j, n;
  1171. outb(0, port);
  1172. outb(0, port);
  1173. outb(0, port);
  1174. (void)inb(port);
  1175. (void)inb(port);
  1176. outb(0, port);
  1177. (void)inb(port);
  1178. id = inb(port + 1) & 0x1F;
  1179. if ((id != C168_ASIC_ID) &&
  1180. (id != C104_ASIC_ID) &&
  1181. (id != C102_ASIC_ID) &&
  1182. (id != CI132_ASIC_ID) &&
  1183. (id != CI134_ASIC_ID) &&
  1184. (id != CI104J_ASIC_ID))
  1185. return -1;
  1186. for (i = 0, j = 0; i < 4; i++) {
  1187. n = inb(port + 2);
  1188. if (n == 'M') {
  1189. j = 1;
  1190. } else if ((j == 1) && (n == 1)) {
  1191. j = 2;
  1192. break;
  1193. } else
  1194. j = 0;
  1195. }
  1196. if (j != 2)
  1197. id = -2;
  1198. return id;
  1199. }
  1200. static void __init mxser_normal_mode(int port)
  1201. {
  1202. int i, n;
  1203. outb(0xA5, port + 1);
  1204. outb(0x80, port + 3);
  1205. outb(12, port + 0); /* 9600 bps */
  1206. outb(0, port + 1);
  1207. outb(0x03, port + 3); /* 8 data bits */
  1208. outb(0x13, port + 4); /* loop back mode */
  1209. for (i = 0; i < 16; i++) {
  1210. n = inb(port + 5);
  1211. if ((n & 0x61) == 0x60)
  1212. break;
  1213. if ((n & 1) == 1)
  1214. (void)inb(port);
  1215. }
  1216. outb(0x00, port + 4);
  1217. }
  1218. #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
  1219. #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
  1220. #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
  1221. #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
  1222. #define EN_CCMD 0x000 /* Chip's command register */
  1223. #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
  1224. #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
  1225. #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
  1226. #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
  1227. #define EN0_DCFG 0x00E /* Data configuration reg WR */
  1228. #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
  1229. #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
  1230. #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
  1231. static int __init mxser_read_register(int port, unsigned short *regs)
  1232. {
  1233. int i, k, value, id;
  1234. unsigned int j;
  1235. id = mxser_program_mode(port);
  1236. if (id < 0)
  1237. return id;
  1238. for (i = 0; i < 14; i++) {
  1239. k = (i & 0x3F) | 0x180;
  1240. for (j = 0x100; j > 0; j >>= 1) {
  1241. outb(CHIP_CS, port);
  1242. if (k & j) {
  1243. outb(CHIP_CS | CHIP_DO, port);
  1244. outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
  1245. } else {
  1246. outb(CHIP_CS, port);
  1247. outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
  1248. }
  1249. }
  1250. (void)inb(port);
  1251. value = 0;
  1252. for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
  1253. outb(CHIP_CS, port);
  1254. outb(CHIP_CS | CHIP_SK, port);
  1255. if (inb(port) & CHIP_DI)
  1256. value |= j;
  1257. }
  1258. regs[i] = value;
  1259. outb(0, port);
  1260. }
  1261. mxser_normal_mode(port);
  1262. return id;
  1263. }
  1264. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
  1265. {
  1266. struct mxser_port *ip;
  1267. struct tty_port *port;
  1268. struct tty_struct *tty;
  1269. int result, status;
  1270. unsigned int i, j;
  1271. int ret = 0;
  1272. switch (cmd) {
  1273. case MOXA_GET_MAJOR:
  1274. printk_ratelimited(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
  1275. "%x (GET_MAJOR), fix your userspace\n",
  1276. current->comm, cmd);
  1277. return put_user(ttymajor, (int __user *)argp);
  1278. case MOXA_CHKPORTENABLE:
  1279. result = 0;
  1280. for (i = 0; i < MXSER_BOARDS; i++)
  1281. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
  1282. if (mxser_boards[i].ports[j].ioaddr)
  1283. result |= (1 << i);
  1284. return put_user(result, (unsigned long __user *)argp);
  1285. case MOXA_GETDATACOUNT:
  1286. /* The receive side is locked by port->slock but it isn't
  1287. clear that an exact snapshot is worth copying here */
  1288. if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
  1289. ret = -EFAULT;
  1290. return ret;
  1291. case MOXA_GETMSTATUS: {
  1292. struct mxser_mstatus ms, __user *msu = argp;
  1293. for (i = 0; i < MXSER_BOARDS; i++)
  1294. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1295. ip = &mxser_boards[i].ports[j];
  1296. port = &ip->port;
  1297. memset(&ms, 0, sizeof(ms));
  1298. mutex_lock(&port->mutex);
  1299. if (!ip->ioaddr)
  1300. goto copy;
  1301. tty = tty_port_tty_get(port);
  1302. if (!tty || !tty->termios)
  1303. ms.cflag = ip->normal_termios.c_cflag;
  1304. else
  1305. ms.cflag = tty->termios->c_cflag;
  1306. tty_kref_put(tty);
  1307. spin_lock_irq(&ip->slock);
  1308. status = inb(ip->ioaddr + UART_MSR);
  1309. spin_unlock_irq(&ip->slock);
  1310. if (status & UART_MSR_DCD)
  1311. ms.dcd = 1;
  1312. if (status & UART_MSR_DSR)
  1313. ms.dsr = 1;
  1314. if (status & UART_MSR_CTS)
  1315. ms.cts = 1;
  1316. copy:
  1317. mutex_unlock(&port->mutex);
  1318. if (copy_to_user(msu, &ms, sizeof(ms)))
  1319. return -EFAULT;
  1320. msu++;
  1321. }
  1322. return 0;
  1323. }
  1324. case MOXA_ASPP_MON_EXT: {
  1325. struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
  1326. unsigned int cflag, iflag, p;
  1327. u8 opmode;
  1328. me = kzalloc(sizeof(*me), GFP_KERNEL);
  1329. if (!me)
  1330. return -ENOMEM;
  1331. for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
  1332. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
  1333. if (p >= ARRAY_SIZE(me->rx_cnt)) {
  1334. i = MXSER_BOARDS;
  1335. break;
  1336. }
  1337. ip = &mxser_boards[i].ports[j];
  1338. port = &ip->port;
  1339. mutex_lock(&port->mutex);
  1340. if (!ip->ioaddr) {
  1341. mutex_unlock(&port->mutex);
  1342. continue;
  1343. }
  1344. spin_lock_irq(&ip->slock);
  1345. status = mxser_get_msr(ip->ioaddr, 0, p);
  1346. if (status & UART_MSR_TERI)
  1347. ip->icount.rng++;
  1348. if (status & UART_MSR_DDSR)
  1349. ip->icount.dsr++;
  1350. if (status & UART_MSR_DDCD)
  1351. ip->icount.dcd++;
  1352. if (status & UART_MSR_DCTS)
  1353. ip->icount.cts++;
  1354. ip->mon_data.modem_status = status;
  1355. me->rx_cnt[p] = ip->mon_data.rxcnt;
  1356. me->tx_cnt[p] = ip->mon_data.txcnt;
  1357. me->up_rxcnt[p] = ip->mon_data.up_rxcnt;
  1358. me->up_txcnt[p] = ip->mon_data.up_txcnt;
  1359. me->modem_status[p] =
  1360. ip->mon_data.modem_status;
  1361. spin_unlock_irq(&ip->slock);
  1362. tty = tty_port_tty_get(&ip->port);
  1363. if (!tty || !tty->termios) {
  1364. cflag = ip->normal_termios.c_cflag;
  1365. iflag = ip->normal_termios.c_iflag;
  1366. me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios);
  1367. } else {
  1368. cflag = tty->termios->c_cflag;
  1369. iflag = tty->termios->c_iflag;
  1370. me->baudrate[p] = tty_get_baud_rate(tty);
  1371. }
  1372. tty_kref_put(tty);
  1373. me->databits[p] = cflag & CSIZE;
  1374. me->stopbits[p] = cflag & CSTOPB;
  1375. me->parity[p] = cflag & (PARENB | PARODD |
  1376. CMSPAR);
  1377. if (cflag & CRTSCTS)
  1378. me->flowctrl[p] |= 0x03;
  1379. if (iflag & (IXON | IXOFF))
  1380. me->flowctrl[p] |= 0x0C;
  1381. if (ip->type == PORT_16550A)
  1382. me->fifo[p] = 1;
  1383. opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2);
  1384. opmode &= OP_MODE_MASK;
  1385. me->iftype[p] = opmode;
  1386. mutex_unlock(&port->mutex);
  1387. }
  1388. }
  1389. if (copy_to_user(argp, me, sizeof(*me)))
  1390. ret = -EFAULT;
  1391. kfree(me);
  1392. return ret;
  1393. }
  1394. default:
  1395. return -ENOIOCTLCMD;
  1396. }
  1397. return 0;
  1398. }
  1399. static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
  1400. struct async_icount *cprev)
  1401. {
  1402. struct async_icount cnow;
  1403. unsigned long flags;
  1404. int ret;
  1405. spin_lock_irqsave(&info->slock, flags);
  1406. cnow = info->icount; /* atomic copy */
  1407. spin_unlock_irqrestore(&info->slock, flags);
  1408. ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
  1409. ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
  1410. ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
  1411. ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
  1412. *cprev = cnow;
  1413. return ret;
  1414. }
  1415. static int mxser_ioctl(struct tty_struct *tty,
  1416. unsigned int cmd, unsigned long arg)
  1417. {
  1418. struct mxser_port *info = tty->driver_data;
  1419. struct tty_port *port = &info->port;
  1420. struct async_icount cnow;
  1421. unsigned long flags;
  1422. void __user *argp = (void __user *)arg;
  1423. int retval;
  1424. if (tty->index == MXSER_PORTS)
  1425. return mxser_ioctl_special(cmd, argp);
  1426. if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
  1427. int p;
  1428. unsigned long opmode;
  1429. static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
  1430. int shiftbit;
  1431. unsigned char val, mask;
  1432. p = tty->index % 4;
  1433. if (cmd == MOXA_SET_OP_MODE) {
  1434. if (get_user(opmode, (int __user *) argp))
  1435. return -EFAULT;
  1436. if (opmode != RS232_MODE &&
  1437. opmode != RS485_2WIRE_MODE &&
  1438. opmode != RS422_MODE &&
  1439. opmode != RS485_4WIRE_MODE)
  1440. return -EFAULT;
  1441. mask = ModeMask[p];
  1442. shiftbit = p * 2;
  1443. spin_lock_irq(&info->slock);
  1444. val = inb(info->opmode_ioaddr);
  1445. val &= mask;
  1446. val |= (opmode << shiftbit);
  1447. outb(val, info->opmode_ioaddr);
  1448. spin_unlock_irq(&info->slock);
  1449. } else {
  1450. shiftbit = p * 2;
  1451. spin_lock_irq(&info->slock);
  1452. opmode = inb(info->opmode_ioaddr) >> shiftbit;
  1453. spin_unlock_irq(&info->slock);
  1454. opmode &= OP_MODE_MASK;
  1455. if (put_user(opmode, (int __user *)argp))
  1456. return -EFAULT;
  1457. }
  1458. return 0;
  1459. }
  1460. if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT &&
  1461. test_bit(TTY_IO_ERROR, &tty->flags))
  1462. return -EIO;
  1463. switch (cmd) {
  1464. case TIOCGSERIAL:
  1465. mutex_lock(&port->mutex);
  1466. retval = mxser_get_serial_info(tty, argp);
  1467. mutex_unlock(&port->mutex);
  1468. return retval;
  1469. case TIOCSSERIAL:
  1470. mutex_lock(&port->mutex);
  1471. retval = mxser_set_serial_info(tty, argp);
  1472. mutex_unlock(&port->mutex);
  1473. return retval;
  1474. case TIOCSERGETLSR: /* Get line status register */
  1475. return mxser_get_lsr_info(info, argp);
  1476. /*
  1477. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1478. * - mask passed in arg for lines of interest
  1479. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1480. * Caller should use TIOCGICOUNT to see which one it was
  1481. */
  1482. case TIOCMIWAIT:
  1483. spin_lock_irqsave(&info->slock, flags);
  1484. cnow = info->icount; /* note the counters on entry */
  1485. spin_unlock_irqrestore(&info->slock, flags);
  1486. return wait_event_interruptible(info->port.delta_msr_wait,
  1487. mxser_cflags_changed(info, arg, &cnow));
  1488. case MOXA_HighSpeedOn:
  1489. return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
  1490. case MOXA_SDS_RSTICOUNTER:
  1491. spin_lock_irq(&info->slock);
  1492. info->mon_data.rxcnt = 0;
  1493. info->mon_data.txcnt = 0;
  1494. spin_unlock_irq(&info->slock);
  1495. return 0;
  1496. case MOXA_ASPP_OQUEUE:{
  1497. int len, lsr;
  1498. len = mxser_chars_in_buffer(tty);
  1499. spin_lock_irq(&info->slock);
  1500. lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;
  1501. spin_unlock_irq(&info->slock);
  1502. len += (lsr ? 0 : 1);
  1503. return put_user(len, (int __user *)argp);
  1504. }
  1505. case MOXA_ASPP_MON: {
  1506. int mcr, status;
  1507. spin_lock_irq(&info->slock);
  1508. status = mxser_get_msr(info->ioaddr, 1, tty->index);
  1509. mxser_check_modem_status(tty, info, status);
  1510. mcr = inb(info->ioaddr + UART_MCR);
  1511. spin_unlock_irq(&info->slock);
  1512. if (mcr & MOXA_MUST_MCR_XON_FLAG)
  1513. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
  1514. else
  1515. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
  1516. if (mcr & MOXA_MUST_MCR_TX_XON)
  1517. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
  1518. else
  1519. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
  1520. if (tty->hw_stopped)
  1521. info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
  1522. else
  1523. info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
  1524. if (copy_to_user(argp, &info->mon_data,
  1525. sizeof(struct mxser_mon)))
  1526. return -EFAULT;
  1527. return 0;
  1528. }
  1529. case MOXA_ASPP_LSTATUS: {
  1530. if (put_user(info->err_shadow, (unsigned char __user *)argp))
  1531. return -EFAULT;
  1532. info->err_shadow = 0;
  1533. return 0;
  1534. }
  1535. case MOXA_SET_BAUD_METHOD: {
  1536. int method;
  1537. if (get_user(method, (int __user *)argp))
  1538. return -EFAULT;
  1539. mxser_set_baud_method[tty->index] = method;
  1540. return put_user(method, (int __user *)argp);
  1541. }
  1542. default:
  1543. return -ENOIOCTLCMD;
  1544. }
  1545. return 0;
  1546. }
  1547. /*
  1548. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1549. * Return: write counters to the user passed counter struct
  1550. * NB: both 1->0 and 0->1 transitions are counted except for
  1551. * RI where only 0->1 is counted.
  1552. */
  1553. static int mxser_get_icount(struct tty_struct *tty,
  1554. struct serial_icounter_struct *icount)
  1555. {
  1556. struct mxser_port *info = tty->driver_data;
  1557. struct async_icount cnow;
  1558. unsigned long flags;
  1559. spin_lock_irqsave(&info->slock, flags);
  1560. cnow = info->icount;
  1561. spin_unlock_irqrestore(&info->slock, flags);
  1562. icount->frame = cnow.frame;
  1563. icount->brk = cnow.brk;
  1564. icount->overrun = cnow.overrun;
  1565. icount->buf_overrun = cnow.buf_overrun;
  1566. icount->parity = cnow.parity;
  1567. icount->rx = cnow.rx;
  1568. icount->tx = cnow.tx;
  1569. icount->cts = cnow.cts;
  1570. icount->dsr = cnow.dsr;
  1571. icount->rng = cnow.rng;
  1572. icount->dcd = cnow.dcd;
  1573. return 0;
  1574. }
  1575. static void mxser_stoprx(struct tty_struct *tty)
  1576. {
  1577. struct mxser_port *info = tty->driver_data;
  1578. info->ldisc_stop_rx = 1;
  1579. if (I_IXOFF(tty)) {
  1580. if (info->board->chip_flag) {
  1581. info->IER &= ~MOXA_MUST_RECV_ISR;
  1582. outb(info->IER, info->ioaddr + UART_IER);
  1583. } else {
  1584. info->x_char = STOP_CHAR(tty);
  1585. outb(0, info->ioaddr + UART_IER);
  1586. info->IER |= UART_IER_THRI;
  1587. outb(info->IER, info->ioaddr + UART_IER);
  1588. }
  1589. }
  1590. if (tty->termios->c_cflag & CRTSCTS) {
  1591. info->MCR &= ~UART_MCR_RTS;
  1592. outb(info->MCR, info->ioaddr + UART_MCR);
  1593. }
  1594. }
  1595. /*
  1596. * This routine is called by the upper-layer tty layer to signal that
  1597. * incoming characters should be throttled.
  1598. */
  1599. static void mxser_throttle(struct tty_struct *tty)
  1600. {
  1601. mxser_stoprx(tty);
  1602. }
  1603. static void mxser_unthrottle(struct tty_struct *tty)
  1604. {
  1605. struct mxser_port *info = tty->driver_data;
  1606. /* startrx */
  1607. info->ldisc_stop_rx = 0;
  1608. if (I_IXOFF(tty)) {
  1609. if (info->x_char)
  1610. info->x_char = 0;
  1611. else {
  1612. if (info->board->chip_flag) {
  1613. info->IER |= MOXA_MUST_RECV_ISR;
  1614. outb(info->IER, info->ioaddr + UART_IER);
  1615. } else {
  1616. info->x_char = START_CHAR(tty);
  1617. outb(0, info->ioaddr + UART_IER);
  1618. info->IER |= UART_IER_THRI;
  1619. outb(info->IER, info->ioaddr + UART_IER);
  1620. }
  1621. }
  1622. }
  1623. if (tty->termios->c_cflag & CRTSCTS) {
  1624. info->MCR |= UART_MCR_RTS;
  1625. outb(info->MCR, info->ioaddr + UART_MCR);
  1626. }
  1627. }
  1628. /*
  1629. * mxser_stop() and mxser_start()
  1630. *
  1631. * This routines are called before setting or resetting tty->stopped.
  1632. * They enable or disable transmitter interrupts, as necessary.
  1633. */
  1634. static void mxser_stop(struct tty_struct *tty)
  1635. {
  1636. struct mxser_port *info = tty->driver_data;
  1637. unsigned long flags;
  1638. spin_lock_irqsave(&info->slock, flags);
  1639. if (info->IER & UART_IER_THRI) {
  1640. info->IER &= ~UART_IER_THRI;
  1641. outb(info->IER, info->ioaddr + UART_IER);
  1642. }
  1643. spin_unlock_irqrestore(&info->slock, flags);
  1644. }
  1645. static void mxser_start(struct tty_struct *tty)
  1646. {
  1647. struct mxser_port *info = tty->driver_data;
  1648. unsigned long flags;
  1649. spin_lock_irqsave(&info->slock, flags);
  1650. if (info->xmit_cnt && info->port.xmit_buf) {
  1651. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1652. info->IER |= UART_IER_THRI;
  1653. outb(info->IER, info->ioaddr + UART_IER);
  1654. }
  1655. spin_unlock_irqrestore(&info->slock, flags);
  1656. }
  1657. static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1658. {
  1659. struct mxser_port *info = tty->driver_data;
  1660. unsigned long flags;
  1661. spin_lock_irqsave(&info->slock, flags);
  1662. mxser_change_speed(tty, old_termios);
  1663. spin_unlock_irqrestore(&info->slock, flags);
  1664. if ((old_termios->c_cflag & CRTSCTS) &&
  1665. !(tty->termios->c_cflag & CRTSCTS)) {
  1666. tty->hw_stopped = 0;
  1667. mxser_start(tty);
  1668. }
  1669. /* Handle sw stopped */
  1670. if ((old_termios->c_iflag & IXON) &&
  1671. !(tty->termios->c_iflag & IXON)) {
  1672. tty->stopped = 0;
  1673. if (info->board->chip_flag) {
  1674. spin_lock_irqsave(&info->slock, flags);
  1675. mxser_disable_must_rx_software_flow_control(
  1676. info->ioaddr);
  1677. spin_unlock_irqrestore(&info->slock, flags);
  1678. }
  1679. mxser_start(tty);
  1680. }
  1681. }
  1682. /*
  1683. * mxser_wait_until_sent() --- wait until the transmitter is empty
  1684. */
  1685. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
  1686. {
  1687. struct mxser_port *info = tty->driver_data;
  1688. unsigned long orig_jiffies, char_time;
  1689. unsigned long flags;
  1690. int lsr;
  1691. if (info->type == PORT_UNKNOWN)
  1692. return;
  1693. if (info->xmit_fifo_size == 0)
  1694. return; /* Just in case.... */
  1695. orig_jiffies = jiffies;
  1696. /*
  1697. * Set the check interval to be 1/5 of the estimated time to
  1698. * send a single character, and make it at least 1. The check
  1699. * interval should also be less than the timeout.
  1700. *
  1701. * Note: we have to use pretty tight timings here to satisfy
  1702. * the NIST-PCTS.
  1703. */
  1704. char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
  1705. char_time = char_time / 5;
  1706. if (char_time == 0)
  1707. char_time = 1;
  1708. if (timeout && timeout < char_time)
  1709. char_time = timeout;
  1710. /*
  1711. * If the transmitter hasn't cleared in twice the approximate
  1712. * amount of time to send the entire FIFO, it probably won't
  1713. * ever clear. This assumes the UART isn't doing flow
  1714. * control, which is currently the case. Hence, if it ever
  1715. * takes longer than info->timeout, this is probably due to a
  1716. * UART bug of some kind. So, we clamp the timeout parameter at
  1717. * 2*info->timeout.
  1718. */
  1719. if (!timeout || timeout > 2 * info->timeout)
  1720. timeout = 2 * info->timeout;
  1721. spin_lock_irqsave(&info->slock, flags);
  1722. while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
  1723. spin_unlock_irqrestore(&info->slock, flags);
  1724. schedule_timeout_interruptible(char_time);
  1725. spin_lock_irqsave(&info->slock, flags);
  1726. if (signal_pending(current))
  1727. break;
  1728. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1729. break;
  1730. }
  1731. spin_unlock_irqrestore(&info->slock, flags);
  1732. set_current_state(TASK_RUNNING);
  1733. }
  1734. /*
  1735. * This routine is called by tty_hangup() when a hangup is signaled.
  1736. */
  1737. static void mxser_hangup(struct tty_struct *tty)
  1738. {
  1739. struct mxser_port *info = tty->driver_data;
  1740. mxser_flush_buffer(tty);
  1741. tty_port_hangup(&info->port);
  1742. }
  1743. /*
  1744. * mxser_rs_break() --- routine which turns the break handling on or off
  1745. */
  1746. static int mxser_rs_break(struct tty_struct *tty, int break_state)
  1747. {
  1748. struct mxser_port *info = tty->driver_data;
  1749. unsigned long flags;
  1750. spin_lock_irqsave(&info->slock, flags);
  1751. if (break_state == -1)
  1752. outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
  1753. info->ioaddr + UART_LCR);
  1754. else
  1755. outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
  1756. info->ioaddr + UART_LCR);
  1757. spin_unlock_irqrestore(&info->slock, flags);
  1758. return 0;
  1759. }
  1760. static void mxser_receive_chars(struct tty_struct *tty,
  1761. struct mxser_port *port, int *status)
  1762. {
  1763. unsigned char ch, gdl;
  1764. int ignored = 0;
  1765. int cnt = 0;
  1766. int recv_room;
  1767. int max = 256;
  1768. recv_room = tty->receive_room;
  1769. if (recv_room == 0 && !port->ldisc_stop_rx)
  1770. mxser_stoprx(tty);
  1771. if (port->board->chip_flag != MOXA_OTHER_UART) {
  1772. if (*status & UART_LSR_SPECIAL)
  1773. goto intr_old;
  1774. if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
  1775. (*status & MOXA_MUST_LSR_RERR))
  1776. goto intr_old;
  1777. if (*status & MOXA_MUST_LSR_RERR)
  1778. goto intr_old;
  1779. gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
  1780. if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
  1781. gdl &= MOXA_MUST_GDL_MASK;
  1782. if (gdl >= recv_room) {
  1783. if (!port->ldisc_stop_rx)
  1784. mxser_stoprx(tty);
  1785. }
  1786. while (gdl--) {
  1787. ch = inb(port->ioaddr + UART_RX);
  1788. tty_insert_flip_char(tty, ch, 0);
  1789. cnt++;
  1790. }
  1791. goto end_intr;
  1792. }
  1793. intr_old:
  1794. do {
  1795. if (max-- < 0)
  1796. break;
  1797. ch = inb(port->ioaddr + UART_RX);
  1798. if (port->board->chip_flag && (*status & UART_LSR_OE))
  1799. outb(0x23, port->ioaddr + UART_FCR);
  1800. *status &= port->read_status_mask;
  1801. if (*status & port->ignore_status_mask) {
  1802. if (++ignored > 100)
  1803. break;
  1804. } else {
  1805. char flag = 0;
  1806. if (*status & UART_LSR_SPECIAL) {
  1807. if (*status & UART_LSR_BI) {
  1808. flag = TTY_BREAK;
  1809. port->icount.brk++;
  1810. if (port->port.flags & ASYNC_SAK)
  1811. do_SAK(tty);
  1812. } else if (*status & UART_LSR_PE) {
  1813. flag = TTY_PARITY;
  1814. port->icount.parity++;
  1815. } else if (*status & UART_LSR_FE) {
  1816. flag = TTY_FRAME;
  1817. port->icount.frame++;
  1818. } else if (*status & UART_LSR_OE) {
  1819. flag = TTY_OVERRUN;
  1820. port->icount.overrun++;
  1821. } else
  1822. flag = TTY_BREAK;
  1823. }
  1824. tty_insert_flip_char(tty, ch, flag);
  1825. cnt++;
  1826. if (cnt >= recv_room) {
  1827. if (!port->ldisc_stop_rx)
  1828. mxser_stoprx(tty);
  1829. break;
  1830. }
  1831. }
  1832. if (port->board->chip_flag)
  1833. break;
  1834. *status = inb(port->ioaddr + UART_LSR);
  1835. } while (*status & UART_LSR_DR);
  1836. end_intr:
  1837. mxvar_log.rxcnt[tty->index] += cnt;
  1838. port->mon_data.rxcnt += cnt;
  1839. port->mon_data.up_rxcnt += cnt;
  1840. /*
  1841. * We are called from an interrupt context with &port->slock
  1842. * being held. Drop it temporarily in order to prevent
  1843. * recursive locking.
  1844. */
  1845. spin_unlock(&port->slock);
  1846. tty_flip_buffer_push(tty);
  1847. spin_lock(&port->slock);
  1848. }
  1849. static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
  1850. {
  1851. int count, cnt;
  1852. if (port->x_char) {
  1853. outb(port->x_char, port->ioaddr + UART_TX);
  1854. port->x_char = 0;
  1855. mxvar_log.txcnt[tty->index]++;
  1856. port->mon_data.txcnt++;
  1857. port->mon_data.up_txcnt++;
  1858. port->icount.tx++;
  1859. return;
  1860. }
  1861. if (port->port.xmit_buf == NULL)
  1862. return;
  1863. if (port->xmit_cnt <= 0 || tty->stopped ||
  1864. (tty->hw_stopped &&
  1865. (port->type != PORT_16550A) &&
  1866. (!port->board->chip_flag))) {
  1867. port->IER &= ~UART_IER_THRI;
  1868. outb(port->IER, port->ioaddr + UART_IER);
  1869. return;
  1870. }
  1871. cnt = port->xmit_cnt;
  1872. count = port->xmit_fifo_size;
  1873. do {
  1874. outb(port->port.xmit_buf[port->xmit_tail++],
  1875. port->ioaddr + UART_TX);
  1876. port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
  1877. if (--port->xmit_cnt <= 0)
  1878. break;
  1879. } while (--count > 0);
  1880. mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
  1881. port->mon_data.txcnt += (cnt - port->xmit_cnt);
  1882. port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
  1883. port->icount.tx += (cnt - port->xmit_cnt);
  1884. if (port->xmit_cnt < WAKEUP_CHARS)
  1885. tty_wakeup(tty);
  1886. if (port->xmit_cnt <= 0) {
  1887. port->IER &= ~UART_IER_THRI;
  1888. outb(port->IER, port->ioaddr + UART_IER);
  1889. }
  1890. }
  1891. /*
  1892. * This is the serial driver's generic interrupt routine
  1893. */
  1894. static irqreturn_t mxser_interrupt(int irq, void *dev_id)
  1895. {
  1896. int status, iir, i;
  1897. struct mxser_board *brd = NULL;
  1898. struct mxser_port *port;
  1899. int max, irqbits, bits, msr;
  1900. unsigned int int_cnt, pass_counter = 0;
  1901. int handled = IRQ_NONE;
  1902. struct tty_struct *tty;
  1903. for (i = 0; i < MXSER_BOARDS; i++)
  1904. if (dev_id == &mxser_boards[i]) {
  1905. brd = dev_id;
  1906. break;
  1907. }
  1908. if (i == MXSER_BOARDS)
  1909. goto irq_stop;
  1910. if (brd == NULL)
  1911. goto irq_stop;
  1912. max = brd->info->nports;
  1913. while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
  1914. irqbits = inb(brd->vector) & brd->vector_mask;
  1915. if (irqbits == brd->vector_mask)
  1916. break;
  1917. handled = IRQ_HANDLED;
  1918. for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
  1919. if (irqbits == brd->vector_mask)
  1920. break;
  1921. if (bits & irqbits)
  1922. continue;
  1923. port = &brd->ports[i];
  1924. int_cnt = 0;
  1925. spin_lock(&port->slock);
  1926. do {
  1927. iir = inb(port->ioaddr + UART_IIR);
  1928. if (iir & UART_IIR_NO_INT)
  1929. break;
  1930. iir &= MOXA_MUST_IIR_MASK;
  1931. tty = tty_port_tty_get(&port->port);
  1932. if (!tty ||
  1933. (port->port.flags & ASYNC_CLOSING) ||
  1934. !(port->port.flags &
  1935. ASYNC_INITIALIZED)) {
  1936. status = inb(port->ioaddr + UART_LSR);
  1937. outb(0x27, port->ioaddr + UART_FCR);
  1938. inb(port->ioaddr + UART_MSR);
  1939. tty_kref_put(tty);
  1940. break;
  1941. }
  1942. status = inb(port->ioaddr + UART_LSR);
  1943. if (status & UART_LSR_PE)
  1944. port->err_shadow |= NPPI_NOTIFY_PARITY;
  1945. if (status & UART_LSR_FE)
  1946. port->err_shadow |= NPPI_NOTIFY_FRAMING;
  1947. if (status & UART_LSR_OE)
  1948. port->err_shadow |=
  1949. NPPI_NOTIFY_HW_OVERRUN;
  1950. if (status & UART_LSR_BI)
  1951. port->err_shadow |= NPPI_NOTIFY_BREAK;
  1952. if (port->board->chip_flag) {
  1953. if (iir == MOXA_MUST_IIR_GDA ||
  1954. iir == MOXA_MUST_IIR_RDA ||
  1955. iir == MOXA_MUST_IIR_RTO ||
  1956. iir == MOXA_MUST_IIR_LSR)
  1957. mxser_receive_chars(tty, port,
  1958. &status);
  1959. } else {
  1960. status &= port->read_status_mask;
  1961. if (status & UART_LSR_DR)
  1962. mxser_receive_chars(tty, port,
  1963. &status);
  1964. }
  1965. msr = inb(port->ioaddr + UART_MSR);
  1966. if (msr & UART_MSR_ANY_DELTA)
  1967. mxser_check_modem_status(tty, port, msr);
  1968. if (port->board->chip_flag) {
  1969. if (iir == 0x02 && (status &
  1970. UART_LSR_THRE))
  1971. mxser_transmit_chars(tty, port);
  1972. } else {
  1973. if (status & UART_LSR_THRE)
  1974. mxser_transmit_chars(tty, port);
  1975. }
  1976. tty_kref_put(tty);
  1977. } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
  1978. spin_unlock(&port->slock);
  1979. }
  1980. }
  1981. irq_stop:
  1982. return handled;
  1983. }
  1984. static const struct tty_operations mxser_ops = {
  1985. .open = mxser_open,
  1986. .close = mxser_close,
  1987. .write = mxser_write,
  1988. .put_char = mxser_put_char,
  1989. .flush_chars = mxser_flush_chars,
  1990. .write_room = mxser_write_room,
  1991. .chars_in_buffer = mxser_chars_in_buffer,
  1992. .flush_buffer = mxser_flush_buffer,
  1993. .ioctl = mxser_ioctl,
  1994. .throttle = mxser_throttle,
  1995. .unthrottle = mxser_unthrottle,
  1996. .set_termios = mxser_set_termios,
  1997. .stop = mxser_stop,
  1998. .start = mxser_start,
  1999. .hangup = mxser_hangup,
  2000. .break_ctl = mxser_rs_break,
  2001. .wait_until_sent = mxser_wait_until_sent,
  2002. .tiocmget = mxser_tiocmget,
  2003. .tiocmset = mxser_tiocmset,
  2004. .get_icount = mxser_get_icount,
  2005. };
  2006. struct tty_port_operations mxser_port_ops = {
  2007. .carrier_raised = mxser_carrier_raised,
  2008. .dtr_rts = mxser_dtr_rts,
  2009. .activate = mxser_activate,
  2010. .shutdown = mxser_shutdown_port,
  2011. };
  2012. /*
  2013. * The MOXA Smartio/Industio serial driver boot-time initialization code!
  2014. */
  2015. static void mxser_release_ISA_res(struct mxser_board *brd)
  2016. {
  2017. free_irq(brd->irq, brd);
  2018. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2019. release_region(brd->vector, 1);
  2020. }
  2021. static int __devinit mxser_initbrd(struct mxser_board *brd,
  2022. struct pci_dev *pdev)
  2023. {
  2024. struct mxser_port *info;
  2025. unsigned int i;
  2026. int retval;
  2027. printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
  2028. brd->ports[0].max_baud);
  2029. for (i = 0; i < brd->info->nports; i++) {
  2030. info = &brd->ports[i];
  2031. tty_port_init(&info->port);
  2032. info->port.ops = &mxser_port_ops;
  2033. info->board = brd;
  2034. info->stop_rx = 0;
  2035. info->ldisc_stop_rx = 0;
  2036. /* Enhance mode enabled here */
  2037. if (brd->chip_flag != MOXA_OTHER_UART)
  2038. mxser_enable_must_enchance_mode(info->ioaddr);
  2039. info->port.flags = ASYNC_SHARE_IRQ;
  2040. info->type = brd->uart_type;
  2041. process_txrx_fifo(info);
  2042. info->custom_divisor = info->baud_base * 16;
  2043. info->port.close_delay = 5 * HZ / 10;
  2044. info->port.closing_wait = 30 * HZ;
  2045. info->normal_termios = mxvar_sdriver->init_termios;
  2046. memset(&info->mon_data, 0, sizeof(struct mxser_mon));
  2047. info->err_shadow = 0;
  2048. spin_lock_init(&info->slock);
  2049. /* before set INT ISR, disable all int */
  2050. outb(inb(info->ioaddr + UART_IER) & 0xf0,
  2051. info->ioaddr + UART_IER);
  2052. }
  2053. retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
  2054. brd);
  2055. if (retval)
  2056. printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
  2057. "conflict with another device.\n",
  2058. brd->info->name, brd->irq);
  2059. return retval;
  2060. }
  2061. static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
  2062. {
  2063. int id, i, bits;
  2064. unsigned short regs[16], irq;
  2065. unsigned char scratch, scratch2;
  2066. brd->chip_flag = MOXA_OTHER_UART;
  2067. id = mxser_read_register(cap, regs);
  2068. switch (id) {
  2069. case C168_ASIC_ID:
  2070. brd->info = &mxser_cards[0];
  2071. break;
  2072. case C104_ASIC_ID:
  2073. brd->info = &mxser_cards[1];
  2074. break;
  2075. case CI104J_ASIC_ID:
  2076. brd->info = &mxser_cards[2];
  2077. break;
  2078. case C102_ASIC_ID:
  2079. brd->info = &mxser_cards[5];
  2080. break;
  2081. case CI132_ASIC_ID:
  2082. brd->info = &mxser_cards[6];
  2083. break;
  2084. case CI134_ASIC_ID:
  2085. brd->info = &mxser_cards[7];
  2086. break;
  2087. default:
  2088. return 0;
  2089. }
  2090. irq = 0;
  2091. /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
  2092. Flag-hack checks if configuration should be read as 2-port here. */
  2093. if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
  2094. irq = regs[9] & 0xF000;
  2095. irq = irq | (irq >> 4);
  2096. if (irq != (regs[9] & 0xFF00))
  2097. goto err_irqconflict;
  2098. } else if (brd->info->nports == 4) {
  2099. irq = regs[9] & 0xF000;
  2100. irq = irq | (irq >> 4);
  2101. irq = irq | (irq >> 8);
  2102. if (irq != regs[9])
  2103. goto err_irqconflict;
  2104. } else if (brd->info->nports == 8) {
  2105. irq = regs[9] & 0xF000;
  2106. irq = irq | (irq >> 4);
  2107. irq = irq | (irq >> 8);
  2108. if ((irq != regs[9]) || (irq != regs[10]))
  2109. goto err_irqconflict;
  2110. }
  2111. if (!irq) {
  2112. printk(KERN_ERR "mxser: interrupt number unset\n");
  2113. return -EIO;
  2114. }
  2115. brd->irq = ((int)(irq & 0xF000) >> 12);
  2116. for (i = 0; i < 8; i++)
  2117. brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
  2118. if ((regs[12] & 0x80) == 0) {
  2119. printk(KERN_ERR "mxser: invalid interrupt vector\n");
  2120. return -EIO;
  2121. }
  2122. brd->vector = (int)regs[11]; /* interrupt vector */
  2123. if (id == 1)
  2124. brd->vector_mask = 0x00FF;
  2125. else
  2126. brd->vector_mask = 0x000F;
  2127. for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
  2128. if (regs[12] & bits) {
  2129. brd->ports[i].baud_base = 921600;
  2130. brd->ports[i].max_baud = 921600;
  2131. } else {
  2132. brd->ports[i].baud_base = 115200;
  2133. brd->ports[i].max_baud = 115200;
  2134. }
  2135. }
  2136. scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
  2137. outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
  2138. outb(0, cap + UART_EFR); /* EFR is the same as FCR */
  2139. outb(scratch2, cap + UART_LCR);
  2140. outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
  2141. scratch = inb(cap + UART_IIR);
  2142. if (scratch & 0xC0)
  2143. brd->uart_type = PORT_16550A;
  2144. else
  2145. brd->uart_type = PORT_16450;
  2146. if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
  2147. "mxser(IO)")) {
  2148. printk(KERN_ERR "mxser: can't request ports I/O region: "
  2149. "0x%.8lx-0x%.8lx\n",
  2150. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2151. 8 * brd->info->nports - 1);
  2152. return -EIO;
  2153. }
  2154. if (!request_region(brd->vector, 1, "mxser(vector)")) {
  2155. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2156. printk(KERN_ERR "mxser: can't request interrupt vector region: "
  2157. "0x%.8lx-0x%.8lx\n",
  2158. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2159. 8 * brd->info->nports - 1);
  2160. return -EIO;
  2161. }
  2162. return brd->info->nports;
  2163. err_irqconflict:
  2164. printk(KERN_ERR "mxser: invalid interrupt number\n");
  2165. return -EIO;
  2166. }
  2167. static int __devinit mxser_probe(struct pci_dev *pdev,
  2168. const struct pci_device_id *ent)
  2169. {
  2170. #ifdef CONFIG_PCI
  2171. struct mxser_board *brd;
  2172. unsigned int i, j;
  2173. unsigned long ioaddress;
  2174. int retval = -EINVAL;
  2175. for (i = 0; i < MXSER_BOARDS; i++)
  2176. if (mxser_boards[i].info == NULL)
  2177. break;
  2178. if (i >= MXSER_BOARDS) {
  2179. dev_err(&pdev->dev, "too many boards found (maximum %d), board "
  2180. "not configured\n", MXSER_BOARDS);
  2181. goto err;
  2182. }
  2183. brd = &mxser_boards[i];
  2184. brd->idx = i * MXSER_PORTS_PER_BOARD;
  2185. dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
  2186. mxser_cards[ent->driver_data].name,
  2187. pdev->bus->number, PCI_SLOT(pdev->devfn));
  2188. retval = pci_enable_device(pdev);
  2189. if (retval) {
  2190. dev_err(&pdev->dev, "PCI enable failed\n");
  2191. goto err;
  2192. }
  2193. /* io address */
  2194. ioaddress = pci_resource_start(pdev, 2);
  2195. retval = pci_request_region(pdev, 2, "mxser(IO)");
  2196. if (retval)
  2197. goto err_dis;
  2198. brd->info = &mxser_cards[ent->driver_data];
  2199. for (i = 0; i < brd->info->nports; i++)
  2200. brd->ports[i].ioaddr = ioaddress + 8 * i;
  2201. /* vector */
  2202. ioaddress = pci_resource_start(pdev, 3);
  2203. retval = pci_request_region(pdev, 3, "mxser(vector)");
  2204. if (retval)
  2205. goto err_zero;
  2206. brd->vector = ioaddress;
  2207. /* irq */
  2208. brd->irq = pdev->irq;
  2209. brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
  2210. brd->uart_type = PORT_16550A;
  2211. brd->vector_mask = 0;
  2212. for (i = 0; i < brd->info->nports; i++) {
  2213. for (j = 0; j < UART_INFO_NUM; j++) {
  2214. if (Gpci_uart_info[j].type == brd->chip_flag) {
  2215. brd->ports[i].max_baud =
  2216. Gpci_uart_info[j].max_baud;
  2217. /* exception....CP-102 */
  2218. if (brd->info->flags & MXSER_HIGHBAUD)
  2219. brd->ports[i].max_baud = 921600;
  2220. break;
  2221. }
  2222. }
  2223. }
  2224. if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
  2225. for (i = 0; i < brd->info->nports; i++) {
  2226. if (i < 4)
  2227. brd->ports[i].opmode_ioaddr = ioaddress + 4;
  2228. else
  2229. brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
  2230. }
  2231. outb(0, ioaddress + 4); /* default set to RS232 mode */
  2232. outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
  2233. }
  2234. for (i = 0; i < brd->info->nports; i++) {
  2235. brd->vector_mask |= (1 << i);
  2236. brd->ports[i].baud_base = 921600;
  2237. }
  2238. /* mxser_initbrd will hook ISR. */
  2239. retval = mxser_initbrd(brd, pdev);
  2240. if (retval)
  2241. goto err_rel3;
  2242. for (i = 0; i < brd->info->nports; i++)
  2243. tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
  2244. pci_set_drvdata(pdev, brd);
  2245. return 0;
  2246. err_rel3:
  2247. pci_release_region(pdev, 3);
  2248. err_zero:
  2249. brd->info = NULL;
  2250. pci_release_region(pdev, 2);
  2251. err_dis:
  2252. pci_disable_device(pdev);
  2253. err:
  2254. return retval;
  2255. #else
  2256. return -ENODEV;
  2257. #endif
  2258. }
  2259. static void __devexit mxser_remove(struct pci_dev *pdev)
  2260. {
  2261. #ifdef CONFIG_PCI
  2262. struct mxser_board *brd = pci_get_drvdata(pdev);
  2263. unsigned int i;
  2264. for (i = 0; i < brd->info->nports; i++)
  2265. tty_unregister_device(mxvar_sdriver, brd->idx + i);
  2266. free_irq(pdev->irq, brd);
  2267. pci_release_region(pdev, 2);
  2268. pci_release_region(pdev, 3);
  2269. pci_disable_device(pdev);
  2270. brd->info = NULL;
  2271. #endif
  2272. }
  2273. static struct pci_driver mxser_driver = {
  2274. .name = "mxser",
  2275. .id_table = mxser_pcibrds,
  2276. .probe = mxser_probe,
  2277. .remove = __devexit_p(mxser_remove)
  2278. };
  2279. static int __init mxser_module_init(void)
  2280. {
  2281. struct mxser_board *brd;
  2282. unsigned int b, i, m;
  2283. int retval;
  2284. mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
  2285. if (!mxvar_sdriver)
  2286. return -ENOMEM;
  2287. printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
  2288. MXSER_VERSION);
  2289. /* Initialize the tty_driver structure */
  2290. mxvar_sdriver->name = "ttyMI";
  2291. mxvar_sdriver->major = ttymajor;
  2292. mxvar_sdriver->minor_start = 0;
  2293. mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
  2294. mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
  2295. mxvar_sdriver->init_termios = tty_std_termios;
  2296. mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
  2297. mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
  2298. tty_set_operations(mxvar_sdriver, &mxser_ops);
  2299. retval = tty_register_driver(mxvar_sdriver);
  2300. if (retval) {
  2301. printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
  2302. "tty driver !\n");
  2303. goto err_put;
  2304. }
  2305. /* Start finding ISA boards here */
  2306. for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
  2307. if (!ioaddr[b])
  2308. continue;
  2309. brd = &mxser_boards[m];
  2310. retval = mxser_get_ISA_conf(ioaddr[b], brd);
  2311. if (retval <= 0) {
  2312. brd->info = NULL;
  2313. continue;
  2314. }
  2315. printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
  2316. brd->info->name, ioaddr[b]);
  2317. /* mxser_initbrd will hook ISR. */
  2318. if (mxser_initbrd(brd, NULL) < 0) {
  2319. brd->info = NULL;
  2320. continue;
  2321. }
  2322. brd->idx = m * MXSER_PORTS_PER_BOARD;
  2323. for (i = 0; i < brd->info->nports; i++)
  2324. tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
  2325. m++;
  2326. }
  2327. retval = pci_register_driver(&mxser_driver);
  2328. if (retval) {
  2329. printk(KERN_ERR "mxser: can't register pci driver\n");
  2330. if (!m) {
  2331. retval = -ENODEV;
  2332. goto err_unr;
  2333. } /* else: we have some ISA cards under control */
  2334. }
  2335. return 0;
  2336. err_unr:
  2337. tty_unregister_driver(mxvar_sdriver);
  2338. err_put:
  2339. put_tty_driver(mxvar_sdriver);
  2340. return retval;
  2341. }
  2342. static void __exit mxser_module_exit(void)
  2343. {
  2344. unsigned int i, j;
  2345. pci_unregister_driver(&mxser_driver);
  2346. for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
  2347. if (mxser_boards[i].info != NULL)
  2348. for (j = 0; j < mxser_boards[i].info->nports; j++)
  2349. tty_unregister_device(mxvar_sdriver,
  2350. mxser_boards[i].idx + j);
  2351. tty_unregister_driver(mxvar_sdriver);
  2352. put_tty_driver(mxvar_sdriver);
  2353. for (i = 0; i < MXSER_BOARDS; i++)
  2354. if (mxser_boards[i].info != NULL)
  2355. mxser_release_ISA_res(&mxser_boards[i]);
  2356. }
  2357. module_init(mxser_module_init);
  2358. module_exit(mxser_module_exit);