rt2500usb.c 61 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995
  1. /*
  2. Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2500usb
  19. Abstract: rt2500usb device specific routines.
  20. Supported chipsets: RT2570.
  21. */
  22. #include <linux/delay.h>
  23. #include <linux/etherdevice.h>
  24. #include <linux/init.h>
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/slab.h>
  28. #include <linux/usb.h>
  29. #include "rt2x00.h"
  30. #include "rt2x00usb.h"
  31. #include "rt2500usb.h"
  32. /*
  33. * Allow hardware encryption to be disabled.
  34. */
  35. static bool modparam_nohwcrypt;
  36. module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
  37. MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
  38. /*
  39. * Register access.
  40. * All access to the CSR registers will go through the methods
  41. * rt2500usb_register_read and rt2500usb_register_write.
  42. * BBP and RF register require indirect register access,
  43. * and use the CSR registers BBPCSR and RFCSR to achieve this.
  44. * These indirect registers work with busy bits,
  45. * and we will try maximal REGISTER_BUSY_COUNT times to access
  46. * the register while taking a REGISTER_BUSY_DELAY us delay
  47. * between each attampt. When the busy bit is still set at that time,
  48. * the access attempt is considered to have failed,
  49. * and we will print an error.
  50. * If the csr_mutex is already held then the _lock variants must
  51. * be used instead.
  52. */
  53. static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
  54. const unsigned int offset,
  55. u16 *value)
  56. {
  57. __le16 reg;
  58. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  59. USB_VENDOR_REQUEST_IN, offset,
  60. &reg, sizeof(reg), REGISTER_TIMEOUT);
  61. *value = le16_to_cpu(reg);
  62. }
  63. static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
  64. const unsigned int offset,
  65. u16 *value)
  66. {
  67. __le16 reg;
  68. rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
  69. USB_VENDOR_REQUEST_IN, offset,
  70. &reg, sizeof(reg), REGISTER_TIMEOUT);
  71. *value = le16_to_cpu(reg);
  72. }
  73. static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
  74. const unsigned int offset,
  75. void *value, const u16 length)
  76. {
  77. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  78. USB_VENDOR_REQUEST_IN, offset,
  79. value, length,
  80. REGISTER_TIMEOUT16(length));
  81. }
  82. static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
  83. const unsigned int offset,
  84. u16 value)
  85. {
  86. __le16 reg = cpu_to_le16(value);
  87. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  88. USB_VENDOR_REQUEST_OUT, offset,
  89. &reg, sizeof(reg), REGISTER_TIMEOUT);
  90. }
  91. static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
  92. const unsigned int offset,
  93. u16 value)
  94. {
  95. __le16 reg = cpu_to_le16(value);
  96. rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
  97. USB_VENDOR_REQUEST_OUT, offset,
  98. &reg, sizeof(reg), REGISTER_TIMEOUT);
  99. }
  100. static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
  101. const unsigned int offset,
  102. void *value, const u16 length)
  103. {
  104. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  105. USB_VENDOR_REQUEST_OUT, offset,
  106. value, length,
  107. REGISTER_TIMEOUT16(length));
  108. }
  109. static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
  110. const unsigned int offset,
  111. struct rt2x00_field16 field,
  112. u16 *reg)
  113. {
  114. unsigned int i;
  115. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  116. rt2500usb_register_read_lock(rt2x00dev, offset, reg);
  117. if (!rt2x00_get_field16(*reg, field))
  118. return 1;
  119. udelay(REGISTER_BUSY_DELAY);
  120. }
  121. ERROR(rt2x00dev, "Indirect register access failed: "
  122. "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
  123. *reg = ~0;
  124. return 0;
  125. }
  126. #define WAIT_FOR_BBP(__dev, __reg) \
  127. rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
  128. #define WAIT_FOR_RF(__dev, __reg) \
  129. rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
  130. static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
  131. const unsigned int word, const u8 value)
  132. {
  133. u16 reg;
  134. mutex_lock(&rt2x00dev->csr_mutex);
  135. /*
  136. * Wait until the BBP becomes available, afterwards we
  137. * can safely write the new data into the register.
  138. */
  139. if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
  140. reg = 0;
  141. rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
  142. rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
  143. rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
  144. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
  145. }
  146. mutex_unlock(&rt2x00dev->csr_mutex);
  147. }
  148. static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
  149. const unsigned int word, u8 *value)
  150. {
  151. u16 reg;
  152. mutex_lock(&rt2x00dev->csr_mutex);
  153. /*
  154. * Wait until the BBP becomes available, afterwards we
  155. * can safely write the read request into the register.
  156. * After the data has been written, we wait until hardware
  157. * returns the correct value, if at any time the register
  158. * doesn't become available in time, reg will be 0xffffffff
  159. * which means we return 0xff to the caller.
  160. */
  161. if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
  162. reg = 0;
  163. rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
  164. rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
  165. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
  166. if (WAIT_FOR_BBP(rt2x00dev, &reg))
  167. rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
  168. }
  169. *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
  170. mutex_unlock(&rt2x00dev->csr_mutex);
  171. }
  172. static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
  173. const unsigned int word, const u32 value)
  174. {
  175. u16 reg;
  176. mutex_lock(&rt2x00dev->csr_mutex);
  177. /*
  178. * Wait until the RF becomes available, afterwards we
  179. * can safely write the new data into the register.
  180. */
  181. if (WAIT_FOR_RF(rt2x00dev, &reg)) {
  182. reg = 0;
  183. rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
  184. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
  185. reg = 0;
  186. rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
  187. rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
  188. rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
  189. rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
  190. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
  191. rt2x00_rf_write(rt2x00dev, word, value);
  192. }
  193. mutex_unlock(&rt2x00dev->csr_mutex);
  194. }
  195. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  196. static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
  197. const unsigned int offset,
  198. u32 *value)
  199. {
  200. rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
  201. }
  202. static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
  203. const unsigned int offset,
  204. u32 value)
  205. {
  206. rt2500usb_register_write(rt2x00dev, offset, value);
  207. }
  208. static const struct rt2x00debug rt2500usb_rt2x00debug = {
  209. .owner = THIS_MODULE,
  210. .csr = {
  211. .read = _rt2500usb_register_read,
  212. .write = _rt2500usb_register_write,
  213. .flags = RT2X00DEBUGFS_OFFSET,
  214. .word_base = CSR_REG_BASE,
  215. .word_size = sizeof(u16),
  216. .word_count = CSR_REG_SIZE / sizeof(u16),
  217. },
  218. .eeprom = {
  219. .read = rt2x00_eeprom_read,
  220. .write = rt2x00_eeprom_write,
  221. .word_base = EEPROM_BASE,
  222. .word_size = sizeof(u16),
  223. .word_count = EEPROM_SIZE / sizeof(u16),
  224. },
  225. .bbp = {
  226. .read = rt2500usb_bbp_read,
  227. .write = rt2500usb_bbp_write,
  228. .word_base = BBP_BASE,
  229. .word_size = sizeof(u8),
  230. .word_count = BBP_SIZE / sizeof(u8),
  231. },
  232. .rf = {
  233. .read = rt2x00_rf_read,
  234. .write = rt2500usb_rf_write,
  235. .word_base = RF_BASE,
  236. .word_size = sizeof(u32),
  237. .word_count = RF_SIZE / sizeof(u32),
  238. },
  239. };
  240. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  241. static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
  242. {
  243. u16 reg;
  244. rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
  245. return rt2x00_get_field16(reg, MAC_CSR19_BIT7);
  246. }
  247. #ifdef CONFIG_RT2X00_LIB_LEDS
  248. static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
  249. enum led_brightness brightness)
  250. {
  251. struct rt2x00_led *led =
  252. container_of(led_cdev, struct rt2x00_led, led_dev);
  253. unsigned int enabled = brightness != LED_OFF;
  254. u16 reg;
  255. rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
  256. if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
  257. rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
  258. else if (led->type == LED_TYPE_ACTIVITY)
  259. rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
  260. rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
  261. }
  262. static int rt2500usb_blink_set(struct led_classdev *led_cdev,
  263. unsigned long *delay_on,
  264. unsigned long *delay_off)
  265. {
  266. struct rt2x00_led *led =
  267. container_of(led_cdev, struct rt2x00_led, led_dev);
  268. u16 reg;
  269. rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
  270. rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
  271. rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
  272. rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
  273. return 0;
  274. }
  275. static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
  276. struct rt2x00_led *led,
  277. enum led_type type)
  278. {
  279. led->rt2x00dev = rt2x00dev;
  280. led->type = type;
  281. led->led_dev.brightness_set = rt2500usb_brightness_set;
  282. led->led_dev.blink_set = rt2500usb_blink_set;
  283. led->flags = LED_INITIALIZED;
  284. }
  285. #endif /* CONFIG_RT2X00_LIB_LEDS */
  286. /*
  287. * Configuration handlers.
  288. */
  289. /*
  290. * rt2500usb does not differentiate between shared and pairwise
  291. * keys, so we should use the same function for both key types.
  292. */
  293. static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
  294. struct rt2x00lib_crypto *crypto,
  295. struct ieee80211_key_conf *key)
  296. {
  297. u32 mask;
  298. u16 reg;
  299. enum cipher curr_cipher;
  300. if (crypto->cmd == SET_KEY) {
  301. /*
  302. * Disallow to set WEP key other than with index 0,
  303. * it is known that not work at least on some hardware.
  304. * SW crypto will be used in that case.
  305. */
  306. if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  307. key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
  308. key->keyidx != 0)
  309. return -EOPNOTSUPP;
  310. /*
  311. * Pairwise key will always be entry 0, but this
  312. * could collide with a shared key on the same
  313. * position...
  314. */
  315. mask = TXRX_CSR0_KEY_ID.bit_mask;
  316. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  317. curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM);
  318. reg &= mask;
  319. if (reg && reg == mask)
  320. return -ENOSPC;
  321. reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
  322. key->hw_key_idx += reg ? ffz(reg) : 0;
  323. /*
  324. * Hardware requires that all keys use the same cipher
  325. * (e.g. TKIP-only, AES-only, but not TKIP+AES).
  326. * If this is not the first key, compare the cipher with the
  327. * first one and fall back to SW crypto if not the same.
  328. */
  329. if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher)
  330. return -EOPNOTSUPP;
  331. rt2500usb_register_multiwrite(rt2x00dev, KEY_ENTRY(key->hw_key_idx),
  332. crypto->key, sizeof(crypto->key));
  333. /*
  334. * The driver does not support the IV/EIV generation
  335. * in hardware. However it demands the data to be provided
  336. * both separately as well as inside the frame.
  337. * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
  338. * to ensure rt2x00lib will not strip the data from the
  339. * frame after the copy, now we must tell mac80211
  340. * to generate the IV/EIV data.
  341. */
  342. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  343. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  344. }
  345. /*
  346. * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
  347. * a particular key is valid.
  348. */
  349. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  350. rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
  351. rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
  352. mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
  353. if (crypto->cmd == SET_KEY)
  354. mask |= 1 << key->hw_key_idx;
  355. else if (crypto->cmd == DISABLE_KEY)
  356. mask &= ~(1 << key->hw_key_idx);
  357. rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
  358. rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
  359. return 0;
  360. }
  361. static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
  362. const unsigned int filter_flags)
  363. {
  364. u16 reg;
  365. /*
  366. * Start configuration steps.
  367. * Note that the version error will always be dropped
  368. * and broadcast frames will always be accepted since
  369. * there is no filter for it at this time.
  370. */
  371. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  372. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
  373. !(filter_flags & FIF_FCSFAIL));
  374. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
  375. !(filter_flags & FIF_PLCPFAIL));
  376. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
  377. !(filter_flags & FIF_CONTROL));
  378. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
  379. !(filter_flags & FIF_PROMISC_IN_BSS));
  380. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
  381. !(filter_flags & FIF_PROMISC_IN_BSS) &&
  382. !rt2x00dev->intf_ap_count);
  383. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
  384. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
  385. !(filter_flags & FIF_ALLMULTI));
  386. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
  387. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  388. }
  389. static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
  390. struct rt2x00_intf *intf,
  391. struct rt2x00intf_conf *conf,
  392. const unsigned int flags)
  393. {
  394. unsigned int bcn_preload;
  395. u16 reg;
  396. if (flags & CONFIG_UPDATE_TYPE) {
  397. /*
  398. * Enable beacon config
  399. */
  400. bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
  401. rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
  402. rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
  403. rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
  404. 2 * (conf->type != NL80211_IFTYPE_STATION));
  405. rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
  406. /*
  407. * Enable synchronisation.
  408. */
  409. rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
  410. rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
  411. rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
  412. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  413. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
  414. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  415. }
  416. if (flags & CONFIG_UPDATE_MAC)
  417. rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
  418. (3 * sizeof(__le16)));
  419. if (flags & CONFIG_UPDATE_BSSID)
  420. rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
  421. (3 * sizeof(__le16)));
  422. }
  423. static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
  424. struct rt2x00lib_erp *erp,
  425. u32 changed)
  426. {
  427. u16 reg;
  428. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  429. rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
  430. rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
  431. !!erp->short_preamble);
  432. rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
  433. }
  434. if (changed & BSS_CHANGED_BASIC_RATES)
  435. rt2500usb_register_write(rt2x00dev, TXRX_CSR11,
  436. erp->basic_rates);
  437. if (changed & BSS_CHANGED_BEACON_INT) {
  438. rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
  439. rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
  440. erp->beacon_int * 4);
  441. rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
  442. }
  443. if (changed & BSS_CHANGED_ERP_SLOT) {
  444. rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
  445. rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
  446. rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
  447. }
  448. }
  449. static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
  450. struct antenna_setup *ant)
  451. {
  452. u8 r2;
  453. u8 r14;
  454. u16 csr5;
  455. u16 csr6;
  456. /*
  457. * We should never come here because rt2x00lib is supposed
  458. * to catch this and send us the correct antenna explicitely.
  459. */
  460. BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
  461. ant->tx == ANTENNA_SW_DIVERSITY);
  462. rt2500usb_bbp_read(rt2x00dev, 2, &r2);
  463. rt2500usb_bbp_read(rt2x00dev, 14, &r14);
  464. rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
  465. rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
  466. /*
  467. * Configure the TX antenna.
  468. */
  469. switch (ant->tx) {
  470. case ANTENNA_HW_DIVERSITY:
  471. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
  472. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
  473. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
  474. break;
  475. case ANTENNA_A:
  476. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
  477. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
  478. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
  479. break;
  480. case ANTENNA_B:
  481. default:
  482. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
  483. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
  484. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
  485. break;
  486. }
  487. /*
  488. * Configure the RX antenna.
  489. */
  490. switch (ant->rx) {
  491. case ANTENNA_HW_DIVERSITY:
  492. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
  493. break;
  494. case ANTENNA_A:
  495. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
  496. break;
  497. case ANTENNA_B:
  498. default:
  499. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
  500. break;
  501. }
  502. /*
  503. * RT2525E and RT5222 need to flip TX I/Q
  504. */
  505. if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) {
  506. rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
  507. rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
  508. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
  509. /*
  510. * RT2525E does not need RX I/Q Flip.
  511. */
  512. if (rt2x00_rf(rt2x00dev, RF2525E))
  513. rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
  514. } else {
  515. rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
  516. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
  517. }
  518. rt2500usb_bbp_write(rt2x00dev, 2, r2);
  519. rt2500usb_bbp_write(rt2x00dev, 14, r14);
  520. rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
  521. rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
  522. }
  523. static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
  524. struct rf_channel *rf, const int txpower)
  525. {
  526. /*
  527. * Set TXpower.
  528. */
  529. rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
  530. /*
  531. * For RT2525E we should first set the channel to half band higher.
  532. */
  533. if (rt2x00_rf(rt2x00dev, RF2525E)) {
  534. static const u32 vals[] = {
  535. 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
  536. 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
  537. 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
  538. 0x00000902, 0x00000906
  539. };
  540. rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
  541. if (rf->rf4)
  542. rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
  543. }
  544. rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
  545. rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
  546. rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
  547. if (rf->rf4)
  548. rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
  549. }
  550. static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
  551. const int txpower)
  552. {
  553. u32 rf3;
  554. rt2x00_rf_read(rt2x00dev, 3, &rf3);
  555. rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
  556. rt2500usb_rf_write(rt2x00dev, 3, rf3);
  557. }
  558. static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
  559. struct rt2x00lib_conf *libconf)
  560. {
  561. enum dev_state state =
  562. (libconf->conf->flags & IEEE80211_CONF_PS) ?
  563. STATE_SLEEP : STATE_AWAKE;
  564. u16 reg;
  565. if (state == STATE_SLEEP) {
  566. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  567. rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
  568. rt2x00dev->beacon_int - 20);
  569. rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
  570. libconf->conf->listen_interval - 1);
  571. /* We must first disable autowake before it can be enabled */
  572. rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
  573. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  574. rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
  575. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  576. } else {
  577. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  578. rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
  579. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  580. }
  581. rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
  582. }
  583. static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
  584. struct rt2x00lib_conf *libconf,
  585. const unsigned int flags)
  586. {
  587. if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
  588. rt2500usb_config_channel(rt2x00dev, &libconf->rf,
  589. libconf->conf->power_level);
  590. if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
  591. !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
  592. rt2500usb_config_txpower(rt2x00dev,
  593. libconf->conf->power_level);
  594. if (flags & IEEE80211_CONF_CHANGE_PS)
  595. rt2500usb_config_ps(rt2x00dev, libconf);
  596. }
  597. /*
  598. * Link tuning
  599. */
  600. static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
  601. struct link_qual *qual)
  602. {
  603. u16 reg;
  604. /*
  605. * Update FCS error count from register.
  606. */
  607. rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
  608. qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
  609. /*
  610. * Update False CCA count from register.
  611. */
  612. rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
  613. qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
  614. }
  615. static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
  616. struct link_qual *qual)
  617. {
  618. u16 eeprom;
  619. u16 value;
  620. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
  621. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
  622. rt2500usb_bbp_write(rt2x00dev, 24, value);
  623. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
  624. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
  625. rt2500usb_bbp_write(rt2x00dev, 25, value);
  626. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
  627. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
  628. rt2500usb_bbp_write(rt2x00dev, 61, value);
  629. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
  630. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
  631. rt2500usb_bbp_write(rt2x00dev, 17, value);
  632. qual->vgc_level = value;
  633. }
  634. /*
  635. * Queue handlers.
  636. */
  637. static void rt2500usb_start_queue(struct data_queue *queue)
  638. {
  639. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  640. u16 reg;
  641. switch (queue->qid) {
  642. case QID_RX:
  643. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  644. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 0);
  645. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  646. break;
  647. case QID_BEACON:
  648. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  649. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
  650. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
  651. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
  652. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  653. break;
  654. default:
  655. break;
  656. }
  657. }
  658. static void rt2500usb_stop_queue(struct data_queue *queue)
  659. {
  660. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  661. u16 reg;
  662. switch (queue->qid) {
  663. case QID_RX:
  664. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  665. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
  666. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  667. break;
  668. case QID_BEACON:
  669. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  670. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
  671. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
  672. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
  673. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  674. break;
  675. default:
  676. break;
  677. }
  678. }
  679. /*
  680. * Initialization functions.
  681. */
  682. static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
  683. {
  684. u16 reg;
  685. rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
  686. USB_MODE_TEST, REGISTER_TIMEOUT);
  687. rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
  688. 0x00f0, REGISTER_TIMEOUT);
  689. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  690. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
  691. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  692. rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
  693. rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
  694. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  695. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
  696. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
  697. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
  698. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  699. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  700. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
  701. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
  702. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
  703. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  704. rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
  705. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
  706. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
  707. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
  708. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
  709. rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
  710. rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
  711. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
  712. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
  713. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
  714. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
  715. rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
  716. rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
  717. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
  718. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
  719. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
  720. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
  721. rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
  722. rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
  723. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
  724. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
  725. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
  726. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
  727. rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
  728. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  729. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
  730. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
  731. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
  732. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
  733. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  734. rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
  735. rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
  736. if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
  737. return -EBUSY;
  738. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  739. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
  740. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
  741. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
  742. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  743. if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) {
  744. rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
  745. rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
  746. } else {
  747. reg = 0;
  748. rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
  749. rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
  750. }
  751. rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
  752. rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
  753. rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
  754. rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
  755. rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
  756. rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
  757. rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
  758. rt2x00dev->rx->data_size);
  759. rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
  760. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  761. rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, CIPHER_NONE);
  762. rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
  763. rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
  764. rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
  765. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  766. rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
  767. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  768. rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
  769. rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
  770. rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
  771. rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
  772. rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
  773. rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
  774. return 0;
  775. }
  776. static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
  777. {
  778. unsigned int i;
  779. u8 value;
  780. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  781. rt2500usb_bbp_read(rt2x00dev, 0, &value);
  782. if ((value != 0xff) && (value != 0x00))
  783. return 0;
  784. udelay(REGISTER_BUSY_DELAY);
  785. }
  786. ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
  787. return -EACCES;
  788. }
  789. static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
  790. {
  791. unsigned int i;
  792. u16 eeprom;
  793. u8 value;
  794. u8 reg_id;
  795. if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
  796. return -EACCES;
  797. rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
  798. rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
  799. rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
  800. rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
  801. rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
  802. rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
  803. rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
  804. rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
  805. rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
  806. rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
  807. rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
  808. rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
  809. rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
  810. rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
  811. rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
  812. rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
  813. rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
  814. rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
  815. rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
  816. rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
  817. rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
  818. rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
  819. rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
  820. rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
  821. rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
  822. rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
  823. rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
  824. rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
  825. rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
  826. rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
  827. rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
  828. for (i = 0; i < EEPROM_BBP_SIZE; i++) {
  829. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
  830. if (eeprom != 0xffff && eeprom != 0x0000) {
  831. reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
  832. value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
  833. rt2500usb_bbp_write(rt2x00dev, reg_id, value);
  834. }
  835. }
  836. return 0;
  837. }
  838. /*
  839. * Device state switch handlers.
  840. */
  841. static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
  842. {
  843. /*
  844. * Initialize all registers.
  845. */
  846. if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
  847. rt2500usb_init_bbp(rt2x00dev)))
  848. return -EIO;
  849. return 0;
  850. }
  851. static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
  852. {
  853. rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
  854. rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
  855. /*
  856. * Disable synchronisation.
  857. */
  858. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  859. rt2x00usb_disable_radio(rt2x00dev);
  860. }
  861. static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
  862. enum dev_state state)
  863. {
  864. u16 reg;
  865. u16 reg2;
  866. unsigned int i;
  867. char put_to_sleep;
  868. char bbp_state;
  869. char rf_state;
  870. put_to_sleep = (state != STATE_AWAKE);
  871. reg = 0;
  872. rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
  873. rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
  874. rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
  875. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  876. rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
  877. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  878. /*
  879. * Device is not guaranteed to be in the requested state yet.
  880. * We must wait until the register indicates that the
  881. * device has entered the correct state.
  882. */
  883. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  884. rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
  885. bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
  886. rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
  887. if (bbp_state == state && rf_state == state)
  888. return 0;
  889. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  890. msleep(30);
  891. }
  892. return -EBUSY;
  893. }
  894. static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
  895. enum dev_state state)
  896. {
  897. int retval = 0;
  898. switch (state) {
  899. case STATE_RADIO_ON:
  900. retval = rt2500usb_enable_radio(rt2x00dev);
  901. break;
  902. case STATE_RADIO_OFF:
  903. rt2500usb_disable_radio(rt2x00dev);
  904. break;
  905. case STATE_RADIO_IRQ_ON:
  906. case STATE_RADIO_IRQ_OFF:
  907. /* No support, but no error either */
  908. break;
  909. case STATE_DEEP_SLEEP:
  910. case STATE_SLEEP:
  911. case STATE_STANDBY:
  912. case STATE_AWAKE:
  913. retval = rt2500usb_set_state(rt2x00dev, state);
  914. break;
  915. default:
  916. retval = -ENOTSUPP;
  917. break;
  918. }
  919. if (unlikely(retval))
  920. ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
  921. state, retval);
  922. return retval;
  923. }
  924. /*
  925. * TX descriptor initialization
  926. */
  927. static void rt2500usb_write_tx_desc(struct queue_entry *entry,
  928. struct txentry_desc *txdesc)
  929. {
  930. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  931. __le32 *txd = (__le32 *) entry->skb->data;
  932. u32 word;
  933. /*
  934. * Start writing the descriptor words.
  935. */
  936. rt2x00_desc_read(txd, 0, &word);
  937. rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
  938. rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
  939. test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
  940. rt2x00_set_field32(&word, TXD_W0_ACK,
  941. test_bit(ENTRY_TXD_ACK, &txdesc->flags));
  942. rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
  943. test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
  944. rt2x00_set_field32(&word, TXD_W0_OFDM,
  945. (txdesc->rate_mode == RATE_MODE_OFDM));
  946. rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
  947. test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
  948. rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->u.plcp.ifs);
  949. rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
  950. rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
  951. rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
  952. rt2x00_desc_write(txd, 0, word);
  953. rt2x00_desc_read(txd, 1, &word);
  954. rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
  955. rt2x00_set_field32(&word, TXD_W1_AIFS, entry->queue->aifs);
  956. rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min);
  957. rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max);
  958. rt2x00_desc_write(txd, 1, word);
  959. rt2x00_desc_read(txd, 2, &word);
  960. rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->u.plcp.signal);
  961. rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->u.plcp.service);
  962. rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW,
  963. txdesc->u.plcp.length_low);
  964. rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH,
  965. txdesc->u.plcp.length_high);
  966. rt2x00_desc_write(txd, 2, word);
  967. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
  968. _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
  969. _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
  970. }
  971. /*
  972. * Register descriptor details in skb frame descriptor.
  973. */
  974. skbdesc->flags |= SKBDESC_DESC_IN_SKB;
  975. skbdesc->desc = txd;
  976. skbdesc->desc_len = TXD_DESC_SIZE;
  977. }
  978. /*
  979. * TX data initialization
  980. */
  981. static void rt2500usb_beacondone(struct urb *urb);
  982. static void rt2500usb_write_beacon(struct queue_entry *entry,
  983. struct txentry_desc *txdesc)
  984. {
  985. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  986. struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
  987. struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
  988. int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
  989. int length;
  990. u16 reg, reg0;
  991. /*
  992. * Disable beaconing while we are reloading the beacon data,
  993. * otherwise we might be sending out invalid data.
  994. */
  995. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  996. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
  997. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  998. /*
  999. * Add space for the descriptor in front of the skb.
  1000. */
  1001. skb_push(entry->skb, TXD_DESC_SIZE);
  1002. memset(entry->skb->data, 0, TXD_DESC_SIZE);
  1003. /*
  1004. * Write the TX descriptor for the beacon.
  1005. */
  1006. rt2500usb_write_tx_desc(entry, txdesc);
  1007. /*
  1008. * Dump beacon to userspace through debugfs.
  1009. */
  1010. rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb);
  1011. /*
  1012. * USB devices cannot blindly pass the skb->len as the
  1013. * length of the data to usb_fill_bulk_urb. Pass the skb
  1014. * to the driver to determine what the length should be.
  1015. */
  1016. length = rt2x00dev->ops->lib->get_tx_data_len(entry);
  1017. usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
  1018. entry->skb->data, length, rt2500usb_beacondone,
  1019. entry);
  1020. /*
  1021. * Second we need to create the guardian byte.
  1022. * We only need a single byte, so lets recycle
  1023. * the 'flags' field we are not using for beacons.
  1024. */
  1025. bcn_priv->guardian_data = 0;
  1026. usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
  1027. &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
  1028. entry);
  1029. /*
  1030. * Send out the guardian byte.
  1031. */
  1032. usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
  1033. /*
  1034. * Enable beaconing again.
  1035. */
  1036. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
  1037. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
  1038. reg0 = reg;
  1039. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
  1040. /*
  1041. * Beacon generation will fail initially.
  1042. * To prevent this we need to change the TXRX_CSR19
  1043. * register several times (reg0 is the same as reg
  1044. * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0
  1045. * and 1 in reg).
  1046. */
  1047. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1048. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
  1049. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1050. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
  1051. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1052. }
  1053. static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
  1054. {
  1055. int length;
  1056. /*
  1057. * The length _must_ be a multiple of 2,
  1058. * but it must _not_ be a multiple of the USB packet size.
  1059. */
  1060. length = roundup(entry->skb->len, 2);
  1061. length += (2 * !(length % entry->queue->usb_maxpacket));
  1062. return length;
  1063. }
  1064. /*
  1065. * RX control handlers
  1066. */
  1067. static void rt2500usb_fill_rxdone(struct queue_entry *entry,
  1068. struct rxdone_entry_desc *rxdesc)
  1069. {
  1070. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  1071. struct queue_entry_priv_usb *entry_priv = entry->priv_data;
  1072. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  1073. __le32 *rxd =
  1074. (__le32 *)(entry->skb->data +
  1075. (entry_priv->urb->actual_length -
  1076. entry->queue->desc_size));
  1077. u32 word0;
  1078. u32 word1;
  1079. /*
  1080. * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
  1081. * frame data in rt2x00usb.
  1082. */
  1083. memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
  1084. rxd = (__le32 *)skbdesc->desc;
  1085. /*
  1086. * It is now safe to read the descriptor on all architectures.
  1087. */
  1088. rt2x00_desc_read(rxd, 0, &word0);
  1089. rt2x00_desc_read(rxd, 1, &word1);
  1090. if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
  1091. rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
  1092. if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
  1093. rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
  1094. rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
  1095. if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
  1096. rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
  1097. if (rxdesc->cipher != CIPHER_NONE) {
  1098. _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
  1099. _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
  1100. rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
  1101. /* ICV is located at the end of frame */
  1102. rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
  1103. if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
  1104. rxdesc->flags |= RX_FLAG_DECRYPTED;
  1105. else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
  1106. rxdesc->flags |= RX_FLAG_MMIC_ERROR;
  1107. }
  1108. /*
  1109. * Obtain the status about this packet.
  1110. * When frame was received with an OFDM bitrate,
  1111. * the signal is the PLCP value. If it was received with
  1112. * a CCK bitrate the signal is the rate in 100kbit/s.
  1113. */
  1114. rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
  1115. rxdesc->rssi =
  1116. rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
  1117. rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
  1118. if (rt2x00_get_field32(word0, RXD_W0_OFDM))
  1119. rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
  1120. else
  1121. rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
  1122. if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
  1123. rxdesc->dev_flags |= RXDONE_MY_BSS;
  1124. /*
  1125. * Adjust the skb memory window to the frame boundaries.
  1126. */
  1127. skb_trim(entry->skb, rxdesc->size);
  1128. }
  1129. /*
  1130. * Interrupt functions.
  1131. */
  1132. static void rt2500usb_beacondone(struct urb *urb)
  1133. {
  1134. struct queue_entry *entry = (struct queue_entry *)urb->context;
  1135. struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
  1136. if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
  1137. return;
  1138. /*
  1139. * Check if this was the guardian beacon,
  1140. * if that was the case we need to send the real beacon now.
  1141. * Otherwise we should free the sk_buffer, the device
  1142. * should be doing the rest of the work now.
  1143. */
  1144. if (bcn_priv->guardian_urb == urb) {
  1145. usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
  1146. } else if (bcn_priv->urb == urb) {
  1147. dev_kfree_skb(entry->skb);
  1148. entry->skb = NULL;
  1149. }
  1150. }
  1151. /*
  1152. * Device probe functions.
  1153. */
  1154. static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
  1155. {
  1156. u16 word;
  1157. u8 *mac;
  1158. u8 bbp;
  1159. rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
  1160. /*
  1161. * Start validation of the data that has been read.
  1162. */
  1163. mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
  1164. if (!is_valid_ether_addr(mac)) {
  1165. random_ether_addr(mac);
  1166. EEPROM(rt2x00dev, "MAC: %pM\n", mac);
  1167. }
  1168. rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
  1169. if (word == 0xffff) {
  1170. rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
  1171. rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
  1172. ANTENNA_SW_DIVERSITY);
  1173. rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
  1174. ANTENNA_SW_DIVERSITY);
  1175. rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
  1176. LED_MODE_DEFAULT);
  1177. rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
  1178. rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
  1179. rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
  1180. rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
  1181. EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
  1182. }
  1183. rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
  1184. if (word == 0xffff) {
  1185. rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
  1186. rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
  1187. rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
  1188. rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
  1189. EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
  1190. }
  1191. rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
  1192. if (word == 0xffff) {
  1193. rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
  1194. DEFAULT_RSSI_OFFSET);
  1195. rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
  1196. EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
  1197. }
  1198. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
  1199. if (word == 0xffff) {
  1200. rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
  1201. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
  1202. EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
  1203. }
  1204. /*
  1205. * Switch lower vgc bound to current BBP R17 value,
  1206. * lower the value a bit for better quality.
  1207. */
  1208. rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
  1209. bbp -= 6;
  1210. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
  1211. if (word == 0xffff) {
  1212. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
  1213. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
  1214. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
  1215. EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
  1216. } else {
  1217. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
  1218. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
  1219. }
  1220. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
  1221. if (word == 0xffff) {
  1222. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
  1223. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
  1224. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
  1225. EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
  1226. }
  1227. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
  1228. if (word == 0xffff) {
  1229. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
  1230. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
  1231. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
  1232. EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
  1233. }
  1234. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
  1235. if (word == 0xffff) {
  1236. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
  1237. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
  1238. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
  1239. EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
  1240. }
  1241. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
  1242. if (word == 0xffff) {
  1243. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
  1244. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
  1245. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
  1246. EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
  1247. }
  1248. return 0;
  1249. }
  1250. static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
  1251. {
  1252. u16 reg;
  1253. u16 value;
  1254. u16 eeprom;
  1255. /*
  1256. * Read EEPROM word for configuration.
  1257. */
  1258. rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
  1259. /*
  1260. * Identify RF chipset.
  1261. */
  1262. value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
  1263. rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
  1264. rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
  1265. if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
  1266. ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
  1267. return -ENODEV;
  1268. }
  1269. if (!rt2x00_rf(rt2x00dev, RF2522) &&
  1270. !rt2x00_rf(rt2x00dev, RF2523) &&
  1271. !rt2x00_rf(rt2x00dev, RF2524) &&
  1272. !rt2x00_rf(rt2x00dev, RF2525) &&
  1273. !rt2x00_rf(rt2x00dev, RF2525E) &&
  1274. !rt2x00_rf(rt2x00dev, RF5222)) {
  1275. ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
  1276. return -ENODEV;
  1277. }
  1278. /*
  1279. * Identify default antenna configuration.
  1280. */
  1281. rt2x00dev->default_ant.tx =
  1282. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
  1283. rt2x00dev->default_ant.rx =
  1284. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
  1285. /*
  1286. * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
  1287. * I am not 100% sure about this, but the legacy drivers do not
  1288. * indicate antenna swapping in software is required when
  1289. * diversity is enabled.
  1290. */
  1291. if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
  1292. rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
  1293. if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
  1294. rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
  1295. /*
  1296. * Store led mode, for correct led behaviour.
  1297. */
  1298. #ifdef CONFIG_RT2X00_LIB_LEDS
  1299. value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
  1300. rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
  1301. if (value == LED_MODE_TXRX_ACTIVITY ||
  1302. value == LED_MODE_DEFAULT ||
  1303. value == LED_MODE_ASUS)
  1304. rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
  1305. LED_TYPE_ACTIVITY);
  1306. #endif /* CONFIG_RT2X00_LIB_LEDS */
  1307. /*
  1308. * Detect if this device has an hardware controlled radio.
  1309. */
  1310. if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
  1311. __set_bit(CAPABILITY_HW_BUTTON, &rt2x00dev->cap_flags);
  1312. /*
  1313. * Read the RSSI <-> dBm offset information.
  1314. */
  1315. rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
  1316. rt2x00dev->rssi_offset =
  1317. rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
  1318. return 0;
  1319. }
  1320. /*
  1321. * RF value list for RF2522
  1322. * Supports: 2.4 GHz
  1323. */
  1324. static const struct rf_channel rf_vals_bg_2522[] = {
  1325. { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
  1326. { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
  1327. { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
  1328. { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
  1329. { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
  1330. { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
  1331. { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
  1332. { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
  1333. { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
  1334. { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
  1335. { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
  1336. { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
  1337. { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
  1338. { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
  1339. };
  1340. /*
  1341. * RF value list for RF2523
  1342. * Supports: 2.4 GHz
  1343. */
  1344. static const struct rf_channel rf_vals_bg_2523[] = {
  1345. { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
  1346. { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
  1347. { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
  1348. { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
  1349. { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
  1350. { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
  1351. { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
  1352. { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
  1353. { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
  1354. { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
  1355. { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
  1356. { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
  1357. { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
  1358. { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
  1359. };
  1360. /*
  1361. * RF value list for RF2524
  1362. * Supports: 2.4 GHz
  1363. */
  1364. static const struct rf_channel rf_vals_bg_2524[] = {
  1365. { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
  1366. { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
  1367. { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
  1368. { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
  1369. { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
  1370. { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
  1371. { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
  1372. { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
  1373. { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
  1374. { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
  1375. { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
  1376. { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
  1377. { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
  1378. { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
  1379. };
  1380. /*
  1381. * RF value list for RF2525
  1382. * Supports: 2.4 GHz
  1383. */
  1384. static const struct rf_channel rf_vals_bg_2525[] = {
  1385. { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
  1386. { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
  1387. { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
  1388. { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
  1389. { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
  1390. { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
  1391. { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
  1392. { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
  1393. { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
  1394. { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
  1395. { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
  1396. { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
  1397. { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
  1398. { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
  1399. };
  1400. /*
  1401. * RF value list for RF2525e
  1402. * Supports: 2.4 GHz
  1403. */
  1404. static const struct rf_channel rf_vals_bg_2525e[] = {
  1405. { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
  1406. { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
  1407. { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
  1408. { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
  1409. { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
  1410. { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
  1411. { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
  1412. { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
  1413. { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
  1414. { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
  1415. { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
  1416. { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
  1417. { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
  1418. { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
  1419. };
  1420. /*
  1421. * RF value list for RF5222
  1422. * Supports: 2.4 GHz & 5.2 GHz
  1423. */
  1424. static const struct rf_channel rf_vals_5222[] = {
  1425. { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
  1426. { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
  1427. { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
  1428. { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
  1429. { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
  1430. { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
  1431. { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
  1432. { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
  1433. { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
  1434. { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
  1435. { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
  1436. { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
  1437. { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
  1438. { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
  1439. /* 802.11 UNI / HyperLan 2 */
  1440. { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
  1441. { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
  1442. { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
  1443. { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
  1444. { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
  1445. { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
  1446. { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
  1447. { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
  1448. /* 802.11 HyperLan 2 */
  1449. { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
  1450. { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
  1451. { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
  1452. { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
  1453. { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
  1454. { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
  1455. { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
  1456. { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
  1457. { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
  1458. { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
  1459. /* 802.11 UNII */
  1460. { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
  1461. { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
  1462. { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
  1463. { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
  1464. { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
  1465. };
  1466. static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
  1467. {
  1468. struct hw_mode_spec *spec = &rt2x00dev->spec;
  1469. struct channel_info *info;
  1470. char *tx_power;
  1471. unsigned int i;
  1472. /*
  1473. * Initialize all hw fields.
  1474. *
  1475. * Don't set IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING unless we are
  1476. * capable of sending the buffered frames out after the DTIM
  1477. * transmission using rt2x00lib_beacondone. This will send out
  1478. * multicast and broadcast traffic immediately instead of buffering it
  1479. * infinitly and thus dropping it after some time.
  1480. */
  1481. rt2x00dev->hw->flags =
  1482. IEEE80211_HW_RX_INCLUDES_FCS |
  1483. IEEE80211_HW_SIGNAL_DBM |
  1484. IEEE80211_HW_SUPPORTS_PS |
  1485. IEEE80211_HW_PS_NULLFUNC_STACK;
  1486. SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
  1487. SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
  1488. rt2x00_eeprom_addr(rt2x00dev,
  1489. EEPROM_MAC_ADDR_0));
  1490. /*
  1491. * Initialize hw_mode information.
  1492. */
  1493. spec->supported_bands = SUPPORT_BAND_2GHZ;
  1494. spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
  1495. if (rt2x00_rf(rt2x00dev, RF2522)) {
  1496. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
  1497. spec->channels = rf_vals_bg_2522;
  1498. } else if (rt2x00_rf(rt2x00dev, RF2523)) {
  1499. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
  1500. spec->channels = rf_vals_bg_2523;
  1501. } else if (rt2x00_rf(rt2x00dev, RF2524)) {
  1502. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
  1503. spec->channels = rf_vals_bg_2524;
  1504. } else if (rt2x00_rf(rt2x00dev, RF2525)) {
  1505. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
  1506. spec->channels = rf_vals_bg_2525;
  1507. } else if (rt2x00_rf(rt2x00dev, RF2525E)) {
  1508. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
  1509. spec->channels = rf_vals_bg_2525e;
  1510. } else if (rt2x00_rf(rt2x00dev, RF5222)) {
  1511. spec->supported_bands |= SUPPORT_BAND_5GHZ;
  1512. spec->num_channels = ARRAY_SIZE(rf_vals_5222);
  1513. spec->channels = rf_vals_5222;
  1514. }
  1515. /*
  1516. * Create channel information array
  1517. */
  1518. info = kcalloc(spec->num_channels, sizeof(*info), GFP_KERNEL);
  1519. if (!info)
  1520. return -ENOMEM;
  1521. spec->channels_info = info;
  1522. tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
  1523. for (i = 0; i < 14; i++) {
  1524. info[i].max_power = MAX_TXPOWER;
  1525. info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]);
  1526. }
  1527. if (spec->num_channels > 14) {
  1528. for (i = 14; i < spec->num_channels; i++) {
  1529. info[i].max_power = MAX_TXPOWER;
  1530. info[i].default_power1 = DEFAULT_TXPOWER;
  1531. }
  1532. }
  1533. return 0;
  1534. }
  1535. static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
  1536. {
  1537. int retval;
  1538. u16 reg;
  1539. /*
  1540. * Allocate eeprom data.
  1541. */
  1542. retval = rt2500usb_validate_eeprom(rt2x00dev);
  1543. if (retval)
  1544. return retval;
  1545. retval = rt2500usb_init_eeprom(rt2x00dev);
  1546. if (retval)
  1547. return retval;
  1548. /*
  1549. * Enable rfkill polling by setting GPIO direction of the
  1550. * rfkill switch GPIO pin correctly.
  1551. */
  1552. rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
  1553. rt2x00_set_field16(&reg, MAC_CSR19_BIT8, 0);
  1554. rt2500usb_register_write(rt2x00dev, MAC_CSR19, reg);
  1555. /*
  1556. * Initialize hw specifications.
  1557. */
  1558. retval = rt2500usb_probe_hw_mode(rt2x00dev);
  1559. if (retval)
  1560. return retval;
  1561. /*
  1562. * This device requires the atim queue
  1563. */
  1564. __set_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags);
  1565. __set_bit(REQUIRE_BEACON_GUARD, &rt2x00dev->cap_flags);
  1566. if (!modparam_nohwcrypt) {
  1567. __set_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags);
  1568. __set_bit(REQUIRE_COPY_IV, &rt2x00dev->cap_flags);
  1569. }
  1570. __set_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags);
  1571. __set_bit(REQUIRE_PS_AUTOWAKE, &rt2x00dev->cap_flags);
  1572. /*
  1573. * Set the rssi offset.
  1574. */
  1575. rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
  1576. return 0;
  1577. }
  1578. static const struct ieee80211_ops rt2500usb_mac80211_ops = {
  1579. .tx = rt2x00mac_tx,
  1580. .start = rt2x00mac_start,
  1581. .stop = rt2x00mac_stop,
  1582. .add_interface = rt2x00mac_add_interface,
  1583. .remove_interface = rt2x00mac_remove_interface,
  1584. .config = rt2x00mac_config,
  1585. .configure_filter = rt2x00mac_configure_filter,
  1586. .set_tim = rt2x00mac_set_tim,
  1587. .set_key = rt2x00mac_set_key,
  1588. .sw_scan_start = rt2x00mac_sw_scan_start,
  1589. .sw_scan_complete = rt2x00mac_sw_scan_complete,
  1590. .get_stats = rt2x00mac_get_stats,
  1591. .bss_info_changed = rt2x00mac_bss_info_changed,
  1592. .conf_tx = rt2x00mac_conf_tx,
  1593. .rfkill_poll = rt2x00mac_rfkill_poll,
  1594. .flush = rt2x00mac_flush,
  1595. .set_antenna = rt2x00mac_set_antenna,
  1596. .get_antenna = rt2x00mac_get_antenna,
  1597. .get_ringparam = rt2x00mac_get_ringparam,
  1598. .tx_frames_pending = rt2x00mac_tx_frames_pending,
  1599. };
  1600. static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
  1601. .probe_hw = rt2500usb_probe_hw,
  1602. .initialize = rt2x00usb_initialize,
  1603. .uninitialize = rt2x00usb_uninitialize,
  1604. .clear_entry = rt2x00usb_clear_entry,
  1605. .set_device_state = rt2500usb_set_device_state,
  1606. .rfkill_poll = rt2500usb_rfkill_poll,
  1607. .link_stats = rt2500usb_link_stats,
  1608. .reset_tuner = rt2500usb_reset_tuner,
  1609. .watchdog = rt2x00usb_watchdog,
  1610. .start_queue = rt2500usb_start_queue,
  1611. .kick_queue = rt2x00usb_kick_queue,
  1612. .stop_queue = rt2500usb_stop_queue,
  1613. .flush_queue = rt2x00usb_flush_queue,
  1614. .write_tx_desc = rt2500usb_write_tx_desc,
  1615. .write_beacon = rt2500usb_write_beacon,
  1616. .get_tx_data_len = rt2500usb_get_tx_data_len,
  1617. .fill_rxdone = rt2500usb_fill_rxdone,
  1618. .config_shared_key = rt2500usb_config_key,
  1619. .config_pairwise_key = rt2500usb_config_key,
  1620. .config_filter = rt2500usb_config_filter,
  1621. .config_intf = rt2500usb_config_intf,
  1622. .config_erp = rt2500usb_config_erp,
  1623. .config_ant = rt2500usb_config_ant,
  1624. .config = rt2500usb_config,
  1625. };
  1626. static const struct data_queue_desc rt2500usb_queue_rx = {
  1627. .entry_num = 32,
  1628. .data_size = DATA_FRAME_SIZE,
  1629. .desc_size = RXD_DESC_SIZE,
  1630. .priv_size = sizeof(struct queue_entry_priv_usb),
  1631. };
  1632. static const struct data_queue_desc rt2500usb_queue_tx = {
  1633. .entry_num = 32,
  1634. .data_size = DATA_FRAME_SIZE,
  1635. .desc_size = TXD_DESC_SIZE,
  1636. .priv_size = sizeof(struct queue_entry_priv_usb),
  1637. };
  1638. static const struct data_queue_desc rt2500usb_queue_bcn = {
  1639. .entry_num = 1,
  1640. .data_size = MGMT_FRAME_SIZE,
  1641. .desc_size = TXD_DESC_SIZE,
  1642. .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
  1643. };
  1644. static const struct data_queue_desc rt2500usb_queue_atim = {
  1645. .entry_num = 8,
  1646. .data_size = DATA_FRAME_SIZE,
  1647. .desc_size = TXD_DESC_SIZE,
  1648. .priv_size = sizeof(struct queue_entry_priv_usb),
  1649. };
  1650. static const struct rt2x00_ops rt2500usb_ops = {
  1651. .name = KBUILD_MODNAME,
  1652. .max_sta_intf = 1,
  1653. .max_ap_intf = 1,
  1654. .eeprom_size = EEPROM_SIZE,
  1655. .rf_size = RF_SIZE,
  1656. .tx_queues = NUM_TX_QUEUES,
  1657. .extra_tx_headroom = TXD_DESC_SIZE,
  1658. .rx = &rt2500usb_queue_rx,
  1659. .tx = &rt2500usb_queue_tx,
  1660. .bcn = &rt2500usb_queue_bcn,
  1661. .atim = &rt2500usb_queue_atim,
  1662. .lib = &rt2500usb_rt2x00_ops,
  1663. .hw = &rt2500usb_mac80211_ops,
  1664. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  1665. .debugfs = &rt2500usb_rt2x00debug,
  1666. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  1667. };
  1668. /*
  1669. * rt2500usb module information.
  1670. */
  1671. static struct usb_device_id rt2500usb_device_table[] = {
  1672. /* ASUS */
  1673. { USB_DEVICE(0x0b05, 0x1706) },
  1674. { USB_DEVICE(0x0b05, 0x1707) },
  1675. /* Belkin */
  1676. { USB_DEVICE(0x050d, 0x7050) }, /* FCC ID: K7SF5D7050A ver. 2.x */
  1677. { USB_DEVICE(0x050d, 0x7051) },
  1678. /* Cisco Systems */
  1679. { USB_DEVICE(0x13b1, 0x000d) },
  1680. { USB_DEVICE(0x13b1, 0x0011) },
  1681. { USB_DEVICE(0x13b1, 0x001a) },
  1682. /* Conceptronic */
  1683. { USB_DEVICE(0x14b2, 0x3c02) },
  1684. /* D-LINK */
  1685. { USB_DEVICE(0x2001, 0x3c00) },
  1686. /* Gigabyte */
  1687. { USB_DEVICE(0x1044, 0x8001) },
  1688. { USB_DEVICE(0x1044, 0x8007) },
  1689. /* Hercules */
  1690. { USB_DEVICE(0x06f8, 0xe000) },
  1691. /* Melco */
  1692. { USB_DEVICE(0x0411, 0x005e) },
  1693. { USB_DEVICE(0x0411, 0x0066) },
  1694. { USB_DEVICE(0x0411, 0x0067) },
  1695. { USB_DEVICE(0x0411, 0x008b) },
  1696. { USB_DEVICE(0x0411, 0x0097) },
  1697. /* MSI */
  1698. { USB_DEVICE(0x0db0, 0x6861) },
  1699. { USB_DEVICE(0x0db0, 0x6865) },
  1700. { USB_DEVICE(0x0db0, 0x6869) },
  1701. /* Ralink */
  1702. { USB_DEVICE(0x148f, 0x1706) },
  1703. { USB_DEVICE(0x148f, 0x2570) },
  1704. { USB_DEVICE(0x148f, 0x9020) },
  1705. /* Sagem */
  1706. { USB_DEVICE(0x079b, 0x004b) },
  1707. /* Siemens */
  1708. { USB_DEVICE(0x0681, 0x3c06) },
  1709. /* SMC */
  1710. { USB_DEVICE(0x0707, 0xee13) },
  1711. /* Spairon */
  1712. { USB_DEVICE(0x114b, 0x0110) },
  1713. /* SURECOM */
  1714. { USB_DEVICE(0x0769, 0x11f3) },
  1715. /* Trust */
  1716. { USB_DEVICE(0x0eb0, 0x9020) },
  1717. /* VTech */
  1718. { USB_DEVICE(0x0f88, 0x3012) },
  1719. /* Zinwell */
  1720. { USB_DEVICE(0x5a57, 0x0260) },
  1721. { 0, }
  1722. };
  1723. MODULE_AUTHOR(DRV_PROJECT);
  1724. MODULE_VERSION(DRV_VERSION);
  1725. MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
  1726. MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
  1727. MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
  1728. MODULE_LICENSE("GPL");
  1729. static int rt2500usb_probe(struct usb_interface *usb_intf,
  1730. const struct usb_device_id *id)
  1731. {
  1732. return rt2x00usb_probe(usb_intf, &rt2500usb_ops);
  1733. }
  1734. static struct usb_driver rt2500usb_driver = {
  1735. .name = KBUILD_MODNAME,
  1736. .id_table = rt2500usb_device_table,
  1737. .probe = rt2500usb_probe,
  1738. .disconnect = rt2x00usb_disconnect,
  1739. .suspend = rt2x00usb_suspend,
  1740. .resume = rt2x00usb_resume,
  1741. };
  1742. module_usb_driver(rt2500usb_driver);