11n.c 22 KB

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  1. /*
  2. * Marvell Wireless LAN device driver: 802.11n
  3. *
  4. * Copyright (C) 2011, Marvell International Ltd.
  5. *
  6. * This software file (the "File") is distributed by Marvell International
  7. * Ltd. under the terms of the GNU General Public License Version 2, June 1991
  8. * (the "License"). You may use, redistribute and/or modify this File in
  9. * accordance with the terms and conditions of the License, a copy of which
  10. * is available by writing to the Free Software Foundation, Inc.,
  11. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
  12. * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
  13. *
  14. * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
  15. * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
  16. * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
  17. * this warranty disclaimer.
  18. */
  19. #include "decl.h"
  20. #include "ioctl.h"
  21. #include "util.h"
  22. #include "fw.h"
  23. #include "main.h"
  24. #include "wmm.h"
  25. #include "11n.h"
  26. /*
  27. * Fills HT capability information field, AMPDU Parameters field, HT extended
  28. * capability field, and supported MCS set fields.
  29. *
  30. * HT capability information field, AMPDU Parameters field, supported MCS set
  31. * fields are retrieved from cfg80211 stack
  32. *
  33. * RD responder bit to set to clear in the extended capability header.
  34. */
  35. void
  36. mwifiex_fill_cap_info(struct mwifiex_private *priv, u8 radio_type,
  37. struct mwifiex_ie_types_htcap *ht_cap)
  38. {
  39. uint16_t ht_ext_cap = le16_to_cpu(ht_cap->ht_cap.extended_ht_cap_info);
  40. struct ieee80211_supported_band *sband =
  41. priv->wdev->wiphy->bands[radio_type];
  42. ht_cap->ht_cap.ampdu_params_info =
  43. (sband->ht_cap.ampdu_factor &
  44. IEEE80211_HT_AMPDU_PARM_FACTOR) |
  45. ((sband->ht_cap.ampdu_density <<
  46. IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT) &
  47. IEEE80211_HT_AMPDU_PARM_DENSITY);
  48. memcpy((u8 *) &ht_cap->ht_cap.mcs, &sband->ht_cap.mcs,
  49. sizeof(sband->ht_cap.mcs));
  50. if (priv->bss_mode == NL80211_IFTYPE_STATION ||
  51. sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40)
  52. /* Set MCS32 for infra mode or ad-hoc mode with 40MHz support */
  53. SETHT_MCS32(ht_cap->ht_cap.mcs.rx_mask);
  54. /* Clear RD responder bit */
  55. ht_ext_cap &= ~IEEE80211_HT_EXT_CAP_RD_RESPONDER;
  56. ht_cap->ht_cap.cap_info = cpu_to_le16(sband->ht_cap.cap);
  57. ht_cap->ht_cap.extended_ht_cap_info = cpu_to_le16(ht_ext_cap);
  58. }
  59. /*
  60. * This function returns the pointer to an entry in BA Stream
  61. * table which matches the requested BA status.
  62. */
  63. static struct mwifiex_tx_ba_stream_tbl *
  64. mwifiex_get_ba_status(struct mwifiex_private *priv,
  65. enum mwifiex_ba_status ba_status)
  66. {
  67. struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
  68. unsigned long flags;
  69. spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
  70. list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
  71. if (tx_ba_tsr_tbl->ba_status == ba_status) {
  72. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
  73. flags);
  74. return tx_ba_tsr_tbl;
  75. }
  76. }
  77. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
  78. return NULL;
  79. }
  80. /*
  81. * This function handles the command response of delete a block
  82. * ack request.
  83. *
  84. * The function checks the response success status and takes action
  85. * accordingly (send an add BA request in case of success, or recreate
  86. * the deleted stream in case of failure, if the add BA was also
  87. * initiated by us).
  88. */
  89. int mwifiex_ret_11n_delba(struct mwifiex_private *priv,
  90. struct host_cmd_ds_command *resp)
  91. {
  92. int tid;
  93. struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl;
  94. struct host_cmd_ds_11n_delba *del_ba = &resp->params.del_ba;
  95. uint16_t del_ba_param_set = le16_to_cpu(del_ba->del_ba_param_set);
  96. tid = del_ba_param_set >> DELBA_TID_POS;
  97. if (del_ba->del_result == BA_RESULT_SUCCESS) {
  98. mwifiex_del_ba_tbl(priv, tid, del_ba->peer_mac_addr,
  99. TYPE_DELBA_SENT,
  100. INITIATOR_BIT(del_ba_param_set));
  101. tx_ba_tbl = mwifiex_get_ba_status(priv, BA_SETUP_INPROGRESS);
  102. if (tx_ba_tbl)
  103. mwifiex_send_addba(priv, tx_ba_tbl->tid,
  104. tx_ba_tbl->ra);
  105. } else { /*
  106. * In case of failure, recreate the deleted stream in case
  107. * we initiated the ADDBA
  108. */
  109. if (!INITIATOR_BIT(del_ba_param_set))
  110. return 0;
  111. mwifiex_create_ba_tbl(priv, del_ba->peer_mac_addr, tid,
  112. BA_SETUP_INPROGRESS);
  113. tx_ba_tbl = mwifiex_get_ba_status(priv, BA_SETUP_INPROGRESS);
  114. if (tx_ba_tbl)
  115. mwifiex_del_ba_tbl(priv, tx_ba_tbl->tid, tx_ba_tbl->ra,
  116. TYPE_DELBA_SENT, true);
  117. }
  118. return 0;
  119. }
  120. /*
  121. * This function handles the command response of add a block
  122. * ack request.
  123. *
  124. * Handling includes changing the header fields to CPU formats, checking
  125. * the response success status and taking actions accordingly (delete the
  126. * BA stream table in case of failure).
  127. */
  128. int mwifiex_ret_11n_addba_req(struct mwifiex_private *priv,
  129. struct host_cmd_ds_command *resp)
  130. {
  131. int tid;
  132. struct host_cmd_ds_11n_addba_rsp *add_ba_rsp = &resp->params.add_ba_rsp;
  133. struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl;
  134. add_ba_rsp->ssn = cpu_to_le16((le16_to_cpu(add_ba_rsp->ssn))
  135. & SSN_MASK);
  136. tid = (le16_to_cpu(add_ba_rsp->block_ack_param_set)
  137. & IEEE80211_ADDBA_PARAM_TID_MASK)
  138. >> BLOCKACKPARAM_TID_POS;
  139. if (le16_to_cpu(add_ba_rsp->status_code) == BA_RESULT_SUCCESS) {
  140. tx_ba_tbl = mwifiex_get_ba_tbl(priv, tid,
  141. add_ba_rsp->peer_mac_addr);
  142. if (tx_ba_tbl) {
  143. dev_dbg(priv->adapter->dev, "info: BA stream complete\n");
  144. tx_ba_tbl->ba_status = BA_SETUP_COMPLETE;
  145. } else {
  146. dev_err(priv->adapter->dev, "BA stream not created\n");
  147. }
  148. } else {
  149. mwifiex_del_ba_tbl(priv, tid, add_ba_rsp->peer_mac_addr,
  150. TYPE_DELBA_SENT, true);
  151. if (add_ba_rsp->add_rsp_result != BA_RESULT_TIMEOUT)
  152. priv->aggr_prio_tbl[tid].ampdu_ap =
  153. BA_STREAM_NOT_ALLOWED;
  154. }
  155. return 0;
  156. }
  157. /*
  158. * This function handles the command response of 11n configuration request.
  159. *
  160. * Handling includes changing the header fields into CPU format.
  161. */
  162. int mwifiex_ret_11n_cfg(struct host_cmd_ds_command *resp,
  163. struct mwifiex_ds_11n_tx_cfg *tx_cfg)
  164. {
  165. struct host_cmd_ds_11n_cfg *htcfg = &resp->params.htcfg;
  166. if (tx_cfg) {
  167. tx_cfg->tx_htcap = le16_to_cpu(htcfg->ht_tx_cap);
  168. tx_cfg->tx_htinfo = le16_to_cpu(htcfg->ht_tx_info);
  169. }
  170. return 0;
  171. }
  172. /*
  173. * This function prepares command of reconfigure Tx buffer.
  174. *
  175. * Preparation includes -
  176. * - Setting command ID, action and proper size
  177. * - Setting Tx buffer size (for SET only)
  178. * - Ensuring correct endian-ness
  179. */
  180. int mwifiex_cmd_recfg_tx_buf(struct mwifiex_private *priv,
  181. struct host_cmd_ds_command *cmd, int cmd_action,
  182. u16 *buf_size)
  183. {
  184. struct host_cmd_ds_txbuf_cfg *tx_buf = &cmd->params.tx_buf;
  185. u16 action = (u16) cmd_action;
  186. cmd->command = cpu_to_le16(HostCmd_CMD_RECONFIGURE_TX_BUFF);
  187. cmd->size =
  188. cpu_to_le16(sizeof(struct host_cmd_ds_txbuf_cfg) + S_DS_GEN);
  189. tx_buf->action = cpu_to_le16(action);
  190. switch (action) {
  191. case HostCmd_ACT_GEN_SET:
  192. dev_dbg(priv->adapter->dev, "cmd: set tx_buf=%d\n", *buf_size);
  193. tx_buf->buff_size = cpu_to_le16(*buf_size);
  194. break;
  195. case HostCmd_ACT_GEN_GET:
  196. default:
  197. tx_buf->buff_size = 0;
  198. break;
  199. }
  200. return 0;
  201. }
  202. /*
  203. * This function prepares command of AMSDU aggregation control.
  204. *
  205. * Preparation includes -
  206. * - Setting command ID, action and proper size
  207. * - Setting AMSDU control parameters (for SET only)
  208. * - Ensuring correct endian-ness
  209. */
  210. int mwifiex_cmd_amsdu_aggr_ctrl(struct host_cmd_ds_command *cmd,
  211. int cmd_action,
  212. struct mwifiex_ds_11n_amsdu_aggr_ctrl *aa_ctrl)
  213. {
  214. struct host_cmd_ds_amsdu_aggr_ctrl *amsdu_ctrl =
  215. &cmd->params.amsdu_aggr_ctrl;
  216. u16 action = (u16) cmd_action;
  217. cmd->command = cpu_to_le16(HostCmd_CMD_AMSDU_AGGR_CTRL);
  218. cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_amsdu_aggr_ctrl)
  219. + S_DS_GEN);
  220. amsdu_ctrl->action = cpu_to_le16(action);
  221. switch (action) {
  222. case HostCmd_ACT_GEN_SET:
  223. amsdu_ctrl->enable = cpu_to_le16(aa_ctrl->enable);
  224. amsdu_ctrl->curr_buf_size = 0;
  225. break;
  226. case HostCmd_ACT_GEN_GET:
  227. default:
  228. amsdu_ctrl->curr_buf_size = 0;
  229. break;
  230. }
  231. return 0;
  232. }
  233. /*
  234. * This function handles the command response of AMSDU aggregation
  235. * control request.
  236. *
  237. * Handling includes changing the header fields into CPU format.
  238. */
  239. int mwifiex_ret_amsdu_aggr_ctrl(struct host_cmd_ds_command *resp,
  240. struct mwifiex_ds_11n_amsdu_aggr_ctrl
  241. *amsdu_aggr_ctrl)
  242. {
  243. struct host_cmd_ds_amsdu_aggr_ctrl *amsdu_ctrl =
  244. &resp->params.amsdu_aggr_ctrl;
  245. if (amsdu_aggr_ctrl) {
  246. amsdu_aggr_ctrl->enable = le16_to_cpu(amsdu_ctrl->enable);
  247. amsdu_aggr_ctrl->curr_buf_size =
  248. le16_to_cpu(amsdu_ctrl->curr_buf_size);
  249. }
  250. return 0;
  251. }
  252. /*
  253. * This function prepares 11n configuration command.
  254. *
  255. * Preparation includes -
  256. * - Setting command ID, action and proper size
  257. * - Setting HT Tx capability and HT Tx information fields
  258. * - Ensuring correct endian-ness
  259. */
  260. int mwifiex_cmd_11n_cfg(struct host_cmd_ds_command *cmd, u16 cmd_action,
  261. struct mwifiex_ds_11n_tx_cfg *txcfg)
  262. {
  263. struct host_cmd_ds_11n_cfg *htcfg = &cmd->params.htcfg;
  264. cmd->command = cpu_to_le16(HostCmd_CMD_11N_CFG);
  265. cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_11n_cfg) + S_DS_GEN);
  266. htcfg->action = cpu_to_le16(cmd_action);
  267. htcfg->ht_tx_cap = cpu_to_le16(txcfg->tx_htcap);
  268. htcfg->ht_tx_info = cpu_to_le16(txcfg->tx_htinfo);
  269. return 0;
  270. }
  271. /*
  272. * This function appends an 11n TLV to a buffer.
  273. *
  274. * Buffer allocation is responsibility of the calling
  275. * function. No size validation is made here.
  276. *
  277. * The function fills up the following sections, if applicable -
  278. * - HT capability IE
  279. * - HT information IE (with channel list)
  280. * - 20/40 BSS Coexistence IE
  281. * - HT Extended Capabilities IE
  282. */
  283. int
  284. mwifiex_cmd_append_11n_tlv(struct mwifiex_private *priv,
  285. struct mwifiex_bssdescriptor *bss_desc,
  286. u8 **buffer)
  287. {
  288. struct mwifiex_ie_types_htcap *ht_cap;
  289. struct mwifiex_ie_types_htinfo *ht_info;
  290. struct mwifiex_ie_types_chan_list_param_set *chan_list;
  291. struct mwifiex_ie_types_2040bssco *bss_co_2040;
  292. struct mwifiex_ie_types_extcap *ext_cap;
  293. int ret_len = 0;
  294. struct ieee80211_supported_band *sband;
  295. u8 radio_type;
  296. if (!buffer || !*buffer)
  297. return ret_len;
  298. radio_type = mwifiex_band_to_radio_type((u8) bss_desc->bss_band);
  299. sband = priv->wdev->wiphy->bands[radio_type];
  300. if (bss_desc->bcn_ht_cap) {
  301. ht_cap = (struct mwifiex_ie_types_htcap *) *buffer;
  302. memset(ht_cap, 0, sizeof(struct mwifiex_ie_types_htcap));
  303. ht_cap->header.type = cpu_to_le16(WLAN_EID_HT_CAPABILITY);
  304. ht_cap->header.len =
  305. cpu_to_le16(sizeof(struct ieee80211_ht_cap));
  306. memcpy((u8 *) ht_cap + sizeof(struct mwifiex_ie_types_header),
  307. (u8 *)bss_desc->bcn_ht_cap,
  308. le16_to_cpu(ht_cap->header.len));
  309. mwifiex_fill_cap_info(priv, radio_type, ht_cap);
  310. *buffer += sizeof(struct mwifiex_ie_types_htcap);
  311. ret_len += sizeof(struct mwifiex_ie_types_htcap);
  312. }
  313. if (bss_desc->bcn_ht_info) {
  314. if (priv->bss_mode == NL80211_IFTYPE_ADHOC) {
  315. ht_info = (struct mwifiex_ie_types_htinfo *) *buffer;
  316. memset(ht_info, 0,
  317. sizeof(struct mwifiex_ie_types_htinfo));
  318. ht_info->header.type =
  319. cpu_to_le16(WLAN_EID_HT_INFORMATION);
  320. ht_info->header.len =
  321. cpu_to_le16(sizeof(struct ieee80211_ht_info));
  322. memcpy((u8 *) ht_info +
  323. sizeof(struct mwifiex_ie_types_header),
  324. (u8 *) bss_desc->bcn_ht_info +
  325. sizeof(struct ieee_types_header),
  326. le16_to_cpu(ht_info->header.len));
  327. if (!(sband->ht_cap.cap &
  328. IEEE80211_HT_CAP_SUP_WIDTH_20_40))
  329. ht_info->ht_info.ht_param &=
  330. ~(IEEE80211_HT_PARAM_CHAN_WIDTH_ANY |
  331. IEEE80211_HT_PARAM_CHA_SEC_OFFSET);
  332. *buffer += sizeof(struct mwifiex_ie_types_htinfo);
  333. ret_len += sizeof(struct mwifiex_ie_types_htinfo);
  334. }
  335. chan_list =
  336. (struct mwifiex_ie_types_chan_list_param_set *) *buffer;
  337. memset(chan_list, 0,
  338. sizeof(struct mwifiex_ie_types_chan_list_param_set));
  339. chan_list->header.type = cpu_to_le16(TLV_TYPE_CHANLIST);
  340. chan_list->header.len = cpu_to_le16(
  341. sizeof(struct mwifiex_ie_types_chan_list_param_set) -
  342. sizeof(struct mwifiex_ie_types_header));
  343. chan_list->chan_scan_param[0].chan_number =
  344. bss_desc->bcn_ht_info->control_chan;
  345. chan_list->chan_scan_param[0].radio_type =
  346. mwifiex_band_to_radio_type((u8) bss_desc->bss_band);
  347. if (sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40 &&
  348. bss_desc->bcn_ht_info->ht_param &
  349. IEEE80211_HT_PARAM_CHAN_WIDTH_ANY)
  350. SET_SECONDARYCHAN(chan_list->chan_scan_param[0].
  351. radio_type,
  352. (bss_desc->bcn_ht_info->ht_param &
  353. IEEE80211_HT_PARAM_CHA_SEC_OFFSET));
  354. *buffer += sizeof(struct mwifiex_ie_types_chan_list_param_set);
  355. ret_len += sizeof(struct mwifiex_ie_types_chan_list_param_set);
  356. }
  357. if (bss_desc->bcn_bss_co_2040) {
  358. bss_co_2040 = (struct mwifiex_ie_types_2040bssco *) *buffer;
  359. memset(bss_co_2040, 0,
  360. sizeof(struct mwifiex_ie_types_2040bssco));
  361. bss_co_2040->header.type = cpu_to_le16(WLAN_EID_BSS_COEX_2040);
  362. bss_co_2040->header.len =
  363. cpu_to_le16(sizeof(bss_co_2040->bss_co_2040));
  364. memcpy((u8 *) bss_co_2040 +
  365. sizeof(struct mwifiex_ie_types_header),
  366. bss_desc->bcn_bss_co_2040 +
  367. sizeof(struct ieee_types_header),
  368. le16_to_cpu(bss_co_2040->header.len));
  369. *buffer += sizeof(struct mwifiex_ie_types_2040bssco);
  370. ret_len += sizeof(struct mwifiex_ie_types_2040bssco);
  371. }
  372. if (bss_desc->bcn_ext_cap) {
  373. ext_cap = (struct mwifiex_ie_types_extcap *) *buffer;
  374. memset(ext_cap, 0, sizeof(struct mwifiex_ie_types_extcap));
  375. ext_cap->header.type = cpu_to_le16(WLAN_EID_EXT_CAPABILITY);
  376. ext_cap->header.len = cpu_to_le16(sizeof(ext_cap->ext_cap));
  377. memcpy((u8 *)ext_cap + sizeof(struct mwifiex_ie_types_header),
  378. bss_desc->bcn_ext_cap + sizeof(struct ieee_types_header),
  379. le16_to_cpu(ext_cap->header.len));
  380. *buffer += sizeof(struct mwifiex_ie_types_extcap);
  381. ret_len += sizeof(struct mwifiex_ie_types_extcap);
  382. }
  383. return ret_len;
  384. }
  385. /*
  386. * This function reconfigures the Tx buffer size in firmware.
  387. *
  388. * This function prepares a firmware command and issues it, if
  389. * the current Tx buffer size is different from the one requested.
  390. * Maximum configurable Tx buffer size is limited by the HT capability
  391. * field value.
  392. */
  393. void
  394. mwifiex_cfg_tx_buf(struct mwifiex_private *priv,
  395. struct mwifiex_bssdescriptor *bss_desc)
  396. {
  397. u16 max_amsdu = MWIFIEX_TX_DATA_BUF_SIZE_2K;
  398. u16 tx_buf, curr_tx_buf_size = 0;
  399. if (bss_desc->bcn_ht_cap) {
  400. if (le16_to_cpu(bss_desc->bcn_ht_cap->cap_info) &
  401. IEEE80211_HT_CAP_MAX_AMSDU)
  402. max_amsdu = MWIFIEX_TX_DATA_BUF_SIZE_8K;
  403. else
  404. max_amsdu = MWIFIEX_TX_DATA_BUF_SIZE_4K;
  405. }
  406. tx_buf = min(priv->adapter->max_tx_buf_size, max_amsdu);
  407. dev_dbg(priv->adapter->dev, "info: max_amsdu=%d, max_tx_buf=%d\n",
  408. max_amsdu, priv->adapter->max_tx_buf_size);
  409. if (priv->adapter->curr_tx_buf_size <= MWIFIEX_TX_DATA_BUF_SIZE_2K)
  410. curr_tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K;
  411. else if (priv->adapter->curr_tx_buf_size <= MWIFIEX_TX_DATA_BUF_SIZE_4K)
  412. curr_tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K;
  413. else if (priv->adapter->curr_tx_buf_size <= MWIFIEX_TX_DATA_BUF_SIZE_8K)
  414. curr_tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_8K;
  415. if (curr_tx_buf_size != tx_buf)
  416. mwifiex_send_cmd_async(priv, HostCmd_CMD_RECONFIGURE_TX_BUFF,
  417. HostCmd_ACT_GEN_SET, 0, &tx_buf);
  418. }
  419. /*
  420. * This function checks if the given pointer is valid entry of
  421. * Tx BA Stream table.
  422. */
  423. static int mwifiex_is_tx_ba_stream_ptr_valid(struct mwifiex_private *priv,
  424. struct mwifiex_tx_ba_stream_tbl *tx_tbl_ptr)
  425. {
  426. struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
  427. list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
  428. if (tx_ba_tsr_tbl == tx_tbl_ptr)
  429. return true;
  430. }
  431. return false;
  432. }
  433. /*
  434. * This function deletes the given entry in Tx BA Stream table.
  435. *
  436. * The function also performs a validity check on the supplied
  437. * pointer before trying to delete.
  438. */
  439. void mwifiex_11n_delete_tx_ba_stream_tbl_entry(struct mwifiex_private *priv,
  440. struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl)
  441. {
  442. if (!tx_ba_tsr_tbl &&
  443. mwifiex_is_tx_ba_stream_ptr_valid(priv, tx_ba_tsr_tbl))
  444. return;
  445. dev_dbg(priv->adapter->dev, "info: tx_ba_tsr_tbl %p\n", tx_ba_tsr_tbl);
  446. list_del(&tx_ba_tsr_tbl->list);
  447. kfree(tx_ba_tsr_tbl);
  448. }
  449. /*
  450. * This function deletes all the entries in Tx BA Stream table.
  451. */
  452. void mwifiex_11n_delete_all_tx_ba_stream_tbl(struct mwifiex_private *priv)
  453. {
  454. int i;
  455. struct mwifiex_tx_ba_stream_tbl *del_tbl_ptr, *tmp_node;
  456. unsigned long flags;
  457. spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
  458. list_for_each_entry_safe(del_tbl_ptr, tmp_node,
  459. &priv->tx_ba_stream_tbl_ptr, list)
  460. mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, del_tbl_ptr);
  461. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
  462. INIT_LIST_HEAD(&priv->tx_ba_stream_tbl_ptr);
  463. for (i = 0; i < MAX_NUM_TID; ++i)
  464. priv->aggr_prio_tbl[i].ampdu_ap =
  465. priv->aggr_prio_tbl[i].ampdu_user;
  466. }
  467. /*
  468. * This function returns the pointer to an entry in BA Stream
  469. * table which matches the given RA/TID pair.
  470. */
  471. struct mwifiex_tx_ba_stream_tbl *
  472. mwifiex_get_ba_tbl(struct mwifiex_private *priv, int tid, u8 *ra)
  473. {
  474. struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
  475. unsigned long flags;
  476. spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
  477. list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
  478. if (!memcmp(tx_ba_tsr_tbl->ra, ra, ETH_ALEN) &&
  479. tx_ba_tsr_tbl->tid == tid) {
  480. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
  481. flags);
  482. return tx_ba_tsr_tbl;
  483. }
  484. }
  485. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
  486. return NULL;
  487. }
  488. /*
  489. * This function creates an entry in Tx BA stream table for the
  490. * given RA/TID pair.
  491. */
  492. void mwifiex_create_ba_tbl(struct mwifiex_private *priv, u8 *ra, int tid,
  493. enum mwifiex_ba_status ba_status)
  494. {
  495. struct mwifiex_tx_ba_stream_tbl *new_node;
  496. unsigned long flags;
  497. if (!mwifiex_get_ba_tbl(priv, tid, ra)) {
  498. new_node = kzalloc(sizeof(struct mwifiex_tx_ba_stream_tbl),
  499. GFP_ATOMIC);
  500. if (!new_node) {
  501. dev_err(priv->adapter->dev,
  502. "%s: failed to alloc new_node\n", __func__);
  503. return;
  504. }
  505. INIT_LIST_HEAD(&new_node->list);
  506. new_node->tid = tid;
  507. new_node->ba_status = ba_status;
  508. memcpy(new_node->ra, ra, ETH_ALEN);
  509. spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
  510. list_add_tail(&new_node->list, &priv->tx_ba_stream_tbl_ptr);
  511. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
  512. }
  513. }
  514. /*
  515. * This function sends an add BA request to the given TID/RA pair.
  516. */
  517. int mwifiex_send_addba(struct mwifiex_private *priv, int tid, u8 *peer_mac)
  518. {
  519. struct host_cmd_ds_11n_addba_req add_ba_req;
  520. static u8 dialog_tok;
  521. int ret;
  522. dev_dbg(priv->adapter->dev, "cmd: %s: tid %d\n", __func__, tid);
  523. add_ba_req.block_ack_param_set = cpu_to_le16(
  524. (u16) ((tid << BLOCKACKPARAM_TID_POS) |
  525. (priv->add_ba_param.
  526. tx_win_size << BLOCKACKPARAM_WINSIZE_POS) |
  527. IMMEDIATE_BLOCK_ACK));
  528. add_ba_req.block_ack_tmo = cpu_to_le16((u16)priv->add_ba_param.timeout);
  529. ++dialog_tok;
  530. if (dialog_tok == 0)
  531. dialog_tok = 1;
  532. add_ba_req.dialog_token = dialog_tok;
  533. memcpy(&add_ba_req.peer_mac_addr, peer_mac, ETH_ALEN);
  534. /* We don't wait for the response of this command */
  535. ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_11N_ADDBA_REQ,
  536. 0, 0, &add_ba_req);
  537. return ret;
  538. }
  539. /*
  540. * This function sends a delete BA request to the given TID/RA pair.
  541. */
  542. int mwifiex_send_delba(struct mwifiex_private *priv, int tid, u8 *peer_mac,
  543. int initiator)
  544. {
  545. struct host_cmd_ds_11n_delba delba;
  546. int ret;
  547. uint16_t del_ba_param_set;
  548. memset(&delba, 0, sizeof(delba));
  549. delba.del_ba_param_set = cpu_to_le16(tid << DELBA_TID_POS);
  550. del_ba_param_set = le16_to_cpu(delba.del_ba_param_set);
  551. if (initiator)
  552. del_ba_param_set |= IEEE80211_DELBA_PARAM_INITIATOR_MASK;
  553. else
  554. del_ba_param_set &= ~IEEE80211_DELBA_PARAM_INITIATOR_MASK;
  555. memcpy(&delba.peer_mac_addr, peer_mac, ETH_ALEN);
  556. /* We don't wait for the response of this command */
  557. ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_11N_DELBA,
  558. HostCmd_ACT_GEN_SET, 0, &delba);
  559. return ret;
  560. }
  561. /*
  562. * This function handles the command response of a delete BA request.
  563. */
  564. void mwifiex_11n_delete_ba_stream(struct mwifiex_private *priv, u8 *del_ba)
  565. {
  566. struct host_cmd_ds_11n_delba *cmd_del_ba =
  567. (struct host_cmd_ds_11n_delba *) del_ba;
  568. uint16_t del_ba_param_set = le16_to_cpu(cmd_del_ba->del_ba_param_set);
  569. int tid;
  570. tid = del_ba_param_set >> DELBA_TID_POS;
  571. mwifiex_del_ba_tbl(priv, tid, cmd_del_ba->peer_mac_addr,
  572. TYPE_DELBA_RECEIVE, INITIATOR_BIT(del_ba_param_set));
  573. }
  574. /*
  575. * This function retrieves the Rx reordering table.
  576. */
  577. int mwifiex_get_rx_reorder_tbl(struct mwifiex_private *priv,
  578. struct mwifiex_ds_rx_reorder_tbl *buf)
  579. {
  580. int i;
  581. struct mwifiex_ds_rx_reorder_tbl *rx_reo_tbl = buf;
  582. struct mwifiex_rx_reorder_tbl *rx_reorder_tbl_ptr;
  583. int count = 0;
  584. unsigned long flags;
  585. spin_lock_irqsave(&priv->rx_reorder_tbl_lock, flags);
  586. list_for_each_entry(rx_reorder_tbl_ptr, &priv->rx_reorder_tbl_ptr,
  587. list) {
  588. rx_reo_tbl->tid = (u16) rx_reorder_tbl_ptr->tid;
  589. memcpy(rx_reo_tbl->ta, rx_reorder_tbl_ptr->ta, ETH_ALEN);
  590. rx_reo_tbl->start_win = rx_reorder_tbl_ptr->start_win;
  591. rx_reo_tbl->win_size = rx_reorder_tbl_ptr->win_size;
  592. for (i = 0; i < rx_reorder_tbl_ptr->win_size; ++i) {
  593. if (rx_reorder_tbl_ptr->rx_reorder_ptr[i])
  594. rx_reo_tbl->buffer[i] = true;
  595. else
  596. rx_reo_tbl->buffer[i] = false;
  597. }
  598. rx_reo_tbl++;
  599. count++;
  600. if (count >= MWIFIEX_MAX_RX_BASTREAM_SUPPORTED)
  601. break;
  602. }
  603. spin_unlock_irqrestore(&priv->rx_reorder_tbl_lock, flags);
  604. return count;
  605. }
  606. /*
  607. * This function retrieves the Tx BA stream table.
  608. */
  609. int mwifiex_get_tx_ba_stream_tbl(struct mwifiex_private *priv,
  610. struct mwifiex_ds_tx_ba_stream_tbl *buf)
  611. {
  612. struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
  613. struct mwifiex_ds_tx_ba_stream_tbl *rx_reo_tbl = buf;
  614. int count = 0;
  615. unsigned long flags;
  616. spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
  617. list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
  618. rx_reo_tbl->tid = (u16) tx_ba_tsr_tbl->tid;
  619. dev_dbg(priv->adapter->dev, "data: %s tid=%d\n",
  620. __func__, rx_reo_tbl->tid);
  621. memcpy(rx_reo_tbl->ra, tx_ba_tsr_tbl->ra, ETH_ALEN);
  622. rx_reo_tbl++;
  623. count++;
  624. if (count >= MWIFIEX_MAX_TX_BASTREAM_SUPPORTED)
  625. break;
  626. }
  627. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
  628. return count;
  629. }