kvaser_pci.c 10 KB

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  1. /*
  2. * Copyright (C) 2008 Per Dalen <per.dalen@cnw.se>
  3. *
  4. * Parts of this software are based on (derived) the following:
  5. *
  6. * - Kvaser linux driver, version 4.72 BETA
  7. * Copyright (C) 2002-2007 KVASER AB
  8. *
  9. * - Lincan driver, version 0.3.3, OCERA project
  10. * Copyright (C) 2004 Pavel Pisa
  11. * Copyright (C) 2001 Arnaud Westenberg
  12. *
  13. * - Socketcan SJA1000 drivers
  14. * Copyright (C) 2007 Wolfgang Grandegger <wg@grandegger.com>
  15. * Copyright (c) 2002-2007 Volkswagen Group Electronic Research
  16. * Copyright (c) 2003 Matthias Brukner, Trajet Gmbh, Rebenring 33,
  17. * 38106 Braunschweig, GERMANY
  18. *
  19. * This program is free software; you can redistribute it and/or modify
  20. * it under the terms of the version 2 of the GNU General Public License
  21. * as published by the Free Software Foundation
  22. *
  23. * This program is distributed in the hope that it will be useful, but
  24. * WITHOUT ANY WARRANTY; without even the implied warranty of
  25. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  26. * General Public License for more details.
  27. *
  28. * You should have received a copy of the GNU General Public License
  29. * along with this program; if not, write to the Free Software Foundation,
  30. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  31. */
  32. #include <linux/kernel.h>
  33. #include <linux/module.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/netdevice.h>
  36. #include <linux/delay.h>
  37. #include <linux/pci.h>
  38. #include <linux/can/dev.h>
  39. #include <linux/io.h>
  40. #include "sja1000.h"
  41. #define DRV_NAME "kvaser_pci"
  42. MODULE_AUTHOR("Per Dalen <per.dalen@cnw.se>");
  43. MODULE_DESCRIPTION("Socket-CAN driver for KVASER PCAN PCI cards");
  44. MODULE_SUPPORTED_DEVICE("KVASER PCAN PCI CAN card");
  45. MODULE_LICENSE("GPL v2");
  46. #define MAX_NO_OF_CHANNELS 4 /* max no of channels on a single card */
  47. struct kvaser_pci {
  48. int channel;
  49. struct pci_dev *pci_dev;
  50. struct net_device *slave_dev[MAX_NO_OF_CHANNELS-1];
  51. void __iomem *conf_addr;
  52. void __iomem *res_addr;
  53. int no_channels;
  54. u8 xilinx_ver;
  55. };
  56. #define KVASER_PCI_CAN_CLOCK (16000000 / 2)
  57. /*
  58. * The board configuration is probably following:
  59. * RX1 is connected to ground.
  60. * TX1 is not connected.
  61. * CLKO is not connected.
  62. * Setting the OCR register to 0xDA is a good idea.
  63. * This means normal output mode , push-pull and the correct polarity.
  64. */
  65. #define KVASER_PCI_OCR (OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL)
  66. /*
  67. * In the CDR register, you should set CBP to 1.
  68. * You will probably also want to set the clock divider value to 0
  69. * (meaning divide-by-2), the Pelican bit, and the clock-off bit
  70. * (you will have no need for CLKOUT anyway).
  71. */
  72. #define KVASER_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK)
  73. /*
  74. * These register values are valid for revision 14 of the Xilinx logic.
  75. */
  76. #define XILINX_VERINT 7 /* Lower nibble simulate interrupts,
  77. high nibble version number. */
  78. #define XILINX_PRESUMED_VERSION 14
  79. /*
  80. * Important S5920 registers
  81. */
  82. #define S5920_INTCSR 0x38
  83. #define S5920_PTCR 0x60
  84. #define INTCSR_ADDON_INTENABLE_M 0x2000
  85. #define KVASER_PCI_PORT_BYTES 0x20
  86. #define PCI_CONFIG_PORT_SIZE 0x80 /* size of the config io-memory */
  87. #define PCI_PORT_SIZE 0x80 /* size of a channel io-memory */
  88. #define PCI_PORT_XILINX_SIZE 0x08 /* size of a xilinx io-memory */
  89. #define KVASER_PCI_VENDOR_ID1 0x10e8 /* the PCI device and vendor IDs */
  90. #define KVASER_PCI_DEVICE_ID1 0x8406
  91. #define KVASER_PCI_VENDOR_ID2 0x1a07 /* the PCI device and vendor IDs */
  92. #define KVASER_PCI_DEVICE_ID2 0x0008
  93. static DEFINE_PCI_DEVICE_TABLE(kvaser_pci_tbl) = {
  94. {KVASER_PCI_VENDOR_ID1, KVASER_PCI_DEVICE_ID1, PCI_ANY_ID, PCI_ANY_ID,},
  95. {KVASER_PCI_VENDOR_ID2, KVASER_PCI_DEVICE_ID2, PCI_ANY_ID, PCI_ANY_ID,},
  96. { 0,}
  97. };
  98. MODULE_DEVICE_TABLE(pci, kvaser_pci_tbl);
  99. static u8 kvaser_pci_read_reg(const struct sja1000_priv *priv, int port)
  100. {
  101. return ioread8(priv->reg_base + port);
  102. }
  103. static void kvaser_pci_write_reg(const struct sja1000_priv *priv,
  104. int port, u8 val)
  105. {
  106. iowrite8(val, priv->reg_base + port);
  107. }
  108. static void kvaser_pci_disable_irq(struct net_device *dev)
  109. {
  110. struct sja1000_priv *priv = netdev_priv(dev);
  111. struct kvaser_pci *board = priv->priv;
  112. u32 intcsr;
  113. /* Disable interrupts from card */
  114. intcsr = ioread32(board->conf_addr + S5920_INTCSR);
  115. intcsr &= ~INTCSR_ADDON_INTENABLE_M;
  116. iowrite32(intcsr, board->conf_addr + S5920_INTCSR);
  117. }
  118. static void kvaser_pci_enable_irq(struct net_device *dev)
  119. {
  120. struct sja1000_priv *priv = netdev_priv(dev);
  121. struct kvaser_pci *board = priv->priv;
  122. u32 tmp_en_io;
  123. /* Enable interrupts from card */
  124. tmp_en_io = ioread32(board->conf_addr + S5920_INTCSR);
  125. tmp_en_io |= INTCSR_ADDON_INTENABLE_M;
  126. iowrite32(tmp_en_io, board->conf_addr + S5920_INTCSR);
  127. }
  128. static int number_of_sja1000_chip(void __iomem *base_addr)
  129. {
  130. u8 status;
  131. int i;
  132. for (i = 0; i < MAX_NO_OF_CHANNELS; i++) {
  133. /* reset chip */
  134. iowrite8(MOD_RM, base_addr +
  135. (i * KVASER_PCI_PORT_BYTES) + REG_MOD);
  136. status = ioread8(base_addr +
  137. (i * KVASER_PCI_PORT_BYTES) + REG_MOD);
  138. /* check reset bit */
  139. if (!(status & MOD_RM))
  140. break;
  141. }
  142. return i;
  143. }
  144. static void kvaser_pci_del_chan(struct net_device *dev)
  145. {
  146. struct sja1000_priv *priv;
  147. struct kvaser_pci *board;
  148. int i;
  149. if (!dev)
  150. return;
  151. priv = netdev_priv(dev);
  152. board = priv->priv;
  153. if (!board)
  154. return;
  155. dev_info(&board->pci_dev->dev, "Removing device %s\n",
  156. dev->name);
  157. /* Disable PCI interrupts */
  158. kvaser_pci_disable_irq(dev);
  159. for (i = 0; i < board->no_channels - 1; i++) {
  160. if (board->slave_dev[i]) {
  161. dev_info(&board->pci_dev->dev, "Removing device %s\n",
  162. board->slave_dev[i]->name);
  163. unregister_sja1000dev(board->slave_dev[i]);
  164. free_sja1000dev(board->slave_dev[i]);
  165. }
  166. }
  167. unregister_sja1000dev(dev);
  168. pci_iounmap(board->pci_dev, priv->reg_base);
  169. pci_iounmap(board->pci_dev, board->conf_addr);
  170. pci_iounmap(board->pci_dev, board->res_addr);
  171. free_sja1000dev(dev);
  172. }
  173. static int kvaser_pci_add_chan(struct pci_dev *pdev, int channel,
  174. struct net_device **master_dev,
  175. void __iomem *conf_addr,
  176. void __iomem *res_addr,
  177. void __iomem *base_addr)
  178. {
  179. struct net_device *dev;
  180. struct sja1000_priv *priv;
  181. struct kvaser_pci *board;
  182. int err, init_step;
  183. dev = alloc_sja1000dev(sizeof(struct kvaser_pci));
  184. if (dev == NULL)
  185. return -ENOMEM;
  186. priv = netdev_priv(dev);
  187. board = priv->priv;
  188. board->pci_dev = pdev;
  189. board->channel = channel;
  190. /* S5920 */
  191. board->conf_addr = conf_addr;
  192. /* XILINX board wide address */
  193. board->res_addr = res_addr;
  194. if (channel == 0) {
  195. board->xilinx_ver =
  196. ioread8(board->res_addr + XILINX_VERINT) >> 4;
  197. init_step = 2;
  198. /* Assert PTADR# - we're in passive mode so the other bits are
  199. not important */
  200. iowrite32(0x80808080UL, board->conf_addr + S5920_PTCR);
  201. /* Enable interrupts from card */
  202. kvaser_pci_enable_irq(dev);
  203. } else {
  204. struct sja1000_priv *master_priv = netdev_priv(*master_dev);
  205. struct kvaser_pci *master_board = master_priv->priv;
  206. master_board->slave_dev[channel - 1] = dev;
  207. master_board->no_channels = channel + 1;
  208. board->xilinx_ver = master_board->xilinx_ver;
  209. }
  210. priv->reg_base = base_addr + channel * KVASER_PCI_PORT_BYTES;
  211. priv->read_reg = kvaser_pci_read_reg;
  212. priv->write_reg = kvaser_pci_write_reg;
  213. priv->can.clock.freq = KVASER_PCI_CAN_CLOCK;
  214. priv->ocr = KVASER_PCI_OCR;
  215. priv->cdr = KVASER_PCI_CDR;
  216. priv->irq_flags = IRQF_SHARED;
  217. dev->irq = pdev->irq;
  218. init_step = 4;
  219. dev_info(&pdev->dev, "reg_base=%p conf_addr=%p irq=%d\n",
  220. priv->reg_base, board->conf_addr, dev->irq);
  221. SET_NETDEV_DEV(dev, &pdev->dev);
  222. /* Register SJA1000 device */
  223. err = register_sja1000dev(dev);
  224. if (err) {
  225. dev_err(&pdev->dev, "Registering device failed (err=%d)\n",
  226. err);
  227. goto failure;
  228. }
  229. if (channel == 0)
  230. *master_dev = dev;
  231. return 0;
  232. failure:
  233. kvaser_pci_del_chan(dev);
  234. return err;
  235. }
  236. static int __devinit kvaser_pci_init_one(struct pci_dev *pdev,
  237. const struct pci_device_id *ent)
  238. {
  239. int err;
  240. struct net_device *master_dev = NULL;
  241. struct sja1000_priv *priv;
  242. struct kvaser_pci *board;
  243. int no_channels;
  244. void __iomem *base_addr = NULL;
  245. void __iomem *conf_addr = NULL;
  246. void __iomem *res_addr = NULL;
  247. int i;
  248. dev_info(&pdev->dev, "initializing device %04x:%04x\n",
  249. pdev->vendor, pdev->device);
  250. err = pci_enable_device(pdev);
  251. if (err)
  252. goto failure;
  253. err = pci_request_regions(pdev, DRV_NAME);
  254. if (err)
  255. goto failure_release_pci;
  256. /* S5920 */
  257. conf_addr = pci_iomap(pdev, 0, PCI_CONFIG_PORT_SIZE);
  258. if (conf_addr == NULL) {
  259. err = -ENODEV;
  260. goto failure_release_regions;
  261. }
  262. /* XILINX board wide address */
  263. res_addr = pci_iomap(pdev, 2, PCI_PORT_XILINX_SIZE);
  264. if (res_addr == NULL) {
  265. err = -ENOMEM;
  266. goto failure_iounmap;
  267. }
  268. base_addr = pci_iomap(pdev, 1, PCI_PORT_SIZE);
  269. if (base_addr == NULL) {
  270. err = -ENOMEM;
  271. goto failure_iounmap;
  272. }
  273. no_channels = number_of_sja1000_chip(base_addr);
  274. if (no_channels == 0) {
  275. err = -ENOMEM;
  276. goto failure_iounmap;
  277. }
  278. for (i = 0; i < no_channels; i++) {
  279. err = kvaser_pci_add_chan(pdev, i, &master_dev,
  280. conf_addr, res_addr,
  281. base_addr);
  282. if (err)
  283. goto failure_cleanup;
  284. }
  285. priv = netdev_priv(master_dev);
  286. board = priv->priv;
  287. dev_info(&pdev->dev, "xilinx version=%d number of channels=%d\n",
  288. board->xilinx_ver, board->no_channels);
  289. pci_set_drvdata(pdev, master_dev);
  290. return 0;
  291. failure_cleanup:
  292. kvaser_pci_del_chan(master_dev);
  293. failure_iounmap:
  294. if (conf_addr != NULL)
  295. pci_iounmap(pdev, conf_addr);
  296. if (res_addr != NULL)
  297. pci_iounmap(pdev, res_addr);
  298. if (base_addr != NULL)
  299. pci_iounmap(pdev, base_addr);
  300. failure_release_regions:
  301. pci_release_regions(pdev);
  302. failure_release_pci:
  303. pci_disable_device(pdev);
  304. failure:
  305. return err;
  306. }
  307. static void __devexit kvaser_pci_remove_one(struct pci_dev *pdev)
  308. {
  309. struct net_device *dev = pci_get_drvdata(pdev);
  310. kvaser_pci_del_chan(dev);
  311. pci_release_regions(pdev);
  312. pci_disable_device(pdev);
  313. pci_set_drvdata(pdev, NULL);
  314. }
  315. static struct pci_driver kvaser_pci_driver = {
  316. .name = DRV_NAME,
  317. .id_table = kvaser_pci_tbl,
  318. .probe = kvaser_pci_init_one,
  319. .remove = __devexit_p(kvaser_pci_remove_one),
  320. };
  321. static int __init kvaser_pci_init(void)
  322. {
  323. return pci_register_driver(&kvaser_pci_driver);
  324. }
  325. static void __exit kvaser_pci_exit(void)
  326. {
  327. pci_unregister_driver(&kvaser_pci_driver);
  328. }
  329. module_init(kvaser_pci_init);
  330. module_exit(kvaser_pci_exit);