w6692.c 36 KB

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  1. /*
  2. * w6692.c mISDN driver for Winbond w6692 based cards
  3. *
  4. * Author Karsten Keil <kkeil@suse.de>
  5. * based on the w6692 I4L driver from Petr Novak <petr.novak@i.cz>
  6. *
  7. * Copyright 2009 by Karsten Keil <keil@isdn4linux.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. *
  22. */
  23. #include <linux/interrupt.h>
  24. #include <linux/module.h>
  25. #include <linux/pci.h>
  26. #include <linux/delay.h>
  27. #include <linux/mISDNhw.h>
  28. #include <linux/slab.h>
  29. #include "w6692.h"
  30. #define W6692_REV "2.0"
  31. #define DBUSY_TIMER_VALUE 80
  32. enum {
  33. W6692_ASUS,
  34. W6692_WINBOND,
  35. W6692_USR
  36. };
  37. /* private data in the PCI devices list */
  38. struct w6692map {
  39. u_int subtype;
  40. char *name;
  41. };
  42. static const struct w6692map w6692_map[] =
  43. {
  44. {W6692_ASUS, "Dynalink/AsusCom IS64PH"},
  45. {W6692_WINBOND, "Winbond W6692"},
  46. {W6692_USR, "USR W6692"}
  47. };
  48. #ifndef PCI_VENDOR_ID_USR
  49. #define PCI_VENDOR_ID_USR 0x16ec
  50. #define PCI_DEVICE_ID_USR_6692 0x3409
  51. #endif
  52. struct w6692_ch {
  53. struct bchannel bch;
  54. u32 addr;
  55. struct timer_list timer;
  56. u8 b_mode;
  57. };
  58. struct w6692_hw {
  59. struct list_head list;
  60. struct pci_dev *pdev;
  61. char name[MISDN_MAX_IDLEN];
  62. u32 irq;
  63. u32 irqcnt;
  64. u32 addr;
  65. u32 fmask; /* feature mask - bit set per card nr */
  66. int subtype;
  67. spinlock_t lock; /* hw lock */
  68. u8 imask;
  69. u8 pctl;
  70. u8 xaddr;
  71. u8 xdata;
  72. u8 state;
  73. struct w6692_ch bc[2];
  74. struct dchannel dch;
  75. char log[64];
  76. };
  77. static LIST_HEAD(Cards);
  78. static DEFINE_RWLOCK(card_lock); /* protect Cards */
  79. static int w6692_cnt;
  80. static int debug;
  81. static u32 led;
  82. static u32 pots;
  83. static void
  84. _set_debug(struct w6692_hw *card)
  85. {
  86. card->dch.debug = debug;
  87. card->bc[0].bch.debug = debug;
  88. card->bc[1].bch.debug = debug;
  89. }
  90. static int
  91. set_debug(const char *val, struct kernel_param *kp)
  92. {
  93. int ret;
  94. struct w6692_hw *card;
  95. ret = param_set_uint(val, kp);
  96. if (!ret) {
  97. read_lock(&card_lock);
  98. list_for_each_entry(card, &Cards, list)
  99. _set_debug(card);
  100. read_unlock(&card_lock);
  101. }
  102. return ret;
  103. }
  104. MODULE_AUTHOR("Karsten Keil");
  105. MODULE_LICENSE("GPL v2");
  106. MODULE_VERSION(W6692_REV);
  107. module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR);
  108. MODULE_PARM_DESC(debug, "W6692 debug mask");
  109. module_param(led, uint, S_IRUGO | S_IWUSR);
  110. MODULE_PARM_DESC(led, "W6692 LED support bitmask (one bit per card)");
  111. module_param(pots, uint, S_IRUGO | S_IWUSR);
  112. MODULE_PARM_DESC(pots, "W6692 POTS support bitmask (one bit per card)");
  113. static inline u8
  114. ReadW6692(struct w6692_hw *card, u8 offset)
  115. {
  116. return inb(card->addr + offset);
  117. }
  118. static inline void
  119. WriteW6692(struct w6692_hw *card, u8 offset, u8 value)
  120. {
  121. outb(value, card->addr + offset);
  122. }
  123. static inline u8
  124. ReadW6692B(struct w6692_ch *bc, u8 offset)
  125. {
  126. return inb(bc->addr + offset);
  127. }
  128. static inline void
  129. WriteW6692B(struct w6692_ch *bc, u8 offset, u8 value)
  130. {
  131. outb(value, bc->addr + offset);
  132. }
  133. static void
  134. enable_hwirq(struct w6692_hw *card)
  135. {
  136. WriteW6692(card, W_IMASK, card->imask);
  137. }
  138. static void
  139. disable_hwirq(struct w6692_hw *card)
  140. {
  141. WriteW6692(card, W_IMASK, 0xff);
  142. }
  143. static const char *W6692Ver[] = {"V00", "V01", "V10", "V11"};
  144. static void
  145. W6692Version(struct w6692_hw *card)
  146. {
  147. int val;
  148. val = ReadW6692(card, W_D_RBCH);
  149. pr_notice("%s: Winbond W6692 version: %s\n", card->name,
  150. W6692Ver[(val >> 6) & 3]);
  151. }
  152. static void
  153. w6692_led_handler(struct w6692_hw *card, int on)
  154. {
  155. if ((!(card->fmask & led)) || card->subtype == W6692_USR)
  156. return;
  157. if (on) {
  158. card->xdata &= 0xfb; /* LED ON */
  159. WriteW6692(card, W_XDATA, card->xdata);
  160. } else {
  161. card->xdata |= 0x04; /* LED OFF */
  162. WriteW6692(card, W_XDATA, card->xdata);
  163. }
  164. }
  165. static void
  166. ph_command(struct w6692_hw *card, u8 cmd)
  167. {
  168. pr_debug("%s: ph_command %x\n", card->name, cmd);
  169. WriteW6692(card, W_CIX, cmd);
  170. }
  171. static void
  172. W6692_new_ph(struct w6692_hw *card)
  173. {
  174. if (card->state == W_L1CMD_RST)
  175. ph_command(card, W_L1CMD_DRC);
  176. schedule_event(&card->dch, FLG_PHCHANGE);
  177. }
  178. static void
  179. W6692_ph_bh(struct dchannel *dch)
  180. {
  181. struct w6692_hw *card = dch->hw;
  182. switch (card->state) {
  183. case W_L1CMD_RST:
  184. dch->state = 0;
  185. l1_event(dch->l1, HW_RESET_IND);
  186. break;
  187. case W_L1IND_CD:
  188. dch->state = 3;
  189. l1_event(dch->l1, HW_DEACT_CNF);
  190. break;
  191. case W_L1IND_DRD:
  192. dch->state = 3;
  193. l1_event(dch->l1, HW_DEACT_IND);
  194. break;
  195. case W_L1IND_CE:
  196. dch->state = 4;
  197. l1_event(dch->l1, HW_POWERUP_IND);
  198. break;
  199. case W_L1IND_LD:
  200. if (dch->state <= 5) {
  201. dch->state = 5;
  202. l1_event(dch->l1, ANYSIGNAL);
  203. } else {
  204. dch->state = 8;
  205. l1_event(dch->l1, LOSTFRAMING);
  206. }
  207. break;
  208. case W_L1IND_ARD:
  209. dch->state = 6;
  210. l1_event(dch->l1, INFO2);
  211. break;
  212. case W_L1IND_AI8:
  213. dch->state = 7;
  214. l1_event(dch->l1, INFO4_P8);
  215. break;
  216. case W_L1IND_AI10:
  217. dch->state = 7;
  218. l1_event(dch->l1, INFO4_P10);
  219. break;
  220. default:
  221. pr_debug("%s: TE unknown state %02x dch state %02x\n",
  222. card->name, card->state, dch->state);
  223. break;
  224. }
  225. pr_debug("%s: TE newstate %02x\n", card->name, dch->state);
  226. }
  227. static void
  228. W6692_empty_Dfifo(struct w6692_hw *card, int count)
  229. {
  230. struct dchannel *dch = &card->dch;
  231. u8 *ptr;
  232. pr_debug("%s: empty_Dfifo %d\n", card->name, count);
  233. if (!dch->rx_skb) {
  234. dch->rx_skb = mI_alloc_skb(card->dch.maxlen, GFP_ATOMIC);
  235. if (!dch->rx_skb) {
  236. pr_info("%s: D receive out of memory\n", card->name);
  237. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  238. return;
  239. }
  240. }
  241. if ((dch->rx_skb->len + count) >= dch->maxlen) {
  242. pr_debug("%s: empty_Dfifo overrun %d\n", card->name,
  243. dch->rx_skb->len + count);
  244. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  245. return;
  246. }
  247. ptr = skb_put(dch->rx_skb, count);
  248. insb(card->addr + W_D_RFIFO, ptr, count);
  249. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  250. if (debug & DEBUG_HW_DFIFO) {
  251. snprintf(card->log, 63, "D-recv %s %d ",
  252. card->name, count);
  253. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  254. }
  255. }
  256. static void
  257. W6692_fill_Dfifo(struct w6692_hw *card)
  258. {
  259. struct dchannel *dch = &card->dch;
  260. int count;
  261. u8 *ptr;
  262. u8 cmd = W_D_CMDR_XMS;
  263. pr_debug("%s: fill_Dfifo\n", card->name);
  264. if (!dch->tx_skb)
  265. return;
  266. count = dch->tx_skb->len - dch->tx_idx;
  267. if (count <= 0)
  268. return;
  269. if (count > W_D_FIFO_THRESH)
  270. count = W_D_FIFO_THRESH;
  271. else
  272. cmd |= W_D_CMDR_XME;
  273. ptr = dch->tx_skb->data + dch->tx_idx;
  274. dch->tx_idx += count;
  275. outsb(card->addr + W_D_XFIFO, ptr, count);
  276. WriteW6692(card, W_D_CMDR, cmd);
  277. if (test_and_set_bit(FLG_BUSY_TIMER, &dch->Flags)) {
  278. pr_debug("%s: fill_Dfifo dbusytimer running\n", card->name);
  279. del_timer(&dch->timer);
  280. }
  281. init_timer(&dch->timer);
  282. dch->timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ) / 1000);
  283. add_timer(&dch->timer);
  284. if (debug & DEBUG_HW_DFIFO) {
  285. snprintf(card->log, 63, "D-send %s %d ",
  286. card->name, count);
  287. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  288. }
  289. }
  290. static void
  291. d_retransmit(struct w6692_hw *card)
  292. {
  293. struct dchannel *dch = &card->dch;
  294. if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
  295. del_timer(&dch->timer);
  296. #ifdef FIXME
  297. if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags))
  298. dchannel_sched_event(dch, D_CLEARBUSY);
  299. #endif
  300. if (test_bit(FLG_TX_BUSY, &dch->Flags)) {
  301. /* Restart frame */
  302. dch->tx_idx = 0;
  303. W6692_fill_Dfifo(card);
  304. } else if (dch->tx_skb) { /* should not happen */
  305. pr_info("%s: %s without TX_BUSY\n", card->name, __func__);
  306. test_and_set_bit(FLG_TX_BUSY, &dch->Flags);
  307. dch->tx_idx = 0;
  308. W6692_fill_Dfifo(card);
  309. } else {
  310. pr_info("%s: XDU no TX_BUSY\n", card->name);
  311. if (get_next_dframe(dch))
  312. W6692_fill_Dfifo(card);
  313. }
  314. }
  315. static void
  316. handle_rxD(struct w6692_hw *card) {
  317. u8 stat;
  318. int count;
  319. stat = ReadW6692(card, W_D_RSTA);
  320. if (stat & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) {
  321. if (stat & W_D_RSTA_RDOV) {
  322. pr_debug("%s: D-channel RDOV\n", card->name);
  323. #ifdef ERROR_STATISTIC
  324. card->dch.err_rx++;
  325. #endif
  326. }
  327. if (stat & W_D_RSTA_CRCE) {
  328. pr_debug("%s: D-channel CRC error\n", card->name);
  329. #ifdef ERROR_STATISTIC
  330. card->dch.err_crc++;
  331. #endif
  332. }
  333. if (stat & W_D_RSTA_RMB) {
  334. pr_debug("%s: D-channel ABORT\n", card->name);
  335. #ifdef ERROR_STATISTIC
  336. card->dch.err_rx++;
  337. #endif
  338. }
  339. if (card->dch.rx_skb)
  340. dev_kfree_skb(card->dch.rx_skb);
  341. card->dch.rx_skb = NULL;
  342. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST);
  343. } else {
  344. count = ReadW6692(card, W_D_RBCL) & (W_D_FIFO_THRESH - 1);
  345. if (count == 0)
  346. count = W_D_FIFO_THRESH;
  347. W6692_empty_Dfifo(card, count);
  348. recv_Dchannel(&card->dch);
  349. }
  350. }
  351. static void
  352. handle_txD(struct w6692_hw *card) {
  353. if (test_and_clear_bit(FLG_BUSY_TIMER, &card->dch.Flags))
  354. del_timer(&card->dch.timer);
  355. if (card->dch.tx_skb && card->dch.tx_idx < card->dch.tx_skb->len) {
  356. W6692_fill_Dfifo(card);
  357. } else {
  358. if (card->dch.tx_skb)
  359. dev_kfree_skb(card->dch.tx_skb);
  360. if (get_next_dframe(&card->dch))
  361. W6692_fill_Dfifo(card);
  362. }
  363. }
  364. static void
  365. handle_statusD(struct w6692_hw *card)
  366. {
  367. struct dchannel *dch = &card->dch;
  368. u8 exval, v1, cir;
  369. exval = ReadW6692(card, W_D_EXIR);
  370. pr_debug("%s: D_EXIR %02x\n", card->name, exval);
  371. if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) {
  372. /* Transmit underrun/collision */
  373. pr_debug("%s: D-channel underrun/collision\n", card->name);
  374. #ifdef ERROR_STATISTIC
  375. dch->err_tx++;
  376. #endif
  377. d_retransmit(card);
  378. }
  379. if (exval & W_D_EXI_RDOV) { /* RDOV */
  380. pr_debug("%s: D-channel RDOV\n", card->name);
  381. WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST);
  382. }
  383. if (exval & W_D_EXI_TIN2) /* TIN2 - never */
  384. pr_debug("%s: spurious TIN2 interrupt\n", card->name);
  385. if (exval & W_D_EXI_MOC) { /* MOC - not supported */
  386. v1 = ReadW6692(card, W_MOSR);
  387. pr_debug("%s: spurious MOC interrupt MOSR %02x\n",
  388. card->name, v1);
  389. }
  390. if (exval & W_D_EXI_ISC) { /* ISC - Level1 change */
  391. cir = ReadW6692(card, W_CIR);
  392. pr_debug("%s: ISC CIR %02X\n", card->name, cir);
  393. if (cir & W_CIR_ICC) {
  394. v1 = cir & W_CIR_COD_MASK;
  395. pr_debug("%s: ph_state_change %x -> %x\n", card->name,
  396. dch->state, v1);
  397. card->state = v1;
  398. if (card->fmask & led) {
  399. switch (v1) {
  400. case W_L1IND_AI8:
  401. case W_L1IND_AI10:
  402. w6692_led_handler(card, 1);
  403. break;
  404. default:
  405. w6692_led_handler(card, 0);
  406. break;
  407. }
  408. }
  409. W6692_new_ph(card);
  410. }
  411. if (cir & W_CIR_SCC) {
  412. v1 = ReadW6692(card, W_SQR);
  413. pr_debug("%s: SCC SQR %02X\n", card->name, v1);
  414. }
  415. }
  416. if (exval & W_D_EXI_WEXP)
  417. pr_debug("%s: spurious WEXP interrupt!\n", card->name);
  418. if (exval & W_D_EXI_TEXP)
  419. pr_debug("%s: spurious TEXP interrupt!\n", card->name);
  420. }
  421. static void
  422. W6692_empty_Bfifo(struct w6692_ch *wch, int count)
  423. {
  424. struct w6692_hw *card = wch->bch.hw;
  425. u8 *ptr;
  426. pr_debug("%s: empty_Bfifo %d\n", card->name, count);
  427. if (unlikely(wch->bch.state == ISDN_P_NONE)) {
  428. pr_debug("%s: empty_Bfifo ISDN_P_NONE\n", card->name);
  429. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  430. if (wch->bch.rx_skb)
  431. skb_trim(wch->bch.rx_skb, 0);
  432. return;
  433. }
  434. if (!wch->bch.rx_skb) {
  435. wch->bch.rx_skb = mI_alloc_skb(wch->bch.maxlen, GFP_ATOMIC);
  436. if (unlikely(!wch->bch.rx_skb)) {
  437. pr_info("%s: B receive out of memory\n", card->name);
  438. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  439. W_B_CMDR_RACT);
  440. return;
  441. }
  442. }
  443. if (wch->bch.rx_skb->len + count > wch->bch.maxlen) {
  444. pr_debug("%s: empty_Bfifo incoming packet too large\n",
  445. card->name);
  446. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  447. skb_trim(wch->bch.rx_skb, 0);
  448. return;
  449. }
  450. ptr = skb_put(wch->bch.rx_skb, count);
  451. insb(wch->addr + W_B_RFIFO, ptr, count);
  452. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  453. if (debug & DEBUG_HW_DFIFO) {
  454. snprintf(card->log, 63, "B%1d-recv %s %d ",
  455. wch->bch.nr, card->name, count);
  456. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  457. }
  458. }
  459. static void
  460. W6692_fill_Bfifo(struct w6692_ch *wch)
  461. {
  462. struct w6692_hw *card = wch->bch.hw;
  463. int count;
  464. u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS;
  465. pr_debug("%s: fill Bfifo\n", card->name);
  466. if (!wch->bch.tx_skb)
  467. return;
  468. count = wch->bch.tx_skb->len - wch->bch.tx_idx;
  469. if (count <= 0)
  470. return;
  471. ptr = wch->bch.tx_skb->data + wch->bch.tx_idx;
  472. if (count > W_B_FIFO_THRESH)
  473. count = W_B_FIFO_THRESH;
  474. else if (test_bit(FLG_HDLC, &wch->bch.Flags))
  475. cmd |= W_B_CMDR_XME;
  476. pr_debug("%s: fill Bfifo%d/%d\n", card->name,
  477. count, wch->bch.tx_idx);
  478. wch->bch.tx_idx += count;
  479. outsb(wch->addr + W_B_XFIFO, ptr, count);
  480. WriteW6692B(wch, W_B_CMDR, cmd);
  481. if (debug & DEBUG_HW_DFIFO) {
  482. snprintf(card->log, 63, "B%1d-send %s %d ",
  483. wch->bch.nr, card->name, count);
  484. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  485. }
  486. }
  487. #if 0
  488. static int
  489. setvolume(struct w6692_ch *wch, int mic, struct sk_buff *skb)
  490. {
  491. struct w6692_hw *card = wch->bch.hw;
  492. u16 *vol = (u16 *)skb->data;
  493. u8 val;
  494. if ((!(card->fmask & pots)) ||
  495. !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  496. return -ENODEV;
  497. if (skb->len < 2)
  498. return -EINVAL;
  499. if (*vol > 7)
  500. return -EINVAL;
  501. val = *vol & 7;
  502. val = 7 - val;
  503. if (mic) {
  504. val <<= 3;
  505. card->xaddr &= 0xc7;
  506. } else {
  507. card->xaddr &= 0xf8;
  508. }
  509. card->xaddr |= val;
  510. WriteW6692(card, W_XADDR, card->xaddr);
  511. return 0;
  512. }
  513. static int
  514. enable_pots(struct w6692_ch *wch)
  515. {
  516. struct w6692_hw *card = wch->bch.hw;
  517. if ((!(card->fmask & pots)) ||
  518. !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  519. return -ENODEV;
  520. wch->b_mode |= W_B_MODE_EPCM | W_B_MODE_BSW0;
  521. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  522. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  523. card->pctl |= ((wch->bch.nr & 2) ? W_PCTL_PCX : 0);
  524. WriteW6692(card, W_PCTL, card->pctl);
  525. return 0;
  526. }
  527. #endif
  528. static int
  529. disable_pots(struct w6692_ch *wch)
  530. {
  531. struct w6692_hw *card = wch->bch.hw;
  532. if (!(card->fmask & pots))
  533. return -ENODEV;
  534. wch->b_mode &= ~(W_B_MODE_EPCM | W_B_MODE_BSW0);
  535. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  536. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  537. W_B_CMDR_XRST);
  538. return 0;
  539. }
  540. static int
  541. w6692_mode(struct w6692_ch *wch, u32 pr)
  542. {
  543. struct w6692_hw *card;
  544. card = wch->bch.hw;
  545. pr_debug("%s: B%d protocol %x-->%x\n", card->name,
  546. wch->bch.nr, wch->bch.state, pr);
  547. switch (pr) {
  548. case ISDN_P_NONE:
  549. if ((card->fmask & pots) && (wch->b_mode & W_B_MODE_EPCM))
  550. disable_pots(wch);
  551. wch->b_mode = 0;
  552. mISDN_clear_bchannel(&wch->bch);
  553. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  554. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  555. test_and_clear_bit(FLG_HDLC, &wch->bch.Flags);
  556. test_and_clear_bit(FLG_TRANSPARENT, &wch->bch.Flags);
  557. break;
  558. case ISDN_P_B_RAW:
  559. wch->b_mode = W_B_MODE_MMS;
  560. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  561. WriteW6692B(wch, W_B_EXIM, 0);
  562. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  563. W_B_CMDR_XRST);
  564. test_and_set_bit(FLG_TRANSPARENT, &wch->bch.Flags);
  565. break;
  566. case ISDN_P_B_HDLC:
  567. wch->b_mode = W_B_MODE_ITF;
  568. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  569. WriteW6692B(wch, W_B_ADM1, 0xff);
  570. WriteW6692B(wch, W_B_ADM2, 0xff);
  571. WriteW6692B(wch, W_B_EXIM, 0);
  572. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  573. W_B_CMDR_XRST);
  574. test_and_set_bit(FLG_HDLC, &wch->bch.Flags);
  575. break;
  576. default:
  577. pr_info("%s: protocol %x not known\n", card->name, pr);
  578. return -ENOPROTOOPT;
  579. }
  580. wch->bch.state = pr;
  581. return 0;
  582. }
  583. static void
  584. send_next(struct w6692_ch *wch)
  585. {
  586. if (wch->bch.tx_skb && wch->bch.tx_idx < wch->bch.tx_skb->len)
  587. W6692_fill_Bfifo(wch);
  588. else {
  589. if (wch->bch.tx_skb) {
  590. /* send confirm, on trans, free on hdlc. */
  591. if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  592. confirm_Bsend(&wch->bch);
  593. dev_kfree_skb(wch->bch.tx_skb);
  594. }
  595. if (get_next_bframe(&wch->bch))
  596. W6692_fill_Bfifo(wch);
  597. }
  598. }
  599. static void
  600. W6692B_interrupt(struct w6692_hw *card, int ch)
  601. {
  602. struct w6692_ch *wch = &card->bc[ch];
  603. int count;
  604. u8 stat, star = 0;
  605. stat = ReadW6692B(wch, W_B_EXIR);
  606. pr_debug("%s: B%d EXIR %02x\n", card->name, wch->bch.nr, stat);
  607. if (stat & W_B_EXI_RME) {
  608. star = ReadW6692B(wch, W_B_STAR);
  609. if (star & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) {
  610. if ((star & W_B_STAR_RDOV) &&
  611. test_bit(FLG_ACTIVE, &wch->bch.Flags)) {
  612. pr_debug("%s: B%d RDOV proto=%x\n", card->name,
  613. wch->bch.nr, wch->bch.state);
  614. #ifdef ERROR_STATISTIC
  615. wch->bch.err_rdo++;
  616. #endif
  617. }
  618. if (test_bit(FLG_HDLC, &wch->bch.Flags)) {
  619. if (star & W_B_STAR_CRCE) {
  620. pr_debug("%s: B%d CRC error\n",
  621. card->name, wch->bch.nr);
  622. #ifdef ERROR_STATISTIC
  623. wch->bch.err_crc++;
  624. #endif
  625. }
  626. if (star & W_B_STAR_RMB) {
  627. pr_debug("%s: B%d message abort\n",
  628. card->name, wch->bch.nr);
  629. #ifdef ERROR_STATISTIC
  630. wch->bch.err_inv++;
  631. #endif
  632. }
  633. }
  634. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  635. W_B_CMDR_RRST | W_B_CMDR_RACT);
  636. if (wch->bch.rx_skb)
  637. skb_trim(wch->bch.rx_skb, 0);
  638. } else {
  639. count = ReadW6692B(wch, W_B_RBCL) &
  640. (W_B_FIFO_THRESH - 1);
  641. if (count == 0)
  642. count = W_B_FIFO_THRESH;
  643. W6692_empty_Bfifo(wch, count);
  644. recv_Bchannel(&wch->bch, 0);
  645. }
  646. }
  647. if (stat & W_B_EXI_RMR) {
  648. if (!(stat & W_B_EXI_RME))
  649. star = ReadW6692B(wch, W_B_STAR);
  650. if (star & W_B_STAR_RDOV) {
  651. pr_debug("%s: B%d RDOV proto=%x\n", card->name,
  652. wch->bch.nr, wch->bch.state);
  653. #ifdef ERROR_STATISTIC
  654. wch->bch.err_rdo++;
  655. #endif
  656. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  657. W_B_CMDR_RRST | W_B_CMDR_RACT);
  658. } else {
  659. W6692_empty_Bfifo(wch, W_B_FIFO_THRESH);
  660. if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags) &&
  661. wch->bch.rx_skb && (wch->bch.rx_skb->len > 0))
  662. recv_Bchannel(&wch->bch, 0);
  663. }
  664. }
  665. if (stat & W_B_EXI_RDOV) {
  666. /* only if it is not handled yet */
  667. if (!(star & W_B_STAR_RDOV)) {
  668. pr_debug("%s: B%d RDOV IRQ proto=%x\n", card->name,
  669. wch->bch.nr, wch->bch.state);
  670. #ifdef ERROR_STATISTIC
  671. wch->bch.err_rdo++;
  672. #endif
  673. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  674. W_B_CMDR_RRST | W_B_CMDR_RACT);
  675. }
  676. }
  677. if (stat & W_B_EXI_XFR) {
  678. if (!(stat & (W_B_EXI_RME | W_B_EXI_RMR))) {
  679. star = ReadW6692B(wch, W_B_STAR);
  680. pr_debug("%s: B%d star %02x\n", card->name,
  681. wch->bch.nr, star);
  682. }
  683. if (star & W_B_STAR_XDOW) {
  684. pr_debug("%s: B%d XDOW proto=%x\n", card->name,
  685. wch->bch.nr, wch->bch.state);
  686. #ifdef ERROR_STATISTIC
  687. wch->bch.err_xdu++;
  688. #endif
  689. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST |
  690. W_B_CMDR_RACT);
  691. /* resend */
  692. if (wch->bch.tx_skb) {
  693. if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  694. wch->bch.tx_idx = 0;
  695. }
  696. }
  697. send_next(wch);
  698. if (stat & W_B_EXI_XDUN)
  699. return; /* handle XDOW only once */
  700. }
  701. if (stat & W_B_EXI_XDUN) {
  702. pr_debug("%s: B%d XDUN proto=%x\n", card->name,
  703. wch->bch.nr, wch->bch.state);
  704. #ifdef ERROR_STATISTIC
  705. wch->bch.err_xdu++;
  706. #endif
  707. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT);
  708. /* resend */
  709. if (wch->bch.tx_skb) {
  710. if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  711. wch->bch.tx_idx = 0;
  712. }
  713. send_next(wch);
  714. }
  715. }
  716. static irqreturn_t
  717. w6692_irq(int intno, void *dev_id)
  718. {
  719. struct w6692_hw *card = dev_id;
  720. u8 ista;
  721. spin_lock(&card->lock);
  722. ista = ReadW6692(card, W_ISTA);
  723. if ((ista | card->imask) == card->imask) {
  724. /* possible a shared IRQ reqest */
  725. spin_unlock(&card->lock);
  726. return IRQ_NONE;
  727. }
  728. card->irqcnt++;
  729. pr_debug("%s: ista %02x\n", card->name, ista);
  730. ista &= ~card->imask;
  731. if (ista & W_INT_B1_EXI)
  732. W6692B_interrupt(card, 0);
  733. if (ista & W_INT_B2_EXI)
  734. W6692B_interrupt(card, 1);
  735. if (ista & W_INT_D_RME)
  736. handle_rxD(card);
  737. if (ista & W_INT_D_RMR)
  738. W6692_empty_Dfifo(card, W_D_FIFO_THRESH);
  739. if (ista & W_INT_D_XFR)
  740. handle_txD(card);
  741. if (ista & W_INT_D_EXI)
  742. handle_statusD(card);
  743. if (ista & (W_INT_XINT0 | W_INT_XINT1)) /* XINT0/1 - never */
  744. pr_debug("%s: W6692 spurious XINT!\n", card->name);
  745. /* End IRQ Handler */
  746. spin_unlock(&card->lock);
  747. return IRQ_HANDLED;
  748. }
  749. static void
  750. dbusy_timer_handler(struct dchannel *dch)
  751. {
  752. struct w6692_hw *card = dch->hw;
  753. int rbch, star;
  754. u_long flags;
  755. if (test_bit(FLG_BUSY_TIMER, &dch->Flags)) {
  756. spin_lock_irqsave(&card->lock, flags);
  757. rbch = ReadW6692(card, W_D_RBCH);
  758. star = ReadW6692(card, W_D_STAR);
  759. pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n",
  760. card->name, rbch, star);
  761. if (star & W_D_STAR_XBZ) /* D-Channel Busy */
  762. test_and_set_bit(FLG_L1_BUSY, &dch->Flags);
  763. else {
  764. /* discard frame; reset transceiver */
  765. test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags);
  766. if (dch->tx_idx)
  767. dch->tx_idx = 0;
  768. else
  769. pr_info("%s: W6692 D-Channel Busy no tx_idx\n",
  770. card->name);
  771. /* Transmitter reset */
  772. WriteW6692(card, W_D_CMDR, W_D_CMDR_XRST);
  773. }
  774. spin_unlock_irqrestore(&card->lock, flags);
  775. }
  776. }
  777. void initW6692(struct w6692_hw *card)
  778. {
  779. u8 val;
  780. card->dch.timer.function = (void *)dbusy_timer_handler;
  781. card->dch.timer.data = (u_long)&card->dch;
  782. init_timer(&card->dch.timer);
  783. w6692_mode(&card->bc[0], ISDN_P_NONE);
  784. w6692_mode(&card->bc[1], ISDN_P_NONE);
  785. WriteW6692(card, W_D_CTL, 0x00);
  786. disable_hwirq(card);
  787. WriteW6692(card, W_D_SAM, 0xff);
  788. WriteW6692(card, W_D_TAM, 0xff);
  789. WriteW6692(card, W_D_MODE, W_D_MODE_RACT);
  790. card->state = W_L1CMD_RST;
  791. ph_command(card, W_L1CMD_RST);
  792. ph_command(card, W_L1CMD_ECK);
  793. /* enable all IRQ but extern */
  794. card->imask = 0x18;
  795. WriteW6692(card, W_D_EXIM, 0x00);
  796. WriteW6692B(&card->bc[0], W_B_EXIM, 0);
  797. WriteW6692B(&card->bc[1], W_B_EXIM, 0);
  798. /* Reset D-chan receiver and transmitter */
  799. WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST);
  800. /* Reset B-chan receiver and transmitter */
  801. WriteW6692B(&card->bc[0], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  802. WriteW6692B(&card->bc[1], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  803. /* enable peripheral */
  804. if (card->subtype == W6692_USR) {
  805. /* seems that USR implemented some power control features
  806. * Pin 79 is connected to the oscilator circuit so we
  807. * have to handle it here
  808. */
  809. card->pctl = 0x80;
  810. card->xdata = 0;
  811. WriteW6692(card, W_PCTL, card->pctl);
  812. WriteW6692(card, W_XDATA, card->xdata);
  813. } else {
  814. card->pctl = W_PCTL_OE5 | W_PCTL_OE4 | W_PCTL_OE2 |
  815. W_PCTL_OE1 | W_PCTL_OE0;
  816. card->xaddr = 0x00;/* all sw off */
  817. if (card->fmask & pots)
  818. card->xdata |= 0x06; /* POWER UP/ LED OFF / ALAW */
  819. if (card->fmask & led)
  820. card->xdata |= 0x04; /* LED OFF */
  821. if ((card->fmask & pots) || (card->fmask & led)) {
  822. WriteW6692(card, W_PCTL, card->pctl);
  823. WriteW6692(card, W_XADDR, card->xaddr);
  824. WriteW6692(card, W_XDATA, card->xdata);
  825. val = ReadW6692(card, W_XADDR);
  826. if (debug & DEBUG_HW)
  827. pr_notice("%s: W_XADDR=%02x\n",
  828. card->name, val);
  829. }
  830. }
  831. }
  832. static void
  833. reset_w6692(struct w6692_hw *card)
  834. {
  835. WriteW6692(card, W_D_CTL, W_D_CTL_SRST);
  836. mdelay(10);
  837. WriteW6692(card, W_D_CTL, 0);
  838. }
  839. static int
  840. init_card(struct w6692_hw *card)
  841. {
  842. int cnt = 3;
  843. u_long flags;
  844. spin_lock_irqsave(&card->lock, flags);
  845. disable_hwirq(card);
  846. spin_unlock_irqrestore(&card->lock, flags);
  847. if (request_irq(card->irq, w6692_irq, IRQF_SHARED, card->name, card)) {
  848. pr_info("%s: couldn't get interrupt %d\n", card->name,
  849. card->irq);
  850. return -EIO;
  851. }
  852. while (cnt--) {
  853. spin_lock_irqsave(&card->lock, flags);
  854. initW6692(card);
  855. enable_hwirq(card);
  856. spin_unlock_irqrestore(&card->lock, flags);
  857. /* Timeout 10ms */
  858. msleep_interruptible(10);
  859. if (debug & DEBUG_HW)
  860. pr_notice("%s: IRQ %d count %d\n", card->name,
  861. card->irq, card->irqcnt);
  862. if (!card->irqcnt) {
  863. pr_info("%s: IRQ(%d) getting no IRQs during init %d\n",
  864. card->name, card->irq, 3 - cnt);
  865. reset_w6692(card);
  866. } else
  867. return 0;
  868. }
  869. free_irq(card->irq, card);
  870. return -EIO;
  871. }
  872. static int
  873. w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)
  874. {
  875. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  876. struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
  877. struct w6692_hw *card = bch->hw;
  878. int ret = -EINVAL;
  879. struct mISDNhead *hh = mISDN_HEAD_P(skb);
  880. u32 id;
  881. u_long flags;
  882. switch (hh->prim) {
  883. case PH_DATA_REQ:
  884. spin_lock_irqsave(&card->lock, flags);
  885. ret = bchannel_senddata(bch, skb);
  886. if (ret > 0) { /* direct TX */
  887. id = hh->id; /* skb can be freed */
  888. ret = 0;
  889. W6692_fill_Bfifo(bc);
  890. spin_unlock_irqrestore(&card->lock, flags);
  891. if (!test_bit(FLG_TRANSPARENT, &bch->Flags))
  892. queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
  893. } else
  894. spin_unlock_irqrestore(&card->lock, flags);
  895. return ret;
  896. case PH_ACTIVATE_REQ:
  897. spin_lock_irqsave(&card->lock, flags);
  898. if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
  899. ret = w6692_mode(bc, ch->protocol);
  900. else
  901. ret = 0;
  902. spin_unlock_irqrestore(&card->lock, flags);
  903. if (!ret)
  904. _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
  905. NULL, GFP_KERNEL);
  906. break;
  907. case PH_DEACTIVATE_REQ:
  908. spin_lock_irqsave(&card->lock, flags);
  909. mISDN_clear_bchannel(bch);
  910. w6692_mode(bc, ISDN_P_NONE);
  911. spin_unlock_irqrestore(&card->lock, flags);
  912. _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
  913. NULL, GFP_KERNEL);
  914. ret = 0;
  915. break;
  916. default:
  917. pr_info("%s: %s unknown prim(%x,%x)\n",
  918. card->name, __func__, hh->prim, hh->id);
  919. ret = -EINVAL;
  920. }
  921. if (!ret)
  922. dev_kfree_skb(skb);
  923. return ret;
  924. }
  925. static int
  926. channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
  927. {
  928. int ret = 0;
  929. switch (cq->op) {
  930. case MISDN_CTRL_GETOP:
  931. cq->op = 0;
  932. break;
  933. /* Nothing implemented yet */
  934. case MISDN_CTRL_FILL_EMPTY:
  935. default:
  936. pr_info("%s: unknown Op %x\n", __func__, cq->op);
  937. ret = -EINVAL;
  938. break;
  939. }
  940. return ret;
  941. }
  942. static int
  943. open_bchannel(struct w6692_hw *card, struct channel_req *rq)
  944. {
  945. struct bchannel *bch;
  946. if (rq->adr.channel == 0 || rq->adr.channel > 2)
  947. return -EINVAL;
  948. if (rq->protocol == ISDN_P_NONE)
  949. return -EINVAL;
  950. bch = &card->bc[rq->adr.channel - 1].bch;
  951. if (test_and_set_bit(FLG_OPEN, &bch->Flags))
  952. return -EBUSY; /* b-channel can be only open once */
  953. test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags);
  954. bch->ch.protocol = rq->protocol;
  955. rq->ch = &bch->ch;
  956. return 0;
  957. }
  958. static int
  959. channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq)
  960. {
  961. int ret = 0;
  962. switch (cq->op) {
  963. case MISDN_CTRL_GETOP:
  964. cq->op = 0;
  965. break;
  966. default:
  967. pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op);
  968. ret = -EINVAL;
  969. break;
  970. }
  971. return ret;
  972. }
  973. static int
  974. w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
  975. {
  976. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  977. struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
  978. struct w6692_hw *card = bch->hw;
  979. int ret = -EINVAL;
  980. u_long flags;
  981. pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg);
  982. switch (cmd) {
  983. case CLOSE_CHANNEL:
  984. test_and_clear_bit(FLG_OPEN, &bch->Flags);
  985. if (test_bit(FLG_ACTIVE, &bch->Flags)) {
  986. spin_lock_irqsave(&card->lock, flags);
  987. mISDN_freebchannel(bch);
  988. w6692_mode(bc, ISDN_P_NONE);
  989. spin_unlock_irqrestore(&card->lock, flags);
  990. } else {
  991. skb_queue_purge(&bch->rqueue);
  992. bch->rcount = 0;
  993. }
  994. ch->protocol = ISDN_P_NONE;
  995. ch->peer = NULL;
  996. module_put(THIS_MODULE);
  997. ret = 0;
  998. break;
  999. case CONTROL_CHANNEL:
  1000. ret = channel_bctrl(bch, arg);
  1001. break;
  1002. default:
  1003. pr_info("%s: %s unknown prim(%x)\n",
  1004. card->name, __func__, cmd);
  1005. }
  1006. return ret;
  1007. }
  1008. static int
  1009. w6692_l2l1D(struct mISDNchannel *ch, struct sk_buff *skb)
  1010. {
  1011. struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
  1012. struct dchannel *dch = container_of(dev, struct dchannel, dev);
  1013. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1014. int ret = -EINVAL;
  1015. struct mISDNhead *hh = mISDN_HEAD_P(skb);
  1016. u32 id;
  1017. u_long flags;
  1018. switch (hh->prim) {
  1019. case PH_DATA_REQ:
  1020. spin_lock_irqsave(&card->lock, flags);
  1021. ret = dchannel_senddata(dch, skb);
  1022. if (ret > 0) { /* direct TX */
  1023. id = hh->id; /* skb can be freed */
  1024. W6692_fill_Dfifo(card);
  1025. ret = 0;
  1026. spin_unlock_irqrestore(&card->lock, flags);
  1027. queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
  1028. } else
  1029. spin_unlock_irqrestore(&card->lock, flags);
  1030. return ret;
  1031. case PH_ACTIVATE_REQ:
  1032. ret = l1_event(dch->l1, hh->prim);
  1033. break;
  1034. case PH_DEACTIVATE_REQ:
  1035. test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags);
  1036. ret = l1_event(dch->l1, hh->prim);
  1037. break;
  1038. }
  1039. if (!ret)
  1040. dev_kfree_skb(skb);
  1041. return ret;
  1042. }
  1043. static int
  1044. w6692_l1callback(struct dchannel *dch, u32 cmd)
  1045. {
  1046. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1047. u_long flags;
  1048. pr_debug("%s: cmd(%x) state(%02x)\n", card->name, cmd, card->state);
  1049. switch (cmd) {
  1050. case INFO3_P8:
  1051. spin_lock_irqsave(&card->lock, flags);
  1052. ph_command(card, W_L1CMD_AR8);
  1053. spin_unlock_irqrestore(&card->lock, flags);
  1054. break;
  1055. case INFO3_P10:
  1056. spin_lock_irqsave(&card->lock, flags);
  1057. ph_command(card, W_L1CMD_AR10);
  1058. spin_unlock_irqrestore(&card->lock, flags);
  1059. break;
  1060. case HW_RESET_REQ:
  1061. spin_lock_irqsave(&card->lock, flags);
  1062. if (card->state != W_L1IND_DRD)
  1063. ph_command(card, W_L1CMD_RST);
  1064. ph_command(card, W_L1CMD_ECK);
  1065. spin_unlock_irqrestore(&card->lock, flags);
  1066. break;
  1067. case HW_DEACT_REQ:
  1068. skb_queue_purge(&dch->squeue);
  1069. if (dch->tx_skb) {
  1070. dev_kfree_skb(dch->tx_skb);
  1071. dch->tx_skb = NULL;
  1072. }
  1073. dch->tx_idx = 0;
  1074. if (dch->rx_skb) {
  1075. dev_kfree_skb(dch->rx_skb);
  1076. dch->rx_skb = NULL;
  1077. }
  1078. test_and_clear_bit(FLG_TX_BUSY, &dch->Flags);
  1079. if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
  1080. del_timer(&dch->timer);
  1081. break;
  1082. case HW_POWERUP_REQ:
  1083. spin_lock_irqsave(&card->lock, flags);
  1084. ph_command(card, W_L1CMD_ECK);
  1085. spin_unlock_irqrestore(&card->lock, flags);
  1086. break;
  1087. case PH_ACTIVATE_IND:
  1088. test_and_set_bit(FLG_ACTIVE, &dch->Flags);
  1089. _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
  1090. GFP_ATOMIC);
  1091. break;
  1092. case PH_DEACTIVATE_IND:
  1093. test_and_clear_bit(FLG_ACTIVE, &dch->Flags);
  1094. _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
  1095. GFP_ATOMIC);
  1096. break;
  1097. default:
  1098. pr_debug("%s: %s unknown command %x\n", card->name,
  1099. __func__, cmd);
  1100. return -1;
  1101. }
  1102. return 0;
  1103. }
  1104. static int
  1105. open_dchannel(struct w6692_hw *card, struct channel_req *rq)
  1106. {
  1107. pr_debug("%s: %s dev(%d) open from %p\n", card->name, __func__,
  1108. card->dch.dev.id, __builtin_return_address(1));
  1109. if (rq->protocol != ISDN_P_TE_S0)
  1110. return -EINVAL;
  1111. if (rq->adr.channel == 1)
  1112. /* E-Channel not supported */
  1113. return -EINVAL;
  1114. rq->ch = &card->dch.dev.D;
  1115. rq->ch->protocol = rq->protocol;
  1116. if (card->dch.state == 7)
  1117. _queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY,
  1118. 0, NULL, GFP_KERNEL);
  1119. return 0;
  1120. }
  1121. static int
  1122. w6692_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
  1123. {
  1124. struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
  1125. struct dchannel *dch = container_of(dev, struct dchannel, dev);
  1126. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1127. struct channel_req *rq;
  1128. int err = 0;
  1129. pr_debug("%s: DCTRL: %x %p\n", card->name, cmd, arg);
  1130. switch (cmd) {
  1131. case OPEN_CHANNEL:
  1132. rq = arg;
  1133. if (rq->protocol == ISDN_P_TE_S0)
  1134. err = open_dchannel(card, rq);
  1135. else
  1136. err = open_bchannel(card, rq);
  1137. if (err)
  1138. break;
  1139. if (!try_module_get(THIS_MODULE))
  1140. pr_info("%s: cannot get module\n", card->name);
  1141. break;
  1142. case CLOSE_CHANNEL:
  1143. pr_debug("%s: dev(%d) close from %p\n", card->name,
  1144. dch->dev.id, __builtin_return_address(0));
  1145. module_put(THIS_MODULE);
  1146. break;
  1147. case CONTROL_CHANNEL:
  1148. err = channel_ctrl(card, arg);
  1149. break;
  1150. default:
  1151. pr_debug("%s: unknown DCTRL command %x\n", card->name, cmd);
  1152. return -EINVAL;
  1153. }
  1154. return err;
  1155. }
  1156. static int
  1157. setup_w6692(struct w6692_hw *card)
  1158. {
  1159. u32 val;
  1160. if (!request_region(card->addr, 256, card->name)) {
  1161. pr_info("%s: config port %x-%x already in use\n", card->name,
  1162. card->addr, card->addr + 255);
  1163. return -EIO;
  1164. }
  1165. W6692Version(card);
  1166. card->bc[0].addr = card->addr;
  1167. card->bc[1].addr = card->addr + 0x40;
  1168. val = ReadW6692(card, W_ISTA);
  1169. if (debug & DEBUG_HW)
  1170. pr_notice("%s ISTA=%02x\n", card->name, val);
  1171. val = ReadW6692(card, W_IMASK);
  1172. if (debug & DEBUG_HW)
  1173. pr_notice("%s IMASK=%02x\n", card->name, val);
  1174. val = ReadW6692(card, W_D_EXIR);
  1175. if (debug & DEBUG_HW)
  1176. pr_notice("%s D_EXIR=%02x\n", card->name, val);
  1177. val = ReadW6692(card, W_D_EXIM);
  1178. if (debug & DEBUG_HW)
  1179. pr_notice("%s D_EXIM=%02x\n", card->name, val);
  1180. val = ReadW6692(card, W_D_RSTA);
  1181. if (debug & DEBUG_HW)
  1182. pr_notice("%s D_RSTA=%02x\n", card->name, val);
  1183. return 0;
  1184. }
  1185. static void
  1186. release_card(struct w6692_hw *card)
  1187. {
  1188. u_long flags;
  1189. spin_lock_irqsave(&card->lock, flags);
  1190. disable_hwirq(card);
  1191. w6692_mode(&card->bc[0], ISDN_P_NONE);
  1192. w6692_mode(&card->bc[1], ISDN_P_NONE);
  1193. if ((card->fmask & led) || card->subtype == W6692_USR) {
  1194. card->xdata |= 0x04; /* LED OFF */
  1195. WriteW6692(card, W_XDATA, card->xdata);
  1196. }
  1197. spin_unlock_irqrestore(&card->lock, flags);
  1198. free_irq(card->irq, card);
  1199. l1_event(card->dch.l1, CLOSE_CHANNEL);
  1200. mISDN_unregister_device(&card->dch.dev);
  1201. release_region(card->addr, 256);
  1202. mISDN_freebchannel(&card->bc[1].bch);
  1203. mISDN_freebchannel(&card->bc[0].bch);
  1204. mISDN_freedchannel(&card->dch);
  1205. write_lock_irqsave(&card_lock, flags);
  1206. list_del(&card->list);
  1207. write_unlock_irqrestore(&card_lock, flags);
  1208. pci_disable_device(card->pdev);
  1209. pci_set_drvdata(card->pdev, NULL);
  1210. kfree(card);
  1211. }
  1212. static int
  1213. setup_instance(struct w6692_hw *card)
  1214. {
  1215. int i, err;
  1216. u_long flags;
  1217. snprintf(card->name, MISDN_MAX_IDLEN - 1, "w6692.%d", w6692_cnt + 1);
  1218. write_lock_irqsave(&card_lock, flags);
  1219. list_add_tail(&card->list, &Cards);
  1220. write_unlock_irqrestore(&card_lock, flags);
  1221. card->fmask = (1 << w6692_cnt);
  1222. _set_debug(card);
  1223. spin_lock_init(&card->lock);
  1224. mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, W6692_ph_bh);
  1225. card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0);
  1226. card->dch.dev.D.send = w6692_l2l1D;
  1227. card->dch.dev.D.ctrl = w6692_dctrl;
  1228. card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
  1229. (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK));
  1230. card->dch.hw = card;
  1231. card->dch.dev.nrbchan = 2;
  1232. for (i = 0; i < 2; i++) {
  1233. mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM);
  1234. card->bc[i].bch.hw = card;
  1235. card->bc[i].bch.nr = i + 1;
  1236. card->bc[i].bch.ch.nr = i + 1;
  1237. card->bc[i].bch.ch.send = w6692_l2l1B;
  1238. card->bc[i].bch.ch.ctrl = w6692_bctrl;
  1239. set_channelmap(i + 1, card->dch.dev.channelmap);
  1240. list_add(&card->bc[i].bch.ch.list, &card->dch.dev.bchannels);
  1241. }
  1242. err = setup_w6692(card);
  1243. if (err)
  1244. goto error_setup;
  1245. err = mISDN_register_device(&card->dch.dev, &card->pdev->dev,
  1246. card->name);
  1247. if (err)
  1248. goto error_reg;
  1249. err = init_card(card);
  1250. if (err)
  1251. goto error_init;
  1252. err = create_l1(&card->dch, w6692_l1callback);
  1253. if (!err) {
  1254. w6692_cnt++;
  1255. pr_notice("W6692 %d cards installed\n", w6692_cnt);
  1256. return 0;
  1257. }
  1258. free_irq(card->irq, card);
  1259. error_init:
  1260. mISDN_unregister_device(&card->dch.dev);
  1261. error_reg:
  1262. release_region(card->addr, 256);
  1263. error_setup:
  1264. mISDN_freebchannel(&card->bc[1].bch);
  1265. mISDN_freebchannel(&card->bc[0].bch);
  1266. mISDN_freedchannel(&card->dch);
  1267. write_lock_irqsave(&card_lock, flags);
  1268. list_del(&card->list);
  1269. write_unlock_irqrestore(&card_lock, flags);
  1270. kfree(card);
  1271. return err;
  1272. }
  1273. static int __devinit
  1274. w6692_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  1275. {
  1276. int err = -ENOMEM;
  1277. struct w6692_hw *card;
  1278. struct w6692map *m = (struct w6692map *)ent->driver_data;
  1279. card = kzalloc(sizeof(struct w6692_hw), GFP_KERNEL);
  1280. if (!card) {
  1281. pr_info("No kmem for w6692 card\n");
  1282. return err;
  1283. }
  1284. card->pdev = pdev;
  1285. card->subtype = m->subtype;
  1286. err = pci_enable_device(pdev);
  1287. if (err) {
  1288. kfree(card);
  1289. return err;
  1290. }
  1291. printk(KERN_INFO "mISDN_w6692: found adapter %s at %s\n",
  1292. m->name, pci_name(pdev));
  1293. card->addr = pci_resource_start(pdev, 1);
  1294. card->irq = pdev->irq;
  1295. pci_set_drvdata(pdev, card);
  1296. err = setup_instance(card);
  1297. if (err)
  1298. pci_set_drvdata(pdev, NULL);
  1299. return err;
  1300. }
  1301. static void __devexit
  1302. w6692_remove_pci(struct pci_dev *pdev)
  1303. {
  1304. struct w6692_hw *card = pci_get_drvdata(pdev);
  1305. if (card)
  1306. release_card(card);
  1307. else
  1308. if (debug)
  1309. pr_notice("%s: drvdata already removed\n", __func__);
  1310. }
  1311. static struct pci_device_id w6692_ids[] = {
  1312. { PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH,
  1313. PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[0]},
  1314. { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
  1315. PCI_VENDOR_ID_USR, PCI_DEVICE_ID_USR_6692, 0, 0,
  1316. (ulong)&w6692_map[2]},
  1317. { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
  1318. PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[1]},
  1319. { }
  1320. };
  1321. MODULE_DEVICE_TABLE(pci, w6692_ids);
  1322. static struct pci_driver w6692_driver = {
  1323. .name = "w6692",
  1324. .probe = w6692_probe,
  1325. .remove = __devexit_p(w6692_remove_pci),
  1326. .id_table = w6692_ids,
  1327. };
  1328. static int __init w6692_init(void)
  1329. {
  1330. int err;
  1331. pr_notice("Winbond W6692 PCI driver Rev. %s\n", W6692_REV);
  1332. err = pci_register_driver(&w6692_driver);
  1333. return err;
  1334. }
  1335. static void __exit w6692_cleanup(void)
  1336. {
  1337. pci_unregister_driver(&w6692_driver);
  1338. }
  1339. module_init(w6692_init);
  1340. module_exit(w6692_cleanup);