msm_rotator.c 51 KB

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  1. /* Copyright (c) 2009-2013, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. */
  13. #include <linux/platform_device.h>
  14. #include <linux/cdev.h>
  15. #include <linux/list.h>
  16. #include <linux/module.h>
  17. #include <linux/fs.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/sched.h>
  20. #include <linux/uaccess.h>
  21. #include <linux/clk.h>
  22. #include <linux/msm_rotator.h>
  23. #include <linux/io.h>
  24. #include <mach/msm_rotator_imem.h>
  25. #include <linux/ktime.h>
  26. #include <linux/workqueue.h>
  27. #include <linux/file.h>
  28. #include <linux/major.h>
  29. #include <linux/regulator/consumer.h>
  30. #include <linux/msm_ion.h>
  31. #ifdef CONFIG_MSM_BUS_SCALING
  32. #include <mach/msm_bus.h>
  33. #include <mach/msm_bus_board.h>
  34. #endif
  35. #include <mach/iommu_domains.h>
  36. #define DRIVER_NAME "msm_rotator"
  37. #define MSM_ROTATOR_BASE (msm_rotator_dev->io_base)
  38. #define MSM_ROTATOR_INTR_ENABLE (MSM_ROTATOR_BASE+0x0020)
  39. #define MSM_ROTATOR_INTR_STATUS (MSM_ROTATOR_BASE+0x0024)
  40. #define MSM_ROTATOR_INTR_CLEAR (MSM_ROTATOR_BASE+0x0028)
  41. #define MSM_ROTATOR_START (MSM_ROTATOR_BASE+0x0030)
  42. #define MSM_ROTATOR_MAX_BURST_SIZE (MSM_ROTATOR_BASE+0x0050)
  43. #define MSM_ROTATOR_HW_VERSION (MSM_ROTATOR_BASE+0x0070)
  44. #define MSM_ROTATOR_SW_RESET (MSM_ROTATOR_BASE+0x0074)
  45. #define MSM_ROTATOR_SRC_SIZE (MSM_ROTATOR_BASE+0x1108)
  46. #define MSM_ROTATOR_SRCP0_ADDR (MSM_ROTATOR_BASE+0x110c)
  47. #define MSM_ROTATOR_SRCP1_ADDR (MSM_ROTATOR_BASE+0x1110)
  48. #define MSM_ROTATOR_SRCP2_ADDR (MSM_ROTATOR_BASE+0x1114)
  49. #define MSM_ROTATOR_SRC_YSTRIDE1 (MSM_ROTATOR_BASE+0x111c)
  50. #define MSM_ROTATOR_SRC_YSTRIDE2 (MSM_ROTATOR_BASE+0x1120)
  51. #define MSM_ROTATOR_SRC_FORMAT (MSM_ROTATOR_BASE+0x1124)
  52. #define MSM_ROTATOR_SRC_UNPACK_PATTERN1 (MSM_ROTATOR_BASE+0x1128)
  53. #define MSM_ROTATOR_SUB_BLOCK_CFG (MSM_ROTATOR_BASE+0x1138)
  54. #define MSM_ROTATOR_OUT_PACK_PATTERN1 (MSM_ROTATOR_BASE+0x1154)
  55. #define MSM_ROTATOR_OUTP0_ADDR (MSM_ROTATOR_BASE+0x1168)
  56. #define MSM_ROTATOR_OUTP1_ADDR (MSM_ROTATOR_BASE+0x116c)
  57. #define MSM_ROTATOR_OUTP2_ADDR (MSM_ROTATOR_BASE+0x1170)
  58. #define MSM_ROTATOR_OUT_YSTRIDE1 (MSM_ROTATOR_BASE+0x1178)
  59. #define MSM_ROTATOR_OUT_YSTRIDE2 (MSM_ROTATOR_BASE+0x117c)
  60. #define MSM_ROTATOR_SRC_XY (MSM_ROTATOR_BASE+0x1200)
  61. #define MSM_ROTATOR_SRC_IMAGE_SIZE (MSM_ROTATOR_BASE+0x1208)
  62. #define MSM_ROTATOR_MAX_ROT 0x07
  63. #define MSM_ROTATOR_MAX_H 0x1fff
  64. #define MSM_ROTATOR_MAX_W 0x1fff
  65. /* from lsb to msb */
  66. #define GET_PACK_PATTERN(a, x, y, z, bit) \
  67. (((a)<<((bit)*3))|((x)<<((bit)*2))|((y)<<(bit))|(z))
  68. #define CLR_G 0x0
  69. #define CLR_B 0x1
  70. #define CLR_R 0x2
  71. #define CLR_ALPHA 0x3
  72. #define CLR_Y CLR_G
  73. #define CLR_CB CLR_B
  74. #define CLR_CR CLR_R
  75. #define ROTATIONS_TO_BITMASK(r) ((((r) & MDP_ROT_90) ? 1 : 0) | \
  76. (((r) & MDP_FLIP_LR) ? 2 : 0) | \
  77. (((r) & MDP_FLIP_UD) ? 4 : 0))
  78. #define IMEM_NO_OWNER -1;
  79. #define MAX_SESSIONS 16
  80. #define INVALID_SESSION -1
  81. #define VERSION_KEY_MASK 0xFFFFFF00
  82. #define MAX_DOWNSCALE_RATIO 3
  83. #define ROTATOR_REVISION_V0 0
  84. #define ROTATOR_REVISION_V1 1
  85. #define ROTATOR_REVISION_V2 2
  86. #define ROTATOR_REVISION_NONE 0xffffffff
  87. uint32_t rotator_hw_revision;
  88. static char rot_iommu_split_domain;
  89. /*
  90. * rotator_hw_revision:
  91. * 0 == 7x30
  92. * 1 == 8x60
  93. * 2 == 8960
  94. *
  95. */
  96. struct tile_parm {
  97. unsigned int width; /* tile's width */
  98. unsigned int height; /* tile's height */
  99. unsigned int row_tile_w; /* tiles per row's width */
  100. unsigned int row_tile_h; /* tiles per row's height */
  101. };
  102. struct msm_rotator_mem_planes {
  103. unsigned int num_planes;
  104. unsigned int plane_size[4];
  105. unsigned int total_size;
  106. };
  107. #define checkoffset(offset, size, max_size) \
  108. ((size) > (max_size) || (offset) > ((max_size) - (size)))
  109. struct msm_rotator_fd_info {
  110. int pid;
  111. int ref_cnt;
  112. struct list_head list;
  113. };
  114. struct msm_rotator_dev {
  115. void __iomem *io_base;
  116. int irq;
  117. struct msm_rotator_img_info *img_info[MAX_SESSIONS];
  118. struct clk *core_clk;
  119. struct msm_rotator_fd_info *fd_info[MAX_SESSIONS];
  120. struct list_head fd_list;
  121. struct clk *pclk;
  122. int rot_clk_state;
  123. struct regulator *regulator;
  124. struct delayed_work rot_clk_work;
  125. struct clk *imem_clk;
  126. int imem_clk_state;
  127. struct delayed_work imem_clk_work;
  128. struct platform_device *pdev;
  129. struct cdev cdev;
  130. struct device *device;
  131. struct class *class;
  132. dev_t dev_num;
  133. int processing;
  134. int last_session_idx;
  135. struct mutex rotator_lock;
  136. struct mutex imem_lock;
  137. int imem_owner;
  138. wait_queue_head_t wq;
  139. struct ion_client *client;
  140. #ifdef CONFIG_MSM_BUS_SCALING
  141. uint32_t bus_client_handle;
  142. #endif
  143. };
  144. #define COMPONENT_5BITS 1
  145. #define COMPONENT_6BITS 2
  146. #define COMPONENT_8BITS 3
  147. static struct msm_rotator_dev *msm_rotator_dev;
  148. enum {
  149. CLK_EN,
  150. CLK_DIS,
  151. CLK_SUSPEND,
  152. };
  153. int msm_rotator_iommu_map_buf(int mem_id, int domain,
  154. unsigned long *start, unsigned long *len,
  155. struct ion_handle **pihdl, unsigned int secure)
  156. {
  157. if (!msm_rotator_dev->client)
  158. return -EINVAL;
  159. *pihdl = ion_import_dma_buf(msm_rotator_dev->client, mem_id);
  160. if (IS_ERR_OR_NULL(*pihdl)) {
  161. pr_err("ion_import_dma_buf() failed\n");
  162. return PTR_ERR(*pihdl);
  163. }
  164. pr_debug("%s(): ion_hdl %p, ion_fd %d\n", __func__, *pihdl, mem_id);
  165. if (rot_iommu_split_domain) {
  166. if (secure) {
  167. if (ion_phys(msm_rotator_dev->client,
  168. *pihdl, start, (unsigned *)len)) {
  169. pr_err("%s:%d: ion_phys map failed\n",
  170. __func__, __LINE__);
  171. return -ENOMEM;
  172. }
  173. } else {
  174. if (ion_map_iommu(msm_rotator_dev->client,
  175. *pihdl, domain, GEN_POOL,
  176. SZ_4K, 0, start, len, 0,
  177. ION_IOMMU_UNMAP_DELAYED)) {
  178. pr_err("ion_map_iommu() failed\n");
  179. return -EINVAL;
  180. }
  181. }
  182. } else {
  183. if (ion_map_iommu(msm_rotator_dev->client,
  184. *pihdl, ROTATOR_SRC_DOMAIN, GEN_POOL,
  185. SZ_4K, 0, start, len, 0, ION_IOMMU_UNMAP_DELAYED)) {
  186. pr_err("ion_map_iommu() failed\n");
  187. return -EINVAL;
  188. }
  189. }
  190. pr_debug("%s(): mem_id %d, start 0x%lx, len 0x%lx\n",
  191. __func__, mem_id, *start, *len);
  192. return 0;
  193. }
  194. int msm_rotator_imem_allocate(int requestor)
  195. {
  196. int rc = 0;
  197. #ifdef CONFIG_MSM_ROTATOR_USE_IMEM
  198. switch (requestor) {
  199. case ROTATOR_REQUEST:
  200. if (mutex_trylock(&msm_rotator_dev->imem_lock)) {
  201. msm_rotator_dev->imem_owner = ROTATOR_REQUEST;
  202. rc = 1;
  203. } else
  204. rc = 0;
  205. break;
  206. case JPEG_REQUEST:
  207. mutex_lock(&msm_rotator_dev->imem_lock);
  208. msm_rotator_dev->imem_owner = JPEG_REQUEST;
  209. rc = 1;
  210. break;
  211. default:
  212. rc = 0;
  213. }
  214. #else
  215. if (requestor == JPEG_REQUEST)
  216. rc = 1;
  217. #endif
  218. if (rc == 1) {
  219. cancel_delayed_work(&msm_rotator_dev->imem_clk_work);
  220. if (msm_rotator_dev->imem_clk_state != CLK_EN
  221. && msm_rotator_dev->imem_clk) {
  222. clk_prepare_enable(msm_rotator_dev->imem_clk);
  223. msm_rotator_dev->imem_clk_state = CLK_EN;
  224. }
  225. }
  226. return rc;
  227. }
  228. EXPORT_SYMBOL(msm_rotator_imem_allocate);
  229. void msm_rotator_imem_free(int requestor)
  230. {
  231. #ifdef CONFIG_MSM_ROTATOR_USE_IMEM
  232. if (msm_rotator_dev->imem_owner == requestor) {
  233. schedule_delayed_work(&msm_rotator_dev->imem_clk_work, HZ);
  234. mutex_unlock(&msm_rotator_dev->imem_lock);
  235. }
  236. #else
  237. if (requestor == JPEG_REQUEST)
  238. schedule_delayed_work(&msm_rotator_dev->imem_clk_work, HZ);
  239. #endif
  240. }
  241. EXPORT_SYMBOL(msm_rotator_imem_free);
  242. static void msm_rotator_imem_clk_work_f(struct work_struct *work)
  243. {
  244. #ifdef CONFIG_MSM_ROTATOR_USE_IMEM
  245. if (mutex_trylock(&msm_rotator_dev->imem_lock)) {
  246. if (msm_rotator_dev->imem_clk_state == CLK_EN
  247. && msm_rotator_dev->imem_clk) {
  248. clk_disable_unprepare(msm_rotator_dev->imem_clk);
  249. msm_rotator_dev->imem_clk_state = CLK_DIS;
  250. } else if (msm_rotator_dev->imem_clk_state == CLK_SUSPEND)
  251. msm_rotator_dev->imem_clk_state = CLK_DIS;
  252. mutex_unlock(&msm_rotator_dev->imem_lock);
  253. }
  254. #endif
  255. }
  256. /* enable clocks needed by rotator block */
  257. static void enable_rot_clks(void)
  258. {
  259. if (msm_rotator_dev->regulator)
  260. regulator_enable(msm_rotator_dev->regulator);
  261. if (msm_rotator_dev->core_clk != NULL)
  262. clk_prepare_enable(msm_rotator_dev->core_clk);
  263. if (msm_rotator_dev->pclk != NULL)
  264. clk_prepare_enable(msm_rotator_dev->pclk);
  265. }
  266. /* disable clocks needed by rotator block */
  267. static void disable_rot_clks(void)
  268. {
  269. if (msm_rotator_dev->core_clk != NULL)
  270. clk_disable_unprepare(msm_rotator_dev->core_clk);
  271. if (msm_rotator_dev->pclk != NULL)
  272. clk_disable_unprepare(msm_rotator_dev->pclk);
  273. if (msm_rotator_dev->regulator)
  274. regulator_disable(msm_rotator_dev->regulator);
  275. }
  276. static void msm_rotator_rot_clk_work_f(struct work_struct *work)
  277. {
  278. if(msm_rotator_dev->processing == 1)
  279. pr_err("%s(): msm_rotator is now on processing\n", __func__);
  280. if (mutex_trylock(&msm_rotator_dev->rotator_lock)) {
  281. if ((msm_rotator_dev->rot_clk_state == CLK_EN) && (msm_rotator_dev->processing == 0)) {
  282. disable_rot_clks();
  283. msm_rotator_dev->rot_clk_state = CLK_DIS;
  284. } else if (msm_rotator_dev->rot_clk_state == CLK_SUSPEND)
  285. msm_rotator_dev->rot_clk_state = CLK_DIS;
  286. mutex_unlock(&msm_rotator_dev->rotator_lock);
  287. }
  288. }
  289. static irqreturn_t msm_rotator_isr(int irq, void *dev_id)
  290. {
  291. if (msm_rotator_dev->processing) {
  292. msm_rotator_dev->processing = 0;
  293. wake_up(&msm_rotator_dev->wq);
  294. } else
  295. printk(KERN_WARNING "%s: unexpected interrupt\n", DRIVER_NAME);
  296. return IRQ_HANDLED;
  297. }
  298. static unsigned int tile_size(unsigned int src_width,
  299. unsigned int src_height,
  300. const struct tile_parm *tp)
  301. {
  302. unsigned int tile_w, tile_h;
  303. unsigned int row_num_w, row_num_h;
  304. tile_w = tp->width * tp->row_tile_w;
  305. tile_h = tp->height * tp->row_tile_h;
  306. row_num_w = (src_width + tile_w - 1) / tile_w;
  307. row_num_h = (src_height + tile_h - 1) / tile_h;
  308. return ((row_num_w * row_num_h * tile_w * tile_h) + 8191) & ~8191;
  309. }
  310. static int get_bpp(int format)
  311. {
  312. switch (format) {
  313. case MDP_RGB_565:
  314. case MDP_BGR_565:
  315. return 2;
  316. case MDP_XRGB_8888:
  317. case MDP_ARGB_8888:
  318. case MDP_RGBA_8888:
  319. case MDP_BGRA_8888:
  320. case MDP_RGBX_8888:
  321. case MDP_BGRX_8888:
  322. return 4;
  323. case MDP_Y_CBCR_H2V2:
  324. case MDP_Y_CRCB_H2V2:
  325. case MDP_Y_CB_CR_H2V2:
  326. case MDP_Y_CR_CB_H2V2:
  327. case MDP_Y_CR_CB_GH2V2:
  328. case MDP_Y_CRCB_H2V2_TILE:
  329. case MDP_Y_CBCR_H2V2_TILE:
  330. return 1;
  331. case MDP_RGB_888:
  332. case MDP_YCBCR_H1V1:
  333. case MDP_YCRCB_H1V1:
  334. return 3;
  335. case MDP_YCRYCB_H2V1:
  336. return 2;/* YCrYCb interleave */
  337. case MDP_Y_CRCB_H2V1:
  338. case MDP_Y_CBCR_H2V1:
  339. return 1;
  340. default:
  341. return -1;
  342. }
  343. }
  344. static int msm_rotator_get_plane_sizes(uint32_t format, uint32_t w, uint32_t h,
  345. struct msm_rotator_mem_planes *p)
  346. {
  347. /*
  348. * each row of samsung tile consists of two tiles in height
  349. * and two tiles in width which means width should align to
  350. * 64 x 2 bytes and height should align to 32 x 2 bytes.
  351. * video decoder generate two tiles in width and one tile
  352. * in height which ends up height align to 32 X 1 bytes.
  353. */
  354. const struct tile_parm tile = {64, 32, 2, 1};
  355. int i;
  356. if (p == NULL)
  357. return -EINVAL;
  358. if ((w > MSM_ROTATOR_MAX_W) || (h > MSM_ROTATOR_MAX_H))
  359. return -ERANGE;
  360. memset(p, 0, sizeof(*p));
  361. switch (format) {
  362. case MDP_XRGB_8888:
  363. case MDP_ARGB_8888:
  364. case MDP_RGBA_8888:
  365. case MDP_BGRA_8888:
  366. case MDP_RGBX_8888:
  367. case MDP_BGRX_8888:
  368. case MDP_RGB_888:
  369. case MDP_RGB_565:
  370. case MDP_BGR_565:
  371. case MDP_YCRYCB_H2V1:
  372. case MDP_YCBCR_H1V1:
  373. case MDP_YCRCB_H1V1:
  374. p->num_planes = 1;
  375. p->plane_size[0] = w * h * get_bpp(format);
  376. break;
  377. case MDP_Y_CRCB_H2V1:
  378. case MDP_Y_CBCR_H2V1:
  379. case MDP_Y_CRCB_H1V2:
  380. case MDP_Y_CBCR_H1V2:
  381. p->num_planes = 2;
  382. p->plane_size[0] = w * h;
  383. p->plane_size[1] = w * h;
  384. break;
  385. case MDP_Y_CBCR_H2V2:
  386. case MDP_Y_CRCB_H2V2:
  387. p->num_planes = 2;
  388. p->plane_size[0] = w * h;
  389. p->plane_size[1] = w * h / 2;
  390. break;
  391. case MDP_Y_CRCB_H2V2_TILE:
  392. case MDP_Y_CBCR_H2V2_TILE:
  393. p->num_planes = 2;
  394. p->plane_size[0] = tile_size(w, h, &tile);
  395. p->plane_size[1] = tile_size(w, h/2, &tile);
  396. break;
  397. case MDP_Y_CB_CR_H2V2:
  398. case MDP_Y_CR_CB_H2V2:
  399. p->num_planes = 3;
  400. p->plane_size[0] = w * h;
  401. p->plane_size[1] = (w / 2) * (h / 2);
  402. p->plane_size[2] = (w / 2) * (h / 2);
  403. break;
  404. case MDP_Y_CR_CB_GH2V2:
  405. p->num_planes = 3;
  406. p->plane_size[0] = ALIGN(w, 16) * h;
  407. p->plane_size[1] = ALIGN(w / 2, 16) * (h / 2);
  408. p->plane_size[2] = ALIGN(w / 2, 16) * (h / 2);
  409. break;
  410. default:
  411. return -EINVAL;
  412. }
  413. for (i = 0; i < p->num_planes; i++)
  414. p->total_size += p->plane_size[i];
  415. return 0;
  416. }
  417. static int msm_rotator_ycxcx_h2v1(struct msm_rotator_img_info *info,
  418. unsigned int in_paddr,
  419. unsigned int out_paddr,
  420. unsigned int use_imem,
  421. int new_session,
  422. unsigned int in_chroma_paddr,
  423. unsigned int out_chroma_paddr)
  424. {
  425. int bpp;
  426. uint32_t dst_format;
  427. switch (info->src.format) {
  428. case MDP_Y_CRCB_H2V1:
  429. if (info->rotations & MDP_ROT_90)
  430. dst_format = MDP_Y_CRCB_H1V2;
  431. else
  432. dst_format = info->src.format;
  433. break;
  434. case MDP_Y_CBCR_H2V1:
  435. if (info->rotations & MDP_ROT_90)
  436. dst_format = MDP_Y_CBCR_H1V2;
  437. else
  438. dst_format = info->src.format;
  439. break;
  440. default:
  441. return -EINVAL;
  442. }
  443. if (info->dst.format != dst_format)
  444. return -EINVAL;
  445. bpp = get_bpp(info->src.format);
  446. if (bpp < 0)
  447. return -ENOTTY;
  448. iowrite32(in_paddr, MSM_ROTATOR_SRCP0_ADDR);
  449. iowrite32(in_chroma_paddr, MSM_ROTATOR_SRCP1_ADDR);
  450. iowrite32(out_paddr +
  451. ((info->dst_y * info->dst.width) + info->dst_x),
  452. MSM_ROTATOR_OUTP0_ADDR);
  453. iowrite32(out_chroma_paddr +
  454. ((info->dst_y * info->dst.width) + info->dst_x),
  455. MSM_ROTATOR_OUTP1_ADDR);
  456. if (new_session) {
  457. iowrite32(info->src.width |
  458. info->src.width << 16,
  459. MSM_ROTATOR_SRC_YSTRIDE1);
  460. if (info->rotations & MDP_ROT_90)
  461. iowrite32(info->dst.width |
  462. info->dst.width*2 << 16,
  463. MSM_ROTATOR_OUT_YSTRIDE1);
  464. else
  465. iowrite32(info->dst.width |
  466. info->dst.width << 16,
  467. MSM_ROTATOR_OUT_YSTRIDE1);
  468. if (info->src.format == MDP_Y_CBCR_H2V1) {
  469. iowrite32(GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8),
  470. MSM_ROTATOR_SRC_UNPACK_PATTERN1);
  471. iowrite32(GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8),
  472. MSM_ROTATOR_OUT_PACK_PATTERN1);
  473. } else {
  474. iowrite32(GET_PACK_PATTERN(0, 0, CLR_CR, CLR_CB, 8),
  475. MSM_ROTATOR_SRC_UNPACK_PATTERN1);
  476. iowrite32(GET_PACK_PATTERN(0, 0, CLR_CR, CLR_CB, 8),
  477. MSM_ROTATOR_OUT_PACK_PATTERN1);
  478. }
  479. iowrite32((1 << 18) | /* chroma sampling 1=H2V1 */
  480. (ROTATIONS_TO_BITMASK(info->rotations) << 9) |
  481. 1 << 8 | /* ROT_EN */
  482. info->downscale_ratio << 2 | /* downscale v ratio */
  483. info->downscale_ratio, /* downscale h ratio */
  484. MSM_ROTATOR_SUB_BLOCK_CFG);
  485. iowrite32(0 << 29 | /* frame format 0 = linear */
  486. (use_imem ? 0 : 1) << 22 | /* tile size */
  487. 2 << 19 | /* fetch planes 2 = pseudo */
  488. 0 << 18 | /* unpack align */
  489. 1 << 17 | /* unpack tight */
  490. 1 << 13 | /* unpack count 0=1 component */
  491. (bpp-1) << 9 | /* src Bpp 0=1 byte ... */
  492. 0 << 8 | /* has alpha */
  493. 0 << 6 | /* alpha bits 3=8bits */
  494. 3 << 4 | /* R/Cr bits 1=5 2=6 3=8 */
  495. 3 << 2 | /* B/Cb bits 1=5 2=6 3=8 */
  496. 3 << 0, /* G/Y bits 1=5 2=6 3=8 */
  497. MSM_ROTATOR_SRC_FORMAT);
  498. }
  499. return 0;
  500. }
  501. static int msm_rotator_ycxcx_h2v2(struct msm_rotator_img_info *info,
  502. unsigned int in_paddr,
  503. unsigned int out_paddr,
  504. unsigned int use_imem,
  505. int new_session,
  506. unsigned int in_chroma_paddr,
  507. unsigned int out_chroma_paddr,
  508. unsigned int in_chroma2_paddr)
  509. {
  510. uint32_t dst_format;
  511. int is_tile = 0;
  512. switch (info->src.format) {
  513. case MDP_Y_CRCB_H2V2_TILE:
  514. is_tile = 1;
  515. case MDP_Y_CR_CB_H2V2:
  516. case MDP_Y_CR_CB_GH2V2:
  517. case MDP_Y_CRCB_H2V2:
  518. dst_format = MDP_Y_CRCB_H2V2;
  519. break;
  520. case MDP_Y_CBCR_H2V2_TILE:
  521. is_tile = 1;
  522. case MDP_Y_CB_CR_H2V2:
  523. case MDP_Y_CBCR_H2V2:
  524. dst_format = MDP_Y_CBCR_H2V2;
  525. break;
  526. default:
  527. return -EINVAL;
  528. }
  529. if (info->dst.format != dst_format)
  530. return -EINVAL;
  531. /* rotator expects YCbCr for planar input format */
  532. if ((info->src.format == MDP_Y_CR_CB_H2V2 ||
  533. info->src.format == MDP_Y_CR_CB_GH2V2) &&
  534. rotator_hw_revision < ROTATOR_REVISION_V2)
  535. swap(in_chroma_paddr, in_chroma2_paddr);
  536. iowrite32(in_paddr, MSM_ROTATOR_SRCP0_ADDR);
  537. iowrite32(in_chroma_paddr, MSM_ROTATOR_SRCP1_ADDR);
  538. iowrite32(in_chroma2_paddr, MSM_ROTATOR_SRCP2_ADDR);
  539. iowrite32(out_paddr +
  540. ((info->dst_y * info->dst.width) + info->dst_x),
  541. MSM_ROTATOR_OUTP0_ADDR);
  542. iowrite32(out_chroma_paddr +
  543. ((info->dst_y * info->dst.width)/2 + info->dst_x),
  544. MSM_ROTATOR_OUTP1_ADDR);
  545. if (new_session) {
  546. if (in_chroma2_paddr) {
  547. if (info->src.format == MDP_Y_CR_CB_GH2V2) {
  548. iowrite32(ALIGN(info->src.width, 16) |
  549. ALIGN((info->src.width / 2), 16) << 16,
  550. MSM_ROTATOR_SRC_YSTRIDE1);
  551. iowrite32(ALIGN((info->src.width / 2), 16),
  552. MSM_ROTATOR_SRC_YSTRIDE2);
  553. } else {
  554. iowrite32(info->src.width |
  555. (info->src.width / 2) << 16,
  556. MSM_ROTATOR_SRC_YSTRIDE1);
  557. iowrite32((info->src.width / 2),
  558. MSM_ROTATOR_SRC_YSTRIDE2);
  559. }
  560. } else {
  561. iowrite32(info->src.width |
  562. info->src.width << 16,
  563. MSM_ROTATOR_SRC_YSTRIDE1);
  564. }
  565. iowrite32(info->dst.width |
  566. info->dst.width << 16,
  567. MSM_ROTATOR_OUT_YSTRIDE1);
  568. if (dst_format == MDP_Y_CBCR_H2V2) {
  569. iowrite32(GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8),
  570. MSM_ROTATOR_SRC_UNPACK_PATTERN1);
  571. iowrite32(GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8),
  572. MSM_ROTATOR_OUT_PACK_PATTERN1);
  573. } else {
  574. iowrite32(GET_PACK_PATTERN(0, 0, CLR_CR, CLR_CB, 8),
  575. MSM_ROTATOR_SRC_UNPACK_PATTERN1);
  576. iowrite32(GET_PACK_PATTERN(0, 0, CLR_CR, CLR_CB, 8),
  577. MSM_ROTATOR_OUT_PACK_PATTERN1);
  578. }
  579. iowrite32((3 << 18) | /* chroma sampling 3=4:2:0 */
  580. (ROTATIONS_TO_BITMASK(info->rotations) << 9) |
  581. 1 << 8 | /* ROT_EN */
  582. info->downscale_ratio << 2 | /* downscale v ratio */
  583. info->downscale_ratio, /* downscale h ratio */
  584. MSM_ROTATOR_SUB_BLOCK_CFG);
  585. iowrite32((is_tile ? 2 : 0) << 29 | /* frame format */
  586. (use_imem ? 0 : 1) << 22 | /* tile size */
  587. (in_chroma2_paddr ? 1 : 2) << 19 | /* fetch planes */
  588. 0 << 18 | /* unpack align */
  589. 1 << 17 | /* unpack tight */
  590. 1 << 13 | /* unpack count 0=1 component */
  591. 0 << 9 | /* src Bpp 0=1 byte ... */
  592. 0 << 8 | /* has alpha */
  593. 0 << 6 | /* alpha bits 3=8bits */
  594. 3 << 4 | /* R/Cr bits 1=5 2=6 3=8 */
  595. 3 << 2 | /* B/Cb bits 1=5 2=6 3=8 */
  596. 3 << 0, /* G/Y bits 1=5 2=6 3=8 */
  597. MSM_ROTATOR_SRC_FORMAT);
  598. }
  599. return 0;
  600. }
  601. static int msm_rotator_ycrycb(struct msm_rotator_img_info *info,
  602. unsigned int in_paddr,
  603. unsigned int out_paddr,
  604. unsigned int use_imem,
  605. int new_session,
  606. unsigned int out_chroma_paddr)
  607. {
  608. int bpp;
  609. uint32_t dst_format;
  610. if (info->src.format == MDP_YCRYCB_H2V1) {
  611. if (info->rotations & MDP_ROT_90)
  612. dst_format = MDP_Y_CRCB_H1V2;
  613. else
  614. dst_format = MDP_Y_CRCB_H2V1;
  615. } else
  616. return -EINVAL;
  617. if (info->dst.format != dst_format)
  618. return -EINVAL;
  619. bpp = get_bpp(info->src.format);
  620. if (bpp < 0)
  621. return -ENOTTY;
  622. iowrite32(in_paddr, MSM_ROTATOR_SRCP0_ADDR);
  623. iowrite32(out_paddr +
  624. ((info->dst_y * info->dst.width) + info->dst_x),
  625. MSM_ROTATOR_OUTP0_ADDR);
  626. iowrite32(out_chroma_paddr +
  627. ((info->dst_y * info->dst.width)/2 + info->dst_x),
  628. MSM_ROTATOR_OUTP1_ADDR);
  629. if (new_session) {
  630. iowrite32(info->src.width * bpp,
  631. MSM_ROTATOR_SRC_YSTRIDE1);
  632. if (info->rotations & MDP_ROT_90)
  633. iowrite32(info->dst.width |
  634. (info->dst.width*2) << 16,
  635. MSM_ROTATOR_OUT_YSTRIDE1);
  636. else
  637. iowrite32(info->dst.width |
  638. (info->dst.width) << 16,
  639. MSM_ROTATOR_OUT_YSTRIDE1);
  640. iowrite32(GET_PACK_PATTERN(CLR_Y, CLR_CR, CLR_Y, CLR_CB, 8),
  641. MSM_ROTATOR_SRC_UNPACK_PATTERN1);
  642. iowrite32(GET_PACK_PATTERN(0, 0, CLR_CR, CLR_CB, 8),
  643. MSM_ROTATOR_OUT_PACK_PATTERN1);
  644. iowrite32((1 << 18) | /* chroma sampling 1=H2V1 */
  645. (ROTATIONS_TO_BITMASK(info->rotations) << 9) |
  646. 1 << 8 | /* ROT_EN */
  647. info->downscale_ratio << 2 | /* downscale v ratio */
  648. info->downscale_ratio, /* downscale h ratio */
  649. MSM_ROTATOR_SUB_BLOCK_CFG);
  650. iowrite32(0 << 29 | /* frame format 0 = linear */
  651. (use_imem ? 0 : 1) << 22 | /* tile size */
  652. 0 << 19 | /* fetch planes 0=interleaved */
  653. 0 << 18 | /* unpack align */
  654. 1 << 17 | /* unpack tight */
  655. 3 << 13 | /* unpack count 0=1 component */
  656. (bpp-1) << 9 | /* src Bpp 0=1 byte ... */
  657. 0 << 8 | /* has alpha */
  658. 0 << 6 | /* alpha bits 3=8bits */
  659. 3 << 4 | /* R/Cr bits 1=5 2=6 3=8 */
  660. 3 << 2 | /* B/Cb bits 1=5 2=6 3=8 */
  661. 3 << 0, /* G/Y bits 1=5 2=6 3=8 */
  662. MSM_ROTATOR_SRC_FORMAT);
  663. }
  664. return 0;
  665. }
  666. static int msm_rotator_rgb_types(struct msm_rotator_img_info *info,
  667. unsigned int in_paddr,
  668. unsigned int out_paddr,
  669. unsigned int use_imem,
  670. int new_session)
  671. {
  672. int bpp, abits, rbits, gbits, bbits;
  673. if (info->src.format != info->dst.format)
  674. return -EINVAL;
  675. bpp = get_bpp(info->src.format);
  676. if (bpp < 0)
  677. return -ENOTTY;
  678. iowrite32(in_paddr, MSM_ROTATOR_SRCP0_ADDR);
  679. iowrite32(out_paddr +
  680. ((info->dst_y * info->dst.width) + info->dst_x) * bpp,
  681. MSM_ROTATOR_OUTP0_ADDR);
  682. if (new_session) {
  683. iowrite32(info->src.width * bpp, MSM_ROTATOR_SRC_YSTRIDE1);
  684. iowrite32(info->dst.width * bpp, MSM_ROTATOR_OUT_YSTRIDE1);
  685. iowrite32((0 << 18) | /* chroma sampling 0=rgb */
  686. (ROTATIONS_TO_BITMASK(info->rotations) << 9) |
  687. 1 << 8 | /* ROT_EN */
  688. info->downscale_ratio << 2 | /* downscale v ratio */
  689. info->downscale_ratio, /* downscale h ratio */
  690. MSM_ROTATOR_SUB_BLOCK_CFG);
  691. switch (info->src.format) {
  692. case MDP_RGB_565:
  693. iowrite32(GET_PACK_PATTERN(0, CLR_R, CLR_G, CLR_B, 8),
  694. MSM_ROTATOR_SRC_UNPACK_PATTERN1);
  695. iowrite32(GET_PACK_PATTERN(0, CLR_R, CLR_G, CLR_B, 8),
  696. MSM_ROTATOR_OUT_PACK_PATTERN1);
  697. abits = 0;
  698. rbits = COMPONENT_5BITS;
  699. gbits = COMPONENT_6BITS;
  700. bbits = COMPONENT_5BITS;
  701. break;
  702. case MDP_BGR_565:
  703. iowrite32(GET_PACK_PATTERN(0, CLR_B, CLR_G, CLR_R, 8),
  704. MSM_ROTATOR_SRC_UNPACK_PATTERN1);
  705. iowrite32(GET_PACK_PATTERN(0, CLR_B, CLR_G, CLR_R, 8),
  706. MSM_ROTATOR_OUT_PACK_PATTERN1);
  707. abits = 0;
  708. rbits = COMPONENT_5BITS;
  709. gbits = COMPONENT_6BITS;
  710. bbits = COMPONENT_5BITS;
  711. break;
  712. case MDP_RGB_888:
  713. case MDP_YCBCR_H1V1:
  714. case MDP_YCRCB_H1V1:
  715. iowrite32(GET_PACK_PATTERN(0, CLR_R, CLR_G, CLR_B, 8),
  716. MSM_ROTATOR_SRC_UNPACK_PATTERN1);
  717. iowrite32(GET_PACK_PATTERN(0, CLR_R, CLR_G, CLR_B, 8),
  718. MSM_ROTATOR_OUT_PACK_PATTERN1);
  719. abits = 0;
  720. rbits = COMPONENT_8BITS;
  721. gbits = COMPONENT_8BITS;
  722. bbits = COMPONENT_8BITS;
  723. break;
  724. case MDP_ARGB_8888:
  725. case MDP_RGBA_8888:
  726. case MDP_XRGB_8888:
  727. case MDP_RGBX_8888:
  728. iowrite32(GET_PACK_PATTERN(CLR_ALPHA, CLR_R, CLR_G,
  729. CLR_B, 8),
  730. MSM_ROTATOR_SRC_UNPACK_PATTERN1);
  731. iowrite32(GET_PACK_PATTERN(CLR_ALPHA, CLR_R, CLR_G,
  732. CLR_B, 8),
  733. MSM_ROTATOR_OUT_PACK_PATTERN1);
  734. abits = COMPONENT_8BITS;
  735. rbits = COMPONENT_8BITS;
  736. gbits = COMPONENT_8BITS;
  737. bbits = COMPONENT_8BITS;
  738. break;
  739. case MDP_BGRA_8888:
  740. case MDP_BGRX_8888:
  741. iowrite32(GET_PACK_PATTERN(CLR_ALPHA, CLR_B, CLR_G,
  742. CLR_R, 8),
  743. MSM_ROTATOR_SRC_UNPACK_PATTERN1);
  744. iowrite32(GET_PACK_PATTERN(CLR_ALPHA, CLR_B, CLR_G,
  745. CLR_R, 8),
  746. MSM_ROTATOR_OUT_PACK_PATTERN1);
  747. abits = COMPONENT_8BITS;
  748. rbits = COMPONENT_8BITS;
  749. gbits = COMPONENT_8BITS;
  750. bbits = COMPONENT_8BITS;
  751. break;
  752. default:
  753. return -EINVAL;
  754. }
  755. iowrite32(0 << 29 | /* frame format 0 = linear */
  756. (use_imem ? 0 : 1) << 22 | /* tile size */
  757. 0 << 19 | /* fetch planes 0=interleaved */
  758. 0 << 18 | /* unpack align */
  759. 1 << 17 | /* unpack tight */
  760. (abits ? 3 : 2) << 13 | /* unpack count 0=1 comp */
  761. (bpp-1) << 9 | /* src Bpp 0=1 byte ... */
  762. (abits ? 1 : 0) << 8 | /* has alpha */
  763. abits << 6 | /* alpha bits 3=8bits */
  764. rbits << 4 | /* R/Cr bits 1=5 2=6 3=8 */
  765. bbits << 2 | /* B/Cb bits 1=5 2=6 3=8 */
  766. gbits << 0, /* G/Y bits 1=5 2=6 3=8 */
  767. MSM_ROTATOR_SRC_FORMAT);
  768. }
  769. return 0;
  770. }
  771. static int get_img(struct msmfb_data *fbd, int domain,
  772. unsigned long *start, unsigned long *len, struct file **p_file,
  773. int *p_need, struct ion_handle **p_ihdl, unsigned int secure)
  774. {
  775. int ret = 0;
  776. #ifdef CONFIG_FB
  777. struct file *file = NULL;
  778. int put_needed, fb_num;
  779. #endif
  780. *p_need = 0;
  781. #ifdef CONFIG_FB
  782. if (fbd->flags & MDP_MEMORY_ID_TYPE_FB) {
  783. file = fget_light(fbd->memory_id, &put_needed);
  784. if (file == NULL) {
  785. pr_err("fget_light returned NULL\n");
  786. return -EINVAL;
  787. }
  788. if (MAJOR(file->f_dentry->d_inode->i_rdev) == FB_MAJOR) {
  789. fb_num = MINOR(file->f_dentry->d_inode->i_rdev);
  790. if (get_fb_phys_info(start, len, fb_num,
  791. ROTATOR_SUBSYSTEM_ID)) {
  792. pr_err("get_fb_phys_info() failed\n");
  793. ret = -1;
  794. } else {
  795. *p_file = file;
  796. *p_need = put_needed;
  797. }
  798. } else {
  799. pr_err("invalid FB_MAJOR failed\n");
  800. ret = -1;
  801. }
  802. if (ret)
  803. fput_light(file, put_needed);
  804. return ret;
  805. }
  806. #endif
  807. return msm_rotator_iommu_map_buf(fbd->memory_id, domain, start,
  808. len, p_ihdl, secure);
  809. }
  810. static void put_img(struct file *p_file, struct ion_handle *p_ihdl,
  811. int domain, unsigned int secure)
  812. {
  813. #ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
  814. if (!IS_ERR_OR_NULL(p_ihdl)) {
  815. pr_debug("%s(): p_ihdl %p\n", __func__, p_ihdl);
  816. if (rot_iommu_split_domain) {
  817. if (!secure)
  818. ion_unmap_iommu(msm_rotator_dev->client,
  819. p_ihdl, domain, GEN_POOL);
  820. } else {
  821. ion_unmap_iommu(msm_rotator_dev->client,
  822. p_ihdl, ROTATOR_SRC_DOMAIN, GEN_POOL);
  823. }
  824. ion_free(msm_rotator_dev->client, p_ihdl);
  825. }
  826. #endif
  827. }
  828. static int msm_rotator_do_rotate(unsigned long arg)
  829. {
  830. unsigned int status, format;
  831. struct msm_rotator_data_info info;
  832. unsigned int in_paddr, out_paddr;
  833. unsigned long src_len, dst_len;
  834. int use_imem = 0, rc = 0, s;
  835. struct file *srcp0_file = NULL, *dstp0_file = NULL;
  836. struct file *srcp1_file = NULL, *dstp1_file = NULL;
  837. struct ion_handle *srcp0_ihdl = NULL, *dstp0_ihdl = NULL;
  838. struct ion_handle *srcp1_ihdl = NULL, *dstp1_ihdl = NULL;
  839. int ps0_need, p_need;
  840. unsigned int in_chroma_paddr = 0, out_chroma_paddr = 0;
  841. unsigned int in_chroma2_paddr = 0;
  842. struct msm_rotator_img_info *img_info;
  843. struct msm_rotator_mem_planes src_planes, dst_planes;
  844. if (copy_from_user(&info, (void __user *)arg, sizeof(info)))
  845. return -EFAULT;
  846. mutex_lock(&msm_rotator_dev->rotator_lock);
  847. for (s = 0; s < MAX_SESSIONS; s++)
  848. if ((msm_rotator_dev->img_info[s] != NULL) &&
  849. (info.session_id ==
  850. (unsigned int)msm_rotator_dev->img_info[s]
  851. ))
  852. break;
  853. if (s == MAX_SESSIONS) {
  854. pr_err("%s() : Attempt to use invalid session_id %d\n",
  855. __func__, s);
  856. rc = -EINVAL;
  857. goto do_rotate_unlock_mutex;
  858. }
  859. if (msm_rotator_dev->img_info[s]->enable == 0) {
  860. dev_dbg(msm_rotator_dev->device,
  861. "%s() : Session_id %d not enabled \n",
  862. __func__, s);
  863. rc = -EINVAL;
  864. goto do_rotate_unlock_mutex;
  865. }
  866. img_info = msm_rotator_dev->img_info[s];
  867. if (msm_rotator_get_plane_sizes(img_info->src.format,
  868. img_info->src.width,
  869. img_info->src.height,
  870. &src_planes)) {
  871. pr_err("%s: invalid src format\n", __func__);
  872. rc = -EINVAL;
  873. goto do_rotate_unlock_mutex;
  874. }
  875. if (msm_rotator_get_plane_sizes(img_info->dst.format,
  876. img_info->dst.width,
  877. img_info->dst.height,
  878. &dst_planes)) {
  879. pr_err("%s: invalid dst format\n", __func__);
  880. rc = -EINVAL;
  881. goto do_rotate_unlock_mutex;
  882. }
  883. rc = get_img(&info.src, ROTATOR_SRC_DOMAIN, (unsigned long *)&in_paddr,
  884. (unsigned long *)&src_len, &srcp0_file, &ps0_need,
  885. &srcp0_ihdl, 0);
  886. if (rc) {
  887. pr_err("%s: in get_img() failed id=0x%08x\n",
  888. DRIVER_NAME, info.src.memory_id);
  889. goto do_rotate_unlock_mutex;
  890. }
  891. rc = get_img(&info.dst, ROTATOR_DST_DOMAIN, (unsigned long *)&out_paddr,
  892. (unsigned long *)&dst_len, &dstp0_file, &p_need,
  893. &dstp0_ihdl, img_info->secure);
  894. if (rc) {
  895. pr_err("%s: out get_img() failed id=0x%08x\n",
  896. DRIVER_NAME, info.dst.memory_id);
  897. goto do_rotate_unlock_mutex;
  898. }
  899. format = msm_rotator_dev->img_info[s]->src.format;
  900. if (((info.version_key & VERSION_KEY_MASK) == 0xA5B4C300) &&
  901. ((info.version_key & ~VERSION_KEY_MASK) > 0) &&
  902. (src_planes.num_planes == 2)) {
  903. if (checkoffset(info.src.offset,
  904. src_planes.plane_size[0],
  905. src_len)) {
  906. pr_err("%s: invalid src buffer (len=%lu offset=%x)\n",
  907. __func__, src_len, info.src.offset);
  908. rc = -ERANGE;
  909. goto do_rotate_unlock_mutex;
  910. }
  911. if (checkoffset(info.dst.offset,
  912. dst_planes.plane_size[0],
  913. dst_len)) {
  914. pr_err("%s: invalid dst buffer (len=%lu offset=%x)\n",
  915. __func__, dst_len, info.dst.offset);
  916. rc = -ERANGE;
  917. goto do_rotate_unlock_mutex;
  918. }
  919. rc = get_img(&info.src_chroma, ROTATOR_SRC_DOMAIN,
  920. (unsigned long *)&in_chroma_paddr,
  921. (unsigned long *)&src_len, &srcp1_file, &p_need,
  922. &srcp1_ihdl, 0);
  923. if (rc) {
  924. pr_err("%s: in chroma get_img() failed id=0x%08x\n",
  925. DRIVER_NAME, info.src_chroma.memory_id);
  926. goto do_rotate_unlock_mutex;
  927. }
  928. rc = get_img(&info.dst_chroma, ROTATOR_DST_DOMAIN,
  929. (unsigned long *)&out_chroma_paddr,
  930. (unsigned long *)&dst_len, &dstp1_file, &p_need,
  931. &dstp1_ihdl, img_info->secure);
  932. if (rc) {
  933. pr_err("%s: out chroma get_img() failed id=0x%08x\n",
  934. DRIVER_NAME, info.dst_chroma.memory_id);
  935. goto do_rotate_unlock_mutex;
  936. }
  937. if (checkoffset(info.src_chroma.offset,
  938. src_planes.plane_size[1],
  939. src_len)) {
  940. pr_err("%s: invalid chr src buf len=%lu offset=%x\n",
  941. __func__, src_len, info.src_chroma.offset);
  942. rc = -ERANGE;
  943. goto do_rotate_unlock_mutex;
  944. }
  945. if (checkoffset(info.dst_chroma.offset,
  946. src_planes.plane_size[1],
  947. dst_len)) {
  948. pr_err("%s: invalid chr dst buf len=%lu offset=%x\n",
  949. __func__, dst_len, info.dst_chroma.offset);
  950. rc = -ERANGE;
  951. goto do_rotate_unlock_mutex;
  952. }
  953. in_chroma_paddr += info.src_chroma.offset;
  954. out_chroma_paddr += info.dst_chroma.offset;
  955. } else {
  956. if (checkoffset(info.src.offset,
  957. src_planes.total_size,
  958. src_len)) {
  959. pr_err("%s: invalid src buffer (len=%lu offset=%x)\n",
  960. __func__, src_len, info.src.offset);
  961. rc = -ERANGE;
  962. goto do_rotate_unlock_mutex;
  963. }
  964. if (checkoffset(info.dst.offset,
  965. dst_planes.total_size,
  966. dst_len)) {
  967. pr_err("%s: invalid dst buffer (len=%lu offset=%x)\n",
  968. __func__, dst_len, info.dst.offset);
  969. rc = -ERANGE;
  970. goto do_rotate_unlock_mutex;
  971. }
  972. }
  973. in_paddr += info.src.offset;
  974. out_paddr += info.dst.offset;
  975. if (!in_chroma_paddr && src_planes.num_planes >= 2)
  976. in_chroma_paddr = in_paddr + src_planes.plane_size[0];
  977. if (!out_chroma_paddr && dst_planes.num_planes >= 2)
  978. out_chroma_paddr = out_paddr + dst_planes.plane_size[0];
  979. if (src_planes.num_planes >= 3)
  980. in_chroma2_paddr = in_chroma_paddr + src_planes.plane_size[1];
  981. cancel_delayed_work(&msm_rotator_dev->rot_clk_work);
  982. if (msm_rotator_dev->rot_clk_state != CLK_EN) {
  983. enable_rot_clks();
  984. msm_rotator_dev->rot_clk_state = CLK_EN;
  985. }
  986. enable_irq(msm_rotator_dev->irq);
  987. #ifdef CONFIG_MSM_ROTATOR_USE_IMEM
  988. use_imem = msm_rotator_imem_allocate(ROTATOR_REQUEST);
  989. #else
  990. use_imem = 0;
  991. #endif
  992. /*
  993. * workaround for a hardware bug. rotator hardware hangs when we
  994. * use write burst beat size 16 on 128X128 tile fetch mode. As a
  995. * temporary fix use 0x42 for BURST_SIZE when imem used.
  996. */
  997. if (use_imem)
  998. iowrite32(0x42, MSM_ROTATOR_MAX_BURST_SIZE);
  999. iowrite32(((msm_rotator_dev->img_info[s]->src_rect.h & 0x1fff)
  1000. << 16) |
  1001. (msm_rotator_dev->img_info[s]->src_rect.w & 0x1fff),
  1002. MSM_ROTATOR_SRC_SIZE);
  1003. iowrite32(((msm_rotator_dev->img_info[s]->src_rect.y & 0x1fff)
  1004. << 16) |
  1005. (msm_rotator_dev->img_info[s]->src_rect.x & 0x1fff),
  1006. MSM_ROTATOR_SRC_XY);
  1007. iowrite32(((msm_rotator_dev->img_info[s]->src.height & 0x1fff)
  1008. << 16) |
  1009. (msm_rotator_dev->img_info[s]->src.width & 0x1fff),
  1010. MSM_ROTATOR_SRC_IMAGE_SIZE);
  1011. switch (format) {
  1012. case MDP_RGB_565:
  1013. case MDP_BGR_565:
  1014. case MDP_RGB_888:
  1015. case MDP_ARGB_8888:
  1016. case MDP_RGBA_8888:
  1017. case MDP_XRGB_8888:
  1018. case MDP_BGRA_8888:
  1019. case MDP_RGBX_8888:
  1020. case MDP_BGRX_8888:
  1021. case MDP_YCBCR_H1V1:
  1022. case MDP_YCRCB_H1V1:
  1023. rc = msm_rotator_rgb_types(msm_rotator_dev->img_info[s],
  1024. in_paddr, out_paddr,
  1025. use_imem,
  1026. msm_rotator_dev->last_session_idx
  1027. != s);
  1028. break;
  1029. case MDP_Y_CBCR_H2V2:
  1030. case MDP_Y_CRCB_H2V2:
  1031. case MDP_Y_CB_CR_H2V2:
  1032. case MDP_Y_CR_CB_H2V2:
  1033. case MDP_Y_CR_CB_GH2V2:
  1034. case MDP_Y_CRCB_H2V2_TILE:
  1035. case MDP_Y_CBCR_H2V2_TILE:
  1036. rc = msm_rotator_ycxcx_h2v2(msm_rotator_dev->img_info[s],
  1037. in_paddr, out_paddr, use_imem,
  1038. msm_rotator_dev->last_session_idx
  1039. != s,
  1040. in_chroma_paddr,
  1041. out_chroma_paddr,
  1042. in_chroma2_paddr);
  1043. break;
  1044. case MDP_Y_CBCR_H2V1:
  1045. case MDP_Y_CRCB_H2V1:
  1046. rc = msm_rotator_ycxcx_h2v1(msm_rotator_dev->img_info[s],
  1047. in_paddr, out_paddr, use_imem,
  1048. msm_rotator_dev->last_session_idx
  1049. != s,
  1050. in_chroma_paddr,
  1051. out_chroma_paddr);
  1052. break;
  1053. case MDP_YCRYCB_H2V1:
  1054. rc = msm_rotator_ycrycb(msm_rotator_dev->img_info[s],
  1055. in_paddr, out_paddr, use_imem,
  1056. msm_rotator_dev->last_session_idx != s,
  1057. out_chroma_paddr);
  1058. break;
  1059. default:
  1060. rc = -EINVAL;
  1061. pr_err("%s(): Unsupported format %u\n", __func__, format);
  1062. goto do_rotate_exit;
  1063. }
  1064. if (rc != 0) {
  1065. msm_rotator_dev->last_session_idx = INVALID_SESSION;
  1066. pr_err("%s(): Invalid session error\n", __func__);
  1067. goto do_rotate_exit;
  1068. }
  1069. iowrite32(3, MSM_ROTATOR_INTR_ENABLE);
  1070. msm_rotator_dev->processing = 1;
  1071. iowrite32(0x1, MSM_ROTATOR_START);
  1072. wait_event(msm_rotator_dev->wq,
  1073. (msm_rotator_dev->processing == 0));
  1074. status = (unsigned char)ioread32(MSM_ROTATOR_INTR_STATUS);
  1075. if ((status & 0x03) != 0x01) {
  1076. pr_err("%s(): AXI Bus Error, issuing SW_RESET\n", __func__);
  1077. iowrite32(0x1, MSM_ROTATOR_SW_RESET);
  1078. rc = -EFAULT;
  1079. }
  1080. iowrite32(0, MSM_ROTATOR_INTR_ENABLE);
  1081. iowrite32(3, MSM_ROTATOR_INTR_CLEAR);
  1082. do_rotate_exit:
  1083. disable_irq(msm_rotator_dev->irq);
  1084. #ifdef CONFIG_MSM_ROTATOR_USE_IMEM
  1085. msm_rotator_imem_free(ROTATOR_REQUEST);
  1086. #endif
  1087. schedule_delayed_work(&msm_rotator_dev->rot_clk_work, HZ);
  1088. do_rotate_unlock_mutex:
  1089. put_img(dstp1_file, dstp1_ihdl, ROTATOR_DST_DOMAIN,
  1090. msm_rotator_dev->img_info[s]->secure);
  1091. put_img(srcp1_file, srcp1_ihdl, ROTATOR_SRC_DOMAIN, 0);
  1092. put_img(dstp0_file, dstp0_ihdl, ROTATOR_DST_DOMAIN,
  1093. msm_rotator_dev->img_info[s]->secure);
  1094. /* only source may use frame buffer */
  1095. if (info.src.flags & MDP_MEMORY_ID_TYPE_FB)
  1096. fput_light(srcp0_file, ps0_need);
  1097. else
  1098. put_img(srcp0_file, srcp0_ihdl, ROTATOR_SRC_DOMAIN, 0);
  1099. mutex_unlock(&msm_rotator_dev->rotator_lock);
  1100. dev_dbg(msm_rotator_dev->device, "%s() returning rc = %d\n",
  1101. __func__, rc);
  1102. return rc;
  1103. }
  1104. static void msm_rotator_set_perf_level(u32 wh, u32 is_rgb)
  1105. {
  1106. u32 perf_level;
  1107. if (is_rgb)
  1108. perf_level = 1;
  1109. else if (wh <= (640 * 480))
  1110. perf_level = 2;
  1111. else if (wh <= (736 * 1280))
  1112. perf_level = 3;
  1113. else
  1114. perf_level = 4;
  1115. #ifdef CONFIG_MSM_BUS_SCALING
  1116. msm_bus_scale_client_update_request(msm_rotator_dev->bus_client_handle,
  1117. perf_level);
  1118. #endif
  1119. }
  1120. static int msm_rotator_start(unsigned long arg,
  1121. struct msm_rotator_fd_info *fd_info)
  1122. {
  1123. struct msm_rotator_img_info info;
  1124. int rc = 0;
  1125. int s, is_rgb = 0;
  1126. int first_free_index = INVALID_SESSION;
  1127. unsigned int dst_w, dst_h;
  1128. if (copy_from_user(&info, (void __user *)arg, sizeof(info)))
  1129. return -EFAULT;
  1130. if ((info.rotations > MSM_ROTATOR_MAX_ROT) ||
  1131. (info.src.height > MSM_ROTATOR_MAX_H) ||
  1132. (info.src.width > MSM_ROTATOR_MAX_W) ||
  1133. (info.dst.height > MSM_ROTATOR_MAX_H) ||
  1134. (info.dst.width > MSM_ROTATOR_MAX_W) ||
  1135. (info.downscale_ratio > MAX_DOWNSCALE_RATIO)) {
  1136. pr_err("%s: Invalid parameters\n", __func__);
  1137. return -EINVAL;
  1138. }
  1139. if (info.rotations & MDP_ROT_90) {
  1140. dst_w = info.src_rect.h >> info.downscale_ratio;
  1141. dst_h = info.src_rect.w >> info.downscale_ratio;
  1142. } else {
  1143. dst_w = info.src_rect.w >> info.downscale_ratio;
  1144. dst_h = info.src_rect.h >> info.downscale_ratio;
  1145. }
  1146. if (checkoffset(info.src_rect.x, info.src_rect.w, info.src.width) ||
  1147. checkoffset(info.src_rect.y, info.src_rect.h, info.src.height) ||
  1148. checkoffset(info.dst_x, dst_w, info.dst.width) ||
  1149. checkoffset(info.dst_y, dst_h, info.dst.height)) {
  1150. pr_err("%s: Invalid src or dst rect\n", __func__);
  1151. return -ERANGE;
  1152. }
  1153. switch (info.src.format) {
  1154. case MDP_RGB_565:
  1155. case MDP_BGR_565:
  1156. case MDP_RGB_888:
  1157. case MDP_ARGB_8888:
  1158. case MDP_RGBA_8888:
  1159. case MDP_XRGB_8888:
  1160. case MDP_RGBX_8888:
  1161. case MDP_BGRA_8888:
  1162. case MDP_BGRX_8888:
  1163. is_rgb = 1;
  1164. info.dst.format = info.src.format;
  1165. break;
  1166. case MDP_Y_CBCR_H2V1:
  1167. if (info.rotations & MDP_ROT_90) {
  1168. info.dst.format = MDP_Y_CBCR_H1V2;
  1169. break;
  1170. }
  1171. case MDP_Y_CRCB_H2V1:
  1172. if (info.rotations & MDP_ROT_90) {
  1173. info.dst.format = MDP_Y_CRCB_H1V2;
  1174. break;
  1175. }
  1176. case MDP_Y_CBCR_H2V2:
  1177. case MDP_Y_CRCB_H2V2:
  1178. case MDP_YCBCR_H1V1:
  1179. case MDP_YCRCB_H1V1:
  1180. info.dst.format = info.src.format;
  1181. break;
  1182. case MDP_YCRYCB_H2V1:
  1183. if (info.rotations & MDP_ROT_90)
  1184. info.dst.format = MDP_Y_CRCB_H1V2;
  1185. else
  1186. info.dst.format = MDP_Y_CRCB_H2V1;
  1187. break;
  1188. case MDP_Y_CB_CR_H2V2:
  1189. case MDP_Y_CBCR_H2V2_TILE:
  1190. info.dst.format = MDP_Y_CBCR_H2V2;
  1191. break;
  1192. case MDP_Y_CR_CB_H2V2:
  1193. case MDP_Y_CR_CB_GH2V2:
  1194. case MDP_Y_CRCB_H2V2_TILE:
  1195. info.dst.format = MDP_Y_CRCB_H2V2;
  1196. break;
  1197. default:
  1198. return -EINVAL;
  1199. }
  1200. mutex_lock(&msm_rotator_dev->rotator_lock);
  1201. msm_rotator_set_perf_level((info.src.width*info.src.height), is_rgb);
  1202. for (s = 0; s < MAX_SESSIONS; s++) {
  1203. if ((msm_rotator_dev->img_info[s] != NULL) &&
  1204. (info.session_id ==
  1205. (unsigned int)msm_rotator_dev->img_info[s]
  1206. )) {
  1207. *(msm_rotator_dev->img_info[s]) = info;
  1208. msm_rotator_dev->fd_info[s] = fd_info;
  1209. if (msm_rotator_dev->last_session_idx == s)
  1210. msm_rotator_dev->last_session_idx =
  1211. INVALID_SESSION;
  1212. break;
  1213. }
  1214. if ((msm_rotator_dev->img_info[s] == NULL) &&
  1215. (first_free_index ==
  1216. INVALID_SESSION))
  1217. first_free_index = s;
  1218. }
  1219. if ((s == MAX_SESSIONS) && (first_free_index != INVALID_SESSION)) {
  1220. /* allocate a session id */
  1221. msm_rotator_dev->img_info[first_free_index] =
  1222. kzalloc(sizeof(struct msm_rotator_img_info),
  1223. GFP_KERNEL);
  1224. if (!msm_rotator_dev->img_info[first_free_index]) {
  1225. printk(KERN_ERR "%s : unable to alloc mem\n",
  1226. __func__);
  1227. rc = -ENOMEM;
  1228. goto rotator_start_exit;
  1229. }
  1230. info.session_id = (unsigned int)
  1231. msm_rotator_dev->img_info[first_free_index];
  1232. *(msm_rotator_dev->img_info[first_free_index]) = info;
  1233. msm_rotator_dev->fd_info[first_free_index] = fd_info;
  1234. } else if (s == MAX_SESSIONS) {
  1235. dev_dbg(msm_rotator_dev->device, "%s: all sessions in use\n",
  1236. __func__);
  1237. rc = -EBUSY;
  1238. }
  1239. if (rc == 0 && copy_to_user((void __user *)arg, &info, sizeof(info)))
  1240. rc = -EFAULT;
  1241. rotator_start_exit:
  1242. mutex_unlock(&msm_rotator_dev->rotator_lock);
  1243. return rc;
  1244. }
  1245. static int msm_rotator_finish(unsigned long arg)
  1246. {
  1247. int rc = 0;
  1248. int s;
  1249. unsigned int session_id;
  1250. if (copy_from_user(&session_id, (void __user *)arg, sizeof(s)))
  1251. return -EFAULT;
  1252. mutex_lock(&msm_rotator_dev->rotator_lock);
  1253. for (s = 0; s < MAX_SESSIONS; s++) {
  1254. if ((msm_rotator_dev->img_info[s] != NULL) &&
  1255. (session_id ==
  1256. (unsigned int)msm_rotator_dev->img_info[s])) {
  1257. if (msm_rotator_dev->last_session_idx == s)
  1258. msm_rotator_dev->last_session_idx =
  1259. INVALID_SESSION;
  1260. kfree(msm_rotator_dev->img_info[s]);
  1261. msm_rotator_dev->img_info[s] = NULL;
  1262. msm_rotator_dev->fd_info[s] = NULL;
  1263. break;
  1264. }
  1265. }
  1266. if (s == MAX_SESSIONS)
  1267. rc = -EINVAL;
  1268. #ifdef CONFIG_MSM_BUS_SCALING
  1269. msm_bus_scale_client_update_request(msm_rotator_dev->bus_client_handle,
  1270. 0);
  1271. #endif
  1272. mutex_unlock(&msm_rotator_dev->rotator_lock);
  1273. return rc;
  1274. }
  1275. static int
  1276. msm_rotator_open(struct inode *inode, struct file *filp)
  1277. {
  1278. struct msm_rotator_fd_info *tmp, *fd_info = NULL;
  1279. int i;
  1280. if (filp->private_data)
  1281. return -EBUSY;
  1282. mutex_lock(&msm_rotator_dev->rotator_lock);
  1283. for (i = 0; i < MAX_SESSIONS; i++) {
  1284. if (msm_rotator_dev->fd_info[i] == NULL)
  1285. break;
  1286. }
  1287. if (i == MAX_SESSIONS) {
  1288. mutex_unlock(&msm_rotator_dev->rotator_lock);
  1289. return -EBUSY;
  1290. }
  1291. list_for_each_entry(tmp, &msm_rotator_dev->fd_list, list) {
  1292. if (tmp->pid == current->pid) {
  1293. fd_info = tmp;
  1294. break;
  1295. }
  1296. }
  1297. if (!fd_info) {
  1298. fd_info = kzalloc(sizeof(*fd_info), GFP_KERNEL);
  1299. if (!fd_info) {
  1300. mutex_unlock(&msm_rotator_dev->rotator_lock);
  1301. pr_err("%s: insufficient memory to alloc resources\n",
  1302. __func__);
  1303. return -ENOMEM;
  1304. }
  1305. list_add(&fd_info->list, &msm_rotator_dev->fd_list);
  1306. fd_info->pid = current->pid;
  1307. }
  1308. fd_info->ref_cnt++;
  1309. mutex_unlock(&msm_rotator_dev->rotator_lock);
  1310. filp->private_data = fd_info;
  1311. return 0;
  1312. }
  1313. static int
  1314. msm_rotator_close(struct inode *inode, struct file *filp)
  1315. {
  1316. struct msm_rotator_fd_info *fd_info;
  1317. int s;
  1318. fd_info = (struct msm_rotator_fd_info *)filp->private_data;
  1319. mutex_lock(&msm_rotator_dev->rotator_lock);
  1320. if (--fd_info->ref_cnt > 0) {
  1321. mutex_unlock(&msm_rotator_dev->rotator_lock);
  1322. return 0;
  1323. }
  1324. for (s = 0; s < MAX_SESSIONS; s++) {
  1325. if (msm_rotator_dev->img_info[s] != NULL &&
  1326. msm_rotator_dev->fd_info[s] == fd_info) {
  1327. pr_debug("%s: freeing rotator session %p (pid %d)\n",
  1328. __func__, msm_rotator_dev->img_info[s],
  1329. fd_info->pid);
  1330. kfree(msm_rotator_dev->img_info[s]);
  1331. msm_rotator_dev->img_info[s] = NULL;
  1332. msm_rotator_dev->fd_info[s] = NULL;
  1333. if (msm_rotator_dev->last_session_idx == s)
  1334. msm_rotator_dev->last_session_idx =
  1335. INVALID_SESSION;
  1336. }
  1337. }
  1338. list_del(&fd_info->list);
  1339. kfree(fd_info);
  1340. mutex_unlock(&msm_rotator_dev->rotator_lock);
  1341. return 0;
  1342. }
  1343. static long msm_rotator_ioctl(struct file *file, unsigned cmd,
  1344. unsigned long arg)
  1345. {
  1346. struct msm_rotator_fd_info *fd_info;
  1347. if (_IOC_TYPE(cmd) != MSM_ROTATOR_IOCTL_MAGIC)
  1348. return -ENOTTY;
  1349. fd_info = (struct msm_rotator_fd_info *)file->private_data;
  1350. switch (cmd) {
  1351. case MSM_ROTATOR_IOCTL_START:
  1352. return msm_rotator_start(arg, fd_info);
  1353. case MSM_ROTATOR_IOCTL_ROTATE:
  1354. return msm_rotator_do_rotate(arg);
  1355. case MSM_ROTATOR_IOCTL_FINISH:
  1356. return msm_rotator_finish(arg);
  1357. default:
  1358. dev_dbg(msm_rotator_dev->device,
  1359. "unexpected IOCTL %d\n", cmd);
  1360. return -ENOTTY;
  1361. }
  1362. }
  1363. static const struct file_operations msm_rotator_fops = {
  1364. .owner = THIS_MODULE,
  1365. .open = msm_rotator_open,
  1366. .release = msm_rotator_close,
  1367. .unlocked_ioctl = msm_rotator_ioctl,
  1368. };
  1369. static int __devinit msm_rotator_probe(struct platform_device *pdev)
  1370. {
  1371. int rc = 0;
  1372. struct resource *res;
  1373. struct msm_rotator_platform_data *pdata = NULL;
  1374. int i, number_of_clks;
  1375. uint32_t ver;
  1376. msm_rotator_dev = kzalloc(sizeof(struct msm_rotator_dev), GFP_KERNEL);
  1377. if (!msm_rotator_dev) {
  1378. printk(KERN_ERR "%s Unable to allocate memory for struct\n",
  1379. __func__);
  1380. return -ENOMEM;
  1381. }
  1382. for (i = 0; i < MAX_SESSIONS; i++)
  1383. msm_rotator_dev->img_info[i] = NULL;
  1384. msm_rotator_dev->last_session_idx = INVALID_SESSION;
  1385. pdata = pdev->dev.platform_data;
  1386. number_of_clks = pdata->number_of_clocks;
  1387. rot_iommu_split_domain = pdata->rot_iommu_split_domain;
  1388. msm_rotator_dev->imem_owner = IMEM_NO_OWNER;
  1389. mutex_init(&msm_rotator_dev->imem_lock);
  1390. INIT_LIST_HEAD(&msm_rotator_dev->fd_list);
  1391. msm_rotator_dev->imem_clk_state = CLK_DIS;
  1392. INIT_DELAYED_WORK(&msm_rotator_dev->imem_clk_work,
  1393. msm_rotator_imem_clk_work_f);
  1394. msm_rotator_dev->imem_clk = NULL;
  1395. msm_rotator_dev->pdev = pdev;
  1396. msm_rotator_dev->core_clk = NULL;
  1397. msm_rotator_dev->pclk = NULL;
  1398. #ifdef CONFIG_MSM_BUS_SCALING
  1399. if (!msm_rotator_dev->bus_client_handle && pdata &&
  1400. pdata->bus_scale_table) {
  1401. msm_rotator_dev->bus_client_handle =
  1402. msm_bus_scale_register_client(
  1403. pdata->bus_scale_table);
  1404. if (!msm_rotator_dev->bus_client_handle) {
  1405. pr_err("%s not able to get bus scale handle\n",
  1406. __func__);
  1407. }
  1408. }
  1409. #endif
  1410. for (i = 0; i < number_of_clks; i++) {
  1411. if (pdata->rotator_clks[i].clk_type == ROTATOR_IMEM_CLK) {
  1412. msm_rotator_dev->imem_clk =
  1413. clk_get(&msm_rotator_dev->pdev->dev,
  1414. pdata->rotator_clks[i].clk_name);
  1415. if (IS_ERR(msm_rotator_dev->imem_clk)) {
  1416. rc = PTR_ERR(msm_rotator_dev->imem_clk);
  1417. msm_rotator_dev->imem_clk = NULL;
  1418. printk(KERN_ERR "%s: cannot get imem_clk "
  1419. "rc=%d\n", DRIVER_NAME, rc);
  1420. goto error_imem_clk;
  1421. }
  1422. if (pdata->rotator_clks[i].clk_rate)
  1423. clk_set_rate(msm_rotator_dev->imem_clk,
  1424. pdata->rotator_clks[i].clk_rate);
  1425. }
  1426. if (pdata->rotator_clks[i].clk_type == ROTATOR_PCLK) {
  1427. msm_rotator_dev->pclk =
  1428. clk_get(&msm_rotator_dev->pdev->dev,
  1429. pdata->rotator_clks[i].clk_name);
  1430. if (IS_ERR(msm_rotator_dev->pclk)) {
  1431. rc = PTR_ERR(msm_rotator_dev->pclk);
  1432. msm_rotator_dev->pclk = NULL;
  1433. printk(KERN_ERR "%s: cannot get pclk rc=%d\n",
  1434. DRIVER_NAME, rc);
  1435. goto error_pclk;
  1436. }
  1437. if (pdata->rotator_clks[i].clk_rate)
  1438. clk_set_rate(msm_rotator_dev->pclk,
  1439. pdata->rotator_clks[i].clk_rate);
  1440. }
  1441. if (pdata->rotator_clks[i].clk_type == ROTATOR_CORE_CLK) {
  1442. msm_rotator_dev->core_clk =
  1443. clk_get(&msm_rotator_dev->pdev->dev,
  1444. pdata->rotator_clks[i].clk_name);
  1445. if (IS_ERR(msm_rotator_dev->core_clk)) {
  1446. rc = PTR_ERR(msm_rotator_dev->core_clk);
  1447. msm_rotator_dev->core_clk = NULL;
  1448. printk(KERN_ERR "%s: cannot get core clk "
  1449. "rc=%d\n", DRIVER_NAME, rc);
  1450. goto error_core_clk;
  1451. }
  1452. if (pdata->rotator_clks[i].clk_rate)
  1453. clk_set_rate(msm_rotator_dev->core_clk,
  1454. pdata->rotator_clks[i].clk_rate);
  1455. }
  1456. }
  1457. msm_rotator_dev->regulator = regulator_get(&msm_rotator_dev->pdev->dev,
  1458. "vdd");
  1459. if (IS_ERR(msm_rotator_dev->regulator))
  1460. msm_rotator_dev->regulator = NULL;
  1461. msm_rotator_dev->rot_clk_state = CLK_DIS;
  1462. INIT_DELAYED_WORK(&msm_rotator_dev->rot_clk_work,
  1463. msm_rotator_rot_clk_work_f);
  1464. mutex_init(&msm_rotator_dev->rotator_lock);
  1465. #ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
  1466. msm_rotator_dev->client = msm_ion_client_create(-1, pdev->name);
  1467. #endif
  1468. platform_set_drvdata(pdev, msm_rotator_dev);
  1469. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1470. if (!res) {
  1471. printk(KERN_ALERT
  1472. "%s: could not get IORESOURCE_MEM\n", DRIVER_NAME);
  1473. rc = -ENODEV;
  1474. goto error_get_resource;
  1475. }
  1476. msm_rotator_dev->io_base = ioremap(res->start,
  1477. resource_size(res));
  1478. #ifdef CONFIG_MSM_ROTATOR_USE_IMEM
  1479. if (msm_rotator_dev->imem_clk)
  1480. clk_prepare_enable(msm_rotator_dev->imem_clk);
  1481. #endif
  1482. enable_rot_clks();
  1483. ver = ioread32(MSM_ROTATOR_HW_VERSION);
  1484. disable_rot_clks();
  1485. #ifdef CONFIG_MSM_ROTATOR_USE_IMEM
  1486. if (msm_rotator_dev->imem_clk)
  1487. clk_disable_unprepare(msm_rotator_dev->imem_clk);
  1488. #endif
  1489. if (ver != pdata->hardware_version_number)
  1490. pr_debug("%s: invalid HW version ver 0x%x\n",
  1491. DRIVER_NAME, ver);
  1492. rotator_hw_revision = ver;
  1493. rotator_hw_revision >>= 16; /* bit 31:16 */
  1494. rotator_hw_revision &= 0xff;
  1495. pr_info("%s: rotator_hw_revision=%x\n",
  1496. __func__, rotator_hw_revision);
  1497. msm_rotator_dev->irq = platform_get_irq(pdev, 0);
  1498. if (msm_rotator_dev->irq < 0) {
  1499. printk(KERN_ALERT "%s: could not get IORESOURCE_IRQ\n",
  1500. DRIVER_NAME);
  1501. rc = -ENODEV;
  1502. goto error_get_irq;
  1503. }
  1504. rc = request_irq(msm_rotator_dev->irq, msm_rotator_isr,
  1505. IRQF_TRIGGER_RISING, DRIVER_NAME, NULL);
  1506. if (rc) {
  1507. printk(KERN_ERR "%s: request_irq() failed\n", DRIVER_NAME);
  1508. goto error_get_irq;
  1509. }
  1510. /* we enable the IRQ when we need it in the ioctl */
  1511. disable_irq(msm_rotator_dev->irq);
  1512. rc = alloc_chrdev_region(&msm_rotator_dev->dev_num, 0, 1, DRIVER_NAME);
  1513. if (rc < 0) {
  1514. printk(KERN_ERR "%s: alloc_chrdev_region Failed rc = %d\n",
  1515. __func__, rc);
  1516. goto error_get_irq;
  1517. }
  1518. msm_rotator_dev->class = class_create(THIS_MODULE, DRIVER_NAME);
  1519. if (IS_ERR(msm_rotator_dev->class)) {
  1520. rc = PTR_ERR(msm_rotator_dev->class);
  1521. printk(KERN_ERR "%s: couldn't create class rc = %d\n",
  1522. DRIVER_NAME, rc);
  1523. goto error_class_create;
  1524. }
  1525. msm_rotator_dev->device = device_create(msm_rotator_dev->class, NULL,
  1526. msm_rotator_dev->dev_num, NULL,
  1527. DRIVER_NAME);
  1528. if (IS_ERR(msm_rotator_dev->device)) {
  1529. rc = PTR_ERR(msm_rotator_dev->device);
  1530. printk(KERN_ERR "%s: device_create failed %d\n",
  1531. DRIVER_NAME, rc);
  1532. goto error_class_device_create;
  1533. }
  1534. cdev_init(&msm_rotator_dev->cdev, &msm_rotator_fops);
  1535. rc = cdev_add(&msm_rotator_dev->cdev,
  1536. MKDEV(MAJOR(msm_rotator_dev->dev_num), 0),
  1537. 1);
  1538. if (rc < 0) {
  1539. printk(KERN_ERR "%s: cdev_add failed %d\n", __func__, rc);
  1540. goto error_cdev_add;
  1541. }
  1542. init_waitqueue_head(&msm_rotator_dev->wq);
  1543. dev_dbg(msm_rotator_dev->device, "probe successful\n");
  1544. return rc;
  1545. error_cdev_add:
  1546. device_destroy(msm_rotator_dev->class, msm_rotator_dev->dev_num);
  1547. error_class_device_create:
  1548. class_destroy(msm_rotator_dev->class);
  1549. error_class_create:
  1550. unregister_chrdev_region(msm_rotator_dev->dev_num, 1);
  1551. error_get_irq:
  1552. iounmap(msm_rotator_dev->io_base);
  1553. error_get_resource:
  1554. mutex_destroy(&msm_rotator_dev->rotator_lock);
  1555. if (msm_rotator_dev->regulator)
  1556. regulator_put(msm_rotator_dev->regulator);
  1557. clk_put(msm_rotator_dev->core_clk);
  1558. error_core_clk:
  1559. clk_put(msm_rotator_dev->pclk);
  1560. error_pclk:
  1561. if (msm_rotator_dev->imem_clk)
  1562. clk_put(msm_rotator_dev->imem_clk);
  1563. error_imem_clk:
  1564. mutex_destroy(&msm_rotator_dev->imem_lock);
  1565. kfree(msm_rotator_dev);
  1566. return rc;
  1567. }
  1568. static int __devexit msm_rotator_remove(struct platform_device *plat_dev)
  1569. {
  1570. int i;
  1571. #ifdef CONFIG_MSM_BUS_SCALING
  1572. msm_bus_scale_unregister_client(msm_rotator_dev->bus_client_handle);
  1573. #endif
  1574. free_irq(msm_rotator_dev->irq, NULL);
  1575. mutex_destroy(&msm_rotator_dev->rotator_lock);
  1576. cdev_del(&msm_rotator_dev->cdev);
  1577. device_destroy(msm_rotator_dev->class, msm_rotator_dev->dev_num);
  1578. class_destroy(msm_rotator_dev->class);
  1579. unregister_chrdev_region(msm_rotator_dev->dev_num, 1);
  1580. iounmap(msm_rotator_dev->io_base);
  1581. if (msm_rotator_dev->imem_clk) {
  1582. if (msm_rotator_dev->imem_clk_state == CLK_EN)
  1583. clk_disable_unprepare(msm_rotator_dev->imem_clk);
  1584. clk_put(msm_rotator_dev->imem_clk);
  1585. msm_rotator_dev->imem_clk = NULL;
  1586. }
  1587. if (msm_rotator_dev->rot_clk_state == CLK_EN)
  1588. disable_rot_clks();
  1589. clk_put(msm_rotator_dev->core_clk);
  1590. clk_put(msm_rotator_dev->pclk);
  1591. if (msm_rotator_dev->regulator)
  1592. regulator_put(msm_rotator_dev->regulator);
  1593. msm_rotator_dev->core_clk = NULL;
  1594. msm_rotator_dev->pclk = NULL;
  1595. mutex_destroy(&msm_rotator_dev->imem_lock);
  1596. for (i = 0; i < MAX_SESSIONS; i++)
  1597. if (msm_rotator_dev->img_info[i] != NULL)
  1598. kfree(msm_rotator_dev->img_info[i]);
  1599. kfree(msm_rotator_dev);
  1600. return 0;
  1601. }
  1602. #ifdef CONFIG_PM
  1603. static int msm_rotator_suspend(struct platform_device *dev, pm_message_t state)
  1604. {
  1605. mutex_lock(&msm_rotator_dev->imem_lock);
  1606. if (msm_rotator_dev->imem_clk_state == CLK_EN
  1607. && msm_rotator_dev->imem_clk) {
  1608. clk_disable_unprepare(msm_rotator_dev->imem_clk);
  1609. msm_rotator_dev->imem_clk_state = CLK_SUSPEND;
  1610. }
  1611. mutex_unlock(&msm_rotator_dev->imem_lock);
  1612. mutex_lock(&msm_rotator_dev->rotator_lock);
  1613. if (msm_rotator_dev->rot_clk_state == CLK_EN) {
  1614. disable_rot_clks();
  1615. msm_rotator_dev->rot_clk_state = CLK_SUSPEND;
  1616. }
  1617. mutex_unlock(&msm_rotator_dev->rotator_lock);
  1618. return 0;
  1619. }
  1620. static int msm_rotator_resume(struct platform_device *dev)
  1621. {
  1622. mutex_lock(&msm_rotator_dev->imem_lock);
  1623. if (msm_rotator_dev->imem_clk_state == CLK_SUSPEND
  1624. && msm_rotator_dev->imem_clk) {
  1625. clk_prepare_enable(msm_rotator_dev->imem_clk);
  1626. msm_rotator_dev->imem_clk_state = CLK_EN;
  1627. }
  1628. mutex_unlock(&msm_rotator_dev->imem_lock);
  1629. mutex_lock(&msm_rotator_dev->rotator_lock);
  1630. if (msm_rotator_dev->rot_clk_state == CLK_SUSPEND) {
  1631. enable_rot_clks();
  1632. msm_rotator_dev->rot_clk_state = CLK_EN;
  1633. }
  1634. mutex_unlock(&msm_rotator_dev->rotator_lock);
  1635. return 0;
  1636. }
  1637. #endif
  1638. static struct platform_driver msm_rotator_platform_driver = {
  1639. .probe = msm_rotator_probe,
  1640. .remove = __devexit_p(msm_rotator_remove),
  1641. #ifdef CONFIG_PM
  1642. .suspend = msm_rotator_suspend,
  1643. .resume = msm_rotator_resume,
  1644. #endif
  1645. .driver = {
  1646. .owner = THIS_MODULE,
  1647. .name = DRIVER_NAME
  1648. }
  1649. };
  1650. static int __init msm_rotator_init(void)
  1651. {
  1652. return platform_driver_register(&msm_rotator_platform_driver);
  1653. }
  1654. static void __exit msm_rotator_exit(void)
  1655. {
  1656. return platform_driver_unregister(&msm_rotator_platform_driver);
  1657. }
  1658. module_init(msm_rotator_init);
  1659. module_exit(msm_rotator_exit);
  1660. MODULE_DESCRIPTION("MSM Offline Image Rotator driver");
  1661. MODULE_VERSION("1.0");
  1662. MODULE_LICENSE("GPL v2");