a20r.c 4.9 KB

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  1. /*
  2. * A20R specific code
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * Copyright (C) 2006 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
  9. */
  10. #include <linux/init.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/irq.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/serial_8250.h>
  15. #include <asm/sni.h>
  16. #include <asm/time.h>
  17. #define PORT(_base,_irq) \
  18. { \
  19. .iobase = _base, \
  20. .irq = _irq, \
  21. .uartclk = 1843200, \
  22. .iotype = UPIO_PORT, \
  23. .flags = UPF_BOOT_AUTOCONF, \
  24. }
  25. static struct plat_serial8250_port a20r_data[] = {
  26. PORT(0x3f8, 4),
  27. PORT(0x2f8, 3),
  28. { },
  29. };
  30. static struct platform_device a20r_serial8250_device = {
  31. .name = "serial8250",
  32. .id = PLAT8250_DEV_PLATFORM,
  33. .dev = {
  34. .platform_data = a20r_data,
  35. },
  36. };
  37. static struct resource a20r_ds1216_rsrc[] = {
  38. {
  39. .start = 0x1c081ffc,
  40. .end = 0x1c081fff,
  41. .flags = IORESOURCE_MEM
  42. }
  43. };
  44. static struct platform_device a20r_ds1216_device = {
  45. .name = "rtc-ds1216",
  46. .num_resources = ARRAY_SIZE(a20r_ds1216_rsrc),
  47. .resource = a20r_ds1216_rsrc
  48. };
  49. static struct resource snirm_82596_rsrc[] = {
  50. {
  51. .start = 0x18000000,
  52. .end = 0x18000004,
  53. .flags = IORESOURCE_MEM
  54. },
  55. {
  56. .start = 0x18010000,
  57. .end = 0x18010004,
  58. .flags = IORESOURCE_MEM
  59. },
  60. {
  61. .start = 0x1ff00000,
  62. .end = 0x1ff00020,
  63. .flags = IORESOURCE_MEM
  64. },
  65. {
  66. .start = 22,
  67. .end = 22,
  68. .flags = IORESOURCE_IRQ
  69. },
  70. {
  71. .flags = 0x01 /* 16bit mpu port access */
  72. }
  73. };
  74. static struct platform_device snirm_82596_pdev = {
  75. .name = "snirm_82596",
  76. .num_resources = ARRAY_SIZE(snirm_82596_rsrc),
  77. .resource = snirm_82596_rsrc
  78. };
  79. static struct resource snirm_53c710_rsrc[] = {
  80. {
  81. .start = 0x19000000,
  82. .end = 0x190fffff,
  83. .flags = IORESOURCE_MEM
  84. },
  85. {
  86. .start = 19,
  87. .end = 19,
  88. .flags = IORESOURCE_IRQ
  89. }
  90. };
  91. static struct platform_device snirm_53c710_pdev = {
  92. .name = "snirm_53c710",
  93. .num_resources = ARRAY_SIZE(snirm_53c710_rsrc),
  94. .resource = snirm_53c710_rsrc
  95. };
  96. static struct resource sc26xx_rsrc[] = {
  97. {
  98. .start = 0x1c070000,
  99. .end = 0x1c0700ff,
  100. .flags = IORESOURCE_MEM
  101. },
  102. {
  103. .start = 20,
  104. .end = 20,
  105. .flags = IORESOURCE_IRQ
  106. }
  107. };
  108. static unsigned int sc26xx_data[2] = {
  109. /* DTR | RTS | DSR | CTS | DCD | RI */
  110. (8 << 0) | (4 << 4) | (6 << 8) | (0 << 12) | (6 << 16) | (0 << 20),
  111. (3 << 0) | (2 << 4) | (1 << 8) | (2 << 12) | (3 << 16) | (4 << 20)
  112. };
  113. static struct platform_device sc26xx_pdev = {
  114. .name = "SC26xx",
  115. .num_resources = ARRAY_SIZE(sc26xx_rsrc),
  116. .resource = sc26xx_rsrc,
  117. .dev = {
  118. .platform_data = sc26xx_data,
  119. }
  120. };
  121. static u32 a20r_ack_hwint(void)
  122. {
  123. u32 status = read_c0_status();
  124. write_c0_status(status | 0x00010000);
  125. asm volatile(
  126. " .set push \n"
  127. " .set noat \n"
  128. " .set noreorder \n"
  129. " lw $1, 0(%0) \n"
  130. " sb $0, 0(%1) \n"
  131. " sync \n"
  132. " lb %1, 0(%1) \n"
  133. " b 1f \n"
  134. " ori %1, $1, 2 \n"
  135. " .align 8 \n"
  136. "1: \n"
  137. " nop \n"
  138. " sw %1, 0(%0) \n"
  139. " sync \n"
  140. " li %1, 0x20 \n"
  141. "2: \n"
  142. " nop \n"
  143. " bnez %1,2b \n"
  144. " addiu %1, -1 \n"
  145. " sw $1, 0(%0) \n"
  146. " sync \n"
  147. ".set pop \n"
  148. :
  149. : "Jr" (PCIMT_UCONF), "Jr" (0xbc000000));
  150. write_c0_status(status);
  151. return status;
  152. }
  153. static inline void unmask_a20r_irq(struct irq_data *d)
  154. {
  155. set_c0_status(0x100 << (d->irq - SNI_A20R_IRQ_BASE));
  156. irq_enable_hazard();
  157. }
  158. static inline void mask_a20r_irq(struct irq_data *d)
  159. {
  160. clear_c0_status(0x100 << (d->irq - SNI_A20R_IRQ_BASE));
  161. irq_disable_hazard();
  162. }
  163. static struct irq_chip a20r_irq_type = {
  164. .name = "A20R",
  165. .irq_mask = mask_a20r_irq,
  166. .irq_unmask = unmask_a20r_irq,
  167. };
  168. /*
  169. * hwint 0 receive all interrupts
  170. */
  171. static void a20r_hwint(void)
  172. {
  173. u32 cause, status;
  174. int irq;
  175. clear_c0_status(IE_IRQ0);
  176. status = a20r_ack_hwint();
  177. cause = read_c0_cause();
  178. irq = ffs(((cause & status) >> 8) & 0xf8);
  179. if (likely(irq > 0))
  180. do_IRQ(SNI_A20R_IRQ_BASE + irq - 1);
  181. set_c0_status(IE_IRQ0);
  182. }
  183. void __init sni_a20r_irq_init(void)
  184. {
  185. int i;
  186. for (i = SNI_A20R_IRQ_BASE + 2 ; i < SNI_A20R_IRQ_BASE + 8; i++)
  187. irq_set_chip_and_handler(i, &a20r_irq_type, handle_level_irq);
  188. sni_hwint = a20r_hwint;
  189. change_c0_status(ST0_IM, IE_IRQ0);
  190. setup_irq(SNI_A20R_IRQ_BASE + 3, &sni_isa_irq);
  191. }
  192. void sni_a20r_init(void)
  193. {
  194. /* FIXME, remove if not needed */
  195. }
  196. static int __init snirm_a20r_setup_devinit(void)
  197. {
  198. switch (sni_brd_type) {
  199. case SNI_BRD_TOWER_OASIC:
  200. case SNI_BRD_MINITOWER:
  201. platform_device_register(&snirm_82596_pdev);
  202. platform_device_register(&snirm_53c710_pdev);
  203. platform_device_register(&sc26xx_pdev);
  204. platform_device_register(&a20r_serial8250_device);
  205. platform_device_register(&a20r_ds1216_device);
  206. sni_eisa_root_init();
  207. break;
  208. }
  209. return 0;
  210. }
  211. device_initcall(snirm_a20r_setup_devinit);