tvp7002.c 32 KB

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  1. /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
  2. * Digitizer with Horizontal PLL registers
  3. *
  4. * Copyright (C) 2009 Texas Instruments Inc
  5. * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
  6. *
  7. * This code is partially based upon the TVP5150 driver
  8. * written by Mauro Carvalho Chehab (mchehab@infradead.org),
  9. * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
  10. * and the TVP7002 driver in the TI LSP 2.10.00.14. Revisions by
  11. * Muralidharan Karicheri and Snehaprabha Narnakaje (TI).
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26. */
  27. #include <linux/delay.h>
  28. #include <linux/i2c.h>
  29. #include <linux/slab.h>
  30. #include <linux/videodev2.h>
  31. #include <linux/module.h>
  32. #include <media/tvp7002.h>
  33. #include <media/v4l2-device.h>
  34. #include <media/v4l2-chip-ident.h>
  35. #include <media/v4l2-common.h>
  36. #include <media/v4l2-ctrls.h>
  37. #include "tvp7002_reg.h"
  38. MODULE_DESCRIPTION("TI TVP7002 Video and Graphics Digitizer driver");
  39. MODULE_AUTHOR("Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>");
  40. MODULE_LICENSE("GPL");
  41. /* Module Name */
  42. #define TVP7002_MODULE_NAME "tvp7002"
  43. /* I2C retry attempts */
  44. #define I2C_RETRY_COUNT (5)
  45. /* End of registers */
  46. #define TVP7002_EOR 0x5c
  47. /* Read write definition for registers */
  48. #define TVP7002_READ 0
  49. #define TVP7002_WRITE 1
  50. #define TVP7002_RESERVED 2
  51. /* Interlaced vs progressive mask and shift */
  52. #define TVP7002_IP_SHIFT 5
  53. #define TVP7002_INPR_MASK (0x01 << TVP7002_IP_SHIFT)
  54. /* Shift for CPL and LPF registers */
  55. #define TVP7002_CL_SHIFT 8
  56. #define TVP7002_CL_MASK 0x0f
  57. /* Debug functions */
  58. static bool debug;
  59. module_param(debug, bool, 0644);
  60. MODULE_PARM_DESC(debug, "Debug level (0-2)");
  61. /* Structure for register values */
  62. struct i2c_reg_value {
  63. u8 reg;
  64. u8 value;
  65. u8 type;
  66. };
  67. /*
  68. * Register default values (according to tvp7002 datasheet)
  69. * In the case of read-only registers, the value (0xff) is
  70. * never written. R/W functionality is controlled by the
  71. * writable bit in the register struct definition.
  72. */
  73. static const struct i2c_reg_value tvp7002_init_default[] = {
  74. { TVP7002_CHIP_REV, 0xff, TVP7002_READ },
  75. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
  76. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
  77. { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
  78. { TVP7002_HPLL_PHASE_SEL, 0x80, TVP7002_WRITE },
  79. { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  80. { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  81. { TVP7002_HSYNC_OUT_W, 0x60, TVP7002_WRITE },
  82. { TVP7002_B_FINE_GAIN, 0x00, TVP7002_WRITE },
  83. { TVP7002_G_FINE_GAIN, 0x00, TVP7002_WRITE },
  84. { TVP7002_R_FINE_GAIN, 0x00, TVP7002_WRITE },
  85. { TVP7002_B_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
  86. { TVP7002_G_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
  87. { TVP7002_R_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
  88. { TVP7002_SYNC_CTL_1, 0x20, TVP7002_WRITE },
  89. { TVP7002_HPLL_AND_CLAMP_CTL, 0x2e, TVP7002_WRITE },
  90. { TVP7002_SYNC_ON_G_THRS, 0x5d, TVP7002_WRITE },
  91. { TVP7002_SYNC_SEPARATOR_THRS, 0x47, TVP7002_WRITE },
  92. { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
  93. { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
  94. { TVP7002_SYNC_DETECT_STAT, 0xff, TVP7002_READ },
  95. { TVP7002_OUT_FORMATTER, 0x47, TVP7002_WRITE },
  96. { TVP7002_MISC_CTL_1, 0x01, TVP7002_WRITE },
  97. { TVP7002_MISC_CTL_2, 0x00, TVP7002_WRITE },
  98. { TVP7002_MISC_CTL_3, 0x01, TVP7002_WRITE },
  99. { TVP7002_IN_MUX_SEL_1, 0x00, TVP7002_WRITE },
  100. { TVP7002_IN_MUX_SEL_2, 0x67, TVP7002_WRITE },
  101. { TVP7002_B_AND_G_COARSE_GAIN, 0x77, TVP7002_WRITE },
  102. { TVP7002_R_COARSE_GAIN, 0x07, TVP7002_WRITE },
  103. { TVP7002_FINE_OFF_LSBS, 0x00, TVP7002_WRITE },
  104. { TVP7002_B_COARSE_OFF, 0x10, TVP7002_WRITE },
  105. { TVP7002_G_COARSE_OFF, 0x10, TVP7002_WRITE },
  106. { TVP7002_R_COARSE_OFF, 0x10, TVP7002_WRITE },
  107. { TVP7002_HSOUT_OUT_START, 0x08, TVP7002_WRITE },
  108. { TVP7002_MISC_CTL_4, 0x00, TVP7002_WRITE },
  109. { TVP7002_B_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
  110. { TVP7002_G_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
  111. { TVP7002_R_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
  112. { TVP7002_AUTO_LVL_CTL_ENABLE, 0x80, TVP7002_WRITE },
  113. { TVP7002_DGTL_ALC_OUT_MSBS, 0xff, TVP7002_READ },
  114. { TVP7002_AUTO_LVL_CTL_FILTER, 0x53, TVP7002_WRITE },
  115. { 0x29, 0x08, TVP7002_RESERVED },
  116. { TVP7002_FINE_CLAMP_CTL, 0x07, TVP7002_WRITE },
  117. /* PWR_CTL is controlled only by the probe and reset functions */
  118. { TVP7002_PWR_CTL, 0x00, TVP7002_RESERVED },
  119. { TVP7002_ADC_SETUP, 0x50, TVP7002_WRITE },
  120. { TVP7002_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
  121. { TVP7002_SOG_CLAMP, 0x80, TVP7002_WRITE },
  122. { TVP7002_RGB_COARSE_CLAMP_CTL, 0x8c, TVP7002_WRITE },
  123. { TVP7002_SOG_COARSE_CLAMP_CTL, 0x04, TVP7002_WRITE },
  124. { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
  125. { 0x32, 0x18, TVP7002_RESERVED },
  126. { 0x33, 0x60, TVP7002_RESERVED },
  127. { TVP7002_MVIS_STRIPPER_W, 0xff, TVP7002_RESERVED },
  128. { TVP7002_VSYNC_ALGN, 0x10, TVP7002_WRITE },
  129. { TVP7002_SYNC_BYPASS, 0x00, TVP7002_WRITE },
  130. { TVP7002_L_FRAME_STAT_LSBS, 0xff, TVP7002_READ },
  131. { TVP7002_L_FRAME_STAT_MSBS, 0xff, TVP7002_READ },
  132. { TVP7002_CLK_L_STAT_LSBS, 0xff, TVP7002_READ },
  133. { TVP7002_CLK_L_STAT_MSBS, 0xff, TVP7002_READ },
  134. { TVP7002_HSYNC_W, 0xff, TVP7002_READ },
  135. { TVP7002_VSYNC_W, 0xff, TVP7002_READ },
  136. { TVP7002_L_LENGTH_TOL, 0x03, TVP7002_WRITE },
  137. { 0x3e, 0x60, TVP7002_RESERVED },
  138. { TVP7002_VIDEO_BWTH_CTL, 0x01, TVP7002_WRITE },
  139. { TVP7002_AVID_START_PIXEL_LSBS, 0x01, TVP7002_WRITE },
  140. { TVP7002_AVID_START_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
  141. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x06, TVP7002_WRITE },
  142. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
  143. { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
  144. { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
  145. { TVP7002_VBLK_F_0_DURATION, 0x1e, TVP7002_WRITE },
  146. { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
  147. { TVP7002_FBIT_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
  148. { TVP7002_FBIT_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
  149. { TVP7002_YUV_Y_G_COEF_LSBS, 0xe3, TVP7002_WRITE },
  150. { TVP7002_YUV_Y_G_COEF_MSBS, 0x16, TVP7002_WRITE },
  151. { TVP7002_YUV_Y_B_COEF_LSBS, 0x4f, TVP7002_WRITE },
  152. { TVP7002_YUV_Y_B_COEF_MSBS, 0x02, TVP7002_WRITE },
  153. { TVP7002_YUV_Y_R_COEF_LSBS, 0xce, TVP7002_WRITE },
  154. { TVP7002_YUV_Y_R_COEF_MSBS, 0x06, TVP7002_WRITE },
  155. { TVP7002_YUV_U_G_COEF_LSBS, 0xab, TVP7002_WRITE },
  156. { TVP7002_YUV_U_G_COEF_MSBS, 0xf3, TVP7002_WRITE },
  157. { TVP7002_YUV_U_B_COEF_LSBS, 0x00, TVP7002_WRITE },
  158. { TVP7002_YUV_U_B_COEF_MSBS, 0x10, TVP7002_WRITE },
  159. { TVP7002_YUV_U_R_COEF_LSBS, 0x55, TVP7002_WRITE },
  160. { TVP7002_YUV_U_R_COEF_MSBS, 0xfc, TVP7002_WRITE },
  161. { TVP7002_YUV_V_G_COEF_LSBS, 0x78, TVP7002_WRITE },
  162. { TVP7002_YUV_V_G_COEF_MSBS, 0xf1, TVP7002_WRITE },
  163. { TVP7002_YUV_V_B_COEF_LSBS, 0x88, TVP7002_WRITE },
  164. { TVP7002_YUV_V_B_COEF_MSBS, 0xfe, TVP7002_WRITE },
  165. { TVP7002_YUV_V_R_COEF_LSBS, 0x00, TVP7002_WRITE },
  166. { TVP7002_YUV_V_R_COEF_MSBS, 0x10, TVP7002_WRITE },
  167. /* This signals end of register values */
  168. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  169. };
  170. /* Register parameters for 480P */
  171. static const struct i2c_reg_value tvp7002_parms_480P[] = {
  172. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x35, TVP7002_WRITE },
  173. { TVP7002_HPLL_FDBK_DIV_LSBS, 0xa0, TVP7002_WRITE },
  174. { TVP7002_HPLL_CRTL, 0x02, TVP7002_WRITE },
  175. { TVP7002_AVID_START_PIXEL_LSBS, 0x91, TVP7002_WRITE },
  176. { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
  177. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0B, TVP7002_WRITE },
  178. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
  179. { TVP7002_VBLK_F_0_START_L_OFF, 0x03, TVP7002_WRITE },
  180. { TVP7002_VBLK_F_1_START_L_OFF, 0x01, TVP7002_WRITE },
  181. { TVP7002_VBLK_F_0_DURATION, 0x13, TVP7002_WRITE },
  182. { TVP7002_VBLK_F_1_DURATION, 0x13, TVP7002_WRITE },
  183. { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
  184. { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
  185. { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
  186. { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
  187. { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
  188. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  189. };
  190. /* Register parameters for 576P */
  191. static const struct i2c_reg_value tvp7002_parms_576P[] = {
  192. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x36, TVP7002_WRITE },
  193. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
  194. { TVP7002_HPLL_CRTL, 0x18, TVP7002_WRITE },
  195. { TVP7002_AVID_START_PIXEL_LSBS, 0x9B, TVP7002_WRITE },
  196. { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
  197. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0F, TVP7002_WRITE },
  198. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
  199. { TVP7002_VBLK_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
  200. { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
  201. { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
  202. { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
  203. { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
  204. { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
  205. { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
  206. { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
  207. { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
  208. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  209. };
  210. /* Register parameters for 1080I60 */
  211. static const struct i2c_reg_value tvp7002_parms_1080I60[] = {
  212. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
  213. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
  214. { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
  215. { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
  216. { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
  217. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
  218. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
  219. { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
  220. { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
  221. { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
  222. { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
  223. { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
  224. { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  225. { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  226. { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
  227. { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
  228. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  229. };
  230. /* Register parameters for 1080P60 */
  231. static const struct i2c_reg_value tvp7002_parms_1080P60[] = {
  232. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
  233. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
  234. { TVP7002_HPLL_CRTL, 0xE0, TVP7002_WRITE },
  235. { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
  236. { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
  237. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
  238. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
  239. { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
  240. { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
  241. { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
  242. { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
  243. { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
  244. { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  245. { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  246. { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
  247. { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
  248. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  249. };
  250. /* Register parameters for 1080I50 */
  251. static const struct i2c_reg_value tvp7002_parms_1080I50[] = {
  252. { TVP7002_HPLL_FDBK_DIV_MSBS, 0xa5, TVP7002_WRITE },
  253. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
  254. { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
  255. { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
  256. { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
  257. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
  258. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
  259. { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
  260. { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
  261. { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
  262. { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
  263. { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
  264. { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  265. { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  266. { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
  267. { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
  268. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  269. };
  270. /* Register parameters for 720P60 */
  271. static const struct i2c_reg_value tvp7002_parms_720P60[] = {
  272. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
  273. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
  274. { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
  275. { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
  276. { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
  277. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
  278. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
  279. { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
  280. { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
  281. { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
  282. { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
  283. { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
  284. { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  285. { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  286. { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
  287. { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
  288. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  289. };
  290. /* Register parameters for 720P50 */
  291. static const struct i2c_reg_value tvp7002_parms_720P50[] = {
  292. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x7b, TVP7002_WRITE },
  293. { TVP7002_HPLL_FDBK_DIV_LSBS, 0xc0, TVP7002_WRITE },
  294. { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
  295. { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
  296. { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
  297. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
  298. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
  299. { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
  300. { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
  301. { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
  302. { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
  303. { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
  304. { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  305. { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  306. { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
  307. { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
  308. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  309. };
  310. /* Preset definition for handling device operation */
  311. struct tvp7002_preset_definition {
  312. u32 preset;
  313. const struct i2c_reg_value *p_settings;
  314. enum v4l2_colorspace color_space;
  315. enum v4l2_field scanmode;
  316. u16 progressive;
  317. u16 lines_per_frame;
  318. u16 cpl_min;
  319. u16 cpl_max;
  320. };
  321. /* Struct list for digital video presets */
  322. static const struct tvp7002_preset_definition tvp7002_presets[] = {
  323. {
  324. V4L2_DV_720P60,
  325. tvp7002_parms_720P60,
  326. V4L2_COLORSPACE_REC709,
  327. V4L2_FIELD_NONE,
  328. 1,
  329. 0x2EE,
  330. 135,
  331. 153
  332. },
  333. {
  334. V4L2_DV_1080I60,
  335. tvp7002_parms_1080I60,
  336. V4L2_COLORSPACE_REC709,
  337. V4L2_FIELD_INTERLACED,
  338. 0,
  339. 0x465,
  340. 181,
  341. 205
  342. },
  343. {
  344. V4L2_DV_1080I50,
  345. tvp7002_parms_1080I50,
  346. V4L2_COLORSPACE_REC709,
  347. V4L2_FIELD_INTERLACED,
  348. 0,
  349. 0x465,
  350. 217,
  351. 245
  352. },
  353. {
  354. V4L2_DV_720P50,
  355. tvp7002_parms_720P50,
  356. V4L2_COLORSPACE_REC709,
  357. V4L2_FIELD_NONE,
  358. 1,
  359. 0x2EE,
  360. 163,
  361. 183
  362. },
  363. {
  364. V4L2_DV_1080P60,
  365. tvp7002_parms_1080P60,
  366. V4L2_COLORSPACE_REC709,
  367. V4L2_FIELD_NONE,
  368. 1,
  369. 0x465,
  370. 90,
  371. 102
  372. },
  373. {
  374. V4L2_DV_480P59_94,
  375. tvp7002_parms_480P,
  376. V4L2_COLORSPACE_SMPTE170M,
  377. V4L2_FIELD_NONE,
  378. 1,
  379. 0x20D,
  380. 0xffff,
  381. 0xffff
  382. },
  383. {
  384. V4L2_DV_576P50,
  385. tvp7002_parms_576P,
  386. V4L2_COLORSPACE_SMPTE170M,
  387. V4L2_FIELD_NONE,
  388. 1,
  389. 0x271,
  390. 0xffff,
  391. 0xffff
  392. }
  393. };
  394. #define NUM_PRESETS ARRAY_SIZE(tvp7002_presets)
  395. /* Device definition */
  396. struct tvp7002 {
  397. struct v4l2_subdev sd;
  398. struct v4l2_ctrl_handler hdl;
  399. const struct tvp7002_config *pdata;
  400. int ver;
  401. int streaming;
  402. const struct tvp7002_preset_definition *current_preset;
  403. };
  404. /*
  405. * to_tvp7002 - Obtain device handler TVP7002
  406. * @sd: ptr to v4l2_subdev struct
  407. *
  408. * Returns device handler tvp7002.
  409. */
  410. static inline struct tvp7002 *to_tvp7002(struct v4l2_subdev *sd)
  411. {
  412. return container_of(sd, struct tvp7002, sd);
  413. }
  414. static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
  415. {
  416. return &container_of(ctrl->handler, struct tvp7002, hdl)->sd;
  417. }
  418. /*
  419. * tvp7002_read - Read a value from a register in an TVP7002
  420. * @sd: ptr to v4l2_subdev struct
  421. * @addr: TVP7002 register address
  422. * @dst: pointer to 8-bit destination
  423. *
  424. * Returns value read if successful, or non-zero (-1) otherwise.
  425. */
  426. static int tvp7002_read(struct v4l2_subdev *sd, u8 addr, u8 *dst)
  427. {
  428. struct i2c_client *c = v4l2_get_subdevdata(sd);
  429. int retry;
  430. int error;
  431. for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
  432. error = i2c_smbus_read_byte_data(c, addr);
  433. if (error >= 0) {
  434. *dst = (u8)error;
  435. return 0;
  436. }
  437. msleep_interruptible(10);
  438. }
  439. v4l2_err(sd, "TVP7002 read error %d\n", error);
  440. return error;
  441. }
  442. /*
  443. * tvp7002_read_err() - Read a register value with error code
  444. * @sd: pointer to standard V4L2 sub-device structure
  445. * @reg: destination register
  446. * @val: value to be read
  447. * @err: pointer to error value
  448. *
  449. * Read a value in a register and save error value in pointer.
  450. * Also update the register table if successful
  451. */
  452. static inline void tvp7002_read_err(struct v4l2_subdev *sd, u8 reg,
  453. u8 *dst, int *err)
  454. {
  455. if (!*err)
  456. *err = tvp7002_read(sd, reg, dst);
  457. }
  458. /*
  459. * tvp7002_write() - Write a value to a register in TVP7002
  460. * @sd: ptr to v4l2_subdev struct
  461. * @addr: TVP7002 register address
  462. * @value: value to be written to the register
  463. *
  464. * Write a value to a register in an TVP7002 decoder device.
  465. * Returns zero if successful, or non-zero otherwise.
  466. */
  467. static int tvp7002_write(struct v4l2_subdev *sd, u8 addr, u8 value)
  468. {
  469. struct i2c_client *c;
  470. int retry;
  471. int error;
  472. c = v4l2_get_subdevdata(sd);
  473. for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
  474. error = i2c_smbus_write_byte_data(c, addr, value);
  475. if (error >= 0)
  476. return 0;
  477. v4l2_warn(sd, "Write: retry ... %d\n", retry);
  478. msleep_interruptible(10);
  479. }
  480. v4l2_err(sd, "TVP7002 write error %d\n", error);
  481. return error;
  482. }
  483. /*
  484. * tvp7002_write_err() - Write a register value with error code
  485. * @sd: pointer to standard V4L2 sub-device structure
  486. * @reg: destination register
  487. * @val: value to be written
  488. * @err: pointer to error value
  489. *
  490. * Write a value in a register and save error value in pointer.
  491. * Also update the register table if successful
  492. */
  493. static inline void tvp7002_write_err(struct v4l2_subdev *sd, u8 reg,
  494. u8 val, int *err)
  495. {
  496. if (!*err)
  497. *err = tvp7002_write(sd, reg, val);
  498. }
  499. /*
  500. * tvp7002_g_chip_ident() - Get chip identification number
  501. * @sd: ptr to v4l2_subdev struct
  502. * @chip: ptr to v4l2_dbg_chip_ident struct
  503. *
  504. * Obtains the chip's identification number.
  505. * Returns zero or -EINVAL if read operation fails.
  506. */
  507. static int tvp7002_g_chip_ident(struct v4l2_subdev *sd,
  508. struct v4l2_dbg_chip_ident *chip)
  509. {
  510. u8 rev;
  511. int error;
  512. struct i2c_client *client = v4l2_get_subdevdata(sd);
  513. error = tvp7002_read(sd, TVP7002_CHIP_REV, &rev);
  514. if (error < 0)
  515. return error;
  516. return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVP7002, rev);
  517. }
  518. /*
  519. * tvp7002_write_inittab() - Write initialization values
  520. * @sd: ptr to v4l2_subdev struct
  521. * @regs: ptr to i2c_reg_value struct
  522. *
  523. * Write initialization values.
  524. * Returns zero or -EINVAL if read operation fails.
  525. */
  526. static int tvp7002_write_inittab(struct v4l2_subdev *sd,
  527. const struct i2c_reg_value *regs)
  528. {
  529. int error = 0;
  530. /* Initialize the first (defined) registers */
  531. while (TVP7002_EOR != regs->reg) {
  532. if (TVP7002_WRITE == regs->type)
  533. tvp7002_write_err(sd, regs->reg, regs->value, &error);
  534. regs++;
  535. }
  536. return error;
  537. }
  538. /*
  539. * tvp7002_s_dv_preset() - Set digital video preset
  540. * @sd: ptr to v4l2_subdev struct
  541. * @dv_preset: ptr to v4l2_dv_preset struct
  542. *
  543. * Set the digital video preset for a TVP7002 decoder device.
  544. * Returns zero when successful or -EINVAL if register access fails.
  545. */
  546. static int tvp7002_s_dv_preset(struct v4l2_subdev *sd,
  547. struct v4l2_dv_preset *dv_preset)
  548. {
  549. struct tvp7002 *device = to_tvp7002(sd);
  550. u32 preset;
  551. int i;
  552. for (i = 0; i < NUM_PRESETS; i++) {
  553. preset = tvp7002_presets[i].preset;
  554. if (preset == dv_preset->preset) {
  555. device->current_preset = &tvp7002_presets[i];
  556. return tvp7002_write_inittab(sd, tvp7002_presets[i].p_settings);
  557. }
  558. }
  559. return -EINVAL;
  560. }
  561. /*
  562. * tvp7002_s_ctrl() - Set a control
  563. * @ctrl: ptr to v4l2_ctrl struct
  564. *
  565. * Set a control in TVP7002 decoder device.
  566. * Returns zero when successful or -EINVAL if register access fails.
  567. */
  568. static int tvp7002_s_ctrl(struct v4l2_ctrl *ctrl)
  569. {
  570. struct v4l2_subdev *sd = to_sd(ctrl);
  571. int error = 0;
  572. switch (ctrl->id) {
  573. case V4L2_CID_GAIN:
  574. tvp7002_write_err(sd, TVP7002_R_FINE_GAIN, ctrl->val, &error);
  575. tvp7002_write_err(sd, TVP7002_G_FINE_GAIN, ctrl->val, &error);
  576. tvp7002_write_err(sd, TVP7002_B_FINE_GAIN, ctrl->val, &error);
  577. return error;
  578. }
  579. return -EINVAL;
  580. }
  581. /*
  582. * tvp7002_mbus_fmt() - V4L2 decoder interface handler for try/s/g_mbus_fmt
  583. * @sd: pointer to standard V4L2 sub-device structure
  584. * @f: pointer to mediabus format structure
  585. *
  586. * Negotiate the image capture size and mediabus format.
  587. * There is only one possible format, so this single function works for
  588. * get, set and try.
  589. */
  590. static int tvp7002_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *f)
  591. {
  592. struct tvp7002 *device = to_tvp7002(sd);
  593. struct v4l2_dv_enum_preset e_preset;
  594. int error;
  595. /* Calculate height and width based on current standard */
  596. error = v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset);
  597. if (error)
  598. return error;
  599. f->width = e_preset.width;
  600. f->height = e_preset.height;
  601. f->code = V4L2_MBUS_FMT_YUYV10_1X20;
  602. f->field = device->current_preset->scanmode;
  603. f->colorspace = device->current_preset->color_space;
  604. v4l2_dbg(1, debug, sd, "MBUS_FMT: Width - %d, Height - %d",
  605. f->width, f->height);
  606. return 0;
  607. }
  608. /*
  609. * tvp7002_query_dv_preset() - query DV preset
  610. * @sd: pointer to standard V4L2 sub-device structure
  611. * @qpreset: standard V4L2 v4l2_dv_preset structure
  612. *
  613. * Returns the current DV preset by TVP7002. If no active input is
  614. * detected, returns -EINVAL
  615. */
  616. static int tvp7002_query_dv_preset(struct v4l2_subdev *sd,
  617. struct v4l2_dv_preset *qpreset)
  618. {
  619. const struct tvp7002_preset_definition *presets = tvp7002_presets;
  620. struct tvp7002 *device;
  621. u8 progressive;
  622. u32 lpfr;
  623. u32 cpln;
  624. int error = 0;
  625. u8 lpf_lsb;
  626. u8 lpf_msb;
  627. u8 cpl_lsb;
  628. u8 cpl_msb;
  629. int index;
  630. /* Return invalid preset if no active input is detected */
  631. qpreset->preset = V4L2_DV_INVALID;
  632. device = to_tvp7002(sd);
  633. /* Read standards from device registers */
  634. tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_LSBS, &lpf_lsb, &error);
  635. tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_MSBS, &lpf_msb, &error);
  636. if (error < 0)
  637. return error;
  638. tvp7002_read_err(sd, TVP7002_CLK_L_STAT_LSBS, &cpl_lsb, &error);
  639. tvp7002_read_err(sd, TVP7002_CLK_L_STAT_MSBS, &cpl_msb, &error);
  640. if (error < 0)
  641. return error;
  642. /* Get lines per frame, clocks per line and interlaced/progresive */
  643. lpfr = lpf_lsb | ((TVP7002_CL_MASK & lpf_msb) << TVP7002_CL_SHIFT);
  644. cpln = cpl_lsb | ((TVP7002_CL_MASK & cpl_msb) << TVP7002_CL_SHIFT);
  645. progressive = (lpf_msb & TVP7002_INPR_MASK) >> TVP7002_IP_SHIFT;
  646. /* Do checking of video modes */
  647. for (index = 0; index < NUM_PRESETS; index++, presets++)
  648. if (lpfr == presets->lines_per_frame &&
  649. progressive == presets->progressive) {
  650. if (presets->cpl_min == 0xffff)
  651. break;
  652. if (cpln >= presets->cpl_min && cpln <= presets->cpl_max)
  653. break;
  654. }
  655. if (index == NUM_PRESETS) {
  656. v4l2_dbg(1, debug, sd, "detection failed: lpf = %x, cpl = %x\n",
  657. lpfr, cpln);
  658. return 0;
  659. }
  660. /* Set values in found preset */
  661. qpreset->preset = presets->preset;
  662. /* Update lines per frame and clocks per line info */
  663. v4l2_dbg(1, debug, sd, "detected preset: %d\n", presets->preset);
  664. return 0;
  665. }
  666. #ifdef CONFIG_VIDEO_ADV_DEBUG
  667. /*
  668. * tvp7002_g_register() - Get the value of a register
  669. * @sd: ptr to v4l2_subdev struct
  670. * @reg: ptr to v4l2_dbg_register struct
  671. *
  672. * Get the value of a TVP7002 decoder device register.
  673. * Returns zero when successful, -EINVAL if register read fails or
  674. * access to I2C client fails, -EPERM if the call is not allowed
  675. * by disabled CAP_SYS_ADMIN.
  676. */
  677. static int tvp7002_g_register(struct v4l2_subdev *sd,
  678. struct v4l2_dbg_register *reg)
  679. {
  680. struct i2c_client *client = v4l2_get_subdevdata(sd);
  681. u8 val;
  682. int ret;
  683. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  684. return -EINVAL;
  685. if (!capable(CAP_SYS_ADMIN))
  686. return -EPERM;
  687. ret = tvp7002_read(sd, reg->reg & 0xff, &val);
  688. reg->val = val;
  689. return ret;
  690. }
  691. /*
  692. * tvp7002_s_register() - set a control
  693. * @sd: ptr to v4l2_subdev struct
  694. * @reg: ptr to v4l2_dbg_register struct
  695. *
  696. * Get the value of a TVP7002 decoder device register.
  697. * Returns zero when successful, -EINVAL if register read fails or
  698. * -EPERM if call not allowed.
  699. */
  700. static int tvp7002_s_register(struct v4l2_subdev *sd,
  701. struct v4l2_dbg_register *reg)
  702. {
  703. struct i2c_client *client = v4l2_get_subdevdata(sd);
  704. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  705. return -EINVAL;
  706. if (!capable(CAP_SYS_ADMIN))
  707. return -EPERM;
  708. return tvp7002_write(sd, reg->reg & 0xff, reg->val & 0xff);
  709. }
  710. #endif
  711. /*
  712. * tvp7002_enum_mbus_fmt() - Enum supported mediabus formats
  713. * @sd: pointer to standard V4L2 sub-device structure
  714. * @index: format index
  715. * @code: pointer to mediabus format
  716. *
  717. * Enumerate supported mediabus formats.
  718. */
  719. static int tvp7002_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index,
  720. enum v4l2_mbus_pixelcode *code)
  721. {
  722. /* Check requested format index is within range */
  723. if (index)
  724. return -EINVAL;
  725. *code = V4L2_MBUS_FMT_YUYV10_1X20;
  726. return 0;
  727. }
  728. /*
  729. * tvp7002_s_stream() - V4L2 decoder i/f handler for s_stream
  730. * @sd: pointer to standard V4L2 sub-device structure
  731. * @enable: streaming enable or disable
  732. *
  733. * Sets streaming to enable or disable, if possible.
  734. */
  735. static int tvp7002_s_stream(struct v4l2_subdev *sd, int enable)
  736. {
  737. struct tvp7002 *device = to_tvp7002(sd);
  738. int error = 0;
  739. if (device->streaming == enable)
  740. return 0;
  741. if (enable) {
  742. /* Set output state on (low impedance means stream on) */
  743. error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x00);
  744. device->streaming = enable;
  745. } else {
  746. /* Set output state off (high impedance means stream off) */
  747. error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x03);
  748. if (error)
  749. v4l2_dbg(1, debug, sd, "Unable to stop streaming\n");
  750. device->streaming = enable;
  751. }
  752. return error;
  753. }
  754. /*
  755. * tvp7002_log_status() - Print information about register settings
  756. * @sd: ptr to v4l2_subdev struct
  757. *
  758. * Log register values of a TVP7002 decoder device.
  759. * Returns zero or -EINVAL if read operation fails.
  760. */
  761. static int tvp7002_log_status(struct v4l2_subdev *sd)
  762. {
  763. const struct tvp7002_preset_definition *presets = tvp7002_presets;
  764. struct tvp7002 *device = to_tvp7002(sd);
  765. struct v4l2_dv_enum_preset e_preset;
  766. struct v4l2_dv_preset detected;
  767. int i;
  768. detected.preset = V4L2_DV_INVALID;
  769. /* Find my current standard*/
  770. tvp7002_query_dv_preset(sd, &detected);
  771. /* Print standard related code values */
  772. for (i = 0; i < NUM_PRESETS; i++, presets++)
  773. if (presets->preset == detected.preset)
  774. break;
  775. if (v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset))
  776. return -EINVAL;
  777. v4l2_info(sd, "Selected DV Preset: %s\n", e_preset.name);
  778. v4l2_info(sd, " Pixels per line: %u\n", e_preset.width);
  779. v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height);
  780. if (i == NUM_PRESETS) {
  781. v4l2_info(sd, "Detected DV Preset: None\n");
  782. } else {
  783. if (v4l_fill_dv_preset_info(presets->preset, &e_preset))
  784. return -EINVAL;
  785. v4l2_info(sd, "Detected DV Preset: %s\n", e_preset.name);
  786. v4l2_info(sd, " Pixels per line: %u\n", e_preset.width);
  787. v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height);
  788. }
  789. v4l2_info(sd, "Streaming enabled: %s\n",
  790. device->streaming ? "yes" : "no");
  791. /* Print the current value of the gain control */
  792. v4l2_ctrl_handler_log_status(&device->hdl, sd->name);
  793. return 0;
  794. }
  795. /*
  796. * tvp7002_enum_dv_presets() - Enum supported digital video formats
  797. * @sd: pointer to standard V4L2 sub-device structure
  798. * @preset: pointer to format struct
  799. *
  800. * Enumerate supported digital video formats.
  801. */
  802. static int tvp7002_enum_dv_presets(struct v4l2_subdev *sd,
  803. struct v4l2_dv_enum_preset *preset)
  804. {
  805. /* Check requested format index is within range */
  806. if (preset->index >= NUM_PRESETS)
  807. return -EINVAL;
  808. return v4l_fill_dv_preset_info(tvp7002_presets[preset->index].preset, preset);
  809. }
  810. static const struct v4l2_ctrl_ops tvp7002_ctrl_ops = {
  811. .s_ctrl = tvp7002_s_ctrl,
  812. };
  813. /* V4L2 core operation handlers */
  814. static const struct v4l2_subdev_core_ops tvp7002_core_ops = {
  815. .g_chip_ident = tvp7002_g_chip_ident,
  816. .log_status = tvp7002_log_status,
  817. .g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
  818. .try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
  819. .s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
  820. .g_ctrl = v4l2_subdev_g_ctrl,
  821. .s_ctrl = v4l2_subdev_s_ctrl,
  822. .queryctrl = v4l2_subdev_queryctrl,
  823. .querymenu = v4l2_subdev_querymenu,
  824. #ifdef CONFIG_VIDEO_ADV_DEBUG
  825. .g_register = tvp7002_g_register,
  826. .s_register = tvp7002_s_register,
  827. #endif
  828. };
  829. /* Specific video subsystem operation handlers */
  830. static const struct v4l2_subdev_video_ops tvp7002_video_ops = {
  831. .enum_dv_presets = tvp7002_enum_dv_presets,
  832. .s_dv_preset = tvp7002_s_dv_preset,
  833. .query_dv_preset = tvp7002_query_dv_preset,
  834. .s_stream = tvp7002_s_stream,
  835. .g_mbus_fmt = tvp7002_mbus_fmt,
  836. .try_mbus_fmt = tvp7002_mbus_fmt,
  837. .s_mbus_fmt = tvp7002_mbus_fmt,
  838. .enum_mbus_fmt = tvp7002_enum_mbus_fmt,
  839. };
  840. /* V4L2 top level operation handlers */
  841. static const struct v4l2_subdev_ops tvp7002_ops = {
  842. .core = &tvp7002_core_ops,
  843. .video = &tvp7002_video_ops,
  844. };
  845. /*
  846. * tvp7002_probe - Probe a TVP7002 device
  847. * @c: ptr to i2c_client struct
  848. * @id: ptr to i2c_device_id struct
  849. *
  850. * Initialize the TVP7002 device
  851. * Returns zero when successful, -EINVAL if register read fails or
  852. * -EIO if i2c access is not available.
  853. */
  854. static int tvp7002_probe(struct i2c_client *c, const struct i2c_device_id *id)
  855. {
  856. struct v4l2_subdev *sd;
  857. struct tvp7002 *device;
  858. struct v4l2_dv_preset preset;
  859. int polarity_a;
  860. int polarity_b;
  861. u8 revision;
  862. int error;
  863. /* Check if the adapter supports the needed features */
  864. if (!i2c_check_functionality(c->adapter,
  865. I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  866. return -EIO;
  867. if (!c->dev.platform_data) {
  868. v4l_err(c, "No platform data!!\n");
  869. return -ENODEV;
  870. }
  871. device = kzalloc(sizeof(struct tvp7002), GFP_KERNEL);
  872. if (!device)
  873. return -ENOMEM;
  874. sd = &device->sd;
  875. device->pdata = c->dev.platform_data;
  876. device->current_preset = tvp7002_presets;
  877. /* Tell v4l2 the device is ready */
  878. v4l2_i2c_subdev_init(sd, c, &tvp7002_ops);
  879. v4l_info(c, "tvp7002 found @ 0x%02x (%s)\n",
  880. c->addr, c->adapter->name);
  881. error = tvp7002_read(sd, TVP7002_CHIP_REV, &revision);
  882. if (error < 0)
  883. goto found_error;
  884. /* Get revision number */
  885. v4l2_info(sd, "Rev. %02x detected.\n", revision);
  886. if (revision != 0x02)
  887. v4l2_info(sd, "Unknown revision detected.\n");
  888. /* Initializes TVP7002 to its default values */
  889. error = tvp7002_write_inittab(sd, tvp7002_init_default);
  890. if (error < 0)
  891. goto found_error;
  892. /* Set polarity information after registers have been set */
  893. polarity_a = 0x20 | device->pdata->hs_polarity << 5
  894. | device->pdata->vs_polarity << 2;
  895. error = tvp7002_write(sd, TVP7002_SYNC_CTL_1, polarity_a);
  896. if (error < 0)
  897. goto found_error;
  898. polarity_b = 0x01 | device->pdata->fid_polarity << 2
  899. | device->pdata->sog_polarity << 1
  900. | device->pdata->clk_polarity;
  901. error = tvp7002_write(sd, TVP7002_MISC_CTL_3, polarity_b);
  902. if (error < 0)
  903. goto found_error;
  904. /* Set registers according to default video mode */
  905. preset.preset = device->current_preset->preset;
  906. error = tvp7002_s_dv_preset(sd, &preset);
  907. v4l2_ctrl_handler_init(&device->hdl, 1);
  908. v4l2_ctrl_new_std(&device->hdl, &tvp7002_ctrl_ops,
  909. V4L2_CID_GAIN, 0, 255, 1, 0);
  910. sd->ctrl_handler = &device->hdl;
  911. if (device->hdl.error) {
  912. int err = device->hdl.error;
  913. v4l2_ctrl_handler_free(&device->hdl);
  914. kfree(device);
  915. return err;
  916. }
  917. v4l2_ctrl_handler_setup(&device->hdl);
  918. found_error:
  919. if (error < 0)
  920. kfree(device);
  921. return error;
  922. }
  923. /*
  924. * tvp7002_remove - Remove TVP7002 device support
  925. * @c: ptr to i2c_client struct
  926. *
  927. * Reset the TVP7002 device
  928. * Returns zero.
  929. */
  930. static int tvp7002_remove(struct i2c_client *c)
  931. {
  932. struct v4l2_subdev *sd = i2c_get_clientdata(c);
  933. struct tvp7002 *device = to_tvp7002(sd);
  934. v4l2_dbg(1, debug, sd, "Removing tvp7002 adapter"
  935. "on address 0x%x\n", c->addr);
  936. v4l2_device_unregister_subdev(sd);
  937. v4l2_ctrl_handler_free(&device->hdl);
  938. kfree(device);
  939. return 0;
  940. }
  941. /* I2C Device ID table */
  942. static const struct i2c_device_id tvp7002_id[] = {
  943. { "tvp7002", 0 },
  944. { }
  945. };
  946. MODULE_DEVICE_TABLE(i2c, tvp7002_id);
  947. /* I2C driver data */
  948. static struct i2c_driver tvp7002_driver = {
  949. .driver = {
  950. .owner = THIS_MODULE,
  951. .name = TVP7002_MODULE_NAME,
  952. },
  953. .probe = tvp7002_probe,
  954. .remove = tvp7002_remove,
  955. .id_table = tvp7002_id,
  956. };
  957. module_i2c_driver(tvp7002_driver);