tm6000-core.c 26 KB

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  1. /*
  2. * tm6000-core.c - driver for TM5600/TM6000/TM6010 USB video capture devices
  3. *
  4. * Copyright (C) 2006-2007 Mauro Carvalho Chehab <mchehab@infradead.org>
  5. *
  6. * Copyright (C) 2007 Michel Ludwig <michel.ludwig@gmail.com>
  7. * - DVB-T support
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation version 2
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/module.h>
  23. #include <linux/kernel.h>
  24. #include <linux/slab.h>
  25. #include <linux/usb.h>
  26. #include <linux/i2c.h>
  27. #include "tm6000.h"
  28. #include "tm6000-regs.h"
  29. #include <media/v4l2-common.h>
  30. #include <media/tuner.h>
  31. #define USB_TIMEOUT (5 * HZ) /* ms */
  32. int tm6000_read_write_usb(struct tm6000_core *dev, u8 req_type, u8 req,
  33. u16 value, u16 index, u8 *buf, u16 len)
  34. {
  35. int ret, i;
  36. unsigned int pipe;
  37. u8 *data = NULL;
  38. int delay = 5000;
  39. mutex_lock(&dev->usb_lock);
  40. if (len)
  41. data = kzalloc(len, GFP_KERNEL);
  42. if (req_type & USB_DIR_IN)
  43. pipe = usb_rcvctrlpipe(dev->udev, 0);
  44. else {
  45. pipe = usb_sndctrlpipe(dev->udev, 0);
  46. memcpy(data, buf, len);
  47. }
  48. if (tm6000_debug & V4L2_DEBUG_I2C) {
  49. printk(KERN_DEBUG "(dev %p, pipe %08x): ", dev->udev, pipe);
  50. printk(KERN_CONT "%s: %02x %02x %02x %02x %02x %02x %02x %02x ",
  51. (req_type & USB_DIR_IN) ? " IN" : "OUT",
  52. req_type, req, value&0xff, value>>8, index&0xff,
  53. index>>8, len&0xff, len>>8);
  54. if (!(req_type & USB_DIR_IN)) {
  55. printk(KERN_CONT ">>> ");
  56. for (i = 0; i < len; i++)
  57. printk(KERN_CONT " %02x", buf[i]);
  58. printk(KERN_CONT "\n");
  59. }
  60. }
  61. ret = usb_control_msg(dev->udev, pipe, req, req_type, value, index,
  62. data, len, USB_TIMEOUT);
  63. if (req_type & USB_DIR_IN)
  64. memcpy(buf, data, len);
  65. if (tm6000_debug & V4L2_DEBUG_I2C) {
  66. if (ret < 0) {
  67. if (req_type & USB_DIR_IN)
  68. printk(KERN_DEBUG "<<< (len=%d)\n", len);
  69. printk(KERN_CONT "%s: Error #%d\n", __func__, ret);
  70. } else if (req_type & USB_DIR_IN) {
  71. printk(KERN_CONT "<<< ");
  72. for (i = 0; i < len; i++)
  73. printk(KERN_CONT " %02x", buf[i]);
  74. printk(KERN_CONT "\n");
  75. }
  76. }
  77. kfree(data);
  78. if (dev->quirks & TM6000_QUIRK_NO_USB_DELAY)
  79. delay = 0;
  80. if (req == REQ_16_SET_GET_I2C_WR1_RDN && !(req_type & USB_DIR_IN)) {
  81. unsigned int tsleep;
  82. /* Calculate delay time, 14000us for 64 bytes */
  83. tsleep = (len * 200) + 200;
  84. if (tsleep < delay)
  85. tsleep = delay;
  86. usleep_range(tsleep, tsleep + 1000);
  87. }
  88. else if (delay)
  89. usleep_range(delay, delay + 1000);
  90. mutex_unlock(&dev->usb_lock);
  91. return ret;
  92. }
  93. int tm6000_set_reg(struct tm6000_core *dev, u8 req, u16 value, u16 index)
  94. {
  95. return
  96. tm6000_read_write_usb(dev, USB_DIR_OUT | USB_TYPE_VENDOR,
  97. req, value, index, NULL, 0);
  98. }
  99. EXPORT_SYMBOL_GPL(tm6000_set_reg);
  100. int tm6000_get_reg(struct tm6000_core *dev, u8 req, u16 value, u16 index)
  101. {
  102. int rc;
  103. u8 buf[1];
  104. rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
  105. value, index, buf, 1);
  106. if (rc < 0)
  107. return rc;
  108. return *buf;
  109. }
  110. EXPORT_SYMBOL_GPL(tm6000_get_reg);
  111. int tm6000_set_reg_mask(struct tm6000_core *dev, u8 req, u16 value,
  112. u16 index, u16 mask)
  113. {
  114. int rc;
  115. u8 buf[1];
  116. u8 new_index;
  117. rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
  118. value, 0, buf, 1);
  119. if (rc < 0)
  120. return rc;
  121. new_index = (buf[0] & ~mask) | (index & mask);
  122. if (new_index == buf[0])
  123. return 0;
  124. return tm6000_read_write_usb(dev, USB_DIR_OUT | USB_TYPE_VENDOR,
  125. req, value, new_index, NULL, 0);
  126. }
  127. EXPORT_SYMBOL_GPL(tm6000_set_reg_mask);
  128. int tm6000_get_reg16(struct tm6000_core *dev, u8 req, u16 value, u16 index)
  129. {
  130. int rc;
  131. u8 buf[2];
  132. rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
  133. value, index, buf, 2);
  134. if (rc < 0)
  135. return rc;
  136. return buf[1]|buf[0]<<8;
  137. }
  138. int tm6000_get_reg32(struct tm6000_core *dev, u8 req, u16 value, u16 index)
  139. {
  140. int rc;
  141. u8 buf[4];
  142. rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
  143. value, index, buf, 4);
  144. if (rc < 0)
  145. return rc;
  146. return buf[3] | buf[2] << 8 | buf[1] << 16 | buf[0] << 24;
  147. }
  148. int tm6000_i2c_reset(struct tm6000_core *dev, u16 tsleep)
  149. {
  150. int rc;
  151. rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 0);
  152. if (rc < 0)
  153. return rc;
  154. msleep(tsleep);
  155. rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 1);
  156. msleep(tsleep);
  157. return rc;
  158. }
  159. void tm6000_set_fourcc_format(struct tm6000_core *dev)
  160. {
  161. if (dev->dev_type == TM6010) {
  162. int val;
  163. val = tm6000_get_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, 0) & 0xfc;
  164. if (dev->fourcc == V4L2_PIX_FMT_UYVY)
  165. tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, val);
  166. else
  167. tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, val | 1);
  168. } else {
  169. if (dev->fourcc == V4L2_PIX_FMT_UYVY)
  170. tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0);
  171. else
  172. tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0x90);
  173. }
  174. }
  175. static void tm6000_set_vbi(struct tm6000_core *dev)
  176. {
  177. /*
  178. * FIXME:
  179. * VBI lines and start/end are different between 60Hz and 50Hz
  180. * So, it is very likely that we need to change the config to
  181. * something that takes it into account, doing something different
  182. * if (dev->norm & V4L2_STD_525_60)
  183. */
  184. if (dev->dev_type == TM6010) {
  185. tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
  186. tm6000_set_reg(dev, TM6010_REQ07_R41_TELETEXT_VBI_CODE1, 0x27);
  187. tm6000_set_reg(dev, TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55);
  188. tm6000_set_reg(dev, TM6010_REQ07_R43_VBI_DATA_TYPE_LINE7, 0x66);
  189. tm6000_set_reg(dev, TM6010_REQ07_R44_VBI_DATA_TYPE_LINE8, 0x66);
  190. tm6000_set_reg(dev, TM6010_REQ07_R45_VBI_DATA_TYPE_LINE9, 0x66);
  191. tm6000_set_reg(dev,
  192. TM6010_REQ07_R46_VBI_DATA_TYPE_LINE10, 0x66);
  193. tm6000_set_reg(dev,
  194. TM6010_REQ07_R47_VBI_DATA_TYPE_LINE11, 0x66);
  195. tm6000_set_reg(dev,
  196. TM6010_REQ07_R48_VBI_DATA_TYPE_LINE12, 0x66);
  197. tm6000_set_reg(dev,
  198. TM6010_REQ07_R49_VBI_DATA_TYPE_LINE13, 0x66);
  199. tm6000_set_reg(dev,
  200. TM6010_REQ07_R4A_VBI_DATA_TYPE_LINE14, 0x66);
  201. tm6000_set_reg(dev,
  202. TM6010_REQ07_R4B_VBI_DATA_TYPE_LINE15, 0x66);
  203. tm6000_set_reg(dev,
  204. TM6010_REQ07_R4C_VBI_DATA_TYPE_LINE16, 0x66);
  205. tm6000_set_reg(dev,
  206. TM6010_REQ07_R4D_VBI_DATA_TYPE_LINE17, 0x66);
  207. tm6000_set_reg(dev,
  208. TM6010_REQ07_R4E_VBI_DATA_TYPE_LINE18, 0x66);
  209. tm6000_set_reg(dev,
  210. TM6010_REQ07_R4F_VBI_DATA_TYPE_LINE19, 0x66);
  211. tm6000_set_reg(dev,
  212. TM6010_REQ07_R50_VBI_DATA_TYPE_LINE20, 0x66);
  213. tm6000_set_reg(dev,
  214. TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x66);
  215. tm6000_set_reg(dev,
  216. TM6010_REQ07_R52_VBI_DATA_TYPE_LINE22, 0x66);
  217. tm6000_set_reg(dev,
  218. TM6010_REQ07_R53_VBI_DATA_TYPE_LINE23, 0x00);
  219. tm6000_set_reg(dev,
  220. TM6010_REQ07_R54_VBI_DATA_TYPE_RLINES, 0x00);
  221. tm6000_set_reg(dev,
  222. TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01);
  223. tm6000_set_reg(dev,
  224. TM6010_REQ07_R56_VBI_LOOP_FILTER_I_GAIN, 0x00);
  225. tm6000_set_reg(dev,
  226. TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02);
  227. tm6000_set_reg(dev, TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35);
  228. tm6000_set_reg(dev, TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0);
  229. tm6000_set_reg(dev, TM6010_REQ07_R5A_VBI_TELETEXT_DTO1, 0x11);
  230. tm6000_set_reg(dev, TM6010_REQ07_R5B_VBI_TELETEXT_DTO0, 0x4c);
  231. tm6000_set_reg(dev, TM6010_REQ07_R40_TELETEXT_VBI_CODE0, 0x01);
  232. tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00);
  233. }
  234. }
  235. int tm6000_init_analog_mode(struct tm6000_core *dev)
  236. {
  237. struct v4l2_frequency f;
  238. if (dev->dev_type == TM6010) {
  239. u8 active = TM6010_REQ07_RCC_ACTIVE_IF_AUDIO_ENABLE;
  240. if (!dev->radio)
  241. active |= TM6010_REQ07_RCC_ACTIVE_IF_VIDEO_ENABLE;
  242. /* Enable video and audio */
  243. tm6000_set_reg_mask(dev, TM6010_REQ07_RCC_ACTIVE_IF,
  244. active, 0x60);
  245. /* Disable TS input */
  246. tm6000_set_reg_mask(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE,
  247. 0x00, 0x40);
  248. } else {
  249. /* Enables soft reset */
  250. tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
  251. if (dev->scaler)
  252. /* Disable Hfilter and Enable TS Drop err */
  253. tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x20);
  254. else /* Enable Hfilter and disable TS Drop err */
  255. tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x80);
  256. tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x88);
  257. tm6000_set_reg(dev, TM6000_REQ07_RDA_CLK_SEL, 0x23);
  258. tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xc0);
  259. tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xd8);
  260. tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x06);
  261. tm6000_set_reg(dev, TM6000_REQ07_RDF_PWDOWN_ACLK, 0x1f);
  262. /* AP Software reset */
  263. tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08);
  264. tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00);
  265. tm6000_set_fourcc_format(dev);
  266. /* Disables soft reset */
  267. tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00);
  268. }
  269. msleep(20);
  270. /* Tuner firmware can now be loaded */
  271. /*
  272. * FIXME: This is a hack! xc3028 "sleeps" when no channel is detected
  273. * for more than a few seconds. Not sure why, as this behavior does
  274. * not happen on other devices with xc3028. So, I suspect that it
  275. * is yet another bug at tm6000. After start sleeping, decoding
  276. * doesn't start automatically. Instead, it requires some
  277. * I2C commands to wake it up. As we want to have image at the
  278. * beginning, we needed to add this hack. The better would be to
  279. * discover some way to make tm6000 to wake up without this hack.
  280. */
  281. f.frequency = dev->freq;
  282. v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_frequency, &f);
  283. msleep(100);
  284. tm6000_set_standard(dev);
  285. tm6000_set_vbi(dev);
  286. tm6000_set_audio_bitrate(dev, 48000);
  287. /* switch dvb led off */
  288. if (dev->gpio.dvb_led) {
  289. tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
  290. dev->gpio.dvb_led, 0x01);
  291. }
  292. return 0;
  293. }
  294. int tm6000_init_digital_mode(struct tm6000_core *dev)
  295. {
  296. if (dev->dev_type == TM6010) {
  297. /* Disable video and audio */
  298. tm6000_set_reg_mask(dev, TM6010_REQ07_RCC_ACTIVE_IF,
  299. 0x00, 0x60);
  300. /* Enable TS input */
  301. tm6000_set_reg_mask(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE,
  302. 0x40, 0x40);
  303. /* all power down, but not the digital data port */
  304. tm6000_set_reg(dev, TM6010_REQ07_RFE_POWER_DOWN, 0x28);
  305. tm6000_set_reg(dev, TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xfc);
  306. tm6000_set_reg(dev, TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0xff);
  307. } else {
  308. tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08);
  309. tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00);
  310. tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
  311. tm6000_set_reg(dev, TM6000_REQ07_RDF_PWDOWN_ACLK, 0x08);
  312. tm6000_set_reg(dev, TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x0c);
  313. tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0xff);
  314. tm6000_set_reg(dev, TM6000_REQ07_REB_VADC_AADC_MODE, 0xd8);
  315. tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x40);
  316. tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0);
  317. tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x09);
  318. tm6000_set_reg(dev, TM6000_REQ07_RDA_CLK_SEL, 0x37);
  319. tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xd8);
  320. tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xc0);
  321. tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x60);
  322. tm6000_set_reg(dev, TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x0c);
  323. tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0xff);
  324. tm6000_set_reg(dev, TM6000_REQ07_REB_VADC_AADC_MODE, 0x08);
  325. msleep(50);
  326. tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
  327. msleep(50);
  328. tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x01);
  329. msleep(50);
  330. tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
  331. msleep(100);
  332. }
  333. /* switch dvb led on */
  334. if (dev->gpio.dvb_led) {
  335. tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
  336. dev->gpio.dvb_led, 0x00);
  337. }
  338. return 0;
  339. }
  340. EXPORT_SYMBOL(tm6000_init_digital_mode);
  341. struct reg_init {
  342. u8 req;
  343. u8 reg;
  344. u8 val;
  345. };
  346. /* The meaning of those initializations are unknown */
  347. static struct reg_init tm6000_init_tab[] = {
  348. /* REG VALUE */
  349. { TM6000_REQ07_RDF_PWDOWN_ACLK, 0x1f },
  350. { TM6010_REQ07_RFF_SOFT_RESET, 0x08 },
  351. { TM6010_REQ07_RFF_SOFT_RESET, 0x00 },
  352. { TM6010_REQ07_RD5_POWERSAVE, 0x4f },
  353. { TM6000_REQ07_RDA_CLK_SEL, 0x23 },
  354. { TM6000_REQ07_RDB_OUT_SEL, 0x08 },
  355. { TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x00 },
  356. { TM6000_REQ07_RE3_VADC_INP_LPF_SEL1, 0x10 },
  357. { TM6000_REQ07_RE5_VADC_INP_LPF_SEL2, 0x00 },
  358. { TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0x00 },
  359. { TM6000_REQ07_REB_VADC_AADC_MODE, 0x64 }, /* 48000 bits/sample, external input */
  360. { TM6000_REQ07_REE_VADC_CTRL_SEL_CONTROL, 0xc2 },
  361. { TM6010_REQ07_R3F_RESET, 0x01 }, /* Start of soft reset */
  362. { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 },
  363. { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 },
  364. { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f },
  365. { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 },
  366. { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 },
  367. { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 },
  368. { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 },
  369. { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 },
  370. { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 },
  371. { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a },
  372. { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 },
  373. { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 },
  374. { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b },
  375. { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 },
  376. { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f },
  377. { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd },
  378. { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e },
  379. { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b },
  380. { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 },
  381. { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 },
  382. { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c },
  383. { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc },
  384. { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc },
  385. { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd },
  386. { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c },
  387. { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c },
  388. { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 },
  389. { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 },
  390. { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 },
  391. { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 },
  392. { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 },
  393. { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c },
  394. { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 },
  395. { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c },
  396. { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a },
  397. { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 },
  398. { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 },
  399. { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a },
  400. { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 },
  401. { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 },
  402. { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 },
  403. { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 },
  404. { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 },
  405. { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 },
  406. { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 },
  407. { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 },
  408. { TM6010_REQ07_RC1_TRESHOLD, 0xd0 },
  409. { TM6010_REQ07_RC3_HSTART1, 0x88 },
  410. { TM6010_REQ07_R3F_RESET, 0x00 }, /* End of the soft reset */
  411. { TM6010_REQ05_R18_IMASK7, 0x00 },
  412. };
  413. static struct reg_init tm6010_init_tab[] = {
  414. { TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x00 },
  415. { TM6010_REQ07_RC4_HSTART0, 0xa0 },
  416. { TM6010_REQ07_RC6_HEND0, 0x40 },
  417. { TM6010_REQ07_RCA_VEND0, 0x31 },
  418. { TM6010_REQ07_RCC_ACTIVE_IF, 0xe1 },
  419. { TM6010_REQ07_RE0_DVIDEO_SOURCE, 0x03 },
  420. { TM6010_REQ07_RFE_POWER_DOWN, 0x7f },
  421. { TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0 },
  422. { TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4 },
  423. { TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8 },
  424. { TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00 },
  425. { TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2 },
  426. { TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0 },
  427. { TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2 },
  428. { TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60 },
  429. { TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc },
  430. { TM6010_REQ07_R3F_RESET, 0x01 },
  431. { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 },
  432. { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 },
  433. { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f },
  434. { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 },
  435. { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 },
  436. { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 },
  437. { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 },
  438. { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 },
  439. { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 },
  440. { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a },
  441. { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 },
  442. { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 },
  443. { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b },
  444. { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 },
  445. { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f },
  446. { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd },
  447. { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e },
  448. { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b },
  449. { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 },
  450. { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 },
  451. { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c },
  452. { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc },
  453. { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc },
  454. { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd },
  455. { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c },
  456. { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c },
  457. { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 },
  458. { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 },
  459. { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 },
  460. { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 },
  461. { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 },
  462. { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c },
  463. { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 },
  464. { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c },
  465. { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a },
  466. { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 },
  467. { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 },
  468. { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a },
  469. { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 },
  470. { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 },
  471. { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 },
  472. { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 },
  473. { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 },
  474. { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 },
  475. { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 },
  476. { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 },
  477. { TM6010_REQ07_RC1_TRESHOLD, 0xd0 },
  478. { TM6010_REQ07_RC3_HSTART1, 0x88 },
  479. { TM6010_REQ07_R3F_RESET, 0x00 },
  480. { TM6010_REQ05_R18_IMASK7, 0x00 },
  481. { TM6010_REQ07_RDC_IR_LEADER1, 0xaa },
  482. { TM6010_REQ07_RDD_IR_LEADER0, 0x30 },
  483. { TM6010_REQ07_RDE_IR_PULSE_CNT1, 0x20 },
  484. { TM6010_REQ07_RDF_IR_PULSE_CNT0, 0xd0 },
  485. { REQ_04_EN_DISABLE_MCU_INT, 0x02, 0x00 },
  486. { TM6010_REQ07_RD8_IR, 0x0f },
  487. /* set remote wakeup key:any key wakeup */
  488. { TM6010_REQ07_RE5_REMOTE_WAKEUP, 0xfe },
  489. { TM6010_REQ07_RDA_IR_WAKEUP_SEL, 0xff },
  490. };
  491. int tm6000_init(struct tm6000_core *dev)
  492. {
  493. int board, rc = 0, i, size;
  494. struct reg_init *tab;
  495. /* Check board revision */
  496. board = tm6000_get_reg32(dev, REQ_40_GET_VERSION, 0, 0);
  497. if (board >= 0) {
  498. switch (board & 0xff) {
  499. case 0xf3:
  500. printk(KERN_INFO "Found tm6000\n");
  501. if (dev->dev_type != TM6000)
  502. dev->dev_type = TM6000;
  503. break;
  504. case 0xf4:
  505. printk(KERN_INFO "Found tm6010\n");
  506. if (dev->dev_type != TM6010)
  507. dev->dev_type = TM6010;
  508. break;
  509. default:
  510. printk(KERN_INFO "Unknown board version = 0x%08x\n", board);
  511. }
  512. } else
  513. printk(KERN_ERR "Error %i while retrieving board version\n", board);
  514. if (dev->dev_type == TM6010) {
  515. tab = tm6010_init_tab;
  516. size = ARRAY_SIZE(tm6010_init_tab);
  517. } else {
  518. tab = tm6000_init_tab;
  519. size = ARRAY_SIZE(tm6000_init_tab);
  520. }
  521. /* Load board's initialization table */
  522. for (i = 0; i < size; i++) {
  523. rc = tm6000_set_reg(dev, tab[i].req, tab[i].reg, tab[i].val);
  524. if (rc < 0) {
  525. printk(KERN_ERR "Error %i while setting req %d, "
  526. "reg %d to value %d\n", rc,
  527. tab[i].req, tab[i].reg, tab[i].val);
  528. return rc;
  529. }
  530. }
  531. msleep(5); /* Just to be conservative */
  532. rc = tm6000_cards_setup(dev);
  533. return rc;
  534. }
  535. int tm6000_set_audio_bitrate(struct tm6000_core *dev, int bitrate)
  536. {
  537. int val = 0;
  538. u8 areg_f0 = 0x60; /* ADC MCLK = 250 Fs */
  539. u8 areg_0a = 0x91; /* SIF 48KHz */
  540. switch (bitrate) {
  541. case 48000:
  542. areg_f0 = 0x60; /* ADC MCLK = 250 Fs */
  543. areg_0a = 0x91; /* SIF 48KHz */
  544. dev->audio_bitrate = bitrate;
  545. break;
  546. case 32000:
  547. areg_f0 = 0x00; /* ADC MCLK = 375 Fs */
  548. areg_0a = 0x90; /* SIF 32KHz */
  549. dev->audio_bitrate = bitrate;
  550. break;
  551. default:
  552. return -EINVAL;
  553. }
  554. /* enable I2S, if we use sif or external I2S device */
  555. if (dev->dev_type == TM6010) {
  556. val = tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, areg_0a);
  557. if (val < 0)
  558. return val;
  559. val = tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
  560. areg_f0, 0xf0);
  561. if (val < 0)
  562. return val;
  563. } else {
  564. val = tm6000_set_reg_mask(dev, TM6000_REQ07_REB_VADC_AADC_MODE,
  565. areg_f0, 0xf0);
  566. if (val < 0)
  567. return val;
  568. }
  569. return 0;
  570. }
  571. EXPORT_SYMBOL_GPL(tm6000_set_audio_bitrate);
  572. int tm6000_set_audio_rinput(struct tm6000_core *dev)
  573. {
  574. if (dev->dev_type == TM6010) {
  575. /* Audio crossbar setting, default SIF1 */
  576. u8 areg_f0;
  577. u8 areg_07 = 0x10;
  578. switch (dev->rinput.amux) {
  579. case TM6000_AMUX_SIF1:
  580. case TM6000_AMUX_SIF2:
  581. areg_f0 = 0x03;
  582. areg_07 = 0x30;
  583. break;
  584. case TM6000_AMUX_ADC1:
  585. areg_f0 = 0x00;
  586. break;
  587. case TM6000_AMUX_ADC2:
  588. areg_f0 = 0x08;
  589. break;
  590. case TM6000_AMUX_I2S:
  591. areg_f0 = 0x04;
  592. break;
  593. default:
  594. printk(KERN_INFO "%s: audio input dosn't support\n",
  595. dev->name);
  596. return 0;
  597. break;
  598. }
  599. /* Set audio input crossbar */
  600. tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
  601. areg_f0, 0x0f);
  602. /* Mux overflow workaround */
  603. tm6000_set_reg_mask(dev, TM6010_REQ07_R07_OUTPUT_CONTROL,
  604. areg_07, 0xf0);
  605. } else {
  606. u8 areg_eb;
  607. /* Audio setting, default LINE1 */
  608. switch (dev->rinput.amux) {
  609. case TM6000_AMUX_ADC1:
  610. areg_eb = 0x00;
  611. break;
  612. case TM6000_AMUX_ADC2:
  613. areg_eb = 0x04;
  614. break;
  615. default:
  616. printk(KERN_INFO "%s: audio input dosn't support\n",
  617. dev->name);
  618. return 0;
  619. break;
  620. }
  621. /* Set audio input */
  622. tm6000_set_reg_mask(dev, TM6000_REQ07_REB_VADC_AADC_MODE,
  623. areg_eb, 0x0f);
  624. }
  625. return 0;
  626. }
  627. static void tm6010_set_mute_sif(struct tm6000_core *dev, u8 mute)
  628. {
  629. u8 mute_reg = 0;
  630. if (mute)
  631. mute_reg = 0x08;
  632. tm6000_set_reg_mask(dev, TM6010_REQ08_R0A_A_I2S_MOD, mute_reg, 0x08);
  633. }
  634. static void tm6010_set_mute_adc(struct tm6000_core *dev, u8 mute)
  635. {
  636. u8 mute_reg = 0;
  637. if (mute)
  638. mute_reg = 0x20;
  639. if (dev->dev_type == TM6010) {
  640. tm6000_set_reg_mask(dev, TM6010_REQ08_RF2_LEFT_CHANNEL_VOL,
  641. mute_reg, 0x20);
  642. tm6000_set_reg_mask(dev, TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL,
  643. mute_reg, 0x20);
  644. } else {
  645. tm6000_set_reg_mask(dev, TM6000_REQ07_REC_VADC_AADC_LVOL,
  646. mute_reg, 0x20);
  647. tm6000_set_reg_mask(dev, TM6000_REQ07_RED_VADC_AADC_RVOL,
  648. mute_reg, 0x20);
  649. }
  650. }
  651. int tm6000_tvaudio_set_mute(struct tm6000_core *dev, u8 mute)
  652. {
  653. enum tm6000_mux mux;
  654. if (dev->radio)
  655. mux = dev->rinput.amux;
  656. else
  657. mux = dev->vinput[dev->input].amux;
  658. switch (mux) {
  659. case TM6000_AMUX_SIF1:
  660. case TM6000_AMUX_SIF2:
  661. if (dev->dev_type == TM6010)
  662. tm6010_set_mute_sif(dev, mute);
  663. else {
  664. printk(KERN_INFO "ERROR: TM5600 and TM6000 don't has"
  665. " SIF audio inputs. Please check the %s"
  666. " configuration.\n", dev->name);
  667. return -EINVAL;
  668. }
  669. break;
  670. case TM6000_AMUX_ADC1:
  671. case TM6000_AMUX_ADC2:
  672. tm6010_set_mute_adc(dev, mute);
  673. break;
  674. default:
  675. return -EINVAL;
  676. break;
  677. }
  678. return 0;
  679. }
  680. static void tm6010_set_volume_sif(struct tm6000_core *dev, int vol)
  681. {
  682. u8 vol_reg;
  683. vol_reg = vol & 0x0F;
  684. if (vol < 0)
  685. vol_reg |= 0x40;
  686. tm6000_set_reg(dev, TM6010_REQ08_R07_A_LEFT_VOL, vol_reg);
  687. tm6000_set_reg(dev, TM6010_REQ08_R08_A_RIGHT_VOL, vol_reg);
  688. }
  689. static void tm6010_set_volume_adc(struct tm6000_core *dev, int vol)
  690. {
  691. u8 vol_reg;
  692. vol_reg = (vol + 0x10) & 0x1f;
  693. if (dev->dev_type == TM6010) {
  694. tm6000_set_reg(dev, TM6010_REQ08_RF2_LEFT_CHANNEL_VOL, vol_reg);
  695. tm6000_set_reg(dev, TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL, vol_reg);
  696. } else {
  697. tm6000_set_reg(dev, TM6000_REQ07_REC_VADC_AADC_LVOL, vol_reg);
  698. tm6000_set_reg(dev, TM6000_REQ07_RED_VADC_AADC_RVOL, vol_reg);
  699. }
  700. }
  701. void tm6000_set_volume(struct tm6000_core *dev, int vol)
  702. {
  703. enum tm6000_mux mux;
  704. if (dev->radio) {
  705. mux = dev->rinput.amux;
  706. vol += 8; /* Offset to 0 dB */
  707. } else
  708. mux = dev->vinput[dev->input].amux;
  709. switch (mux) {
  710. case TM6000_AMUX_SIF1:
  711. case TM6000_AMUX_SIF2:
  712. if (dev->dev_type == TM6010)
  713. tm6010_set_volume_sif(dev, vol);
  714. else
  715. printk(KERN_INFO "ERROR: TM5600 and TM6000 don't has"
  716. " SIF audio inputs. Please check the %s"
  717. " configuration.\n", dev->name);
  718. break;
  719. case TM6000_AMUX_ADC1:
  720. case TM6000_AMUX_ADC2:
  721. tm6010_set_volume_adc(dev, vol);
  722. break;
  723. default:
  724. break;
  725. }
  726. }
  727. static LIST_HEAD(tm6000_devlist);
  728. static DEFINE_MUTEX(tm6000_devlist_mutex);
  729. /*
  730. * tm6000_realease_resource()
  731. */
  732. void tm6000_remove_from_devlist(struct tm6000_core *dev)
  733. {
  734. mutex_lock(&tm6000_devlist_mutex);
  735. list_del(&dev->devlist);
  736. mutex_unlock(&tm6000_devlist_mutex);
  737. };
  738. void tm6000_add_into_devlist(struct tm6000_core *dev)
  739. {
  740. mutex_lock(&tm6000_devlist_mutex);
  741. list_add_tail(&dev->devlist, &tm6000_devlist);
  742. mutex_unlock(&tm6000_devlist_mutex);
  743. };
  744. /*
  745. * Extension interface
  746. */
  747. static LIST_HEAD(tm6000_extension_devlist);
  748. int tm6000_call_fillbuf(struct tm6000_core *dev, enum tm6000_ops_type type,
  749. char *buf, int size)
  750. {
  751. struct tm6000_ops *ops = NULL;
  752. /* FIXME: tm6000_extension_devlist_lock should be a spinlock */
  753. if (!list_empty(&tm6000_extension_devlist)) {
  754. list_for_each_entry(ops, &tm6000_extension_devlist, next) {
  755. if (ops->fillbuf && ops->type == type)
  756. ops->fillbuf(dev, buf, size);
  757. }
  758. }
  759. return 0;
  760. }
  761. int tm6000_register_extension(struct tm6000_ops *ops)
  762. {
  763. struct tm6000_core *dev = NULL;
  764. mutex_lock(&tm6000_devlist_mutex);
  765. list_add_tail(&ops->next, &tm6000_extension_devlist);
  766. list_for_each_entry(dev, &tm6000_devlist, devlist) {
  767. ops->init(dev);
  768. printk(KERN_INFO "%s: Initialized (%s) extension\n",
  769. dev->name, ops->name);
  770. }
  771. mutex_unlock(&tm6000_devlist_mutex);
  772. return 0;
  773. }
  774. EXPORT_SYMBOL(tm6000_register_extension);
  775. void tm6000_unregister_extension(struct tm6000_ops *ops)
  776. {
  777. struct tm6000_core *dev = NULL;
  778. mutex_lock(&tm6000_devlist_mutex);
  779. list_for_each_entry(dev, &tm6000_devlist, devlist)
  780. ops->fini(dev);
  781. printk(KERN_INFO "tm6000: Remove (%s) extension\n", ops->name);
  782. list_del(&ops->next);
  783. mutex_unlock(&tm6000_devlist_mutex);
  784. }
  785. EXPORT_SYMBOL(tm6000_unregister_extension);
  786. void tm6000_init_extension(struct tm6000_core *dev)
  787. {
  788. struct tm6000_ops *ops = NULL;
  789. mutex_lock(&tm6000_devlist_mutex);
  790. if (!list_empty(&tm6000_extension_devlist)) {
  791. list_for_each_entry(ops, &tm6000_extension_devlist, next) {
  792. if (ops->init)
  793. ops->init(dev);
  794. }
  795. }
  796. mutex_unlock(&tm6000_devlist_mutex);
  797. }
  798. void tm6000_close_extension(struct tm6000_core *dev)
  799. {
  800. struct tm6000_ops *ops = NULL;
  801. mutex_lock(&tm6000_devlist_mutex);
  802. if (!list_empty(&tm6000_extension_devlist)) {
  803. list_for_each_entry(ops, &tm6000_extension_devlist, next) {
  804. if (ops->fini)
  805. ops->fini(dev);
  806. }
  807. }
  808. mutex_unlock(&tm6000_devlist_mutex);
  809. }