saa7191.c 15 KB

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  1. /*
  2. * saa7191.c - Philips SAA7191 video decoder driver
  3. *
  4. * Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
  5. * Copyright (C) 2004,2005 Mikael Nousiainen <tmnousia@cc.hut.fi>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/delay.h>
  12. #include <linux/errno.h>
  13. #include <linux/fs.h>
  14. #include <linux/init.h>
  15. #include <linux/kernel.h>
  16. #include <linux/major.h>
  17. #include <linux/module.h>
  18. #include <linux/mm.h>
  19. #include <linux/slab.h>
  20. #include <linux/videodev2.h>
  21. #include <linux/i2c.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-chip-ident.h>
  24. #include "saa7191.h"
  25. #define SAA7191_MODULE_VERSION "0.0.5"
  26. MODULE_DESCRIPTION("Philips SAA7191 video decoder driver");
  27. MODULE_VERSION(SAA7191_MODULE_VERSION);
  28. MODULE_AUTHOR("Mikael Nousiainen <tmnousia@cc.hut.fi>");
  29. MODULE_LICENSE("GPL");
  30. // #define SAA7191_DEBUG
  31. #ifdef SAA7191_DEBUG
  32. #define dprintk(x...) printk("SAA7191: " x);
  33. #else
  34. #define dprintk(x...)
  35. #endif
  36. #define SAA7191_SYNC_COUNT 30
  37. #define SAA7191_SYNC_DELAY 100 /* milliseconds */
  38. struct saa7191 {
  39. struct v4l2_subdev sd;
  40. /* the register values are stored here as the actual
  41. * I2C-registers are write-only */
  42. u8 reg[25];
  43. int input;
  44. v4l2_std_id norm;
  45. };
  46. static inline struct saa7191 *to_saa7191(struct v4l2_subdev *sd)
  47. {
  48. return container_of(sd, struct saa7191, sd);
  49. }
  50. static const u8 initseq[] = {
  51. 0, /* Subaddress */
  52. 0x50, /* (0x50) SAA7191_REG_IDEL */
  53. /* 50 Hz signal timing */
  54. 0x30, /* (0x30) SAA7191_REG_HSYB */
  55. 0x00, /* (0x00) SAA7191_REG_HSYS */
  56. 0xe8, /* (0xe8) SAA7191_REG_HCLB */
  57. 0xb6, /* (0xb6) SAA7191_REG_HCLS */
  58. 0xf4, /* (0xf4) SAA7191_REG_HPHI */
  59. /* control */
  60. SAA7191_LUMA_APER_1, /* (0x01) SAA7191_REG_LUMA - CVBS mode */
  61. 0x00, /* (0x00) SAA7191_REG_HUEC */
  62. 0xf8, /* (0xf8) SAA7191_REG_CKTQ */
  63. 0xf8, /* (0xf8) SAA7191_REG_CKTS */
  64. 0x90, /* (0x90) SAA7191_REG_PLSE */
  65. 0x90, /* (0x90) SAA7191_REG_SESE */
  66. 0x00, /* (0x00) SAA7191_REG_GAIN */
  67. SAA7191_STDC_NFEN | SAA7191_STDC_HRMV, /* (0x0c) SAA7191_REG_STDC
  68. * - not SECAM,
  69. * slow time constant */
  70. SAA7191_IOCK_OEDC | SAA7191_IOCK_OEHS | SAA7191_IOCK_OEVS
  71. | SAA7191_IOCK_OEDY, /* (0x78) SAA7191_REG_IOCK
  72. * - chroma from CVBS, GPSW1 & 2 off */
  73. SAA7191_CTL3_AUFD | SAA7191_CTL3_SCEN | SAA7191_CTL3_OFTS
  74. | SAA7191_CTL3_YDEL0, /* (0x99) SAA7191_REG_CTL3
  75. * - automatic field detection */
  76. 0x00, /* (0x00) SAA7191_REG_CTL4 */
  77. 0x2c, /* (0x2c) SAA7191_REG_CHCV - PAL nominal value */
  78. 0x00, /* unused */
  79. 0x00, /* unused */
  80. /* 60 Hz signal timing */
  81. 0x34, /* (0x34) SAA7191_REG_HS6B */
  82. 0x0a, /* (0x0a) SAA7191_REG_HS6S */
  83. 0xf4, /* (0xf4) SAA7191_REG_HC6B */
  84. 0xce, /* (0xce) SAA7191_REG_HC6S */
  85. 0xf4, /* (0xf4) SAA7191_REG_HP6I */
  86. };
  87. /* SAA7191 register handling */
  88. static u8 saa7191_read_reg(struct v4l2_subdev *sd, u8 reg)
  89. {
  90. return to_saa7191(sd)->reg[reg];
  91. }
  92. static int saa7191_read_status(struct v4l2_subdev *sd, u8 *value)
  93. {
  94. struct i2c_client *client = v4l2_get_subdevdata(sd);
  95. int ret;
  96. ret = i2c_master_recv(client, value, 1);
  97. if (ret < 0) {
  98. printk(KERN_ERR "SAA7191: saa7191_read_status(): read failed\n");
  99. return ret;
  100. }
  101. return 0;
  102. }
  103. static int saa7191_write_reg(struct v4l2_subdev *sd, u8 reg, u8 value)
  104. {
  105. struct i2c_client *client = v4l2_get_subdevdata(sd);
  106. to_saa7191(sd)->reg[reg] = value;
  107. return i2c_smbus_write_byte_data(client, reg, value);
  108. }
  109. /* the first byte of data must be the first subaddress number (register) */
  110. static int saa7191_write_block(struct v4l2_subdev *sd,
  111. u8 length, const u8 *data)
  112. {
  113. struct i2c_client *client = v4l2_get_subdevdata(sd);
  114. struct saa7191 *decoder = to_saa7191(sd);
  115. int i;
  116. int ret;
  117. for (i = 0; i < (length - 1); i++) {
  118. decoder->reg[data[0] + i] = data[i + 1];
  119. }
  120. ret = i2c_master_send(client, data, length);
  121. if (ret < 0) {
  122. printk(KERN_ERR "SAA7191: saa7191_write_block(): "
  123. "write failed\n");
  124. return ret;
  125. }
  126. return 0;
  127. }
  128. /* Helper functions */
  129. static int saa7191_s_routing(struct v4l2_subdev *sd,
  130. u32 input, u32 output, u32 config)
  131. {
  132. struct saa7191 *decoder = to_saa7191(sd);
  133. u8 luma = saa7191_read_reg(sd, SAA7191_REG_LUMA);
  134. u8 iock = saa7191_read_reg(sd, SAA7191_REG_IOCK);
  135. int err;
  136. switch (input) {
  137. case SAA7191_INPUT_COMPOSITE: /* Set Composite input */
  138. iock &= ~(SAA7191_IOCK_CHRS | SAA7191_IOCK_GPSW1
  139. | SAA7191_IOCK_GPSW2);
  140. /* Chrominance trap active */
  141. luma &= ~SAA7191_LUMA_BYPS;
  142. break;
  143. case SAA7191_INPUT_SVIDEO: /* Set S-Video input */
  144. iock |= SAA7191_IOCK_CHRS | SAA7191_IOCK_GPSW2;
  145. /* Chrominance trap bypassed */
  146. luma |= SAA7191_LUMA_BYPS;
  147. break;
  148. default:
  149. return -EINVAL;
  150. }
  151. err = saa7191_write_reg(sd, SAA7191_REG_LUMA, luma);
  152. if (err)
  153. return -EIO;
  154. err = saa7191_write_reg(sd, SAA7191_REG_IOCK, iock);
  155. if (err)
  156. return -EIO;
  157. decoder->input = input;
  158. return 0;
  159. }
  160. static int saa7191_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
  161. {
  162. struct saa7191 *decoder = to_saa7191(sd);
  163. u8 stdc = saa7191_read_reg(sd, SAA7191_REG_STDC);
  164. u8 ctl3 = saa7191_read_reg(sd, SAA7191_REG_CTL3);
  165. u8 chcv = saa7191_read_reg(sd, SAA7191_REG_CHCV);
  166. int err;
  167. if (norm & V4L2_STD_PAL) {
  168. stdc &= ~SAA7191_STDC_SECS;
  169. ctl3 &= ~(SAA7191_CTL3_AUFD | SAA7191_CTL3_FSEL);
  170. chcv = SAA7191_CHCV_PAL;
  171. } else if (norm & V4L2_STD_NTSC) {
  172. stdc &= ~SAA7191_STDC_SECS;
  173. ctl3 &= ~SAA7191_CTL3_AUFD;
  174. ctl3 |= SAA7191_CTL3_FSEL;
  175. chcv = SAA7191_CHCV_NTSC;
  176. } else if (norm & V4L2_STD_SECAM) {
  177. stdc |= SAA7191_STDC_SECS;
  178. ctl3 &= ~(SAA7191_CTL3_AUFD | SAA7191_CTL3_FSEL);
  179. chcv = SAA7191_CHCV_PAL;
  180. } else {
  181. return -EINVAL;
  182. }
  183. err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
  184. if (err)
  185. return -EIO;
  186. err = saa7191_write_reg(sd, SAA7191_REG_STDC, stdc);
  187. if (err)
  188. return -EIO;
  189. err = saa7191_write_reg(sd, SAA7191_REG_CHCV, chcv);
  190. if (err)
  191. return -EIO;
  192. decoder->norm = norm;
  193. dprintk("ctl3: %02x stdc: %02x chcv: %02x\n", ctl3,
  194. stdc, chcv);
  195. dprintk("norm: %llx\n", norm);
  196. return 0;
  197. }
  198. static int saa7191_wait_for_signal(struct v4l2_subdev *sd, u8 *status)
  199. {
  200. int i = 0;
  201. dprintk("Checking for signal...\n");
  202. for (i = 0; i < SAA7191_SYNC_COUNT; i++) {
  203. if (saa7191_read_status(sd, status))
  204. return -EIO;
  205. if (((*status) & SAA7191_STATUS_HLCK) == 0) {
  206. dprintk("Signal found\n");
  207. return 0;
  208. }
  209. msleep(SAA7191_SYNC_DELAY);
  210. }
  211. dprintk("No signal\n");
  212. return -EBUSY;
  213. }
  214. static int saa7191_querystd(struct v4l2_subdev *sd, v4l2_std_id *norm)
  215. {
  216. struct saa7191 *decoder = to_saa7191(sd);
  217. u8 stdc = saa7191_read_reg(sd, SAA7191_REG_STDC);
  218. u8 ctl3 = saa7191_read_reg(sd, SAA7191_REG_CTL3);
  219. u8 status;
  220. v4l2_std_id old_norm = decoder->norm;
  221. int err = 0;
  222. dprintk("SAA7191 extended signal auto-detection...\n");
  223. *norm = V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM;
  224. stdc &= ~SAA7191_STDC_SECS;
  225. ctl3 &= ~(SAA7191_CTL3_FSEL);
  226. err = saa7191_write_reg(sd, SAA7191_REG_STDC, stdc);
  227. if (err) {
  228. err = -EIO;
  229. goto out;
  230. }
  231. err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
  232. if (err) {
  233. err = -EIO;
  234. goto out;
  235. }
  236. ctl3 |= SAA7191_CTL3_AUFD;
  237. err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
  238. if (err) {
  239. err = -EIO;
  240. goto out;
  241. }
  242. msleep(SAA7191_SYNC_DELAY);
  243. err = saa7191_wait_for_signal(sd, &status);
  244. if (err)
  245. goto out;
  246. if (status & SAA7191_STATUS_FIDT) {
  247. /* 60Hz signal -> NTSC */
  248. dprintk("60Hz signal: NTSC\n");
  249. *norm = V4L2_STD_NTSC;
  250. return 0;
  251. }
  252. /* 50Hz signal */
  253. dprintk("50Hz signal: Trying PAL...\n");
  254. /* try PAL first */
  255. err = saa7191_s_std(sd, V4L2_STD_PAL);
  256. if (err)
  257. goto out;
  258. msleep(SAA7191_SYNC_DELAY);
  259. err = saa7191_wait_for_signal(sd, &status);
  260. if (err)
  261. goto out;
  262. /* not 50Hz ? */
  263. if (status & SAA7191_STATUS_FIDT) {
  264. dprintk("No 50Hz signal\n");
  265. saa7191_s_std(sd, old_norm);
  266. return -EAGAIN;
  267. }
  268. if (status & SAA7191_STATUS_CODE) {
  269. dprintk("PAL\n");
  270. *norm = V4L2_STD_PAL;
  271. return saa7191_s_std(sd, old_norm);
  272. }
  273. dprintk("No color detected with PAL - Trying SECAM...\n");
  274. /* no color detected ? -> try SECAM */
  275. err = saa7191_s_std(sd, V4L2_STD_SECAM);
  276. if (err)
  277. goto out;
  278. msleep(SAA7191_SYNC_DELAY);
  279. err = saa7191_wait_for_signal(sd, &status);
  280. if (err)
  281. goto out;
  282. /* not 50Hz ? */
  283. if (status & SAA7191_STATUS_FIDT) {
  284. dprintk("No 50Hz signal\n");
  285. err = -EAGAIN;
  286. goto out;
  287. }
  288. if (status & SAA7191_STATUS_CODE) {
  289. /* Color detected -> SECAM */
  290. dprintk("SECAM\n");
  291. *norm = V4L2_STD_SECAM;
  292. return saa7191_s_std(sd, old_norm);
  293. }
  294. dprintk("No color detected with SECAM - Going back to PAL.\n");
  295. out:
  296. return saa7191_s_std(sd, old_norm);
  297. }
  298. static int saa7191_autodetect_norm(struct v4l2_subdev *sd)
  299. {
  300. u8 status;
  301. dprintk("SAA7191 signal auto-detection...\n");
  302. dprintk("Reading status...\n");
  303. if (saa7191_read_status(sd, &status))
  304. return -EIO;
  305. dprintk("Checking for signal...\n");
  306. /* no signal ? */
  307. if (status & SAA7191_STATUS_HLCK) {
  308. dprintk("No signal\n");
  309. return -EBUSY;
  310. }
  311. dprintk("Signal found\n");
  312. if (status & SAA7191_STATUS_FIDT) {
  313. /* 60hz signal -> NTSC */
  314. dprintk("NTSC\n");
  315. return saa7191_s_std(sd, V4L2_STD_NTSC);
  316. } else {
  317. /* 50hz signal -> PAL */
  318. dprintk("PAL\n");
  319. return saa7191_s_std(sd, V4L2_STD_PAL);
  320. }
  321. }
  322. static int saa7191_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  323. {
  324. u8 reg;
  325. int ret = 0;
  326. switch (ctrl->id) {
  327. case SAA7191_CONTROL_BANDPASS:
  328. case SAA7191_CONTROL_BANDPASS_WEIGHT:
  329. case SAA7191_CONTROL_CORING:
  330. reg = saa7191_read_reg(sd, SAA7191_REG_LUMA);
  331. switch (ctrl->id) {
  332. case SAA7191_CONTROL_BANDPASS:
  333. ctrl->value = ((s32)reg & SAA7191_LUMA_BPSS_MASK)
  334. >> SAA7191_LUMA_BPSS_SHIFT;
  335. break;
  336. case SAA7191_CONTROL_BANDPASS_WEIGHT:
  337. ctrl->value = ((s32)reg & SAA7191_LUMA_APER_MASK)
  338. >> SAA7191_LUMA_APER_SHIFT;
  339. break;
  340. case SAA7191_CONTROL_CORING:
  341. ctrl->value = ((s32)reg & SAA7191_LUMA_CORI_MASK)
  342. >> SAA7191_LUMA_CORI_SHIFT;
  343. break;
  344. }
  345. break;
  346. case SAA7191_CONTROL_FORCE_COLOUR:
  347. case SAA7191_CONTROL_CHROMA_GAIN:
  348. reg = saa7191_read_reg(sd, SAA7191_REG_GAIN);
  349. if (ctrl->id == SAA7191_CONTROL_FORCE_COLOUR)
  350. ctrl->value = ((s32)reg & SAA7191_GAIN_COLO) ? 1 : 0;
  351. else
  352. ctrl->value = ((s32)reg & SAA7191_GAIN_LFIS_MASK)
  353. >> SAA7191_GAIN_LFIS_SHIFT;
  354. break;
  355. case V4L2_CID_HUE:
  356. reg = saa7191_read_reg(sd, SAA7191_REG_HUEC);
  357. if (reg < 0x80)
  358. reg += 0x80;
  359. else
  360. reg -= 0x80;
  361. ctrl->value = (s32)reg;
  362. break;
  363. case SAA7191_CONTROL_VTRC:
  364. reg = saa7191_read_reg(sd, SAA7191_REG_STDC);
  365. ctrl->value = ((s32)reg & SAA7191_STDC_VTRC) ? 1 : 0;
  366. break;
  367. case SAA7191_CONTROL_LUMA_DELAY:
  368. reg = saa7191_read_reg(sd, SAA7191_REG_CTL3);
  369. ctrl->value = ((s32)reg & SAA7191_CTL3_YDEL_MASK)
  370. >> SAA7191_CTL3_YDEL_SHIFT;
  371. if (ctrl->value >= 4)
  372. ctrl->value -= 8;
  373. break;
  374. case SAA7191_CONTROL_VNR:
  375. reg = saa7191_read_reg(sd, SAA7191_REG_CTL4);
  376. ctrl->value = ((s32)reg & SAA7191_CTL4_VNOI_MASK)
  377. >> SAA7191_CTL4_VNOI_SHIFT;
  378. break;
  379. default:
  380. ret = -EINVAL;
  381. }
  382. return ret;
  383. }
  384. static int saa7191_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  385. {
  386. u8 reg;
  387. int ret = 0;
  388. switch (ctrl->id) {
  389. case SAA7191_CONTROL_BANDPASS:
  390. case SAA7191_CONTROL_BANDPASS_WEIGHT:
  391. case SAA7191_CONTROL_CORING:
  392. reg = saa7191_read_reg(sd, SAA7191_REG_LUMA);
  393. switch (ctrl->id) {
  394. case SAA7191_CONTROL_BANDPASS:
  395. reg &= ~SAA7191_LUMA_BPSS_MASK;
  396. reg |= (ctrl->value << SAA7191_LUMA_BPSS_SHIFT)
  397. & SAA7191_LUMA_BPSS_MASK;
  398. break;
  399. case SAA7191_CONTROL_BANDPASS_WEIGHT:
  400. reg &= ~SAA7191_LUMA_APER_MASK;
  401. reg |= (ctrl->value << SAA7191_LUMA_APER_SHIFT)
  402. & SAA7191_LUMA_APER_MASK;
  403. break;
  404. case SAA7191_CONTROL_CORING:
  405. reg &= ~SAA7191_LUMA_CORI_MASK;
  406. reg |= (ctrl->value << SAA7191_LUMA_CORI_SHIFT)
  407. & SAA7191_LUMA_CORI_MASK;
  408. break;
  409. }
  410. ret = saa7191_write_reg(sd, SAA7191_REG_LUMA, reg);
  411. break;
  412. case SAA7191_CONTROL_FORCE_COLOUR:
  413. case SAA7191_CONTROL_CHROMA_GAIN:
  414. reg = saa7191_read_reg(sd, SAA7191_REG_GAIN);
  415. if (ctrl->id == SAA7191_CONTROL_FORCE_COLOUR) {
  416. if (ctrl->value)
  417. reg |= SAA7191_GAIN_COLO;
  418. else
  419. reg &= ~SAA7191_GAIN_COLO;
  420. } else {
  421. reg &= ~SAA7191_GAIN_LFIS_MASK;
  422. reg |= (ctrl->value << SAA7191_GAIN_LFIS_SHIFT)
  423. & SAA7191_GAIN_LFIS_MASK;
  424. }
  425. ret = saa7191_write_reg(sd, SAA7191_REG_GAIN, reg);
  426. break;
  427. case V4L2_CID_HUE:
  428. reg = ctrl->value & 0xff;
  429. if (reg < 0x80)
  430. reg += 0x80;
  431. else
  432. reg -= 0x80;
  433. ret = saa7191_write_reg(sd, SAA7191_REG_HUEC, reg);
  434. break;
  435. case SAA7191_CONTROL_VTRC:
  436. reg = saa7191_read_reg(sd, SAA7191_REG_STDC);
  437. if (ctrl->value)
  438. reg |= SAA7191_STDC_VTRC;
  439. else
  440. reg &= ~SAA7191_STDC_VTRC;
  441. ret = saa7191_write_reg(sd, SAA7191_REG_STDC, reg);
  442. break;
  443. case SAA7191_CONTROL_LUMA_DELAY: {
  444. s32 value = ctrl->value;
  445. if (value < 0)
  446. value += 8;
  447. reg = saa7191_read_reg(sd, SAA7191_REG_CTL3);
  448. reg &= ~SAA7191_CTL3_YDEL_MASK;
  449. reg |= (value << SAA7191_CTL3_YDEL_SHIFT)
  450. & SAA7191_CTL3_YDEL_MASK;
  451. ret = saa7191_write_reg(sd, SAA7191_REG_CTL3, reg);
  452. break;
  453. }
  454. case SAA7191_CONTROL_VNR:
  455. reg = saa7191_read_reg(sd, SAA7191_REG_CTL4);
  456. reg &= ~SAA7191_CTL4_VNOI_MASK;
  457. reg |= (ctrl->value << SAA7191_CTL4_VNOI_SHIFT)
  458. & SAA7191_CTL4_VNOI_MASK;
  459. ret = saa7191_write_reg(sd, SAA7191_REG_CTL4, reg);
  460. break;
  461. default:
  462. ret = -EINVAL;
  463. }
  464. return ret;
  465. }
  466. /* I2C-interface */
  467. static int saa7191_g_input_status(struct v4l2_subdev *sd, u32 *status)
  468. {
  469. u8 status_reg;
  470. int res = V4L2_IN_ST_NO_SIGNAL;
  471. if (saa7191_read_status(sd, &status_reg))
  472. return -EIO;
  473. if ((status_reg & SAA7191_STATUS_HLCK) == 0)
  474. res = 0;
  475. if (!(status_reg & SAA7191_STATUS_CODE))
  476. res |= V4L2_IN_ST_NO_COLOR;
  477. *status = res;
  478. return 0;
  479. }
  480. static int saa7191_g_chip_ident(struct v4l2_subdev *sd,
  481. struct v4l2_dbg_chip_ident *chip)
  482. {
  483. struct i2c_client *client = v4l2_get_subdevdata(sd);
  484. return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_SAA7191, 0);
  485. }
  486. /* ----------------------------------------------------------------------- */
  487. static const struct v4l2_subdev_core_ops saa7191_core_ops = {
  488. .g_chip_ident = saa7191_g_chip_ident,
  489. .g_ctrl = saa7191_g_ctrl,
  490. .s_ctrl = saa7191_s_ctrl,
  491. .s_std = saa7191_s_std,
  492. };
  493. static const struct v4l2_subdev_video_ops saa7191_video_ops = {
  494. .s_routing = saa7191_s_routing,
  495. .querystd = saa7191_querystd,
  496. .g_input_status = saa7191_g_input_status,
  497. };
  498. static const struct v4l2_subdev_ops saa7191_ops = {
  499. .core = &saa7191_core_ops,
  500. .video = &saa7191_video_ops,
  501. };
  502. static int saa7191_probe(struct i2c_client *client,
  503. const struct i2c_device_id *id)
  504. {
  505. int err = 0;
  506. struct saa7191 *decoder;
  507. struct v4l2_subdev *sd;
  508. v4l_info(client, "chip found @ 0x%x (%s)\n",
  509. client->addr << 1, client->adapter->name);
  510. decoder = kzalloc(sizeof(*decoder), GFP_KERNEL);
  511. if (!decoder)
  512. return -ENOMEM;
  513. sd = &decoder->sd;
  514. v4l2_i2c_subdev_init(sd, client, &saa7191_ops);
  515. err = saa7191_write_block(sd, sizeof(initseq), initseq);
  516. if (err) {
  517. printk(KERN_ERR "SAA7191 initialization failed\n");
  518. kfree(decoder);
  519. return err;
  520. }
  521. printk(KERN_INFO "SAA7191 initialized\n");
  522. decoder->input = SAA7191_INPUT_COMPOSITE;
  523. decoder->norm = V4L2_STD_PAL;
  524. err = saa7191_autodetect_norm(sd);
  525. if (err && (err != -EBUSY))
  526. printk(KERN_ERR "SAA7191: Signal auto-detection failed\n");
  527. return 0;
  528. }
  529. static int saa7191_remove(struct i2c_client *client)
  530. {
  531. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  532. v4l2_device_unregister_subdev(sd);
  533. kfree(to_saa7191(sd));
  534. return 0;
  535. }
  536. static const struct i2c_device_id saa7191_id[] = {
  537. { "saa7191", 0 },
  538. { }
  539. };
  540. MODULE_DEVICE_TABLE(i2c, saa7191_id);
  541. static struct i2c_driver saa7191_driver = {
  542. .driver = {
  543. .owner = THIS_MODULE,
  544. .name = "saa7191",
  545. },
  546. .probe = saa7191_probe,
  547. .remove = saa7191_remove,
  548. .id_table = saa7191_id,
  549. };
  550. module_i2c_driver(saa7191_driver);