saa717x.c 33 KB

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  1. /*
  2. * saa717x - Philips SAA717xHL video decoder driver
  3. *
  4. * Based on the saa7115 driver
  5. *
  6. * Changes by Ohta Kyuma <alpha292@bremen.or.jp>
  7. * - Apply to SAA717x,NEC uPD64031,uPD64083. (1/31/2004)
  8. *
  9. * Changes by T.Adachi (tadachi@tadachi-net.com)
  10. * - support audio, video scaler etc, and checked the initialize sequence.
  11. *
  12. * Cleaned up by Hans Verkuil <hverkuil@xs4all.nl>
  13. *
  14. * Note: this is a reversed engineered driver based on captures from
  15. * the I2C bus under Windows. This chip is very similar to the saa7134,
  16. * though. Unfortunately, this driver is currently only working for NTSC.
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License as published by
  20. * the Free Software Foundation; either version 2 of the License, or
  21. * (at your option) any later version.
  22. *
  23. * This program is distributed in the hope that it will be useful,
  24. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  26. * GNU General Public License for more details.
  27. *
  28. * You should have received a copy of the GNU General Public License
  29. * along with this program; if not, write to the Free Software
  30. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31. */
  32. #include <linux/module.h>
  33. #include <linux/kernel.h>
  34. #include <linux/slab.h>
  35. #include <linux/sched.h>
  36. #include <linux/videodev2.h>
  37. #include <linux/i2c.h>
  38. #include <media/v4l2-device.h>
  39. #include <media/v4l2-ctrls.h>
  40. MODULE_DESCRIPTION("Philips SAA717x audio/video decoder driver");
  41. MODULE_AUTHOR("K. Ohta, T. Adachi, Hans Verkuil");
  42. MODULE_LICENSE("GPL");
  43. static int debug;
  44. module_param(debug, int, 0644);
  45. MODULE_PARM_DESC(debug, "Debug level (0-1)");
  46. /*
  47. * Generic i2c probe
  48. * concerning the addresses: i2c wants 7 bit (without the r/w bit), so '>>1'
  49. */
  50. struct saa717x_state {
  51. struct v4l2_subdev sd;
  52. struct v4l2_ctrl_handler hdl;
  53. v4l2_std_id std;
  54. int input;
  55. int enable;
  56. int radio;
  57. int playback;
  58. int audio;
  59. int tuner_audio_mode;
  60. int audio_main_mute;
  61. int audio_main_vol_r;
  62. int audio_main_vol_l;
  63. u16 audio_main_bass;
  64. u16 audio_main_treble;
  65. u16 audio_main_volume;
  66. u16 audio_main_balance;
  67. int audio_input;
  68. };
  69. static inline struct saa717x_state *to_state(struct v4l2_subdev *sd)
  70. {
  71. return container_of(sd, struct saa717x_state, sd);
  72. }
  73. static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
  74. {
  75. return &container_of(ctrl->handler, struct saa717x_state, hdl)->sd;
  76. }
  77. /* ----------------------------------------------------------------------- */
  78. /* for audio mode */
  79. #define TUNER_AUDIO_MONO 0 /* LL */
  80. #define TUNER_AUDIO_STEREO 1 /* LR */
  81. #define TUNER_AUDIO_LANG1 2 /* LL */
  82. #define TUNER_AUDIO_LANG2 3 /* RR */
  83. #define SAA717X_NTSC_WIDTH (704)
  84. #define SAA717X_NTSC_HEIGHT (480)
  85. /* ----------------------------------------------------------------------- */
  86. static int saa717x_write(struct v4l2_subdev *sd, u32 reg, u32 value)
  87. {
  88. struct i2c_client *client = v4l2_get_subdevdata(sd);
  89. struct i2c_adapter *adap = client->adapter;
  90. int fw_addr = reg == 0x454 || (reg >= 0x464 && reg <= 0x478) || reg == 0x480 || reg == 0x488;
  91. unsigned char mm1[6];
  92. struct i2c_msg msg;
  93. msg.flags = 0;
  94. msg.addr = client->addr;
  95. mm1[0] = (reg >> 8) & 0xff;
  96. mm1[1] = reg & 0xff;
  97. if (fw_addr) {
  98. mm1[4] = (value >> 16) & 0xff;
  99. mm1[3] = (value >> 8) & 0xff;
  100. mm1[2] = value & 0xff;
  101. } else {
  102. mm1[2] = value & 0xff;
  103. }
  104. msg.len = fw_addr ? 5 : 3; /* Long Registers have *only* three bytes! */
  105. msg.buf = mm1;
  106. v4l2_dbg(2, debug, sd, "wrote: reg 0x%03x=%08x\n", reg, value);
  107. return i2c_transfer(adap, &msg, 1) == 1;
  108. }
  109. static void saa717x_write_regs(struct v4l2_subdev *sd, u32 *data)
  110. {
  111. while (data[0] || data[1]) {
  112. saa717x_write(sd, data[0], data[1]);
  113. data += 2;
  114. }
  115. }
  116. static u32 saa717x_read(struct v4l2_subdev *sd, u32 reg)
  117. {
  118. struct i2c_client *client = v4l2_get_subdevdata(sd);
  119. struct i2c_adapter *adap = client->adapter;
  120. int fw_addr = (reg >= 0x404 && reg <= 0x4b8) || reg == 0x528;
  121. unsigned char mm1[2];
  122. unsigned char mm2[4] = { 0, 0, 0, 0 };
  123. struct i2c_msg msgs[2];
  124. u32 value;
  125. msgs[0].flags = 0;
  126. msgs[1].flags = I2C_M_RD;
  127. msgs[0].addr = msgs[1].addr = client->addr;
  128. mm1[0] = (reg >> 8) & 0xff;
  129. mm1[1] = reg & 0xff;
  130. msgs[0].len = 2;
  131. msgs[0].buf = mm1;
  132. msgs[1].len = fw_addr ? 3 : 1; /* Multibyte Registers contains *only* 3 bytes */
  133. msgs[1].buf = mm2;
  134. i2c_transfer(adap, msgs, 2);
  135. if (fw_addr)
  136. value = (mm2[2] & 0xff) | ((mm2[1] & 0xff) >> 8) | ((mm2[0] & 0xff) >> 16);
  137. else
  138. value = mm2[0] & 0xff;
  139. v4l2_dbg(2, debug, sd, "read: reg 0x%03x=0x%08x\n", reg, value);
  140. return value;
  141. }
  142. /* ----------------------------------------------------------------------- */
  143. static u32 reg_init_initialize[] =
  144. {
  145. /* from linux driver */
  146. 0x101, 0x008, /* Increment delay */
  147. 0x103, 0x000, /* Analog input control 2 */
  148. 0x104, 0x090, /* Analog input control 3 */
  149. 0x105, 0x090, /* Analog input control 4 */
  150. 0x106, 0x0eb, /* Horizontal sync start */
  151. 0x107, 0x0e0, /* Horizontal sync stop */
  152. 0x109, 0x055, /* Luminance control */
  153. 0x10f, 0x02a, /* Chroma gain control */
  154. 0x110, 0x000, /* Chroma control 2 */
  155. 0x114, 0x045, /* analog/ADC */
  156. 0x118, 0x040, /* RAW data gain */
  157. 0x119, 0x080, /* RAW data offset */
  158. 0x044, 0x000, /* VBI horizontal input window start (L) TASK A */
  159. 0x045, 0x000, /* VBI horizontal input window start (H) TASK A */
  160. 0x046, 0x0cf, /* VBI horizontal input window stop (L) TASK A */
  161. 0x047, 0x002, /* VBI horizontal input window stop (H) TASK A */
  162. 0x049, 0x000, /* VBI vertical input window start (H) TASK A */
  163. 0x04c, 0x0d0, /* VBI horizontal output length (L) TASK A */
  164. 0x04d, 0x002, /* VBI horizontal output length (H) TASK A */
  165. 0x064, 0x080, /* Lumina brightness TASK A */
  166. 0x065, 0x040, /* Luminance contrast TASK A */
  167. 0x066, 0x040, /* Chroma saturation TASK A */
  168. /* 067H: Reserved */
  169. 0x068, 0x000, /* VBI horizontal scaling increment (L) TASK A */
  170. 0x069, 0x004, /* VBI horizontal scaling increment (H) TASK A */
  171. 0x06a, 0x000, /* VBI phase offset TASK A */
  172. 0x06e, 0x000, /* Horizontal phase offset Luma TASK A */
  173. 0x06f, 0x000, /* Horizontal phase offset Chroma TASK A */
  174. 0x072, 0x000, /* Vertical filter mode TASK A */
  175. 0x084, 0x000, /* VBI horizontal input window start (L) TAKS B */
  176. 0x085, 0x000, /* VBI horizontal input window start (H) TAKS B */
  177. 0x086, 0x0cf, /* VBI horizontal input window stop (L) TAKS B */
  178. 0x087, 0x002, /* VBI horizontal input window stop (H) TAKS B */
  179. 0x089, 0x000, /* VBI vertical input window start (H) TAKS B */
  180. 0x08c, 0x0d0, /* VBI horizontal output length (L) TASK B */
  181. 0x08d, 0x002, /* VBI horizontal output length (H) TASK B */
  182. 0x0a4, 0x080, /* Lumina brightness TASK B */
  183. 0x0a5, 0x040, /* Luminance contrast TASK B */
  184. 0x0a6, 0x040, /* Chroma saturation TASK B */
  185. /* 0A7H reserved */
  186. 0x0a8, 0x000, /* VBI horizontal scaling increment (L) TASK B */
  187. 0x0a9, 0x004, /* VBI horizontal scaling increment (H) TASK B */
  188. 0x0aa, 0x000, /* VBI phase offset TASK B */
  189. 0x0ae, 0x000, /* Horizontal phase offset Luma TASK B */
  190. 0x0af, 0x000, /*Horizontal phase offset Chroma TASK B */
  191. 0x0b2, 0x000, /* Vertical filter mode TASK B */
  192. 0x00c, 0x000, /* Start point GREEN path */
  193. 0x00d, 0x000, /* Start point BLUE path */
  194. 0x00e, 0x000, /* Start point RED path */
  195. 0x010, 0x010, /* GREEN path gamma curve --- */
  196. 0x011, 0x020,
  197. 0x012, 0x030,
  198. 0x013, 0x040,
  199. 0x014, 0x050,
  200. 0x015, 0x060,
  201. 0x016, 0x070,
  202. 0x017, 0x080,
  203. 0x018, 0x090,
  204. 0x019, 0x0a0,
  205. 0x01a, 0x0b0,
  206. 0x01b, 0x0c0,
  207. 0x01c, 0x0d0,
  208. 0x01d, 0x0e0,
  209. 0x01e, 0x0f0,
  210. 0x01f, 0x0ff, /* --- GREEN path gamma curve */
  211. 0x020, 0x010, /* BLUE path gamma curve --- */
  212. 0x021, 0x020,
  213. 0x022, 0x030,
  214. 0x023, 0x040,
  215. 0x024, 0x050,
  216. 0x025, 0x060,
  217. 0x026, 0x070,
  218. 0x027, 0x080,
  219. 0x028, 0x090,
  220. 0x029, 0x0a0,
  221. 0x02a, 0x0b0,
  222. 0x02b, 0x0c0,
  223. 0x02c, 0x0d0,
  224. 0x02d, 0x0e0,
  225. 0x02e, 0x0f0,
  226. 0x02f, 0x0ff, /* --- BLUE path gamma curve */
  227. 0x030, 0x010, /* RED path gamma curve --- */
  228. 0x031, 0x020,
  229. 0x032, 0x030,
  230. 0x033, 0x040,
  231. 0x034, 0x050,
  232. 0x035, 0x060,
  233. 0x036, 0x070,
  234. 0x037, 0x080,
  235. 0x038, 0x090,
  236. 0x039, 0x0a0,
  237. 0x03a, 0x0b0,
  238. 0x03b, 0x0c0,
  239. 0x03c, 0x0d0,
  240. 0x03d, 0x0e0,
  241. 0x03e, 0x0f0,
  242. 0x03f, 0x0ff, /* --- RED path gamma curve */
  243. 0x109, 0x085, /* Luminance control */
  244. /**** from app start ****/
  245. 0x584, 0x000, /* AGC gain control */
  246. 0x585, 0x000, /* Program count */
  247. 0x586, 0x003, /* Status reset */
  248. 0x588, 0x0ff, /* Number of audio samples (L) */
  249. 0x589, 0x00f, /* Number of audio samples (M) */
  250. 0x58a, 0x000, /* Number of audio samples (H) */
  251. 0x58b, 0x000, /* Audio select */
  252. 0x58c, 0x010, /* Audio channel assign1 */
  253. 0x58d, 0x032, /* Audio channel assign2 */
  254. 0x58e, 0x054, /* Audio channel assign3 */
  255. 0x58f, 0x023, /* Audio format */
  256. 0x590, 0x000, /* SIF control */
  257. 0x595, 0x000, /* ?? */
  258. 0x596, 0x000, /* ?? */
  259. 0x597, 0x000, /* ?? */
  260. 0x464, 0x00, /* Digital input crossbar1 */
  261. 0x46c, 0xbbbb10, /* Digital output selection1-3 */
  262. 0x470, 0x101010, /* Digital output selection4-6 */
  263. 0x478, 0x00, /* Sound feature control */
  264. 0x474, 0x18, /* Softmute control */
  265. 0x454, 0x0425b9, /* Sound Easy programming(reset) */
  266. 0x454, 0x042539, /* Sound Easy programming(reset) */
  267. /**** common setting( of DVD play, including scaler commands) ****/
  268. 0x042, 0x003, /* Data path configuration for VBI (TASK A) */
  269. 0x082, 0x003, /* Data path configuration for VBI (TASK B) */
  270. 0x108, 0x0f8, /* Sync control */
  271. 0x2a9, 0x0fd, /* ??? */
  272. 0x102, 0x089, /* select video input "mode 9" */
  273. 0x111, 0x000, /* Mode/delay control */
  274. 0x10e, 0x00a, /* Chroma control 1 */
  275. 0x594, 0x002, /* SIF, analog I/O select */
  276. 0x454, 0x0425b9, /* Sound */
  277. 0x454, 0x042539,
  278. 0x111, 0x000,
  279. 0x10e, 0x00a,
  280. 0x464, 0x000,
  281. 0x300, 0x000,
  282. 0x301, 0x006,
  283. 0x302, 0x000,
  284. 0x303, 0x006,
  285. 0x308, 0x040,
  286. 0x309, 0x000,
  287. 0x30a, 0x000,
  288. 0x30b, 0x000,
  289. 0x000, 0x002,
  290. 0x001, 0x000,
  291. 0x002, 0x000,
  292. 0x003, 0x000,
  293. 0x004, 0x033,
  294. 0x040, 0x01d,
  295. 0x041, 0x001,
  296. 0x042, 0x004,
  297. 0x043, 0x000,
  298. 0x080, 0x01e,
  299. 0x081, 0x001,
  300. 0x082, 0x004,
  301. 0x083, 0x000,
  302. 0x190, 0x018,
  303. 0x115, 0x000,
  304. 0x116, 0x012,
  305. 0x117, 0x018,
  306. 0x04a, 0x011,
  307. 0x08a, 0x011,
  308. 0x04b, 0x000,
  309. 0x08b, 0x000,
  310. 0x048, 0x000,
  311. 0x088, 0x000,
  312. 0x04e, 0x012,
  313. 0x08e, 0x012,
  314. 0x058, 0x012,
  315. 0x098, 0x012,
  316. 0x059, 0x000,
  317. 0x099, 0x000,
  318. 0x05a, 0x003,
  319. 0x09a, 0x003,
  320. 0x05b, 0x001,
  321. 0x09b, 0x001,
  322. 0x054, 0x008,
  323. 0x094, 0x008,
  324. 0x055, 0x000,
  325. 0x095, 0x000,
  326. 0x056, 0x0c7,
  327. 0x096, 0x0c7,
  328. 0x057, 0x002,
  329. 0x097, 0x002,
  330. 0x0ff, 0x0ff,
  331. 0x060, 0x001,
  332. 0x0a0, 0x001,
  333. 0x061, 0x000,
  334. 0x0a1, 0x000,
  335. 0x062, 0x000,
  336. 0x0a2, 0x000,
  337. 0x063, 0x000,
  338. 0x0a3, 0x000,
  339. 0x070, 0x000,
  340. 0x0b0, 0x000,
  341. 0x071, 0x004,
  342. 0x0b1, 0x004,
  343. 0x06c, 0x0e9,
  344. 0x0ac, 0x0e9,
  345. 0x06d, 0x003,
  346. 0x0ad, 0x003,
  347. 0x05c, 0x0d0,
  348. 0x09c, 0x0d0,
  349. 0x05d, 0x002,
  350. 0x09d, 0x002,
  351. 0x05e, 0x0f2,
  352. 0x09e, 0x0f2,
  353. 0x05f, 0x000,
  354. 0x09f, 0x000,
  355. 0x074, 0x000,
  356. 0x0b4, 0x000,
  357. 0x075, 0x000,
  358. 0x0b5, 0x000,
  359. 0x076, 0x000,
  360. 0x0b6, 0x000,
  361. 0x077, 0x000,
  362. 0x0b7, 0x000,
  363. 0x195, 0x008,
  364. 0x0ff, 0x0ff,
  365. 0x108, 0x0f8,
  366. 0x111, 0x000,
  367. 0x10e, 0x00a,
  368. 0x2a9, 0x0fd,
  369. 0x464, 0x001,
  370. 0x454, 0x042135,
  371. 0x598, 0x0e7,
  372. 0x599, 0x07d,
  373. 0x59a, 0x018,
  374. 0x59c, 0x066,
  375. 0x59d, 0x090,
  376. 0x59e, 0x001,
  377. 0x584, 0x000,
  378. 0x585, 0x000,
  379. 0x586, 0x003,
  380. 0x588, 0x0ff,
  381. 0x589, 0x00f,
  382. 0x58a, 0x000,
  383. 0x58b, 0x000,
  384. 0x58c, 0x010,
  385. 0x58d, 0x032,
  386. 0x58e, 0x054,
  387. 0x58f, 0x023,
  388. 0x590, 0x000,
  389. 0x595, 0x000,
  390. 0x596, 0x000,
  391. 0x597, 0x000,
  392. 0x464, 0x000,
  393. 0x46c, 0xbbbb10,
  394. 0x470, 0x101010,
  395. 0x478, 0x000,
  396. 0x474, 0x018,
  397. 0x454, 0x042135,
  398. 0x598, 0x0e7,
  399. 0x599, 0x07d,
  400. 0x59a, 0x018,
  401. 0x59c, 0x066,
  402. 0x59d, 0x090,
  403. 0x59e, 0x001,
  404. 0x584, 0x000,
  405. 0x585, 0x000,
  406. 0x586, 0x003,
  407. 0x588, 0x0ff,
  408. 0x589, 0x00f,
  409. 0x58a, 0x000,
  410. 0x58b, 0x000,
  411. 0x58c, 0x010,
  412. 0x58d, 0x032,
  413. 0x58e, 0x054,
  414. 0x58f, 0x023,
  415. 0x590, 0x000,
  416. 0x595, 0x000,
  417. 0x596, 0x000,
  418. 0x597, 0x000,
  419. 0x464, 0x000,
  420. 0x46c, 0xbbbb10,
  421. 0x470, 0x101010,
  422. 0x478, 0x000,
  423. 0x474, 0x018,
  424. 0x454, 0x042135,
  425. 0x598, 0x0e7,
  426. 0x599, 0x07d,
  427. 0x59a, 0x018,
  428. 0x59c, 0x066,
  429. 0x59d, 0x090,
  430. 0x59e, 0x001,
  431. 0x584, 0x000,
  432. 0x585, 0x000,
  433. 0x586, 0x003,
  434. 0x588, 0x0ff,
  435. 0x589, 0x00f,
  436. 0x58a, 0x000,
  437. 0x58b, 0x000,
  438. 0x58c, 0x010,
  439. 0x58d, 0x032,
  440. 0x58e, 0x054,
  441. 0x58f, 0x023,
  442. 0x590, 0x000,
  443. 0x595, 0x000,
  444. 0x596, 0x000,
  445. 0x597, 0x000,
  446. 0x464, 0x000,
  447. 0x46c, 0xbbbb10,
  448. 0x470, 0x101010,
  449. 0x478, 0x000,
  450. 0x474, 0x018,
  451. 0x454, 0x042135,
  452. 0x193, 0x000,
  453. 0x300, 0x000,
  454. 0x301, 0x006,
  455. 0x302, 0x000,
  456. 0x303, 0x006,
  457. 0x308, 0x040,
  458. 0x309, 0x000,
  459. 0x30a, 0x000,
  460. 0x30b, 0x000,
  461. 0x000, 0x002,
  462. 0x001, 0x000,
  463. 0x002, 0x000,
  464. 0x003, 0x000,
  465. 0x004, 0x033,
  466. 0x040, 0x01d,
  467. 0x041, 0x001,
  468. 0x042, 0x004,
  469. 0x043, 0x000,
  470. 0x080, 0x01e,
  471. 0x081, 0x001,
  472. 0x082, 0x004,
  473. 0x083, 0x000,
  474. 0x190, 0x018,
  475. 0x115, 0x000,
  476. 0x116, 0x012,
  477. 0x117, 0x018,
  478. 0x04a, 0x011,
  479. 0x08a, 0x011,
  480. 0x04b, 0x000,
  481. 0x08b, 0x000,
  482. 0x048, 0x000,
  483. 0x088, 0x000,
  484. 0x04e, 0x012,
  485. 0x08e, 0x012,
  486. 0x058, 0x012,
  487. 0x098, 0x012,
  488. 0x059, 0x000,
  489. 0x099, 0x000,
  490. 0x05a, 0x003,
  491. 0x09a, 0x003,
  492. 0x05b, 0x001,
  493. 0x09b, 0x001,
  494. 0x054, 0x008,
  495. 0x094, 0x008,
  496. 0x055, 0x000,
  497. 0x095, 0x000,
  498. 0x056, 0x0c7,
  499. 0x096, 0x0c7,
  500. 0x057, 0x002,
  501. 0x097, 0x002,
  502. 0x060, 0x001,
  503. 0x0a0, 0x001,
  504. 0x061, 0x000,
  505. 0x0a1, 0x000,
  506. 0x062, 0x000,
  507. 0x0a2, 0x000,
  508. 0x063, 0x000,
  509. 0x0a3, 0x000,
  510. 0x070, 0x000,
  511. 0x0b0, 0x000,
  512. 0x071, 0x004,
  513. 0x0b1, 0x004,
  514. 0x06c, 0x0e9,
  515. 0x0ac, 0x0e9,
  516. 0x06d, 0x003,
  517. 0x0ad, 0x003,
  518. 0x05c, 0x0d0,
  519. 0x09c, 0x0d0,
  520. 0x05d, 0x002,
  521. 0x09d, 0x002,
  522. 0x05e, 0x0f2,
  523. 0x09e, 0x0f2,
  524. 0x05f, 0x000,
  525. 0x09f, 0x000,
  526. 0x074, 0x000,
  527. 0x0b4, 0x000,
  528. 0x075, 0x000,
  529. 0x0b5, 0x000,
  530. 0x076, 0x000,
  531. 0x0b6, 0x000,
  532. 0x077, 0x000,
  533. 0x0b7, 0x000,
  534. 0x195, 0x008,
  535. 0x598, 0x0e7,
  536. 0x599, 0x07d,
  537. 0x59a, 0x018,
  538. 0x59c, 0x066,
  539. 0x59d, 0x090,
  540. 0x59e, 0x001,
  541. 0x584, 0x000,
  542. 0x585, 0x000,
  543. 0x586, 0x003,
  544. 0x588, 0x0ff,
  545. 0x589, 0x00f,
  546. 0x58a, 0x000,
  547. 0x58b, 0x000,
  548. 0x58c, 0x010,
  549. 0x58d, 0x032,
  550. 0x58e, 0x054,
  551. 0x58f, 0x023,
  552. 0x590, 0x000,
  553. 0x595, 0x000,
  554. 0x596, 0x000,
  555. 0x597, 0x000,
  556. 0x464, 0x000,
  557. 0x46c, 0xbbbb10,
  558. 0x470, 0x101010,
  559. 0x478, 0x000,
  560. 0x474, 0x018,
  561. 0x454, 0x042135,
  562. 0x193, 0x0a6,
  563. 0x108, 0x0f8,
  564. 0x042, 0x003,
  565. 0x082, 0x003,
  566. 0x454, 0x0425b9,
  567. 0x454, 0x042539,
  568. 0x193, 0x000,
  569. 0x193, 0x0a6,
  570. 0x464, 0x000,
  571. 0, 0
  572. };
  573. /* Tuner */
  574. static u32 reg_init_tuner_input[] = {
  575. 0x108, 0x0f8, /* Sync control */
  576. 0x111, 0x000, /* Mode/delay control */
  577. 0x10e, 0x00a, /* Chroma control 1 */
  578. 0, 0
  579. };
  580. /* Composite */
  581. static u32 reg_init_composite_input[] = {
  582. 0x108, 0x0e8, /* Sync control */
  583. 0x111, 0x000, /* Mode/delay control */
  584. 0x10e, 0x04a, /* Chroma control 1 */
  585. 0, 0
  586. };
  587. /* S-Video */
  588. static u32 reg_init_svideo_input[] = {
  589. 0x108, 0x0e8, /* Sync control */
  590. 0x111, 0x000, /* Mode/delay control */
  591. 0x10e, 0x04a, /* Chroma control 1 */
  592. 0, 0
  593. };
  594. static u32 reg_set_audio_template[4][2] =
  595. {
  596. { /* for MONO
  597. tadachi 6/29 DMA audio output select?
  598. Register 0x46c
  599. 7-4: DMA2, 3-0: DMA1 ch. DMA4, DMA3 DMA2, DMA1
  600. 0: MAIN left, 1: MAIN right
  601. 2: AUX1 left, 3: AUX1 right
  602. 4: AUX2 left, 5: AUX2 right
  603. 6: DPL left, 7: DPL right
  604. 8: DPL center, 9: DPL surround
  605. A: monitor output, B: digital sense */
  606. 0xbbbb00,
  607. /* tadachi 6/29 DAC and I2S output select?
  608. Register 0x470
  609. 7-4:DAC right ch. 3-0:DAC left ch.
  610. I2S1 right,left I2S2 right,left */
  611. 0x00,
  612. },
  613. { /* for STEREO */
  614. 0xbbbb10, 0x101010,
  615. },
  616. { /* for LANG1 */
  617. 0xbbbb00, 0x00,
  618. },
  619. { /* for LANG2/SAP */
  620. 0xbbbb11, 0x111111,
  621. }
  622. };
  623. /* Get detected audio flags (from saa7134 driver) */
  624. static void get_inf_dev_status(struct v4l2_subdev *sd,
  625. int *dual_flag, int *stereo_flag)
  626. {
  627. u32 reg_data3;
  628. static char *stdres[0x20] = {
  629. [0x00] = "no standard detected",
  630. [0x01] = "B/G (in progress)",
  631. [0x02] = "D/K (in progress)",
  632. [0x03] = "M (in progress)",
  633. [0x04] = "B/G A2",
  634. [0x05] = "B/G NICAM",
  635. [0x06] = "D/K A2 (1)",
  636. [0x07] = "D/K A2 (2)",
  637. [0x08] = "D/K A2 (3)",
  638. [0x09] = "D/K NICAM",
  639. [0x0a] = "L NICAM",
  640. [0x0b] = "I NICAM",
  641. [0x0c] = "M Korea",
  642. [0x0d] = "M BTSC ",
  643. [0x0e] = "M EIAJ",
  644. [0x0f] = "FM radio / IF 10.7 / 50 deemp",
  645. [0x10] = "FM radio / IF 10.7 / 75 deemp",
  646. [0x11] = "FM radio / IF sel / 50 deemp",
  647. [0x12] = "FM radio / IF sel / 75 deemp",
  648. [0x13 ... 0x1e] = "unknown",
  649. [0x1f] = "??? [in progress]",
  650. };
  651. *dual_flag = *stereo_flag = 0;
  652. /* (demdec status: 0x528) */
  653. /* read current status */
  654. reg_data3 = saa717x_read(sd, 0x0528);
  655. v4l2_dbg(1, debug, sd, "tvaudio thread status: 0x%x [%s%s%s]\n",
  656. reg_data3, stdres[reg_data3 & 0x1f],
  657. (reg_data3 & 0x000020) ? ",stereo" : "",
  658. (reg_data3 & 0x000040) ? ",dual" : "");
  659. v4l2_dbg(1, debug, sd, "detailed status: "
  660. "%s#%s#%s#%s#%s#%s#%s#%s#%s#%s#%s#%s#%s#%s\n",
  661. (reg_data3 & 0x000080) ? " A2/EIAJ pilot tone " : "",
  662. (reg_data3 & 0x000100) ? " A2/EIAJ dual " : "",
  663. (reg_data3 & 0x000200) ? " A2/EIAJ stereo " : "",
  664. (reg_data3 & 0x000400) ? " A2/EIAJ noise mute " : "",
  665. (reg_data3 & 0x000800) ? " BTSC/FM radio pilot " : "",
  666. (reg_data3 & 0x001000) ? " SAP carrier " : "",
  667. (reg_data3 & 0x002000) ? " BTSC stereo noise mute " : "",
  668. (reg_data3 & 0x004000) ? " SAP noise mute " : "",
  669. (reg_data3 & 0x008000) ? " VDSP " : "",
  670. (reg_data3 & 0x010000) ? " NICST " : "",
  671. (reg_data3 & 0x020000) ? " NICDU " : "",
  672. (reg_data3 & 0x040000) ? " NICAM muted " : "",
  673. (reg_data3 & 0x080000) ? " NICAM reserve sound " : "",
  674. (reg_data3 & 0x100000) ? " init done " : "");
  675. if (reg_data3 & 0x000220) {
  676. v4l2_dbg(1, debug, sd, "ST!!!\n");
  677. *stereo_flag = 1;
  678. }
  679. if (reg_data3 & 0x000140) {
  680. v4l2_dbg(1, debug, sd, "DUAL!!!\n");
  681. *dual_flag = 1;
  682. }
  683. }
  684. /* regs write to set audio mode */
  685. static void set_audio_mode(struct v4l2_subdev *sd, int audio_mode)
  686. {
  687. v4l2_dbg(1, debug, sd, "writing registers to set audio mode by set %d\n",
  688. audio_mode);
  689. saa717x_write(sd, 0x46c, reg_set_audio_template[audio_mode][0]);
  690. saa717x_write(sd, 0x470, reg_set_audio_template[audio_mode][1]);
  691. }
  692. /* write regs to set audio volume, bass and treble */
  693. static int set_audio_regs(struct v4l2_subdev *sd,
  694. struct saa717x_state *decoder)
  695. {
  696. u8 mute = 0xac; /* -84 dB */
  697. u32 val;
  698. unsigned int work_l, work_r;
  699. /* set SIF analog I/O select */
  700. saa717x_write(sd, 0x0594, decoder->audio_input);
  701. v4l2_dbg(1, debug, sd, "set audio input %d\n",
  702. decoder->audio_input);
  703. /* normalize ( 65535 to 0 -> 24 to -40 (not -84)) */
  704. work_l = (min(65536 - decoder->audio_main_balance, 32768) * decoder->audio_main_volume) / 32768;
  705. work_r = (min(decoder->audio_main_balance, (u16)32768) * decoder->audio_main_volume) / 32768;
  706. decoder->audio_main_vol_l = (long)work_l * (24 - (-40)) / 65535 - 40;
  707. decoder->audio_main_vol_r = (long)work_r * (24 - (-40)) / 65535 - 40;
  708. /* set main volume */
  709. /* main volume L[7-0],R[7-0],0x00 24=24dB,-83dB, -84(mute) */
  710. /* def:0dB->6dB(MPG600GR) */
  711. /* if mute is on, set mute */
  712. if (decoder->audio_main_mute) {
  713. val = mute | (mute << 8);
  714. } else {
  715. val = (u8)decoder->audio_main_vol_l |
  716. ((u8)decoder->audio_main_vol_r << 8);
  717. }
  718. saa717x_write(sd, 0x480, val);
  719. /* set bass and treble */
  720. val = decoder->audio_main_bass & 0x1f;
  721. val |= (decoder->audio_main_treble & 0x1f) << 5;
  722. saa717x_write(sd, 0x488, val);
  723. return 0;
  724. }
  725. /********** scaling staff ***********/
  726. static void set_h_prescale(struct v4l2_subdev *sd,
  727. int task, int prescale)
  728. {
  729. static const struct {
  730. int xpsc;
  731. int xacl;
  732. int xc2_1;
  733. int xdcg;
  734. int vpfy;
  735. } vals[] = {
  736. /* XPSC XACL XC2_1 XDCG VPFY */
  737. { 1, 0, 0, 0, 0 },
  738. { 2, 2, 1, 2, 2 },
  739. { 3, 4, 1, 3, 2 },
  740. { 4, 8, 1, 4, 2 },
  741. { 5, 8, 1, 4, 2 },
  742. { 6, 8, 1, 4, 3 },
  743. { 7, 8, 1, 4, 3 },
  744. { 8, 15, 0, 4, 3 },
  745. { 9, 15, 0, 4, 3 },
  746. { 10, 16, 1, 5, 3 },
  747. };
  748. static const int count = ARRAY_SIZE(vals);
  749. int i, task_shift;
  750. task_shift = task * 0x40;
  751. for (i = 0; i < count; i++)
  752. if (vals[i].xpsc == prescale)
  753. break;
  754. if (i == count)
  755. return;
  756. /* horizonal prescaling */
  757. saa717x_write(sd, 0x60 + task_shift, vals[i].xpsc);
  758. /* accumulation length */
  759. saa717x_write(sd, 0x61 + task_shift, vals[i].xacl);
  760. /* level control */
  761. saa717x_write(sd, 0x62 + task_shift,
  762. (vals[i].xc2_1 << 3) | vals[i].xdcg);
  763. /*FIR prefilter control */
  764. saa717x_write(sd, 0x63 + task_shift,
  765. (vals[i].vpfy << 2) | vals[i].vpfy);
  766. }
  767. /********** scaling staff ***********/
  768. static void set_v_scale(struct v4l2_subdev *sd, int task, int yscale)
  769. {
  770. int task_shift;
  771. task_shift = task * 0x40;
  772. /* Vertical scaling ratio (LOW) */
  773. saa717x_write(sd, 0x70 + task_shift, yscale & 0xff);
  774. /* Vertical scaling ratio (HI) */
  775. saa717x_write(sd, 0x71 + task_shift, yscale >> 8);
  776. }
  777. static int saa717x_s_ctrl(struct v4l2_ctrl *ctrl)
  778. {
  779. struct v4l2_subdev *sd = to_sd(ctrl);
  780. struct saa717x_state *state = to_state(sd);
  781. switch (ctrl->id) {
  782. case V4L2_CID_BRIGHTNESS:
  783. saa717x_write(sd, 0x10a, ctrl->val);
  784. return 0;
  785. case V4L2_CID_CONTRAST:
  786. saa717x_write(sd, 0x10b, ctrl->val);
  787. return 0;
  788. case V4L2_CID_SATURATION:
  789. saa717x_write(sd, 0x10c, ctrl->val);
  790. return 0;
  791. case V4L2_CID_HUE:
  792. saa717x_write(sd, 0x10d, ctrl->val);
  793. return 0;
  794. case V4L2_CID_AUDIO_MUTE:
  795. state->audio_main_mute = ctrl->val;
  796. break;
  797. case V4L2_CID_AUDIO_VOLUME:
  798. state->audio_main_volume = ctrl->val;
  799. break;
  800. case V4L2_CID_AUDIO_BALANCE:
  801. state->audio_main_balance = ctrl->val;
  802. break;
  803. case V4L2_CID_AUDIO_TREBLE:
  804. state->audio_main_treble = ctrl->val;
  805. break;
  806. case V4L2_CID_AUDIO_BASS:
  807. state->audio_main_bass = ctrl->val;
  808. break;
  809. default:
  810. return 0;
  811. }
  812. set_audio_regs(sd, state);
  813. return 0;
  814. }
  815. static int saa717x_s_video_routing(struct v4l2_subdev *sd,
  816. u32 input, u32 output, u32 config)
  817. {
  818. struct saa717x_state *decoder = to_state(sd);
  819. int is_tuner = input & 0x80; /* tuner input flag */
  820. input &= 0x7f;
  821. v4l2_dbg(1, debug, sd, "decoder set input (%d)\n", input);
  822. /* inputs from 0-9 are available*/
  823. /* saa717x have mode0-mode9 but mode5 is reserved. */
  824. if (input > 9 || input == 5)
  825. return -EINVAL;
  826. if (decoder->input != input) {
  827. int input_line = input;
  828. decoder->input = input_line;
  829. v4l2_dbg(1, debug, sd, "now setting %s input %d\n",
  830. input_line >= 6 ? "S-Video" : "Composite",
  831. input_line);
  832. /* select mode */
  833. saa717x_write(sd, 0x102,
  834. (saa717x_read(sd, 0x102) & 0xf0) |
  835. input_line);
  836. /* bypass chrominance trap for modes 6..9 */
  837. saa717x_write(sd, 0x109,
  838. (saa717x_read(sd, 0x109) & 0x7f) |
  839. (input_line < 6 ? 0x0 : 0x80));
  840. /* change audio_mode */
  841. if (is_tuner) {
  842. /* tuner */
  843. set_audio_mode(sd, decoder->tuner_audio_mode);
  844. } else {
  845. /* Force to STEREO mode if Composite or
  846. * S-Video were chosen */
  847. set_audio_mode(sd, TUNER_AUDIO_STEREO);
  848. }
  849. /* change initialize procedure (Composite/S-Video) */
  850. if (is_tuner)
  851. saa717x_write_regs(sd, reg_init_tuner_input);
  852. else if (input_line >= 6)
  853. saa717x_write_regs(sd, reg_init_svideo_input);
  854. else
  855. saa717x_write_regs(sd, reg_init_composite_input);
  856. }
  857. return 0;
  858. }
  859. #ifdef CONFIG_VIDEO_ADV_DEBUG
  860. static int saa717x_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
  861. {
  862. struct i2c_client *client = v4l2_get_subdevdata(sd);
  863. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  864. return -EINVAL;
  865. if (!capable(CAP_SYS_ADMIN))
  866. return -EPERM;
  867. reg->val = saa717x_read(sd, reg->reg);
  868. reg->size = 1;
  869. return 0;
  870. }
  871. static int saa717x_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
  872. {
  873. struct i2c_client *client = v4l2_get_subdevdata(sd);
  874. u16 addr = reg->reg & 0xffff;
  875. u8 val = reg->val & 0xff;
  876. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  877. return -EINVAL;
  878. if (!capable(CAP_SYS_ADMIN))
  879. return -EPERM;
  880. saa717x_write(sd, addr, val);
  881. return 0;
  882. }
  883. #endif
  884. static int saa717x_s_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt)
  885. {
  886. int prescale, h_scale, v_scale;
  887. v4l2_dbg(1, debug, sd, "decoder set size\n");
  888. if (fmt->code != V4L2_MBUS_FMT_FIXED)
  889. return -EINVAL;
  890. /* FIXME need better bounds checking here */
  891. if (fmt->width < 1 || fmt->width > 1440)
  892. return -EINVAL;
  893. if (fmt->height < 1 || fmt->height > 960)
  894. return -EINVAL;
  895. fmt->field = V4L2_FIELD_INTERLACED;
  896. fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
  897. /* scaling setting */
  898. /* NTSC and interlace only */
  899. prescale = SAA717X_NTSC_WIDTH / fmt->width;
  900. if (prescale == 0)
  901. prescale = 1;
  902. h_scale = 1024 * SAA717X_NTSC_WIDTH / prescale / fmt->width;
  903. /* interlace */
  904. v_scale = 512 * 2 * SAA717X_NTSC_HEIGHT / fmt->height;
  905. /* Horizontal prescaling etc */
  906. set_h_prescale(sd, 0, prescale);
  907. set_h_prescale(sd, 1, prescale);
  908. /* Horizontal scaling increment */
  909. /* TASK A */
  910. saa717x_write(sd, 0x6C, (u8)(h_scale & 0xFF));
  911. saa717x_write(sd, 0x6D, (u8)((h_scale >> 8) & 0xFF));
  912. /* TASK B */
  913. saa717x_write(sd, 0xAC, (u8)(h_scale & 0xFF));
  914. saa717x_write(sd, 0xAD, (u8)((h_scale >> 8) & 0xFF));
  915. /* Vertical prescaling etc */
  916. set_v_scale(sd, 0, v_scale);
  917. set_v_scale(sd, 1, v_scale);
  918. /* set video output size */
  919. /* video number of pixels at output */
  920. /* TASK A */
  921. saa717x_write(sd, 0x5C, (u8)(fmt->width & 0xFF));
  922. saa717x_write(sd, 0x5D, (u8)((fmt->width >> 8) & 0xFF));
  923. /* TASK B */
  924. saa717x_write(sd, 0x9C, (u8)(fmt->width & 0xFF));
  925. saa717x_write(sd, 0x9D, (u8)((fmt->width >> 8) & 0xFF));
  926. /* video number of lines at output */
  927. /* TASK A */
  928. saa717x_write(sd, 0x5E, (u8)(fmt->height & 0xFF));
  929. saa717x_write(sd, 0x5F, (u8)((fmt->height >> 8) & 0xFF));
  930. /* TASK B */
  931. saa717x_write(sd, 0x9E, (u8)(fmt->height & 0xFF));
  932. saa717x_write(sd, 0x9F, (u8)((fmt->height >> 8) & 0xFF));
  933. return 0;
  934. }
  935. static int saa717x_s_radio(struct v4l2_subdev *sd)
  936. {
  937. struct saa717x_state *decoder = to_state(sd);
  938. decoder->radio = 1;
  939. return 0;
  940. }
  941. static int saa717x_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
  942. {
  943. struct saa717x_state *decoder = to_state(sd);
  944. v4l2_dbg(1, debug, sd, "decoder set norm ");
  945. v4l2_dbg(1, debug, sd, "(not yet implementd)\n");
  946. decoder->radio = 0;
  947. decoder->std = std;
  948. return 0;
  949. }
  950. static int saa717x_s_audio_routing(struct v4l2_subdev *sd,
  951. u32 input, u32 output, u32 config)
  952. {
  953. struct saa717x_state *decoder = to_state(sd);
  954. if (input < 3) { /* FIXME! --tadachi */
  955. decoder->audio_input = input;
  956. v4l2_dbg(1, debug, sd,
  957. "set decoder audio input to %d\n",
  958. decoder->audio_input);
  959. set_audio_regs(sd, decoder);
  960. return 0;
  961. }
  962. return -ERANGE;
  963. }
  964. static int saa717x_s_stream(struct v4l2_subdev *sd, int enable)
  965. {
  966. struct saa717x_state *decoder = to_state(sd);
  967. v4l2_dbg(1, debug, sd, "decoder %s output\n",
  968. enable ? "enable" : "disable");
  969. decoder->enable = enable;
  970. saa717x_write(sd, 0x193, enable ? 0xa6 : 0x26);
  971. return 0;
  972. }
  973. /* change audio mode */
  974. static int saa717x_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
  975. {
  976. struct saa717x_state *decoder = to_state(sd);
  977. int audio_mode;
  978. char *mes[4] = {
  979. "MONO", "STEREO", "LANG1", "LANG2/SAP"
  980. };
  981. audio_mode = TUNER_AUDIO_STEREO;
  982. switch (vt->audmode) {
  983. case V4L2_TUNER_MODE_MONO:
  984. audio_mode = TUNER_AUDIO_MONO;
  985. break;
  986. case V4L2_TUNER_MODE_STEREO:
  987. audio_mode = TUNER_AUDIO_STEREO;
  988. break;
  989. case V4L2_TUNER_MODE_LANG2:
  990. audio_mode = TUNER_AUDIO_LANG2;
  991. break;
  992. case V4L2_TUNER_MODE_LANG1:
  993. audio_mode = TUNER_AUDIO_LANG1;
  994. break;
  995. }
  996. v4l2_dbg(1, debug, sd, "change audio mode to %s\n",
  997. mes[audio_mode]);
  998. decoder->tuner_audio_mode = audio_mode;
  999. /* The registers are not changed here. */
  1000. /* See DECODER_ENABLE_OUTPUT section. */
  1001. set_audio_mode(sd, decoder->tuner_audio_mode);
  1002. return 0;
  1003. }
  1004. static int saa717x_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
  1005. {
  1006. struct saa717x_state *decoder = to_state(sd);
  1007. int dual_f, stereo_f;
  1008. if (decoder->radio)
  1009. return 0;
  1010. get_inf_dev_status(sd, &dual_f, &stereo_f);
  1011. v4l2_dbg(1, debug, sd, "DETECT==st:%d dual:%d\n",
  1012. stereo_f, dual_f);
  1013. /* mono */
  1014. if ((dual_f == 0) && (stereo_f == 0)) {
  1015. vt->rxsubchans = V4L2_TUNER_SUB_MONO;
  1016. v4l2_dbg(1, debug, sd, "DETECT==MONO\n");
  1017. }
  1018. /* stereo */
  1019. if (stereo_f == 1) {
  1020. if (vt->audmode == V4L2_TUNER_MODE_STEREO ||
  1021. vt->audmode == V4L2_TUNER_MODE_LANG1) {
  1022. vt->rxsubchans = V4L2_TUNER_SUB_STEREO;
  1023. v4l2_dbg(1, debug, sd, "DETECT==ST(ST)\n");
  1024. } else {
  1025. vt->rxsubchans = V4L2_TUNER_SUB_MONO;
  1026. v4l2_dbg(1, debug, sd, "DETECT==ST(MONO)\n");
  1027. }
  1028. }
  1029. /* dual */
  1030. if (dual_f == 1) {
  1031. if (vt->audmode == V4L2_TUNER_MODE_LANG2) {
  1032. vt->rxsubchans = V4L2_TUNER_SUB_LANG2 | V4L2_TUNER_SUB_MONO;
  1033. v4l2_dbg(1, debug, sd, "DETECT==DUAL1\n");
  1034. } else {
  1035. vt->rxsubchans = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_MONO;
  1036. v4l2_dbg(1, debug, sd, "DETECT==DUAL2\n");
  1037. }
  1038. }
  1039. return 0;
  1040. }
  1041. static int saa717x_log_status(struct v4l2_subdev *sd)
  1042. {
  1043. struct saa717x_state *state = to_state(sd);
  1044. v4l2_ctrl_handler_log_status(&state->hdl, sd->name);
  1045. return 0;
  1046. }
  1047. /* ----------------------------------------------------------------------- */
  1048. static const struct v4l2_ctrl_ops saa717x_ctrl_ops = {
  1049. .s_ctrl = saa717x_s_ctrl,
  1050. };
  1051. static const struct v4l2_subdev_core_ops saa717x_core_ops = {
  1052. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1053. .g_register = saa717x_g_register,
  1054. .s_register = saa717x_s_register,
  1055. #endif
  1056. .s_std = saa717x_s_std,
  1057. .g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
  1058. .try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
  1059. .s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
  1060. .g_ctrl = v4l2_subdev_g_ctrl,
  1061. .s_ctrl = v4l2_subdev_s_ctrl,
  1062. .queryctrl = v4l2_subdev_queryctrl,
  1063. .querymenu = v4l2_subdev_querymenu,
  1064. .log_status = saa717x_log_status,
  1065. };
  1066. static const struct v4l2_subdev_tuner_ops saa717x_tuner_ops = {
  1067. .g_tuner = saa717x_g_tuner,
  1068. .s_tuner = saa717x_s_tuner,
  1069. .s_radio = saa717x_s_radio,
  1070. };
  1071. static const struct v4l2_subdev_video_ops saa717x_video_ops = {
  1072. .s_routing = saa717x_s_video_routing,
  1073. .s_mbus_fmt = saa717x_s_mbus_fmt,
  1074. .s_stream = saa717x_s_stream,
  1075. };
  1076. static const struct v4l2_subdev_audio_ops saa717x_audio_ops = {
  1077. .s_routing = saa717x_s_audio_routing,
  1078. };
  1079. static const struct v4l2_subdev_ops saa717x_ops = {
  1080. .core = &saa717x_core_ops,
  1081. .tuner = &saa717x_tuner_ops,
  1082. .audio = &saa717x_audio_ops,
  1083. .video = &saa717x_video_ops,
  1084. };
  1085. /* ----------------------------------------------------------------------- */
  1086. /* i2c implementation */
  1087. /* ----------------------------------------------------------------------- */
  1088. static int saa717x_probe(struct i2c_client *client,
  1089. const struct i2c_device_id *did)
  1090. {
  1091. struct saa717x_state *decoder;
  1092. struct v4l2_ctrl_handler *hdl;
  1093. struct v4l2_subdev *sd;
  1094. u8 id = 0;
  1095. char *p = "";
  1096. /* Check if the adapter supports the needed features */
  1097. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  1098. return -EIO;
  1099. decoder = kzalloc(sizeof(struct saa717x_state), GFP_KERNEL);
  1100. if (decoder == NULL)
  1101. return -ENOMEM;
  1102. sd = &decoder->sd;
  1103. v4l2_i2c_subdev_init(sd, client, &saa717x_ops);
  1104. if (saa717x_write(sd, 0x5a4, 0xfe) &&
  1105. saa717x_write(sd, 0x5a5, 0x0f) &&
  1106. saa717x_write(sd, 0x5a6, 0x00) &&
  1107. saa717x_write(sd, 0x5a7, 0x01))
  1108. id = saa717x_read(sd, 0x5a0);
  1109. if (id != 0xc2 && id != 0x32 && id != 0xf2 && id != 0x6c) {
  1110. v4l2_dbg(1, debug, sd, "saa717x not found (id=%02x)\n", id);
  1111. kfree(decoder);
  1112. return -ENODEV;
  1113. }
  1114. if (id == 0xc2)
  1115. p = "saa7173";
  1116. else if (id == 0x32)
  1117. p = "saa7174A";
  1118. else if (id == 0x6c)
  1119. p = "saa7174HL";
  1120. else
  1121. p = "saa7171";
  1122. v4l2_info(sd, "%s found @ 0x%x (%s)\n", p,
  1123. client->addr << 1, client->adapter->name);
  1124. hdl = &decoder->hdl;
  1125. v4l2_ctrl_handler_init(hdl, 9);
  1126. /* add in ascending ID order */
  1127. v4l2_ctrl_new_std(hdl, &saa717x_ctrl_ops,
  1128. V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);
  1129. v4l2_ctrl_new_std(hdl, &saa717x_ctrl_ops,
  1130. V4L2_CID_CONTRAST, 0, 255, 1, 68);
  1131. v4l2_ctrl_new_std(hdl, &saa717x_ctrl_ops,
  1132. V4L2_CID_SATURATION, 0, 255, 1, 64);
  1133. v4l2_ctrl_new_std(hdl, &saa717x_ctrl_ops,
  1134. V4L2_CID_HUE, -128, 127, 1, 0);
  1135. v4l2_ctrl_new_std(hdl, &saa717x_ctrl_ops,
  1136. V4L2_CID_AUDIO_VOLUME, 0, 65535, 65535 / 100, 42000);
  1137. v4l2_ctrl_new_std(hdl, &saa717x_ctrl_ops,
  1138. V4L2_CID_AUDIO_BALANCE, 0, 65535, 65535 / 100, 32768);
  1139. v4l2_ctrl_new_std(hdl, &saa717x_ctrl_ops,
  1140. V4L2_CID_AUDIO_BASS, -16, 15, 1, 0);
  1141. v4l2_ctrl_new_std(hdl, &saa717x_ctrl_ops,
  1142. V4L2_CID_AUDIO_TREBLE, -16, 15, 1, 0);
  1143. v4l2_ctrl_new_std(hdl, &saa717x_ctrl_ops,
  1144. V4L2_CID_AUDIO_MUTE, 0, 1, 1, 0);
  1145. sd->ctrl_handler = hdl;
  1146. if (hdl->error) {
  1147. int err = hdl->error;
  1148. v4l2_ctrl_handler_free(hdl);
  1149. kfree(decoder);
  1150. return err;
  1151. }
  1152. decoder->std = V4L2_STD_NTSC;
  1153. decoder->input = -1;
  1154. decoder->enable = 1;
  1155. /* FIXME!! */
  1156. decoder->playback = 0; /* initially capture mode used */
  1157. decoder->audio = 1; /* DECODER_AUDIO_48_KHZ */
  1158. decoder->audio_input = 2; /* FIXME!! */
  1159. decoder->tuner_audio_mode = TUNER_AUDIO_STEREO;
  1160. /* set volume, bass and treble */
  1161. decoder->audio_main_vol_l = 6;
  1162. decoder->audio_main_vol_r = 6;
  1163. v4l2_dbg(1, debug, sd, "writing init values\n");
  1164. /* FIXME!! */
  1165. saa717x_write_regs(sd, reg_init_initialize);
  1166. v4l2_ctrl_handler_setup(hdl);
  1167. set_current_state(TASK_INTERRUPTIBLE);
  1168. schedule_timeout(2*HZ);
  1169. return 0;
  1170. }
  1171. static int saa717x_remove(struct i2c_client *client)
  1172. {
  1173. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  1174. v4l2_device_unregister_subdev(sd);
  1175. v4l2_ctrl_handler_free(sd->ctrl_handler);
  1176. kfree(to_state(sd));
  1177. return 0;
  1178. }
  1179. /* ----------------------------------------------------------------------- */
  1180. static const struct i2c_device_id saa717x_id[] = {
  1181. { "saa717x", 0 },
  1182. { }
  1183. };
  1184. MODULE_DEVICE_TABLE(i2c, saa717x_id);
  1185. static struct i2c_driver saa717x_driver = {
  1186. .driver = {
  1187. .owner = THIS_MODULE,
  1188. .name = "saa717x",
  1189. },
  1190. .probe = saa717x_probe,
  1191. .remove = saa717x_remove,
  1192. .id_table = saa717x_id,
  1193. };
  1194. module_i2c_driver(saa717x_driver);