saa7110.c 14 KB

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  1. /*
  2. * saa7110 - Philips SAA7110(A) video decoder driver
  3. *
  4. * Copyright (C) 1998 Pauline Middelink <middelin@polyware.nl>
  5. *
  6. * Copyright (C) 1999 Wolfgang Scherr <scherr@net4you.net>
  7. * Copyright (C) 2000 Serguei Miridonov <mirsev@cicese.mx>
  8. * - some corrections for Pinnacle Systems Inc. DC10plus card.
  9. *
  10. * Changes by Ronald Bultje <rbultje@ronald.bitfreak.net>
  11. * - moved over to linux>=2.4.x i2c protocol (1/1/2003)
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26. */
  27. #include <linux/module.h>
  28. #include <linux/init.h>
  29. #include <linux/types.h>
  30. #include <linux/delay.h>
  31. #include <linux/slab.h>
  32. #include <linux/wait.h>
  33. #include <asm/uaccess.h>
  34. #include <linux/i2c.h>
  35. #include <linux/videodev2.h>
  36. #include <media/v4l2-device.h>
  37. #include <media/v4l2-chip-ident.h>
  38. #include <media/v4l2-ctrls.h>
  39. MODULE_DESCRIPTION("Philips SAA7110 video decoder driver");
  40. MODULE_AUTHOR("Pauline Middelink");
  41. MODULE_LICENSE("GPL");
  42. static int debug;
  43. module_param(debug, int, 0);
  44. MODULE_PARM_DESC(debug, "Debug level (0-1)");
  45. #define SAA7110_MAX_INPUT 9 /* 6 CVBS, 3 SVHS */
  46. #define SAA7110_MAX_OUTPUT 1 /* 1 YUV */
  47. #define SAA7110_NR_REG 0x35
  48. struct saa7110 {
  49. struct v4l2_subdev sd;
  50. struct v4l2_ctrl_handler hdl;
  51. u8 reg[SAA7110_NR_REG];
  52. v4l2_std_id norm;
  53. int input;
  54. int enable;
  55. wait_queue_head_t wq;
  56. };
  57. static inline struct saa7110 *to_saa7110(struct v4l2_subdev *sd)
  58. {
  59. return container_of(sd, struct saa7110, sd);
  60. }
  61. static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
  62. {
  63. return &container_of(ctrl->handler, struct saa7110, hdl)->sd;
  64. }
  65. /* ----------------------------------------------------------------------- */
  66. /* I2C support functions */
  67. /* ----------------------------------------------------------------------- */
  68. static int saa7110_write(struct v4l2_subdev *sd, u8 reg, u8 value)
  69. {
  70. struct i2c_client *client = v4l2_get_subdevdata(sd);
  71. struct saa7110 *decoder = to_saa7110(sd);
  72. decoder->reg[reg] = value;
  73. return i2c_smbus_write_byte_data(client, reg, value);
  74. }
  75. static int saa7110_write_block(struct v4l2_subdev *sd, const u8 *data, unsigned int len)
  76. {
  77. struct i2c_client *client = v4l2_get_subdevdata(sd);
  78. struct saa7110 *decoder = to_saa7110(sd);
  79. int ret = -1;
  80. u8 reg = *data; /* first register to write to */
  81. /* Sanity check */
  82. if (reg + (len - 1) > SAA7110_NR_REG)
  83. return ret;
  84. /* the saa7110 has an autoincrement function, use it if
  85. * the adapter understands raw I2C */
  86. if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
  87. ret = i2c_master_send(client, data, len);
  88. /* Cache the written data */
  89. memcpy(decoder->reg + reg, data + 1, len - 1);
  90. } else {
  91. for (++data, --len; len; len--) {
  92. ret = saa7110_write(sd, reg++, *data++);
  93. if (ret < 0)
  94. break;
  95. }
  96. }
  97. return ret;
  98. }
  99. static inline int saa7110_read(struct v4l2_subdev *sd)
  100. {
  101. struct i2c_client *client = v4l2_get_subdevdata(sd);
  102. return i2c_smbus_read_byte(client);
  103. }
  104. /* ----------------------------------------------------------------------- */
  105. /* SAA7110 functions */
  106. /* ----------------------------------------------------------------------- */
  107. #define FRESP_06H_COMPST 0x03 /*0x13*/
  108. #define FRESP_06H_SVIDEO 0x83 /*0xC0*/
  109. static int saa7110_selmux(struct v4l2_subdev *sd, int chan)
  110. {
  111. static const unsigned char modes[9][8] = {
  112. /* mode 0 */
  113. {FRESP_06H_COMPST, 0xD9, 0x17, 0x40, 0x03,
  114. 0x44, 0x75, 0x16},
  115. /* mode 1 */
  116. {FRESP_06H_COMPST, 0xD8, 0x17, 0x40, 0x03,
  117. 0x44, 0x75, 0x16},
  118. /* mode 2 */
  119. {FRESP_06H_COMPST, 0xBA, 0x07, 0x91, 0x03,
  120. 0x60, 0xB5, 0x05},
  121. /* mode 3 */
  122. {FRESP_06H_COMPST, 0xB8, 0x07, 0x91, 0x03,
  123. 0x60, 0xB5, 0x05},
  124. /* mode 4 */
  125. {FRESP_06H_COMPST, 0x7C, 0x07, 0xD2, 0x83,
  126. 0x60, 0xB5, 0x03},
  127. /* mode 5 */
  128. {FRESP_06H_COMPST, 0x78, 0x07, 0xD2, 0x83,
  129. 0x60, 0xB5, 0x03},
  130. /* mode 6 */
  131. {FRESP_06H_SVIDEO, 0x59, 0x17, 0x42, 0xA3,
  132. 0x44, 0x75, 0x12},
  133. /* mode 7 */
  134. {FRESP_06H_SVIDEO, 0x9A, 0x17, 0xB1, 0x13,
  135. 0x60, 0xB5, 0x14},
  136. /* mode 8 */
  137. {FRESP_06H_SVIDEO, 0x3C, 0x27, 0xC1, 0x23,
  138. 0x44, 0x75, 0x21}
  139. };
  140. struct saa7110 *decoder = to_saa7110(sd);
  141. const unsigned char *ptr = modes[chan];
  142. saa7110_write(sd, 0x06, ptr[0]); /* Luminance control */
  143. saa7110_write(sd, 0x20, ptr[1]); /* Analog Control #1 */
  144. saa7110_write(sd, 0x21, ptr[2]); /* Analog Control #2 */
  145. saa7110_write(sd, 0x22, ptr[3]); /* Mixer Control #1 */
  146. saa7110_write(sd, 0x2C, ptr[4]); /* Mixer Control #2 */
  147. saa7110_write(sd, 0x30, ptr[5]); /* ADCs gain control */
  148. saa7110_write(sd, 0x31, ptr[6]); /* Mixer Control #3 */
  149. saa7110_write(sd, 0x21, ptr[7]); /* Analog Control #2 */
  150. decoder->input = chan;
  151. return 0;
  152. }
  153. static const unsigned char initseq[1 + SAA7110_NR_REG] = {
  154. 0, 0x4C, 0x3C, 0x0D, 0xEF, 0xBD, 0xF2, 0x03, 0x00,
  155. /* 0x08 */ 0xF8, 0xF8, 0x60, 0x60, 0x00, 0x86, 0x18, 0x90,
  156. /* 0x10 */ 0x00, 0x59, 0x40, 0x46, 0x42, 0x1A, 0xFF, 0xDA,
  157. /* 0x18 */ 0xF2, 0x8B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  158. /* 0x20 */ 0xD9, 0x16, 0x40, 0x41, 0x80, 0x41, 0x80, 0x4F,
  159. /* 0x28 */ 0xFE, 0x01, 0xCF, 0x0F, 0x03, 0x01, 0x03, 0x0C,
  160. /* 0x30 */ 0x44, 0x71, 0x02, 0x8C, 0x02
  161. };
  162. static v4l2_std_id determine_norm(struct v4l2_subdev *sd)
  163. {
  164. DEFINE_WAIT(wait);
  165. struct saa7110 *decoder = to_saa7110(sd);
  166. int status;
  167. /* mode changed, start automatic detection */
  168. saa7110_write_block(sd, initseq, sizeof(initseq));
  169. saa7110_selmux(sd, decoder->input);
  170. prepare_to_wait(&decoder->wq, &wait, TASK_UNINTERRUPTIBLE);
  171. schedule_timeout(msecs_to_jiffies(250));
  172. finish_wait(&decoder->wq, &wait);
  173. status = saa7110_read(sd);
  174. if (status & 0x40) {
  175. v4l2_dbg(1, debug, sd, "status=0x%02x (no signal)\n", status);
  176. return decoder->norm; /* no change*/
  177. }
  178. if ((status & 3) == 0) {
  179. saa7110_write(sd, 0x06, 0x83);
  180. if (status & 0x20) {
  181. v4l2_dbg(1, debug, sd, "status=0x%02x (NTSC/no color)\n", status);
  182. /*saa7110_write(sd,0x2E,0x81);*/
  183. return V4L2_STD_NTSC;
  184. }
  185. v4l2_dbg(1, debug, sd, "status=0x%02x (PAL/no color)\n", status);
  186. /*saa7110_write(sd,0x2E,0x9A);*/
  187. return V4L2_STD_PAL;
  188. }
  189. /*saa7110_write(sd,0x06,0x03);*/
  190. if (status & 0x20) { /* 60Hz */
  191. v4l2_dbg(1, debug, sd, "status=0x%02x (NTSC)\n", status);
  192. saa7110_write(sd, 0x0D, 0x86);
  193. saa7110_write(sd, 0x0F, 0x50);
  194. saa7110_write(sd, 0x11, 0x2C);
  195. /*saa7110_write(sd,0x2E,0x81);*/
  196. return V4L2_STD_NTSC;
  197. }
  198. /* 50Hz -> PAL/SECAM */
  199. saa7110_write(sd, 0x0D, 0x86);
  200. saa7110_write(sd, 0x0F, 0x10);
  201. saa7110_write(sd, 0x11, 0x59);
  202. /*saa7110_write(sd,0x2E,0x9A);*/
  203. prepare_to_wait(&decoder->wq, &wait, TASK_UNINTERRUPTIBLE);
  204. schedule_timeout(msecs_to_jiffies(250));
  205. finish_wait(&decoder->wq, &wait);
  206. status = saa7110_read(sd);
  207. if ((status & 0x03) == 0x01) {
  208. v4l2_dbg(1, debug, sd, "status=0x%02x (SECAM)\n", status);
  209. saa7110_write(sd, 0x0D, 0x87);
  210. return V4L2_STD_SECAM;
  211. }
  212. v4l2_dbg(1, debug, sd, "status=0x%02x (PAL)\n", status);
  213. return V4L2_STD_PAL;
  214. }
  215. static int saa7110_g_input_status(struct v4l2_subdev *sd, u32 *pstatus)
  216. {
  217. struct saa7110 *decoder = to_saa7110(sd);
  218. int res = V4L2_IN_ST_NO_SIGNAL;
  219. int status = saa7110_read(sd);
  220. v4l2_dbg(1, debug, sd, "status=0x%02x norm=%llx\n",
  221. status, (unsigned long long)decoder->norm);
  222. if (!(status & 0x40))
  223. res = 0;
  224. if (!(status & 0x03))
  225. res |= V4L2_IN_ST_NO_COLOR;
  226. *pstatus = res;
  227. return 0;
  228. }
  229. static int saa7110_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
  230. {
  231. *(v4l2_std_id *)std = determine_norm(sd);
  232. return 0;
  233. }
  234. static int saa7110_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
  235. {
  236. struct saa7110 *decoder = to_saa7110(sd);
  237. if (decoder->norm != std) {
  238. decoder->norm = std;
  239. /*saa7110_write(sd, 0x06, 0x03);*/
  240. if (std & V4L2_STD_NTSC) {
  241. saa7110_write(sd, 0x0D, 0x86);
  242. saa7110_write(sd, 0x0F, 0x50);
  243. saa7110_write(sd, 0x11, 0x2C);
  244. /*saa7110_write(sd, 0x2E, 0x81);*/
  245. v4l2_dbg(1, debug, sd, "switched to NTSC\n");
  246. } else if (std & V4L2_STD_PAL) {
  247. saa7110_write(sd, 0x0D, 0x86);
  248. saa7110_write(sd, 0x0F, 0x10);
  249. saa7110_write(sd, 0x11, 0x59);
  250. /*saa7110_write(sd, 0x2E, 0x9A);*/
  251. v4l2_dbg(1, debug, sd, "switched to PAL\n");
  252. } else if (std & V4L2_STD_SECAM) {
  253. saa7110_write(sd, 0x0D, 0x87);
  254. saa7110_write(sd, 0x0F, 0x10);
  255. saa7110_write(sd, 0x11, 0x59);
  256. /*saa7110_write(sd, 0x2E, 0x9A);*/
  257. v4l2_dbg(1, debug, sd, "switched to SECAM\n");
  258. } else {
  259. return -EINVAL;
  260. }
  261. }
  262. return 0;
  263. }
  264. static int saa7110_s_routing(struct v4l2_subdev *sd,
  265. u32 input, u32 output, u32 config)
  266. {
  267. struct saa7110 *decoder = to_saa7110(sd);
  268. if (input >= SAA7110_MAX_INPUT) {
  269. v4l2_dbg(1, debug, sd, "input=%d not available\n", input);
  270. return -EINVAL;
  271. }
  272. if (decoder->input != input) {
  273. saa7110_selmux(sd, input);
  274. v4l2_dbg(1, debug, sd, "switched to input=%d\n", input);
  275. }
  276. return 0;
  277. }
  278. static int saa7110_s_stream(struct v4l2_subdev *sd, int enable)
  279. {
  280. struct saa7110 *decoder = to_saa7110(sd);
  281. if (decoder->enable != enable) {
  282. decoder->enable = enable;
  283. saa7110_write(sd, 0x0E, enable ? 0x18 : 0x80);
  284. v4l2_dbg(1, debug, sd, "YUV %s\n", enable ? "on" : "off");
  285. }
  286. return 0;
  287. }
  288. static int saa7110_s_ctrl(struct v4l2_ctrl *ctrl)
  289. {
  290. struct v4l2_subdev *sd = to_sd(ctrl);
  291. switch (ctrl->id) {
  292. case V4L2_CID_BRIGHTNESS:
  293. saa7110_write(sd, 0x19, ctrl->val);
  294. break;
  295. case V4L2_CID_CONTRAST:
  296. saa7110_write(sd, 0x13, ctrl->val);
  297. break;
  298. case V4L2_CID_SATURATION:
  299. saa7110_write(sd, 0x12, ctrl->val);
  300. break;
  301. case V4L2_CID_HUE:
  302. saa7110_write(sd, 0x07, ctrl->val);
  303. break;
  304. default:
  305. return -EINVAL;
  306. }
  307. return 0;
  308. }
  309. static int saa7110_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
  310. {
  311. struct i2c_client *client = v4l2_get_subdevdata(sd);
  312. return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_SAA7110, 0);
  313. }
  314. /* ----------------------------------------------------------------------- */
  315. static const struct v4l2_ctrl_ops saa7110_ctrl_ops = {
  316. .s_ctrl = saa7110_s_ctrl,
  317. };
  318. static const struct v4l2_subdev_core_ops saa7110_core_ops = {
  319. .g_chip_ident = saa7110_g_chip_ident,
  320. .g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
  321. .try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
  322. .s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
  323. .g_ctrl = v4l2_subdev_g_ctrl,
  324. .s_ctrl = v4l2_subdev_s_ctrl,
  325. .queryctrl = v4l2_subdev_queryctrl,
  326. .querymenu = v4l2_subdev_querymenu,
  327. .s_std = saa7110_s_std,
  328. };
  329. static const struct v4l2_subdev_video_ops saa7110_video_ops = {
  330. .s_routing = saa7110_s_routing,
  331. .s_stream = saa7110_s_stream,
  332. .querystd = saa7110_querystd,
  333. .g_input_status = saa7110_g_input_status,
  334. };
  335. static const struct v4l2_subdev_ops saa7110_ops = {
  336. .core = &saa7110_core_ops,
  337. .video = &saa7110_video_ops,
  338. };
  339. /* ----------------------------------------------------------------------- */
  340. static int saa7110_probe(struct i2c_client *client,
  341. const struct i2c_device_id *id)
  342. {
  343. struct saa7110 *decoder;
  344. struct v4l2_subdev *sd;
  345. int rv;
  346. /* Check if the adapter supports the needed features */
  347. if (!i2c_check_functionality(client->adapter,
  348. I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  349. return -ENODEV;
  350. v4l_info(client, "chip found @ 0x%x (%s)\n",
  351. client->addr << 1, client->adapter->name);
  352. decoder = kzalloc(sizeof(struct saa7110), GFP_KERNEL);
  353. if (!decoder)
  354. return -ENOMEM;
  355. sd = &decoder->sd;
  356. v4l2_i2c_subdev_init(sd, client, &saa7110_ops);
  357. decoder->norm = V4L2_STD_PAL;
  358. decoder->input = 0;
  359. decoder->enable = 1;
  360. v4l2_ctrl_handler_init(&decoder->hdl, 2);
  361. v4l2_ctrl_new_std(&decoder->hdl, &saa7110_ctrl_ops,
  362. V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);
  363. v4l2_ctrl_new_std(&decoder->hdl, &saa7110_ctrl_ops,
  364. V4L2_CID_CONTRAST, 0, 127, 1, 64);
  365. v4l2_ctrl_new_std(&decoder->hdl, &saa7110_ctrl_ops,
  366. V4L2_CID_SATURATION, 0, 127, 1, 64);
  367. v4l2_ctrl_new_std(&decoder->hdl, &saa7110_ctrl_ops,
  368. V4L2_CID_HUE, -128, 127, 1, 0);
  369. sd->ctrl_handler = &decoder->hdl;
  370. if (decoder->hdl.error) {
  371. int err = decoder->hdl.error;
  372. v4l2_ctrl_handler_free(&decoder->hdl);
  373. kfree(decoder);
  374. return err;
  375. }
  376. v4l2_ctrl_handler_setup(&decoder->hdl);
  377. init_waitqueue_head(&decoder->wq);
  378. rv = saa7110_write_block(sd, initseq, sizeof(initseq));
  379. if (rv < 0) {
  380. v4l2_dbg(1, debug, sd, "init status %d\n", rv);
  381. } else {
  382. int ver, status;
  383. saa7110_write(sd, 0x21, 0x10);
  384. saa7110_write(sd, 0x0e, 0x18);
  385. saa7110_write(sd, 0x0D, 0x04);
  386. ver = saa7110_read(sd);
  387. saa7110_write(sd, 0x0D, 0x06);
  388. /*mdelay(150);*/
  389. status = saa7110_read(sd);
  390. v4l2_dbg(1, debug, sd, "version %x, status=0x%02x\n",
  391. ver, status);
  392. saa7110_write(sd, 0x0D, 0x86);
  393. saa7110_write(sd, 0x0F, 0x10);
  394. saa7110_write(sd, 0x11, 0x59);
  395. /*saa7110_write(sd, 0x2E, 0x9A);*/
  396. }
  397. /*saa7110_selmux(sd,0);*/
  398. /*determine_norm(sd);*/
  399. /* setup and implicit mode 0 select has been performed */
  400. return 0;
  401. }
  402. static int saa7110_remove(struct i2c_client *client)
  403. {
  404. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  405. struct saa7110 *decoder = to_saa7110(sd);
  406. v4l2_device_unregister_subdev(sd);
  407. v4l2_ctrl_handler_free(&decoder->hdl);
  408. kfree(decoder);
  409. return 0;
  410. }
  411. /* ----------------------------------------------------------------------- */
  412. static const struct i2c_device_id saa7110_id[] = {
  413. { "saa7110", 0 },
  414. { }
  415. };
  416. MODULE_DEVICE_TABLE(i2c, saa7110_id);
  417. static struct i2c_driver saa7110_driver = {
  418. .driver = {
  419. .owner = THIS_MODULE,
  420. .name = "saa7110",
  421. },
  422. .probe = saa7110_probe,
  423. .remove = saa7110_remove,
  424. .id_table = saa7110_id,
  425. };
  426. module_i2c_driver(saa7110_driver);