saa6588.c 13 KB

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  1. /*
  2. Driver for SAA6588 RDS decoder
  3. (c) 2005 Hans J. Koch
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. */
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/i2c.h>
  19. #include <linux/types.h>
  20. #include <linux/videodev2.h>
  21. #include <linux/init.h>
  22. #include <linux/errno.h>
  23. #include <linux/slab.h>
  24. #include <linux/poll.h>
  25. #include <linux/wait.h>
  26. #include <asm/uaccess.h>
  27. #include <media/saa6588.h>
  28. #include <media/v4l2-device.h>
  29. #include <media/v4l2-chip-ident.h>
  30. /* insmod options */
  31. static unsigned int debug;
  32. static unsigned int xtal;
  33. static unsigned int mmbs;
  34. static unsigned int plvl;
  35. static unsigned int bufblocks = 100;
  36. module_param(debug, int, 0644);
  37. MODULE_PARM_DESC(debug, "enable debug messages");
  38. module_param(xtal, int, 0);
  39. MODULE_PARM_DESC(xtal, "select oscillator frequency (0..3), default 0");
  40. module_param(mmbs, int, 0);
  41. MODULE_PARM_DESC(mmbs, "enable MMBS mode: 0=off (default), 1=on");
  42. module_param(plvl, int, 0);
  43. MODULE_PARM_DESC(plvl, "select pause level (0..3), default 0");
  44. module_param(bufblocks, int, 0);
  45. MODULE_PARM_DESC(bufblocks, "number of buffered blocks, default 100");
  46. MODULE_DESCRIPTION("v4l2 driver module for SAA6588 RDS decoder");
  47. MODULE_AUTHOR("Hans J. Koch <koch@hjk-az.de>");
  48. MODULE_LICENSE("GPL");
  49. /* ---------------------------------------------------------------------- */
  50. #define UNSET (-1U)
  51. #define PREFIX "saa6588: "
  52. #define dprintk if (debug) printk
  53. struct saa6588 {
  54. struct v4l2_subdev sd;
  55. struct delayed_work work;
  56. spinlock_t lock;
  57. unsigned char *buffer;
  58. unsigned int buf_size;
  59. unsigned int rd_index;
  60. unsigned int wr_index;
  61. unsigned int block_count;
  62. unsigned char last_blocknum;
  63. wait_queue_head_t read_queue;
  64. int data_available_for_read;
  65. u8 sync;
  66. };
  67. static inline struct saa6588 *to_saa6588(struct v4l2_subdev *sd)
  68. {
  69. return container_of(sd, struct saa6588, sd);
  70. }
  71. /* ---------------------------------------------------------------------- */
  72. /*
  73. * SAA6588 defines
  74. */
  75. /* Initialization and mode control byte (0w) */
  76. /* bit 0+1 (DAC0/DAC1) */
  77. #define cModeStandard 0x00
  78. #define cModeFastPI 0x01
  79. #define cModeReducedRequest 0x02
  80. #define cModeInvalid 0x03
  81. /* bit 2 (RBDS) */
  82. #define cProcessingModeRDS 0x00
  83. #define cProcessingModeRBDS 0x04
  84. /* bit 3+4 (SYM0/SYM1) */
  85. #define cErrCorrectionNone 0x00
  86. #define cErrCorrection2Bits 0x08
  87. #define cErrCorrection5Bits 0x10
  88. #define cErrCorrectionNoneRBDS 0x18
  89. /* bit 5 (NWSY) */
  90. #define cSyncNormal 0x00
  91. #define cSyncRestart 0x20
  92. /* bit 6 (TSQD) */
  93. #define cSigQualityDetectOFF 0x00
  94. #define cSigQualityDetectON 0x40
  95. /* bit 7 (SQCM) */
  96. #define cSigQualityTriggered 0x00
  97. #define cSigQualityContinous 0x80
  98. /* Pause level and flywheel control byte (1w) */
  99. /* bits 0..5 (FEB0..FEB5) */
  100. #define cFlywheelMaxBlocksMask 0x3F
  101. #define cFlywheelDefault 0x20
  102. /* bits 6+7 (PL0/PL1) */
  103. #define cPauseLevel_11mV 0x00
  104. #define cPauseLevel_17mV 0x40
  105. #define cPauseLevel_27mV 0x80
  106. #define cPauseLevel_43mV 0xC0
  107. /* Pause time/oscillator frequency/quality detector control byte (1w) */
  108. /* bits 0..4 (SQS0..SQS4) */
  109. #define cQualityDetectSensMask 0x1F
  110. #define cQualityDetectDefault 0x0F
  111. /* bit 5 (SOSC) */
  112. #define cSelectOscFreqOFF 0x00
  113. #define cSelectOscFreqON 0x20
  114. /* bit 6+7 (PTF0/PTF1) */
  115. #define cOscFreq_4332kHz 0x00
  116. #define cOscFreq_8664kHz 0x40
  117. #define cOscFreq_12996kHz 0x80
  118. #define cOscFreq_17328kHz 0xC0
  119. /* ---------------------------------------------------------------------- */
  120. static int block_to_user_buf(struct saa6588 *s, unsigned char __user *user_buf)
  121. {
  122. int i;
  123. if (s->rd_index == s->wr_index) {
  124. if (debug > 2)
  125. dprintk(PREFIX "Read: buffer empty.\n");
  126. return 0;
  127. }
  128. if (debug > 2) {
  129. dprintk(PREFIX "Read: ");
  130. for (i = s->rd_index; i < s->rd_index + 3; i++)
  131. dprintk("0x%02x ", s->buffer[i]);
  132. }
  133. if (copy_to_user(user_buf, &s->buffer[s->rd_index], 3))
  134. return -EFAULT;
  135. s->rd_index += 3;
  136. if (s->rd_index >= s->buf_size)
  137. s->rd_index = 0;
  138. s->block_count--;
  139. if (debug > 2)
  140. dprintk("%d blocks total.\n", s->block_count);
  141. return 1;
  142. }
  143. static void read_from_buf(struct saa6588 *s, struct saa6588_command *a)
  144. {
  145. unsigned long flags;
  146. unsigned char __user *buf_ptr = a->buffer;
  147. unsigned int i;
  148. unsigned int rd_blocks;
  149. a->result = 0;
  150. if (!a->buffer)
  151. return;
  152. while (!s->data_available_for_read) {
  153. int ret = wait_event_interruptible(s->read_queue,
  154. s->data_available_for_read);
  155. if (ret == -ERESTARTSYS) {
  156. a->result = -EINTR;
  157. return;
  158. }
  159. }
  160. spin_lock_irqsave(&s->lock, flags);
  161. rd_blocks = a->block_count;
  162. if (rd_blocks > s->block_count)
  163. rd_blocks = s->block_count;
  164. if (!rd_blocks) {
  165. spin_unlock_irqrestore(&s->lock, flags);
  166. return;
  167. }
  168. for (i = 0; i < rd_blocks; i++) {
  169. if (block_to_user_buf(s, buf_ptr)) {
  170. buf_ptr += 3;
  171. a->result++;
  172. } else
  173. break;
  174. }
  175. a->result *= 3;
  176. s->data_available_for_read = (s->block_count > 0);
  177. spin_unlock_irqrestore(&s->lock, flags);
  178. }
  179. static void block_to_buf(struct saa6588 *s, unsigned char *blockbuf)
  180. {
  181. unsigned int i;
  182. if (debug > 3)
  183. dprintk(PREFIX "New block: ");
  184. for (i = 0; i < 3; ++i) {
  185. if (debug > 3)
  186. dprintk("0x%02x ", blockbuf[i]);
  187. s->buffer[s->wr_index] = blockbuf[i];
  188. s->wr_index++;
  189. }
  190. if (s->wr_index >= s->buf_size)
  191. s->wr_index = 0;
  192. if (s->wr_index == s->rd_index) {
  193. s->rd_index += 3;
  194. if (s->rd_index >= s->buf_size)
  195. s->rd_index = 0;
  196. } else
  197. s->block_count++;
  198. if (debug > 3)
  199. dprintk("%d blocks total.\n", s->block_count);
  200. }
  201. static void saa6588_i2c_poll(struct saa6588 *s)
  202. {
  203. struct i2c_client *client = v4l2_get_subdevdata(&s->sd);
  204. unsigned long flags;
  205. unsigned char tmpbuf[6];
  206. unsigned char blocknum;
  207. unsigned char tmp;
  208. /* Although we only need 3 bytes, we have to read at least 6.
  209. SAA6588 returns garbage otherwise. */
  210. if (6 != i2c_master_recv(client, &tmpbuf[0], 6)) {
  211. if (debug > 1)
  212. dprintk(PREFIX "read error!\n");
  213. return;
  214. }
  215. s->sync = tmpbuf[0] & 0x10;
  216. if (!s->sync)
  217. return;
  218. blocknum = tmpbuf[0] >> 5;
  219. if (blocknum == s->last_blocknum) {
  220. if (debug > 3)
  221. dprintk("Saw block %d again.\n", blocknum);
  222. return;
  223. }
  224. s->last_blocknum = blocknum;
  225. /*
  226. Byte order according to v4l2 specification:
  227. Byte 0: Least Significant Byte of RDS Block
  228. Byte 1: Most Significant Byte of RDS Block
  229. Byte 2 Bit 7: Error bit. Indicates that an uncorrectable error
  230. occurred during reception of this block.
  231. Bit 6: Corrected bit. Indicates that an error was
  232. corrected for this data block.
  233. Bits 5-3: Same as bits 0-2.
  234. Bits 2-0: Block number.
  235. SAA6588 byte order is Status-MSB-LSB, so we have to swap the
  236. first and the last of the 3 bytes block.
  237. */
  238. tmp = tmpbuf[2];
  239. tmpbuf[2] = tmpbuf[0];
  240. tmpbuf[0] = tmp;
  241. /* Map 'Invalid block E' to 'Invalid Block' */
  242. if (blocknum == 6)
  243. blocknum = V4L2_RDS_BLOCK_INVALID;
  244. /* And if are not in mmbs mode, then 'Block E' is also mapped
  245. to 'Invalid Block'. As far as I can tell MMBS is discontinued,
  246. and if there is ever a need to support E blocks, then please
  247. contact the linux-media mailinglist. */
  248. else if (!mmbs && blocknum == 5)
  249. blocknum = V4L2_RDS_BLOCK_INVALID;
  250. tmp = blocknum;
  251. tmp |= blocknum << 3; /* Received offset == Offset Name (OK ?) */
  252. if ((tmpbuf[2] & 0x03) == 0x03)
  253. tmp |= V4L2_RDS_BLOCK_ERROR; /* uncorrectable error */
  254. else if ((tmpbuf[2] & 0x03) != 0x00)
  255. tmp |= V4L2_RDS_BLOCK_CORRECTED; /* corrected error */
  256. tmpbuf[2] = tmp; /* Is this enough ? Should we also check other bits ? */
  257. spin_lock_irqsave(&s->lock, flags);
  258. block_to_buf(s, tmpbuf);
  259. spin_unlock_irqrestore(&s->lock, flags);
  260. s->data_available_for_read = 1;
  261. wake_up_interruptible(&s->read_queue);
  262. }
  263. static void saa6588_work(struct work_struct *work)
  264. {
  265. struct saa6588 *s = container_of(work, struct saa6588, work.work);
  266. saa6588_i2c_poll(s);
  267. schedule_delayed_work(&s->work, msecs_to_jiffies(20));
  268. }
  269. static void saa6588_configure(struct saa6588 *s)
  270. {
  271. struct i2c_client *client = v4l2_get_subdevdata(&s->sd);
  272. unsigned char buf[3];
  273. int rc;
  274. buf[0] = cSyncRestart;
  275. if (mmbs)
  276. buf[0] |= cProcessingModeRBDS;
  277. buf[1] = cFlywheelDefault;
  278. switch (plvl) {
  279. case 0:
  280. buf[1] |= cPauseLevel_11mV;
  281. break;
  282. case 1:
  283. buf[1] |= cPauseLevel_17mV;
  284. break;
  285. case 2:
  286. buf[1] |= cPauseLevel_27mV;
  287. break;
  288. case 3:
  289. buf[1] |= cPauseLevel_43mV;
  290. break;
  291. default: /* nothing */
  292. break;
  293. }
  294. buf[2] = cQualityDetectDefault | cSelectOscFreqON;
  295. switch (xtal) {
  296. case 0:
  297. buf[2] |= cOscFreq_4332kHz;
  298. break;
  299. case 1:
  300. buf[2] |= cOscFreq_8664kHz;
  301. break;
  302. case 2:
  303. buf[2] |= cOscFreq_12996kHz;
  304. break;
  305. case 3:
  306. buf[2] |= cOscFreq_17328kHz;
  307. break;
  308. default: /* nothing */
  309. break;
  310. }
  311. dprintk(PREFIX "writing: 0w=0x%02x 1w=0x%02x 2w=0x%02x\n",
  312. buf[0], buf[1], buf[2]);
  313. rc = i2c_master_send(client, buf, 3);
  314. if (rc != 3)
  315. printk(PREFIX "i2c i/o error: rc == %d (should be 3)\n", rc);
  316. }
  317. /* ---------------------------------------------------------------------- */
  318. static long saa6588_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
  319. {
  320. struct saa6588 *s = to_saa6588(sd);
  321. struct saa6588_command *a = arg;
  322. switch (cmd) {
  323. /* --- open() for /dev/radio --- */
  324. case SAA6588_CMD_OPEN:
  325. a->result = 0; /* return error if chip doesn't work ??? */
  326. break;
  327. /* --- close() for /dev/radio --- */
  328. case SAA6588_CMD_CLOSE:
  329. s->data_available_for_read = 1;
  330. wake_up_interruptible(&s->read_queue);
  331. a->result = 0;
  332. break;
  333. /* --- read() for /dev/radio --- */
  334. case SAA6588_CMD_READ:
  335. read_from_buf(s, a);
  336. break;
  337. /* --- poll() for /dev/radio --- */
  338. case SAA6588_CMD_POLL:
  339. a->result = 0;
  340. if (s->data_available_for_read) {
  341. a->result |= POLLIN | POLLRDNORM;
  342. }
  343. poll_wait(a->instance, &s->read_queue, a->event_list);
  344. break;
  345. default:
  346. /* nothing */
  347. return -ENOIOCTLCMD;
  348. }
  349. return 0;
  350. }
  351. static int saa6588_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
  352. {
  353. struct saa6588 *s = to_saa6588(sd);
  354. vt->capability |= V4L2_TUNER_CAP_RDS | V4L2_TUNER_CAP_RDS_BLOCK_IO;
  355. if (s->sync)
  356. vt->rxsubchans |= V4L2_TUNER_SUB_RDS;
  357. return 0;
  358. }
  359. static int saa6588_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
  360. {
  361. struct saa6588 *s = to_saa6588(sd);
  362. saa6588_configure(s);
  363. return 0;
  364. }
  365. static int saa6588_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
  366. {
  367. struct i2c_client *client = v4l2_get_subdevdata(sd);
  368. return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_SAA6588, 0);
  369. }
  370. /* ----------------------------------------------------------------------- */
  371. static const struct v4l2_subdev_core_ops saa6588_core_ops = {
  372. .g_chip_ident = saa6588_g_chip_ident,
  373. .ioctl = saa6588_ioctl,
  374. };
  375. static const struct v4l2_subdev_tuner_ops saa6588_tuner_ops = {
  376. .g_tuner = saa6588_g_tuner,
  377. .s_tuner = saa6588_s_tuner,
  378. };
  379. static const struct v4l2_subdev_ops saa6588_ops = {
  380. .core = &saa6588_core_ops,
  381. .tuner = &saa6588_tuner_ops,
  382. };
  383. /* ---------------------------------------------------------------------- */
  384. static int saa6588_probe(struct i2c_client *client,
  385. const struct i2c_device_id *id)
  386. {
  387. struct saa6588 *s;
  388. struct v4l2_subdev *sd;
  389. v4l_info(client, "saa6588 found @ 0x%x (%s)\n",
  390. client->addr << 1, client->adapter->name);
  391. s = kzalloc(sizeof(*s), GFP_KERNEL);
  392. if (s == NULL)
  393. return -ENOMEM;
  394. s->buf_size = bufblocks * 3;
  395. s->buffer = kmalloc(s->buf_size, GFP_KERNEL);
  396. if (s->buffer == NULL) {
  397. kfree(s);
  398. return -ENOMEM;
  399. }
  400. sd = &s->sd;
  401. v4l2_i2c_subdev_init(sd, client, &saa6588_ops);
  402. spin_lock_init(&s->lock);
  403. s->block_count = 0;
  404. s->wr_index = 0;
  405. s->rd_index = 0;
  406. s->last_blocknum = 0xff;
  407. init_waitqueue_head(&s->read_queue);
  408. s->data_available_for_read = 0;
  409. saa6588_configure(s);
  410. /* start polling via eventd */
  411. INIT_DELAYED_WORK(&s->work, saa6588_work);
  412. schedule_delayed_work(&s->work, 0);
  413. return 0;
  414. }
  415. static int saa6588_remove(struct i2c_client *client)
  416. {
  417. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  418. struct saa6588 *s = to_saa6588(sd);
  419. v4l2_device_unregister_subdev(sd);
  420. cancel_delayed_work_sync(&s->work);
  421. kfree(s->buffer);
  422. kfree(s);
  423. return 0;
  424. }
  425. /* ----------------------------------------------------------------------- */
  426. static const struct i2c_device_id saa6588_id[] = {
  427. { "saa6588", 0 },
  428. { }
  429. };
  430. MODULE_DEVICE_TABLE(i2c, saa6588_id);
  431. static struct i2c_driver saa6588_driver = {
  432. .driver = {
  433. .owner = THIS_MODULE,
  434. .name = "saa6588",
  435. },
  436. .probe = saa6588_probe,
  437. .remove = saa6588_remove,
  438. .id_table = saa6588_id,
  439. };
  440. module_i2c_driver(saa6588_driver);