mx1_camera.c 22 KB

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  1. /*
  2. * V4L2 Driver for i.MXL/i.MXL camera (CSI) host
  3. *
  4. * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
  5. * Copyright (C) 2009, Darius Augulis <augulis.darius@gmail.com>
  6. *
  7. * Based on PXA SoC camera driver
  8. * Copyright (C) 2006, Sascha Hauer, Pengutronix
  9. * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/clk.h>
  16. #include <linux/delay.h>
  17. #include <linux/device.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/errno.h>
  20. #include <linux/fs.h>
  21. #include <linux/init.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/io.h>
  24. #include <linux/kernel.h>
  25. #include <linux/mm.h>
  26. #include <linux/module.h>
  27. #include <linux/moduleparam.h>
  28. #include <linux/mutex.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/sched.h>
  31. #include <linux/slab.h>
  32. #include <linux/time.h>
  33. #include <linux/videodev2.h>
  34. #include <media/soc_camera.h>
  35. #include <media/v4l2-common.h>
  36. #include <media/v4l2-dev.h>
  37. #include <media/videobuf-dma-contig.h>
  38. #include <media/soc_mediabus.h>
  39. #include <asm/dma.h>
  40. #include <asm/fiq.h>
  41. #include <mach/dma-mx1-mx2.h>
  42. #include <mach/hardware.h>
  43. #include <mach/mx1_camera.h>
  44. /*
  45. * CSI registers
  46. */
  47. #define CSICR1 0x00 /* CSI Control Register 1 */
  48. #define CSISR 0x08 /* CSI Status Register */
  49. #define CSIRXR 0x10 /* CSI RxFIFO Register */
  50. #define CSICR1_RXFF_LEVEL(x) (((x) & 0x3) << 19)
  51. #define CSICR1_SOF_POL (1 << 17)
  52. #define CSICR1_SOF_INTEN (1 << 16)
  53. #define CSICR1_MCLKDIV(x) (((x) & 0xf) << 12)
  54. #define CSICR1_MCLKEN (1 << 9)
  55. #define CSICR1_FCC (1 << 8)
  56. #define CSICR1_BIG_ENDIAN (1 << 7)
  57. #define CSICR1_CLR_RXFIFO (1 << 5)
  58. #define CSICR1_GCLK_MODE (1 << 4)
  59. #define CSICR1_DATA_POL (1 << 2)
  60. #define CSICR1_REDGE (1 << 1)
  61. #define CSICR1_EN (1 << 0)
  62. #define CSISR_SFF_OR_INT (1 << 25)
  63. #define CSISR_RFF_OR_INT (1 << 24)
  64. #define CSISR_STATFF_INT (1 << 21)
  65. #define CSISR_RXFF_INT (1 << 18)
  66. #define CSISR_SOF_INT (1 << 16)
  67. #define CSISR_DRDY (1 << 0)
  68. #define DRIVER_VERSION "0.0.2"
  69. #define DRIVER_NAME "mx1-camera"
  70. #define CSI_IRQ_MASK (CSISR_SFF_OR_INT | CSISR_RFF_OR_INT | \
  71. CSISR_STATFF_INT | CSISR_RXFF_INT | CSISR_SOF_INT)
  72. #define CSI_BUS_FLAGS (V4L2_MBUS_MASTER | V4L2_MBUS_HSYNC_ACTIVE_HIGH | \
  73. V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_LOW | \
  74. V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING | \
  75. V4L2_MBUS_DATA_ACTIVE_HIGH | V4L2_MBUS_DATA_ACTIVE_LOW)
  76. #define MAX_VIDEO_MEM 16 /* Video memory limit in megabytes */
  77. /*
  78. * Structures
  79. */
  80. /* buffer for one video frame */
  81. struct mx1_buffer {
  82. /* common v4l buffer stuff -- must be first */
  83. struct videobuf_buffer vb;
  84. enum v4l2_mbus_pixelcode code;
  85. int inwork;
  86. };
  87. /*
  88. * i.MX1/i.MXL is only supposed to handle one camera on its Camera Sensor
  89. * Interface. If anyone ever builds hardware to enable more than
  90. * one camera, they will have to modify this driver too
  91. */
  92. struct mx1_camera_dev {
  93. struct soc_camera_host soc_host;
  94. struct soc_camera_device *icd;
  95. struct mx1_camera_pdata *pdata;
  96. struct mx1_buffer *active;
  97. struct resource *res;
  98. struct clk *clk;
  99. struct list_head capture;
  100. void __iomem *base;
  101. int dma_chan;
  102. unsigned int irq;
  103. unsigned long mclk;
  104. spinlock_t lock;
  105. };
  106. /*
  107. * Videobuf operations
  108. */
  109. static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
  110. unsigned int *size)
  111. {
  112. struct soc_camera_device *icd = vq->priv_data;
  113. int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
  114. icd->current_fmt->host_fmt);
  115. if (bytes_per_line < 0)
  116. return bytes_per_line;
  117. *size = bytes_per_line * icd->user_height;
  118. if (!*count)
  119. *count = 32;
  120. if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
  121. *count = (MAX_VIDEO_MEM * 1024 * 1024) / *size;
  122. dev_dbg(icd->parent, "count=%d, size=%d\n", *count, *size);
  123. return 0;
  124. }
  125. static void free_buffer(struct videobuf_queue *vq, struct mx1_buffer *buf)
  126. {
  127. struct soc_camera_device *icd = vq->priv_data;
  128. struct videobuf_buffer *vb = &buf->vb;
  129. BUG_ON(in_interrupt());
  130. dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  131. vb, vb->baddr, vb->bsize);
  132. /*
  133. * This waits until this buffer is out of danger, i.e., until it is no
  134. * longer in STATE_QUEUED or STATE_ACTIVE
  135. */
  136. videobuf_waiton(vq, vb, 0, 0);
  137. videobuf_dma_contig_free(vq, vb);
  138. vb->state = VIDEOBUF_NEEDS_INIT;
  139. }
  140. static int mx1_videobuf_prepare(struct videobuf_queue *vq,
  141. struct videobuf_buffer *vb, enum v4l2_field field)
  142. {
  143. struct soc_camera_device *icd = vq->priv_data;
  144. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  145. int ret;
  146. int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width,
  147. icd->current_fmt->host_fmt);
  148. if (bytes_per_line < 0)
  149. return bytes_per_line;
  150. dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  151. vb, vb->baddr, vb->bsize);
  152. /* Added list head initialization on alloc */
  153. WARN_ON(!list_empty(&vb->queue));
  154. BUG_ON(NULL == icd->current_fmt);
  155. /*
  156. * I think, in buf_prepare you only have to protect global data,
  157. * the actual buffer is yours
  158. */
  159. buf->inwork = 1;
  160. if (buf->code != icd->current_fmt->code ||
  161. vb->width != icd->user_width ||
  162. vb->height != icd->user_height ||
  163. vb->field != field) {
  164. buf->code = icd->current_fmt->code;
  165. vb->width = icd->user_width;
  166. vb->height = icd->user_height;
  167. vb->field = field;
  168. vb->state = VIDEOBUF_NEEDS_INIT;
  169. }
  170. vb->size = bytes_per_line * vb->height;
  171. if (0 != vb->baddr && vb->bsize < vb->size) {
  172. ret = -EINVAL;
  173. goto out;
  174. }
  175. if (vb->state == VIDEOBUF_NEEDS_INIT) {
  176. ret = videobuf_iolock(vq, vb, NULL);
  177. if (ret)
  178. goto fail;
  179. vb->state = VIDEOBUF_PREPARED;
  180. }
  181. buf->inwork = 0;
  182. return 0;
  183. fail:
  184. free_buffer(vq, buf);
  185. out:
  186. buf->inwork = 0;
  187. return ret;
  188. }
  189. static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev)
  190. {
  191. struct videobuf_buffer *vbuf = &pcdev->active->vb;
  192. struct device *dev = pcdev->icd->parent;
  193. int ret;
  194. if (unlikely(!pcdev->active)) {
  195. dev_err(dev, "DMA End IRQ with no active buffer\n");
  196. return -EFAULT;
  197. }
  198. /* setup sg list for future DMA */
  199. ret = imx_dma_setup_single(pcdev->dma_chan,
  200. videobuf_to_dma_contig(vbuf),
  201. vbuf->size, pcdev->res->start +
  202. CSIRXR, DMA_MODE_READ);
  203. if (unlikely(ret))
  204. dev_err(dev, "Failed to setup DMA sg list\n");
  205. return ret;
  206. }
  207. /* Called under spinlock_irqsave(&pcdev->lock, ...) */
  208. static void mx1_videobuf_queue(struct videobuf_queue *vq,
  209. struct videobuf_buffer *vb)
  210. {
  211. struct soc_camera_device *icd = vq->priv_data;
  212. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  213. struct mx1_camera_dev *pcdev = ici->priv;
  214. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  215. dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  216. vb, vb->baddr, vb->bsize);
  217. list_add_tail(&vb->queue, &pcdev->capture);
  218. vb->state = VIDEOBUF_ACTIVE;
  219. if (!pcdev->active) {
  220. pcdev->active = buf;
  221. /* setup sg list for future DMA */
  222. if (!mx1_camera_setup_dma(pcdev)) {
  223. unsigned int temp;
  224. /* enable SOF irq */
  225. temp = __raw_readl(pcdev->base + CSICR1) |
  226. CSICR1_SOF_INTEN;
  227. __raw_writel(temp, pcdev->base + CSICR1);
  228. }
  229. }
  230. }
  231. static void mx1_videobuf_release(struct videobuf_queue *vq,
  232. struct videobuf_buffer *vb)
  233. {
  234. struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb);
  235. #ifdef DEBUG
  236. struct soc_camera_device *icd = vq->priv_data;
  237. struct device *dev = icd->parent;
  238. dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  239. vb, vb->baddr, vb->bsize);
  240. switch (vb->state) {
  241. case VIDEOBUF_ACTIVE:
  242. dev_dbg(dev, "%s (active)\n", __func__);
  243. break;
  244. case VIDEOBUF_QUEUED:
  245. dev_dbg(dev, "%s (queued)\n", __func__);
  246. break;
  247. case VIDEOBUF_PREPARED:
  248. dev_dbg(dev, "%s (prepared)\n", __func__);
  249. break;
  250. default:
  251. dev_dbg(dev, "%s (unknown)\n", __func__);
  252. break;
  253. }
  254. #endif
  255. free_buffer(vq, buf);
  256. }
  257. static void mx1_camera_wakeup(struct mx1_camera_dev *pcdev,
  258. struct videobuf_buffer *vb,
  259. struct mx1_buffer *buf)
  260. {
  261. /* _init is used to debug races, see comment in mx1_camera_reqbufs() */
  262. list_del_init(&vb->queue);
  263. vb->state = VIDEOBUF_DONE;
  264. do_gettimeofday(&vb->ts);
  265. vb->field_count++;
  266. wake_up(&vb->done);
  267. if (list_empty(&pcdev->capture)) {
  268. pcdev->active = NULL;
  269. return;
  270. }
  271. pcdev->active = list_entry(pcdev->capture.next,
  272. struct mx1_buffer, vb.queue);
  273. /* setup sg list for future DMA */
  274. if (likely(!mx1_camera_setup_dma(pcdev))) {
  275. unsigned int temp;
  276. /* enable SOF irq */
  277. temp = __raw_readl(pcdev->base + CSICR1) | CSICR1_SOF_INTEN;
  278. __raw_writel(temp, pcdev->base + CSICR1);
  279. }
  280. }
  281. static void mx1_camera_dma_irq(int channel, void *data)
  282. {
  283. struct mx1_camera_dev *pcdev = data;
  284. struct device *dev = pcdev->icd->parent;
  285. struct mx1_buffer *buf;
  286. struct videobuf_buffer *vb;
  287. unsigned long flags;
  288. spin_lock_irqsave(&pcdev->lock, flags);
  289. imx_dma_disable(channel);
  290. if (unlikely(!pcdev->active)) {
  291. dev_err(dev, "DMA End IRQ with no active buffer\n");
  292. goto out;
  293. }
  294. vb = &pcdev->active->vb;
  295. buf = container_of(vb, struct mx1_buffer, vb);
  296. WARN_ON(buf->inwork || list_empty(&vb->queue));
  297. dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  298. vb, vb->baddr, vb->bsize);
  299. mx1_camera_wakeup(pcdev, vb, buf);
  300. out:
  301. spin_unlock_irqrestore(&pcdev->lock, flags);
  302. }
  303. static struct videobuf_queue_ops mx1_videobuf_ops = {
  304. .buf_setup = mx1_videobuf_setup,
  305. .buf_prepare = mx1_videobuf_prepare,
  306. .buf_queue = mx1_videobuf_queue,
  307. .buf_release = mx1_videobuf_release,
  308. };
  309. static void mx1_camera_init_videobuf(struct videobuf_queue *q,
  310. struct soc_camera_device *icd)
  311. {
  312. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  313. struct mx1_camera_dev *pcdev = ici->priv;
  314. videobuf_queue_dma_contig_init(q, &mx1_videobuf_ops, icd->parent,
  315. &pcdev->lock, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  316. V4L2_FIELD_NONE,
  317. sizeof(struct mx1_buffer), icd, &icd->video_lock);
  318. }
  319. static int mclk_get_divisor(struct mx1_camera_dev *pcdev)
  320. {
  321. unsigned int mclk = pcdev->mclk;
  322. unsigned long div;
  323. unsigned long lcdclk;
  324. lcdclk = clk_get_rate(pcdev->clk);
  325. /*
  326. * We verify platform_mclk_10khz != 0, so if anyone breaks it, here
  327. * they get a nice Oops
  328. */
  329. div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
  330. dev_dbg(pcdev->icd->parent,
  331. "System clock %lukHz, target freq %dkHz, divisor %lu\n",
  332. lcdclk / 1000, mclk / 1000, div);
  333. return div;
  334. }
  335. static void mx1_camera_activate(struct mx1_camera_dev *pcdev)
  336. {
  337. unsigned int csicr1 = CSICR1_EN;
  338. dev_dbg(pcdev->icd->parent, "Activate device\n");
  339. clk_enable(pcdev->clk);
  340. /* enable CSI before doing anything else */
  341. __raw_writel(csicr1, pcdev->base + CSICR1);
  342. csicr1 |= CSICR1_MCLKEN | CSICR1_FCC | CSICR1_GCLK_MODE;
  343. csicr1 |= CSICR1_MCLKDIV(mclk_get_divisor(pcdev));
  344. csicr1 |= CSICR1_RXFF_LEVEL(2); /* 16 words */
  345. __raw_writel(csicr1, pcdev->base + CSICR1);
  346. }
  347. static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev)
  348. {
  349. dev_dbg(pcdev->icd->parent, "Deactivate device\n");
  350. /* Disable all CSI interface */
  351. __raw_writel(0x00, pcdev->base + CSICR1);
  352. clk_disable(pcdev->clk);
  353. }
  354. /*
  355. * The following two functions absolutely depend on the fact, that
  356. * there can be only one camera on i.MX1/i.MXL camera sensor interface
  357. */
  358. static int mx1_camera_add_device(struct soc_camera_device *icd)
  359. {
  360. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  361. struct mx1_camera_dev *pcdev = ici->priv;
  362. if (pcdev->icd)
  363. return -EBUSY;
  364. dev_info(icd->parent, "MX1 Camera driver attached to camera %d\n",
  365. icd->devnum);
  366. mx1_camera_activate(pcdev);
  367. pcdev->icd = icd;
  368. return 0;
  369. }
  370. static void mx1_camera_remove_device(struct soc_camera_device *icd)
  371. {
  372. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  373. struct mx1_camera_dev *pcdev = ici->priv;
  374. unsigned int csicr1;
  375. BUG_ON(icd != pcdev->icd);
  376. /* disable interrupts */
  377. csicr1 = __raw_readl(pcdev->base + CSICR1) & ~CSI_IRQ_MASK;
  378. __raw_writel(csicr1, pcdev->base + CSICR1);
  379. /* Stop DMA engine */
  380. imx_dma_disable(pcdev->dma_chan);
  381. dev_info(icd->parent, "MX1 Camera driver detached from camera %d\n",
  382. icd->devnum);
  383. mx1_camera_deactivate(pcdev);
  384. pcdev->icd = NULL;
  385. }
  386. static int mx1_camera_set_crop(struct soc_camera_device *icd,
  387. struct v4l2_crop *a)
  388. {
  389. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  390. return v4l2_subdev_call(sd, video, s_crop, a);
  391. }
  392. static int mx1_camera_set_bus_param(struct soc_camera_device *icd)
  393. {
  394. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  395. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  396. struct mx1_camera_dev *pcdev = ici->priv;
  397. struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
  398. unsigned long common_flags;
  399. unsigned int csicr1;
  400. int ret;
  401. /* MX1 supports only 8bit buswidth */
  402. ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
  403. if (!ret) {
  404. common_flags = soc_mbus_config_compatible(&cfg, CSI_BUS_FLAGS);
  405. if (!common_flags) {
  406. dev_warn(icd->parent,
  407. "Flags incompatible: camera 0x%x, host 0x%x\n",
  408. cfg.flags, CSI_BUS_FLAGS);
  409. return -EINVAL;
  410. }
  411. } else if (ret != -ENOIOCTLCMD) {
  412. return ret;
  413. } else {
  414. common_flags = CSI_BUS_FLAGS;
  415. }
  416. /* Make choises, based on platform choice */
  417. if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) &&
  418. (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) {
  419. if (!pcdev->pdata ||
  420. pcdev->pdata->flags & MX1_CAMERA_VSYNC_HIGH)
  421. common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW;
  422. else
  423. common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH;
  424. }
  425. if ((common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) &&
  426. (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)) {
  427. if (!pcdev->pdata ||
  428. pcdev->pdata->flags & MX1_CAMERA_PCLK_RISING)
  429. common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_FALLING;
  430. else
  431. common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_RISING;
  432. }
  433. if ((common_flags & V4L2_MBUS_DATA_ACTIVE_HIGH) &&
  434. (common_flags & V4L2_MBUS_DATA_ACTIVE_LOW)) {
  435. if (!pcdev->pdata ||
  436. pcdev->pdata->flags & MX1_CAMERA_DATA_HIGH)
  437. common_flags &= ~V4L2_MBUS_DATA_ACTIVE_LOW;
  438. else
  439. common_flags &= ~V4L2_MBUS_DATA_ACTIVE_HIGH;
  440. }
  441. cfg.flags = common_flags;
  442. ret = v4l2_subdev_call(sd, video, s_mbus_config, &cfg);
  443. if (ret < 0 && ret != -ENOIOCTLCMD) {
  444. dev_dbg(icd->parent, "camera s_mbus_config(0x%lx) returned %d\n",
  445. common_flags, ret);
  446. return ret;
  447. }
  448. csicr1 = __raw_readl(pcdev->base + CSICR1);
  449. if (common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
  450. csicr1 |= CSICR1_REDGE;
  451. if (common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
  452. csicr1 |= CSICR1_SOF_POL;
  453. if (common_flags & V4L2_MBUS_DATA_ACTIVE_LOW)
  454. csicr1 |= CSICR1_DATA_POL;
  455. __raw_writel(csicr1, pcdev->base + CSICR1);
  456. return 0;
  457. }
  458. static int mx1_camera_set_fmt(struct soc_camera_device *icd,
  459. struct v4l2_format *f)
  460. {
  461. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  462. const struct soc_camera_format_xlate *xlate;
  463. struct v4l2_pix_format *pix = &f->fmt.pix;
  464. struct v4l2_mbus_framefmt mf;
  465. int ret, buswidth;
  466. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  467. if (!xlate) {
  468. dev_warn(icd->parent, "Format %x not found\n",
  469. pix->pixelformat);
  470. return -EINVAL;
  471. }
  472. buswidth = xlate->host_fmt->bits_per_sample;
  473. if (buswidth > 8) {
  474. dev_warn(icd->parent,
  475. "bits-per-sample %d for format %x unsupported\n",
  476. buswidth, pix->pixelformat);
  477. return -EINVAL;
  478. }
  479. mf.width = pix->width;
  480. mf.height = pix->height;
  481. mf.field = pix->field;
  482. mf.colorspace = pix->colorspace;
  483. mf.code = xlate->code;
  484. ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
  485. if (ret < 0)
  486. return ret;
  487. if (mf.code != xlate->code)
  488. return -EINVAL;
  489. pix->width = mf.width;
  490. pix->height = mf.height;
  491. pix->field = mf.field;
  492. pix->colorspace = mf.colorspace;
  493. icd->current_fmt = xlate;
  494. return ret;
  495. }
  496. static int mx1_camera_try_fmt(struct soc_camera_device *icd,
  497. struct v4l2_format *f)
  498. {
  499. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  500. const struct soc_camera_format_xlate *xlate;
  501. struct v4l2_pix_format *pix = &f->fmt.pix;
  502. struct v4l2_mbus_framefmt mf;
  503. int ret;
  504. /* TODO: limit to mx1 hardware capabilities */
  505. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  506. if (!xlate) {
  507. dev_warn(icd->parent, "Format %x not found\n",
  508. pix->pixelformat);
  509. return -EINVAL;
  510. }
  511. mf.width = pix->width;
  512. mf.height = pix->height;
  513. mf.field = pix->field;
  514. mf.colorspace = pix->colorspace;
  515. mf.code = xlate->code;
  516. /* limit to sensor capabilities */
  517. ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
  518. if (ret < 0)
  519. return ret;
  520. pix->width = mf.width;
  521. pix->height = mf.height;
  522. pix->field = mf.field;
  523. pix->colorspace = mf.colorspace;
  524. return 0;
  525. }
  526. static int mx1_camera_reqbufs(struct soc_camera_device *icd,
  527. struct v4l2_requestbuffers *p)
  528. {
  529. int i;
  530. /*
  531. * This is for locking debugging only. I removed spinlocks and now I
  532. * check whether .prepare is ever called on a linked buffer, or whether
  533. * a dma IRQ can occur for an in-work or unlinked buffer. Until now
  534. * it hadn't triggered
  535. */
  536. for (i = 0; i < p->count; i++) {
  537. struct mx1_buffer *buf = container_of(icd->vb_vidq.bufs[i],
  538. struct mx1_buffer, vb);
  539. buf->inwork = 0;
  540. INIT_LIST_HEAD(&buf->vb.queue);
  541. }
  542. return 0;
  543. }
  544. static unsigned int mx1_camera_poll(struct file *file, poll_table *pt)
  545. {
  546. struct soc_camera_device *icd = file->private_data;
  547. struct mx1_buffer *buf;
  548. buf = list_entry(icd->vb_vidq.stream.next, struct mx1_buffer,
  549. vb.stream);
  550. poll_wait(file, &buf->vb.done, pt);
  551. if (buf->vb.state == VIDEOBUF_DONE ||
  552. buf->vb.state == VIDEOBUF_ERROR)
  553. return POLLIN | POLLRDNORM;
  554. return 0;
  555. }
  556. static int mx1_camera_querycap(struct soc_camera_host *ici,
  557. struct v4l2_capability *cap)
  558. {
  559. /* cap->name is set by the friendly caller:-> */
  560. strlcpy(cap->card, "i.MX1/i.MXL Camera", sizeof(cap->card));
  561. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
  562. return 0;
  563. }
  564. static struct soc_camera_host_ops mx1_soc_camera_host_ops = {
  565. .owner = THIS_MODULE,
  566. .add = mx1_camera_add_device,
  567. .remove = mx1_camera_remove_device,
  568. .set_bus_param = mx1_camera_set_bus_param,
  569. .set_crop = mx1_camera_set_crop,
  570. .set_fmt = mx1_camera_set_fmt,
  571. .try_fmt = mx1_camera_try_fmt,
  572. .init_videobuf = mx1_camera_init_videobuf,
  573. .reqbufs = mx1_camera_reqbufs,
  574. .poll = mx1_camera_poll,
  575. .querycap = mx1_camera_querycap,
  576. };
  577. static struct fiq_handler fh = {
  578. .name = "csi_sof"
  579. };
  580. static int __init mx1_camera_probe(struct platform_device *pdev)
  581. {
  582. struct mx1_camera_dev *pcdev;
  583. struct resource *res;
  584. struct pt_regs regs;
  585. struct clk *clk;
  586. void __iomem *base;
  587. unsigned int irq;
  588. int err = 0;
  589. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  590. irq = platform_get_irq(pdev, 0);
  591. if (!res || (int)irq <= 0) {
  592. err = -ENODEV;
  593. goto exit;
  594. }
  595. clk = clk_get(&pdev->dev, "csi_clk");
  596. if (IS_ERR(clk)) {
  597. err = PTR_ERR(clk);
  598. goto exit;
  599. }
  600. pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL);
  601. if (!pcdev) {
  602. dev_err(&pdev->dev, "Could not allocate pcdev\n");
  603. err = -ENOMEM;
  604. goto exit_put_clk;
  605. }
  606. pcdev->res = res;
  607. pcdev->clk = clk;
  608. pcdev->pdata = pdev->dev.platform_data;
  609. if (pcdev->pdata)
  610. pcdev->mclk = pcdev->pdata->mclk_10khz * 10000;
  611. if (!pcdev->mclk) {
  612. dev_warn(&pdev->dev,
  613. "mclk_10khz == 0! Please, fix your platform data. "
  614. "Using default 20MHz\n");
  615. pcdev->mclk = 20000000;
  616. }
  617. INIT_LIST_HEAD(&pcdev->capture);
  618. spin_lock_init(&pcdev->lock);
  619. /*
  620. * Request the regions.
  621. */
  622. if (!request_mem_region(res->start, resource_size(res), DRIVER_NAME)) {
  623. err = -EBUSY;
  624. goto exit_kfree;
  625. }
  626. base = ioremap(res->start, resource_size(res));
  627. if (!base) {
  628. err = -ENOMEM;
  629. goto exit_release;
  630. }
  631. pcdev->irq = irq;
  632. pcdev->base = base;
  633. /* request dma */
  634. pcdev->dma_chan = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_HIGH);
  635. if (pcdev->dma_chan < 0) {
  636. dev_err(&pdev->dev, "Can't request DMA for MX1 CSI\n");
  637. err = -EBUSY;
  638. goto exit_iounmap;
  639. }
  640. dev_dbg(&pdev->dev, "got DMA channel %d\n", pcdev->dma_chan);
  641. imx_dma_setup_handlers(pcdev->dma_chan, mx1_camera_dma_irq, NULL,
  642. pcdev);
  643. imx_dma_config_channel(pcdev->dma_chan, IMX_DMA_TYPE_FIFO,
  644. IMX_DMA_MEMSIZE_32, MX1_DMA_REQ_CSI_R, 0);
  645. /* burst length : 16 words = 64 bytes */
  646. imx_dma_config_burstlen(pcdev->dma_chan, 0);
  647. /* request irq */
  648. err = claim_fiq(&fh);
  649. if (err) {
  650. dev_err(&pdev->dev, "Camera interrupt register failed \n");
  651. goto exit_free_dma;
  652. }
  653. set_fiq_handler(&mx1_camera_sof_fiq_start, &mx1_camera_sof_fiq_end -
  654. &mx1_camera_sof_fiq_start);
  655. regs.ARM_r8 = (long)MX1_DMA_DIMR;
  656. regs.ARM_r9 = (long)MX1_DMA_CCR(pcdev->dma_chan);
  657. regs.ARM_r10 = (long)pcdev->base + CSICR1;
  658. regs.ARM_fp = (long)pcdev->base + CSISR;
  659. regs.ARM_sp = 1 << pcdev->dma_chan;
  660. set_fiq_regs(&regs);
  661. mxc_set_irq_fiq(irq, 1);
  662. enable_fiq(irq);
  663. pcdev->soc_host.drv_name = DRIVER_NAME;
  664. pcdev->soc_host.ops = &mx1_soc_camera_host_ops;
  665. pcdev->soc_host.priv = pcdev;
  666. pcdev->soc_host.v4l2_dev.dev = &pdev->dev;
  667. pcdev->soc_host.nr = pdev->id;
  668. err = soc_camera_host_register(&pcdev->soc_host);
  669. if (err)
  670. goto exit_free_irq;
  671. dev_info(&pdev->dev, "MX1 Camera driver loaded\n");
  672. return 0;
  673. exit_free_irq:
  674. disable_fiq(irq);
  675. mxc_set_irq_fiq(irq, 0);
  676. release_fiq(&fh);
  677. exit_free_dma:
  678. imx_dma_free(pcdev->dma_chan);
  679. exit_iounmap:
  680. iounmap(base);
  681. exit_release:
  682. release_mem_region(res->start, resource_size(res));
  683. exit_kfree:
  684. kfree(pcdev);
  685. exit_put_clk:
  686. clk_put(clk);
  687. exit:
  688. return err;
  689. }
  690. static int __exit mx1_camera_remove(struct platform_device *pdev)
  691. {
  692. struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
  693. struct mx1_camera_dev *pcdev = container_of(soc_host,
  694. struct mx1_camera_dev, soc_host);
  695. struct resource *res;
  696. imx_dma_free(pcdev->dma_chan);
  697. disable_fiq(pcdev->irq);
  698. mxc_set_irq_fiq(pcdev->irq, 0);
  699. release_fiq(&fh);
  700. clk_put(pcdev->clk);
  701. soc_camera_host_unregister(soc_host);
  702. iounmap(pcdev->base);
  703. res = pcdev->res;
  704. release_mem_region(res->start, resource_size(res));
  705. kfree(pcdev);
  706. dev_info(&pdev->dev, "MX1 Camera driver unloaded\n");
  707. return 0;
  708. }
  709. static struct platform_driver mx1_camera_driver = {
  710. .driver = {
  711. .name = DRIVER_NAME,
  712. },
  713. .remove = __exit_p(mx1_camera_remove),
  714. };
  715. static int __init mx1_camera_init(void)
  716. {
  717. return platform_driver_probe(&mx1_camera_driver, mx1_camera_probe);
  718. }
  719. static void __exit mx1_camera_exit(void)
  720. {
  721. return platform_driver_unregister(&mx1_camera_driver);
  722. }
  723. module_init(mx1_camera_init);
  724. module_exit(mx1_camera_exit);
  725. MODULE_DESCRIPTION("i.MX1/i.MXL SoC Camera Host driver");
  726. MODULE_AUTHOR("Paulius Zaleckas <paulius.zaleckas@teltonika.lt>");
  727. MODULE_LICENSE("GPL v2");
  728. MODULE_VERSION(DRIVER_VERSION);
  729. MODULE_ALIAS("platform:" DRIVER_NAME);