mt9v032.c 21 KB

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  1. /*
  2. * Driver for MT9V032 CMOS Image Sensor from Micron
  3. *
  4. * Copyright (C) 2010, Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  5. *
  6. * Based on the MT9M001 driver,
  7. *
  8. * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/i2c.h>
  16. #include <linux/log2.h>
  17. #include <linux/mutex.h>
  18. #include <linux/slab.h>
  19. #include <linux/videodev2.h>
  20. #include <linux/v4l2-mediabus.h>
  21. #include <linux/module.h>
  22. #include <media/mt9v032.h>
  23. #include <media/v4l2-ctrls.h>
  24. #include <media/v4l2-device.h>
  25. #include <media/v4l2-subdev.h>
  26. #define MT9V032_PIXEL_ARRAY_HEIGHT 492
  27. #define MT9V032_PIXEL_ARRAY_WIDTH 782
  28. #define MT9V032_CHIP_VERSION 0x00
  29. #define MT9V032_CHIP_ID_REV1 0x1311
  30. #define MT9V032_CHIP_ID_REV3 0x1313
  31. #define MT9V032_COLUMN_START 0x01
  32. #define MT9V032_COLUMN_START_MIN 1
  33. #define MT9V032_COLUMN_START_DEF 1
  34. #define MT9V032_COLUMN_START_MAX 752
  35. #define MT9V032_ROW_START 0x02
  36. #define MT9V032_ROW_START_MIN 4
  37. #define MT9V032_ROW_START_DEF 5
  38. #define MT9V032_ROW_START_MAX 482
  39. #define MT9V032_WINDOW_HEIGHT 0x03
  40. #define MT9V032_WINDOW_HEIGHT_MIN 1
  41. #define MT9V032_WINDOW_HEIGHT_DEF 480
  42. #define MT9V032_WINDOW_HEIGHT_MAX 480
  43. #define MT9V032_WINDOW_WIDTH 0x04
  44. #define MT9V032_WINDOW_WIDTH_MIN 1
  45. #define MT9V032_WINDOW_WIDTH_DEF 752
  46. #define MT9V032_WINDOW_WIDTH_MAX 752
  47. #define MT9V032_HORIZONTAL_BLANKING 0x05
  48. #define MT9V032_HORIZONTAL_BLANKING_MIN 43
  49. #define MT9V032_HORIZONTAL_BLANKING_MAX 1023
  50. #define MT9V032_VERTICAL_BLANKING 0x06
  51. #define MT9V032_VERTICAL_BLANKING_MIN 4
  52. #define MT9V032_VERTICAL_BLANKING_MAX 3000
  53. #define MT9V032_CHIP_CONTROL 0x07
  54. #define MT9V032_CHIP_CONTROL_MASTER_MODE (1 << 3)
  55. #define MT9V032_CHIP_CONTROL_DOUT_ENABLE (1 << 7)
  56. #define MT9V032_CHIP_CONTROL_SEQUENTIAL (1 << 8)
  57. #define MT9V032_SHUTTER_WIDTH1 0x08
  58. #define MT9V032_SHUTTER_WIDTH2 0x09
  59. #define MT9V032_SHUTTER_WIDTH_CONTROL 0x0a
  60. #define MT9V032_TOTAL_SHUTTER_WIDTH 0x0b
  61. #define MT9V032_TOTAL_SHUTTER_WIDTH_MIN 1
  62. #define MT9V032_TOTAL_SHUTTER_WIDTH_DEF 480
  63. #define MT9V032_TOTAL_SHUTTER_WIDTH_MAX 32767
  64. #define MT9V032_RESET 0x0c
  65. #define MT9V032_READ_MODE 0x0d
  66. #define MT9V032_READ_MODE_ROW_BIN_MASK (3 << 0)
  67. #define MT9V032_READ_MODE_ROW_BIN_SHIFT 0
  68. #define MT9V032_READ_MODE_COLUMN_BIN_MASK (3 << 2)
  69. #define MT9V032_READ_MODE_COLUMN_BIN_SHIFT 2
  70. #define MT9V032_READ_MODE_ROW_FLIP (1 << 4)
  71. #define MT9V032_READ_MODE_COLUMN_FLIP (1 << 5)
  72. #define MT9V032_READ_MODE_DARK_COLUMNS (1 << 6)
  73. #define MT9V032_READ_MODE_DARK_ROWS (1 << 7)
  74. #define MT9V032_PIXEL_OPERATION_MODE 0x0f
  75. #define MT9V032_PIXEL_OPERATION_MODE_COLOR (1 << 2)
  76. #define MT9V032_PIXEL_OPERATION_MODE_HDR (1 << 6)
  77. #define MT9V032_ANALOG_GAIN 0x35
  78. #define MT9V032_ANALOG_GAIN_MIN 16
  79. #define MT9V032_ANALOG_GAIN_DEF 16
  80. #define MT9V032_ANALOG_GAIN_MAX 64
  81. #define MT9V032_MAX_ANALOG_GAIN 0x36
  82. #define MT9V032_MAX_ANALOG_GAIN_MAX 127
  83. #define MT9V032_FRAME_DARK_AVERAGE 0x42
  84. #define MT9V032_DARK_AVG_THRESH 0x46
  85. #define MT9V032_DARK_AVG_LOW_THRESH_MASK (255 << 0)
  86. #define MT9V032_DARK_AVG_LOW_THRESH_SHIFT 0
  87. #define MT9V032_DARK_AVG_HIGH_THRESH_MASK (255 << 8)
  88. #define MT9V032_DARK_AVG_HIGH_THRESH_SHIFT 8
  89. #define MT9V032_ROW_NOISE_CORR_CONTROL 0x70
  90. #define MT9V032_ROW_NOISE_CORR_ENABLE (1 << 5)
  91. #define MT9V032_ROW_NOISE_CORR_USE_BLK_AVG (1 << 7)
  92. #define MT9V032_PIXEL_CLOCK 0x74
  93. #define MT9V032_PIXEL_CLOCK_INV_LINE (1 << 0)
  94. #define MT9V032_PIXEL_CLOCK_INV_FRAME (1 << 1)
  95. #define MT9V032_PIXEL_CLOCK_XOR_LINE (1 << 2)
  96. #define MT9V032_PIXEL_CLOCK_CONT_LINE (1 << 3)
  97. #define MT9V032_PIXEL_CLOCK_INV_PXL_CLK (1 << 4)
  98. #define MT9V032_TEST_PATTERN 0x7f
  99. #define MT9V032_TEST_PATTERN_DATA_MASK (1023 << 0)
  100. #define MT9V032_TEST_PATTERN_DATA_SHIFT 0
  101. #define MT9V032_TEST_PATTERN_USE_DATA (1 << 10)
  102. #define MT9V032_TEST_PATTERN_GRAY_MASK (3 << 11)
  103. #define MT9V032_TEST_PATTERN_GRAY_NONE (0 << 11)
  104. #define MT9V032_TEST_PATTERN_GRAY_VERTICAL (1 << 11)
  105. #define MT9V032_TEST_PATTERN_GRAY_HORIZONTAL (2 << 11)
  106. #define MT9V032_TEST_PATTERN_GRAY_DIAGONAL (3 << 11)
  107. #define MT9V032_TEST_PATTERN_ENABLE (1 << 13)
  108. #define MT9V032_TEST_PATTERN_FLIP (1 << 14)
  109. #define MT9V032_AEC_AGC_ENABLE 0xaf
  110. #define MT9V032_AEC_ENABLE (1 << 0)
  111. #define MT9V032_AGC_ENABLE (1 << 1)
  112. #define MT9V032_THERMAL_INFO 0xc1
  113. struct mt9v032 {
  114. struct v4l2_subdev subdev;
  115. struct media_pad pad;
  116. struct v4l2_mbus_framefmt format;
  117. struct v4l2_rect crop;
  118. struct v4l2_ctrl_handler ctrls;
  119. struct mutex power_lock;
  120. int power_count;
  121. struct mt9v032_platform_data *pdata;
  122. u16 chip_control;
  123. u16 aec_agc;
  124. };
  125. static struct mt9v032 *to_mt9v032(struct v4l2_subdev *sd)
  126. {
  127. return container_of(sd, struct mt9v032, subdev);
  128. }
  129. static int mt9v032_read(struct i2c_client *client, const u8 reg)
  130. {
  131. s32 data = i2c_smbus_read_word_swapped(client, reg);
  132. dev_dbg(&client->dev, "%s: read 0x%04x from 0x%02x\n", __func__,
  133. data, reg);
  134. return data;
  135. }
  136. static int mt9v032_write(struct i2c_client *client, const u8 reg,
  137. const u16 data)
  138. {
  139. dev_dbg(&client->dev, "%s: writing 0x%04x to 0x%02x\n", __func__,
  140. data, reg);
  141. return i2c_smbus_write_word_swapped(client, reg, data);
  142. }
  143. static int mt9v032_set_chip_control(struct mt9v032 *mt9v032, u16 clear, u16 set)
  144. {
  145. struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
  146. u16 value = (mt9v032->chip_control & ~clear) | set;
  147. int ret;
  148. ret = mt9v032_write(client, MT9V032_CHIP_CONTROL, value);
  149. if (ret < 0)
  150. return ret;
  151. mt9v032->chip_control = value;
  152. return 0;
  153. }
  154. static int
  155. mt9v032_update_aec_agc(struct mt9v032 *mt9v032, u16 which, int enable)
  156. {
  157. struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
  158. u16 value = mt9v032->aec_agc;
  159. int ret;
  160. if (enable)
  161. value |= which;
  162. else
  163. value &= ~which;
  164. ret = mt9v032_write(client, MT9V032_AEC_AGC_ENABLE, value);
  165. if (ret < 0)
  166. return ret;
  167. mt9v032->aec_agc = value;
  168. return 0;
  169. }
  170. static int mt9v032_power_on(struct mt9v032 *mt9v032)
  171. {
  172. struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
  173. int ret;
  174. if (mt9v032->pdata->set_clock) {
  175. mt9v032->pdata->set_clock(&mt9v032->subdev, 25000000);
  176. udelay(1);
  177. }
  178. /* Reset the chip and stop data read out */
  179. ret = mt9v032_write(client, MT9V032_RESET, 1);
  180. if (ret < 0)
  181. return ret;
  182. ret = mt9v032_write(client, MT9V032_RESET, 0);
  183. if (ret < 0)
  184. return ret;
  185. return mt9v032_write(client, MT9V032_CHIP_CONTROL, 0);
  186. }
  187. static void mt9v032_power_off(struct mt9v032 *mt9v032)
  188. {
  189. if (mt9v032->pdata->set_clock)
  190. mt9v032->pdata->set_clock(&mt9v032->subdev, 0);
  191. }
  192. static int __mt9v032_set_power(struct mt9v032 *mt9v032, bool on)
  193. {
  194. struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
  195. int ret;
  196. if (!on) {
  197. mt9v032_power_off(mt9v032);
  198. return 0;
  199. }
  200. ret = mt9v032_power_on(mt9v032);
  201. if (ret < 0)
  202. return ret;
  203. /* Configure the pixel clock polarity */
  204. if (mt9v032->pdata && mt9v032->pdata->clk_pol) {
  205. ret = mt9v032_write(client, MT9V032_PIXEL_CLOCK,
  206. MT9V032_PIXEL_CLOCK_INV_PXL_CLK);
  207. if (ret < 0)
  208. return ret;
  209. }
  210. /* Disable the noise correction algorithm and restore the controls. */
  211. ret = mt9v032_write(client, MT9V032_ROW_NOISE_CORR_CONTROL, 0);
  212. if (ret < 0)
  213. return ret;
  214. return v4l2_ctrl_handler_setup(&mt9v032->ctrls);
  215. }
  216. /* -----------------------------------------------------------------------------
  217. * V4L2 subdev video operations
  218. */
  219. static struct v4l2_mbus_framefmt *
  220. __mt9v032_get_pad_format(struct mt9v032 *mt9v032, struct v4l2_subdev_fh *fh,
  221. unsigned int pad, enum v4l2_subdev_format_whence which)
  222. {
  223. switch (which) {
  224. case V4L2_SUBDEV_FORMAT_TRY:
  225. return v4l2_subdev_get_try_format(fh, pad);
  226. case V4L2_SUBDEV_FORMAT_ACTIVE:
  227. return &mt9v032->format;
  228. default:
  229. return NULL;
  230. }
  231. }
  232. static struct v4l2_rect *
  233. __mt9v032_get_pad_crop(struct mt9v032 *mt9v032, struct v4l2_subdev_fh *fh,
  234. unsigned int pad, enum v4l2_subdev_format_whence which)
  235. {
  236. switch (which) {
  237. case V4L2_SUBDEV_FORMAT_TRY:
  238. return v4l2_subdev_get_try_crop(fh, pad);
  239. case V4L2_SUBDEV_FORMAT_ACTIVE:
  240. return &mt9v032->crop;
  241. default:
  242. return NULL;
  243. }
  244. }
  245. static int mt9v032_s_stream(struct v4l2_subdev *subdev, int enable)
  246. {
  247. const u16 mode = MT9V032_CHIP_CONTROL_MASTER_MODE
  248. | MT9V032_CHIP_CONTROL_DOUT_ENABLE
  249. | MT9V032_CHIP_CONTROL_SEQUENTIAL;
  250. struct i2c_client *client = v4l2_get_subdevdata(subdev);
  251. struct mt9v032 *mt9v032 = to_mt9v032(subdev);
  252. struct v4l2_mbus_framefmt *format = &mt9v032->format;
  253. struct v4l2_rect *crop = &mt9v032->crop;
  254. unsigned int hratio;
  255. unsigned int vratio;
  256. int ret;
  257. if (!enable)
  258. return mt9v032_set_chip_control(mt9v032, mode, 0);
  259. /* Configure the window size and row/column bin */
  260. hratio = DIV_ROUND_CLOSEST(crop->width, format->width);
  261. vratio = DIV_ROUND_CLOSEST(crop->height, format->height);
  262. ret = mt9v032_write(client, MT9V032_READ_MODE,
  263. (hratio - 1) << MT9V032_READ_MODE_ROW_BIN_SHIFT |
  264. (vratio - 1) << MT9V032_READ_MODE_COLUMN_BIN_SHIFT);
  265. if (ret < 0)
  266. return ret;
  267. ret = mt9v032_write(client, MT9V032_COLUMN_START, crop->left);
  268. if (ret < 0)
  269. return ret;
  270. ret = mt9v032_write(client, MT9V032_ROW_START, crop->top);
  271. if (ret < 0)
  272. return ret;
  273. ret = mt9v032_write(client, MT9V032_WINDOW_WIDTH, crop->width);
  274. if (ret < 0)
  275. return ret;
  276. ret = mt9v032_write(client, MT9V032_WINDOW_HEIGHT, crop->height);
  277. if (ret < 0)
  278. return ret;
  279. ret = mt9v032_write(client, MT9V032_HORIZONTAL_BLANKING,
  280. max(43, 660 - crop->width));
  281. if (ret < 0)
  282. return ret;
  283. /* Switch to master "normal" mode */
  284. return mt9v032_set_chip_control(mt9v032, 0, mode);
  285. }
  286. static int mt9v032_enum_mbus_code(struct v4l2_subdev *subdev,
  287. struct v4l2_subdev_fh *fh,
  288. struct v4l2_subdev_mbus_code_enum *code)
  289. {
  290. if (code->index > 0)
  291. return -EINVAL;
  292. code->code = V4L2_MBUS_FMT_SGRBG10_1X10;
  293. return 0;
  294. }
  295. static int mt9v032_enum_frame_size(struct v4l2_subdev *subdev,
  296. struct v4l2_subdev_fh *fh,
  297. struct v4l2_subdev_frame_size_enum *fse)
  298. {
  299. if (fse->index >= 8 || fse->code != V4L2_MBUS_FMT_SGRBG10_1X10)
  300. return -EINVAL;
  301. fse->min_width = MT9V032_WINDOW_WIDTH_DEF / fse->index;
  302. fse->max_width = fse->min_width;
  303. fse->min_height = MT9V032_WINDOW_HEIGHT_DEF / fse->index;
  304. fse->max_height = fse->min_height;
  305. return 0;
  306. }
  307. static int mt9v032_get_format(struct v4l2_subdev *subdev,
  308. struct v4l2_subdev_fh *fh,
  309. struct v4l2_subdev_format *format)
  310. {
  311. struct mt9v032 *mt9v032 = to_mt9v032(subdev);
  312. format->format = *__mt9v032_get_pad_format(mt9v032, fh, format->pad,
  313. format->which);
  314. return 0;
  315. }
  316. static int mt9v032_set_format(struct v4l2_subdev *subdev,
  317. struct v4l2_subdev_fh *fh,
  318. struct v4l2_subdev_format *format)
  319. {
  320. struct mt9v032 *mt9v032 = to_mt9v032(subdev);
  321. struct v4l2_mbus_framefmt *__format;
  322. struct v4l2_rect *__crop;
  323. unsigned int width;
  324. unsigned int height;
  325. unsigned int hratio;
  326. unsigned int vratio;
  327. __crop = __mt9v032_get_pad_crop(mt9v032, fh, format->pad,
  328. format->which);
  329. /* Clamp the width and height to avoid dividing by zero. */
  330. width = clamp_t(unsigned int, ALIGN(format->format.width, 2),
  331. max(__crop->width / 8, MT9V032_WINDOW_WIDTH_MIN),
  332. __crop->width);
  333. height = clamp_t(unsigned int, ALIGN(format->format.height, 2),
  334. max(__crop->height / 8, MT9V032_WINDOW_HEIGHT_MIN),
  335. __crop->height);
  336. hratio = DIV_ROUND_CLOSEST(__crop->width, width);
  337. vratio = DIV_ROUND_CLOSEST(__crop->height, height);
  338. __format = __mt9v032_get_pad_format(mt9v032, fh, format->pad,
  339. format->which);
  340. __format->width = __crop->width / hratio;
  341. __format->height = __crop->height / vratio;
  342. format->format = *__format;
  343. return 0;
  344. }
  345. static int mt9v032_get_crop(struct v4l2_subdev *subdev,
  346. struct v4l2_subdev_fh *fh,
  347. struct v4l2_subdev_crop *crop)
  348. {
  349. struct mt9v032 *mt9v032 = to_mt9v032(subdev);
  350. crop->rect = *__mt9v032_get_pad_crop(mt9v032, fh, crop->pad,
  351. crop->which);
  352. return 0;
  353. }
  354. static int mt9v032_set_crop(struct v4l2_subdev *subdev,
  355. struct v4l2_subdev_fh *fh,
  356. struct v4l2_subdev_crop *crop)
  357. {
  358. struct mt9v032 *mt9v032 = to_mt9v032(subdev);
  359. struct v4l2_mbus_framefmt *__format;
  360. struct v4l2_rect *__crop;
  361. struct v4l2_rect rect;
  362. /* Clamp the crop rectangle boundaries and align them to a non multiple
  363. * of 2 pixels to ensure a GRBG Bayer pattern.
  364. */
  365. rect.left = clamp(ALIGN(crop->rect.left + 1, 2) - 1,
  366. MT9V032_COLUMN_START_MIN,
  367. MT9V032_COLUMN_START_MAX);
  368. rect.top = clamp(ALIGN(crop->rect.top + 1, 2) - 1,
  369. MT9V032_ROW_START_MIN,
  370. MT9V032_ROW_START_MAX);
  371. rect.width = clamp(ALIGN(crop->rect.width, 2),
  372. MT9V032_WINDOW_WIDTH_MIN,
  373. MT9V032_WINDOW_WIDTH_MAX);
  374. rect.height = clamp(ALIGN(crop->rect.height, 2),
  375. MT9V032_WINDOW_HEIGHT_MIN,
  376. MT9V032_WINDOW_HEIGHT_MAX);
  377. rect.width = min(rect.width, MT9V032_PIXEL_ARRAY_WIDTH - rect.left);
  378. rect.height = min(rect.height, MT9V032_PIXEL_ARRAY_HEIGHT - rect.top);
  379. __crop = __mt9v032_get_pad_crop(mt9v032, fh, crop->pad, crop->which);
  380. if (rect.width != __crop->width || rect.height != __crop->height) {
  381. /* Reset the output image size if the crop rectangle size has
  382. * been modified.
  383. */
  384. __format = __mt9v032_get_pad_format(mt9v032, fh, crop->pad,
  385. crop->which);
  386. __format->width = rect.width;
  387. __format->height = rect.height;
  388. }
  389. *__crop = rect;
  390. crop->rect = rect;
  391. return 0;
  392. }
  393. /* -----------------------------------------------------------------------------
  394. * V4L2 subdev control operations
  395. */
  396. #define V4L2_CID_TEST_PATTERN (V4L2_CID_USER_BASE | 0x1001)
  397. static int mt9v032_s_ctrl(struct v4l2_ctrl *ctrl)
  398. {
  399. struct mt9v032 *mt9v032 =
  400. container_of(ctrl->handler, struct mt9v032, ctrls);
  401. struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
  402. u16 data;
  403. switch (ctrl->id) {
  404. case V4L2_CID_AUTOGAIN:
  405. return mt9v032_update_aec_agc(mt9v032, MT9V032_AGC_ENABLE,
  406. ctrl->val);
  407. case V4L2_CID_GAIN:
  408. return mt9v032_write(client, MT9V032_ANALOG_GAIN, ctrl->val);
  409. case V4L2_CID_EXPOSURE_AUTO:
  410. return mt9v032_update_aec_agc(mt9v032, MT9V032_AEC_ENABLE,
  411. ctrl->val);
  412. case V4L2_CID_EXPOSURE:
  413. return mt9v032_write(client, MT9V032_TOTAL_SHUTTER_WIDTH,
  414. ctrl->val);
  415. case V4L2_CID_TEST_PATTERN:
  416. switch (ctrl->val) {
  417. case 0:
  418. data = 0;
  419. break;
  420. case 1:
  421. data = MT9V032_TEST_PATTERN_GRAY_VERTICAL
  422. | MT9V032_TEST_PATTERN_ENABLE;
  423. break;
  424. case 2:
  425. data = MT9V032_TEST_PATTERN_GRAY_HORIZONTAL
  426. | MT9V032_TEST_PATTERN_ENABLE;
  427. break;
  428. case 3:
  429. data = MT9V032_TEST_PATTERN_GRAY_DIAGONAL
  430. | MT9V032_TEST_PATTERN_ENABLE;
  431. break;
  432. default:
  433. data = (ctrl->val << MT9V032_TEST_PATTERN_DATA_SHIFT)
  434. | MT9V032_TEST_PATTERN_USE_DATA
  435. | MT9V032_TEST_PATTERN_ENABLE
  436. | MT9V032_TEST_PATTERN_FLIP;
  437. break;
  438. }
  439. return mt9v032_write(client, MT9V032_TEST_PATTERN, data);
  440. }
  441. return 0;
  442. }
  443. static struct v4l2_ctrl_ops mt9v032_ctrl_ops = {
  444. .s_ctrl = mt9v032_s_ctrl,
  445. };
  446. static const struct v4l2_ctrl_config mt9v032_ctrls[] = {
  447. {
  448. .ops = &mt9v032_ctrl_ops,
  449. .id = V4L2_CID_TEST_PATTERN,
  450. .type = V4L2_CTRL_TYPE_INTEGER,
  451. .name = "Test pattern",
  452. .min = 0,
  453. .max = 1023,
  454. .step = 1,
  455. .def = 0,
  456. .flags = 0,
  457. }
  458. };
  459. /* -----------------------------------------------------------------------------
  460. * V4L2 subdev core operations
  461. */
  462. static int mt9v032_set_power(struct v4l2_subdev *subdev, int on)
  463. {
  464. struct mt9v032 *mt9v032 = to_mt9v032(subdev);
  465. int ret = 0;
  466. mutex_lock(&mt9v032->power_lock);
  467. /* If the power count is modified from 0 to != 0 or from != 0 to 0,
  468. * update the power state.
  469. */
  470. if (mt9v032->power_count == !on) {
  471. ret = __mt9v032_set_power(mt9v032, !!on);
  472. if (ret < 0)
  473. goto done;
  474. }
  475. /* Update the power count. */
  476. mt9v032->power_count += on ? 1 : -1;
  477. WARN_ON(mt9v032->power_count < 0);
  478. done:
  479. mutex_unlock(&mt9v032->power_lock);
  480. return ret;
  481. }
  482. /* -----------------------------------------------------------------------------
  483. * V4L2 subdev internal operations
  484. */
  485. static int mt9v032_registered(struct v4l2_subdev *subdev)
  486. {
  487. struct i2c_client *client = v4l2_get_subdevdata(subdev);
  488. struct mt9v032 *mt9v032 = to_mt9v032(subdev);
  489. s32 data;
  490. int ret;
  491. dev_info(&client->dev, "Probing MT9V032 at address 0x%02x\n",
  492. client->addr);
  493. ret = mt9v032_power_on(mt9v032);
  494. if (ret < 0) {
  495. dev_err(&client->dev, "MT9V032 power up failed\n");
  496. return ret;
  497. }
  498. /* Read and check the sensor version */
  499. data = mt9v032_read(client, MT9V032_CHIP_VERSION);
  500. if (data != MT9V032_CHIP_ID_REV1 && data != MT9V032_CHIP_ID_REV3) {
  501. dev_err(&client->dev, "MT9V032 not detected, wrong version "
  502. "0x%04x\n", data);
  503. return -ENODEV;
  504. }
  505. mt9v032_power_off(mt9v032);
  506. dev_info(&client->dev, "MT9V032 detected at address 0x%02x\n",
  507. client->addr);
  508. return ret;
  509. }
  510. static int mt9v032_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
  511. {
  512. struct v4l2_mbus_framefmt *format;
  513. struct v4l2_rect *crop;
  514. crop = v4l2_subdev_get_try_crop(fh, 0);
  515. crop->left = MT9V032_COLUMN_START_DEF;
  516. crop->top = MT9V032_ROW_START_DEF;
  517. crop->width = MT9V032_WINDOW_WIDTH_DEF;
  518. crop->height = MT9V032_WINDOW_HEIGHT_DEF;
  519. format = v4l2_subdev_get_try_format(fh, 0);
  520. format->code = V4L2_MBUS_FMT_SGRBG10_1X10;
  521. format->width = MT9V032_WINDOW_WIDTH_DEF;
  522. format->height = MT9V032_WINDOW_HEIGHT_DEF;
  523. format->field = V4L2_FIELD_NONE;
  524. format->colorspace = V4L2_COLORSPACE_SRGB;
  525. return mt9v032_set_power(subdev, 1);
  526. }
  527. static int mt9v032_close(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
  528. {
  529. return mt9v032_set_power(subdev, 0);
  530. }
  531. static struct v4l2_subdev_core_ops mt9v032_subdev_core_ops = {
  532. .s_power = mt9v032_set_power,
  533. };
  534. static struct v4l2_subdev_video_ops mt9v032_subdev_video_ops = {
  535. .s_stream = mt9v032_s_stream,
  536. };
  537. static struct v4l2_subdev_pad_ops mt9v032_subdev_pad_ops = {
  538. .enum_mbus_code = mt9v032_enum_mbus_code,
  539. .enum_frame_size = mt9v032_enum_frame_size,
  540. .get_fmt = mt9v032_get_format,
  541. .set_fmt = mt9v032_set_format,
  542. .get_crop = mt9v032_get_crop,
  543. .set_crop = mt9v032_set_crop,
  544. };
  545. static struct v4l2_subdev_ops mt9v032_subdev_ops = {
  546. .core = &mt9v032_subdev_core_ops,
  547. .video = &mt9v032_subdev_video_ops,
  548. .pad = &mt9v032_subdev_pad_ops,
  549. };
  550. static const struct v4l2_subdev_internal_ops mt9v032_subdev_internal_ops = {
  551. .registered = mt9v032_registered,
  552. .open = mt9v032_open,
  553. .close = mt9v032_close,
  554. };
  555. /* -----------------------------------------------------------------------------
  556. * Driver initialization and probing
  557. */
  558. static int mt9v032_probe(struct i2c_client *client,
  559. const struct i2c_device_id *did)
  560. {
  561. struct mt9v032 *mt9v032;
  562. unsigned int i;
  563. int ret;
  564. if (!i2c_check_functionality(client->adapter,
  565. I2C_FUNC_SMBUS_WORD_DATA)) {
  566. dev_warn(&client->adapter->dev,
  567. "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
  568. return -EIO;
  569. }
  570. mt9v032 = kzalloc(sizeof(*mt9v032), GFP_KERNEL);
  571. if (!mt9v032)
  572. return -ENOMEM;
  573. mutex_init(&mt9v032->power_lock);
  574. mt9v032->pdata = client->dev.platform_data;
  575. v4l2_ctrl_handler_init(&mt9v032->ctrls, ARRAY_SIZE(mt9v032_ctrls) + 4);
  576. v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
  577. V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
  578. v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
  579. V4L2_CID_GAIN, MT9V032_ANALOG_GAIN_MIN,
  580. MT9V032_ANALOG_GAIN_MAX, 1, MT9V032_ANALOG_GAIN_DEF);
  581. v4l2_ctrl_new_std_menu(&mt9v032->ctrls, &mt9v032_ctrl_ops,
  582. V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL, 0,
  583. V4L2_EXPOSURE_AUTO);
  584. v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
  585. V4L2_CID_EXPOSURE, MT9V032_TOTAL_SHUTTER_WIDTH_MIN,
  586. MT9V032_TOTAL_SHUTTER_WIDTH_MAX, 1,
  587. MT9V032_TOTAL_SHUTTER_WIDTH_DEF);
  588. for (i = 0; i < ARRAY_SIZE(mt9v032_ctrls); ++i)
  589. v4l2_ctrl_new_custom(&mt9v032->ctrls, &mt9v032_ctrls[i], NULL);
  590. mt9v032->subdev.ctrl_handler = &mt9v032->ctrls;
  591. if (mt9v032->ctrls.error)
  592. printk(KERN_INFO "%s: control initialization error %d\n",
  593. __func__, mt9v032->ctrls.error);
  594. mt9v032->crop.left = MT9V032_COLUMN_START_DEF;
  595. mt9v032->crop.top = MT9V032_ROW_START_DEF;
  596. mt9v032->crop.width = MT9V032_WINDOW_WIDTH_DEF;
  597. mt9v032->crop.height = MT9V032_WINDOW_HEIGHT_DEF;
  598. mt9v032->format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
  599. mt9v032->format.width = MT9V032_WINDOW_WIDTH_DEF;
  600. mt9v032->format.height = MT9V032_WINDOW_HEIGHT_DEF;
  601. mt9v032->format.field = V4L2_FIELD_NONE;
  602. mt9v032->format.colorspace = V4L2_COLORSPACE_SRGB;
  603. mt9v032->aec_agc = MT9V032_AEC_ENABLE | MT9V032_AGC_ENABLE;
  604. v4l2_i2c_subdev_init(&mt9v032->subdev, client, &mt9v032_subdev_ops);
  605. mt9v032->subdev.internal_ops = &mt9v032_subdev_internal_ops;
  606. mt9v032->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  607. mt9v032->pad.flags = MEDIA_PAD_FL_SOURCE;
  608. ret = media_entity_init(&mt9v032->subdev.entity, 1, &mt9v032->pad, 0);
  609. if (ret < 0)
  610. kfree(mt9v032);
  611. return ret;
  612. }
  613. static int mt9v032_remove(struct i2c_client *client)
  614. {
  615. struct v4l2_subdev *subdev = i2c_get_clientdata(client);
  616. struct mt9v032 *mt9v032 = to_mt9v032(subdev);
  617. v4l2_device_unregister_subdev(subdev);
  618. media_entity_cleanup(&subdev->entity);
  619. kfree(mt9v032);
  620. return 0;
  621. }
  622. static const struct i2c_device_id mt9v032_id[] = {
  623. { "mt9v032", 0 },
  624. { }
  625. };
  626. MODULE_DEVICE_TABLE(i2c, mt9v032_id);
  627. static struct i2c_driver mt9v032_driver = {
  628. .driver = {
  629. .name = "mt9v032",
  630. },
  631. .probe = mt9v032_probe,
  632. .remove = mt9v032_remove,
  633. .id_table = mt9v032_id,
  634. };
  635. module_i2c_driver(mt9v032_driver);
  636. MODULE_DESCRIPTION("Aptina MT9V032 Camera driver");
  637. MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
  638. MODULE_LICENSE("GPL");