mt9v011.c 16 KB

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  1. /*
  2. * mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
  3. *
  4. * Copyright (c) 2009 Mauro Carvalho Chehab (mchehab@redhat.com)
  5. * This code is placed under the terms of the GNU General Public License v2
  6. */
  7. #include <linux/i2c.h>
  8. #include <linux/slab.h>
  9. #include <linux/videodev2.h>
  10. #include <linux/delay.h>
  11. #include <linux/module.h>
  12. #include <asm/div64.h>
  13. #include <media/v4l2-device.h>
  14. #include <media/v4l2-chip-ident.h>
  15. #include <media/mt9v011.h>
  16. MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
  17. MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
  18. MODULE_LICENSE("GPL");
  19. static int debug;
  20. module_param(debug, int, 0);
  21. MODULE_PARM_DESC(debug, "Debug level (0-2)");
  22. #define R00_MT9V011_CHIP_VERSION 0x00
  23. #define R01_MT9V011_ROWSTART 0x01
  24. #define R02_MT9V011_COLSTART 0x02
  25. #define R03_MT9V011_HEIGHT 0x03
  26. #define R04_MT9V011_WIDTH 0x04
  27. #define R05_MT9V011_HBLANK 0x05
  28. #define R06_MT9V011_VBLANK 0x06
  29. #define R07_MT9V011_OUT_CTRL 0x07
  30. #define R09_MT9V011_SHUTTER_WIDTH 0x09
  31. #define R0A_MT9V011_CLK_SPEED 0x0a
  32. #define R0B_MT9V011_RESTART 0x0b
  33. #define R0C_MT9V011_SHUTTER_DELAY 0x0c
  34. #define R0D_MT9V011_RESET 0x0d
  35. #define R1E_MT9V011_DIGITAL_ZOOM 0x1e
  36. #define R20_MT9V011_READ_MODE 0x20
  37. #define R2B_MT9V011_GREEN_1_GAIN 0x2b
  38. #define R2C_MT9V011_BLUE_GAIN 0x2c
  39. #define R2D_MT9V011_RED_GAIN 0x2d
  40. #define R2E_MT9V011_GREEN_2_GAIN 0x2e
  41. #define R35_MT9V011_GLOBAL_GAIN 0x35
  42. #define RF1_MT9V011_CHIP_ENABLE 0xf1
  43. #define MT9V011_VERSION 0x8232
  44. #define MT9V011_REV_B_VERSION 0x8243
  45. /* supported controls */
  46. static struct v4l2_queryctrl mt9v011_qctrl[] = {
  47. {
  48. .id = V4L2_CID_GAIN,
  49. .type = V4L2_CTRL_TYPE_INTEGER,
  50. .name = "Gain",
  51. .minimum = 0,
  52. .maximum = (1 << 12) - 1 - 0x0020,
  53. .step = 1,
  54. .default_value = 0x0020,
  55. .flags = 0,
  56. }, {
  57. .id = V4L2_CID_EXPOSURE,
  58. .type = V4L2_CTRL_TYPE_INTEGER,
  59. .name = "Exposure",
  60. .minimum = 0,
  61. .maximum = 2047,
  62. .step = 1,
  63. .default_value = 0x01fc,
  64. .flags = 0,
  65. }, {
  66. .id = V4L2_CID_RED_BALANCE,
  67. .type = V4L2_CTRL_TYPE_INTEGER,
  68. .name = "Red Balance",
  69. .minimum = -1 << 9,
  70. .maximum = (1 << 9) - 1,
  71. .step = 1,
  72. .default_value = 0,
  73. .flags = 0,
  74. }, {
  75. .id = V4L2_CID_BLUE_BALANCE,
  76. .type = V4L2_CTRL_TYPE_INTEGER,
  77. .name = "Blue Balance",
  78. .minimum = -1 << 9,
  79. .maximum = (1 << 9) - 1,
  80. .step = 1,
  81. .default_value = 0,
  82. .flags = 0,
  83. }, {
  84. .id = V4L2_CID_HFLIP,
  85. .type = V4L2_CTRL_TYPE_BOOLEAN,
  86. .name = "Mirror",
  87. .minimum = 0,
  88. .maximum = 1,
  89. .step = 1,
  90. .default_value = 0,
  91. .flags = 0,
  92. }, {
  93. .id = V4L2_CID_VFLIP,
  94. .type = V4L2_CTRL_TYPE_BOOLEAN,
  95. .name = "Vflip",
  96. .minimum = 0,
  97. .maximum = 1,
  98. .step = 1,
  99. .default_value = 0,
  100. .flags = 0,
  101. }, {
  102. }
  103. };
  104. struct mt9v011 {
  105. struct v4l2_subdev sd;
  106. unsigned width, height;
  107. unsigned xtal;
  108. unsigned hflip:1;
  109. unsigned vflip:1;
  110. u16 global_gain, exposure;
  111. s16 red_bal, blue_bal;
  112. };
  113. static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd)
  114. {
  115. return container_of(sd, struct mt9v011, sd);
  116. }
  117. static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr)
  118. {
  119. struct i2c_client *c = v4l2_get_subdevdata(sd);
  120. __be16 buffer;
  121. int rc, val;
  122. rc = i2c_master_send(c, &addr, 1);
  123. if (rc != 1)
  124. v4l2_dbg(0, debug, sd,
  125. "i2c i/o error: rc == %d (should be 1)\n", rc);
  126. msleep(10);
  127. rc = i2c_master_recv(c, (char *)&buffer, 2);
  128. if (rc != 2)
  129. v4l2_dbg(0, debug, sd,
  130. "i2c i/o error: rc == %d (should be 2)\n", rc);
  131. val = be16_to_cpu(buffer);
  132. v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val);
  133. return val;
  134. }
  135. static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr,
  136. u16 value)
  137. {
  138. struct i2c_client *c = v4l2_get_subdevdata(sd);
  139. unsigned char buffer[3];
  140. int rc;
  141. buffer[0] = addr;
  142. buffer[1] = value >> 8;
  143. buffer[2] = value & 0xff;
  144. v4l2_dbg(2, debug, sd,
  145. "mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value);
  146. rc = i2c_master_send(c, buffer, 3);
  147. if (rc != 3)
  148. v4l2_dbg(0, debug, sd,
  149. "i2c i/o error: rc == %d (should be 3)\n", rc);
  150. }
  151. struct i2c_reg_value {
  152. unsigned char reg;
  153. u16 value;
  154. };
  155. /*
  156. * Values used at the original driver
  157. * Some values are marked as Reserved at the datasheet
  158. */
  159. static const struct i2c_reg_value mt9v011_init_default[] = {
  160. { R0D_MT9V011_RESET, 0x0001 },
  161. { R0D_MT9V011_RESET, 0x0000 },
  162. { R0C_MT9V011_SHUTTER_DELAY, 0x0000 },
  163. { R09_MT9V011_SHUTTER_WIDTH, 0x1fc },
  164. { R0A_MT9V011_CLK_SPEED, 0x0000 },
  165. { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 },
  166. { R07_MT9V011_OUT_CTRL, 0x0002 }, /* chip enable */
  167. };
  168. static u16 calc_mt9v011_gain(s16 lineargain)
  169. {
  170. u16 digitalgain = 0;
  171. u16 analogmult = 0;
  172. u16 analoginit = 0;
  173. if (lineargain < 0)
  174. lineargain = 0;
  175. /* recommended minimum */
  176. lineargain += 0x0020;
  177. if (lineargain > 2047)
  178. lineargain = 2047;
  179. if (lineargain > 1023) {
  180. digitalgain = 3;
  181. analogmult = 3;
  182. analoginit = lineargain / 16;
  183. } else if (lineargain > 511) {
  184. digitalgain = 1;
  185. analogmult = 3;
  186. analoginit = lineargain / 8;
  187. } else if (lineargain > 255) {
  188. analogmult = 3;
  189. analoginit = lineargain / 4;
  190. } else if (lineargain > 127) {
  191. analogmult = 1;
  192. analoginit = lineargain / 2;
  193. } else
  194. analoginit = lineargain;
  195. return analoginit + (analogmult << 7) + (digitalgain << 9);
  196. }
  197. static void set_balance(struct v4l2_subdev *sd)
  198. {
  199. struct mt9v011 *core = to_mt9v011(sd);
  200. u16 green_gain, blue_gain, red_gain;
  201. u16 exposure;
  202. s16 bal;
  203. exposure = core->exposure;
  204. green_gain = calc_mt9v011_gain(core->global_gain);
  205. bal = core->global_gain;
  206. bal += (core->blue_bal * core->global_gain / (1 << 7));
  207. blue_gain = calc_mt9v011_gain(bal);
  208. bal = core->global_gain;
  209. bal += (core->red_bal * core->global_gain / (1 << 7));
  210. red_gain = calc_mt9v011_gain(bal);
  211. mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green_gain);
  212. mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green_gain);
  213. mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain);
  214. mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
  215. mt9v011_write(sd, R09_MT9V011_SHUTTER_WIDTH, exposure);
  216. }
  217. static void calc_fps(struct v4l2_subdev *sd, u32 *numerator, u32 *denominator)
  218. {
  219. struct mt9v011 *core = to_mt9v011(sd);
  220. unsigned height, width, hblank, vblank, speed;
  221. unsigned row_time, t_time;
  222. u64 frames_per_ms;
  223. unsigned tmp;
  224. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  225. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  226. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  227. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  228. speed = mt9v011_read(sd, R0A_MT9V011_CLK_SPEED);
  229. row_time = (width + 113 + hblank) * (speed + 2);
  230. t_time = row_time * (height + vblank + 1);
  231. frames_per_ms = core->xtal * 1000l;
  232. do_div(frames_per_ms, t_time);
  233. tmp = frames_per_ms;
  234. v4l2_dbg(1, debug, sd, "Programmed to %u.%03u fps (%d pixel clcks)\n",
  235. tmp / 1000, tmp % 1000, t_time);
  236. if (numerator && denominator) {
  237. *numerator = 1000;
  238. *denominator = (u32)frames_per_ms;
  239. }
  240. }
  241. static u16 calc_speed(struct v4l2_subdev *sd, u32 numerator, u32 denominator)
  242. {
  243. struct mt9v011 *core = to_mt9v011(sd);
  244. unsigned height, width, hblank, vblank;
  245. unsigned row_time, line_time;
  246. u64 t_time, speed;
  247. /* Avoid bogus calculus */
  248. if (!numerator || !denominator)
  249. return 0;
  250. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  251. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  252. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  253. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  254. row_time = width + 113 + hblank;
  255. line_time = height + vblank + 1;
  256. t_time = core->xtal * ((u64)numerator);
  257. /* round to the closest value */
  258. t_time += denominator / 2;
  259. do_div(t_time, denominator);
  260. speed = t_time;
  261. do_div(speed, row_time * line_time);
  262. /* Avoid having a negative value for speed */
  263. if (speed < 2)
  264. speed = 0;
  265. else
  266. speed -= 2;
  267. /* Avoid speed overflow */
  268. if (speed > 15)
  269. return 15;
  270. return (u16)speed;
  271. }
  272. static void set_res(struct v4l2_subdev *sd)
  273. {
  274. struct mt9v011 *core = to_mt9v011(sd);
  275. unsigned vstart, hstart;
  276. /*
  277. * The mt9v011 doesn't have scaling. So, in order to select the desired
  278. * resolution, we're cropping at the middle of the sensor.
  279. * hblank and vblank should be adjusted, in order to warrant that
  280. * we'll preserve the line timings for 30 fps, no matter what resolution
  281. * is selected.
  282. * NOTE: datasheet says that width (and height) should be filled with
  283. * width-1. However, this doesn't work, since one pixel per line will
  284. * be missing.
  285. */
  286. hstart = 20 + (640 - core->width) / 2;
  287. mt9v011_write(sd, R02_MT9V011_COLSTART, hstart);
  288. mt9v011_write(sd, R04_MT9V011_WIDTH, core->width);
  289. mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width);
  290. vstart = 8 + (480 - core->height) / 2;
  291. mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart);
  292. mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height);
  293. mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height);
  294. calc_fps(sd, NULL, NULL);
  295. };
  296. static void set_read_mode(struct v4l2_subdev *sd)
  297. {
  298. struct mt9v011 *core = to_mt9v011(sd);
  299. unsigned mode = 0x1000;
  300. if (core->hflip)
  301. mode |= 0x4000;
  302. if (core->vflip)
  303. mode |= 0x8000;
  304. mt9v011_write(sd, R20_MT9V011_READ_MODE, mode);
  305. }
  306. static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
  307. {
  308. int i;
  309. for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++)
  310. mt9v011_write(sd, mt9v011_init_default[i].reg,
  311. mt9v011_init_default[i].value);
  312. set_balance(sd);
  313. set_res(sd);
  314. set_read_mode(sd);
  315. return 0;
  316. };
  317. static int mt9v011_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  318. {
  319. struct mt9v011 *core = to_mt9v011(sd);
  320. v4l2_dbg(1, debug, sd, "g_ctrl called\n");
  321. switch (ctrl->id) {
  322. case V4L2_CID_GAIN:
  323. ctrl->value = core->global_gain;
  324. return 0;
  325. case V4L2_CID_EXPOSURE:
  326. ctrl->value = core->exposure;
  327. return 0;
  328. case V4L2_CID_RED_BALANCE:
  329. ctrl->value = core->red_bal;
  330. return 0;
  331. case V4L2_CID_BLUE_BALANCE:
  332. ctrl->value = core->blue_bal;
  333. return 0;
  334. case V4L2_CID_HFLIP:
  335. ctrl->value = core->hflip ? 1 : 0;
  336. return 0;
  337. case V4L2_CID_VFLIP:
  338. ctrl->value = core->vflip ? 1 : 0;
  339. return 0;
  340. }
  341. return -EINVAL;
  342. }
  343. static int mt9v011_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
  344. {
  345. int i;
  346. v4l2_dbg(1, debug, sd, "queryctrl called\n");
  347. for (i = 0; i < ARRAY_SIZE(mt9v011_qctrl); i++)
  348. if (qc->id && qc->id == mt9v011_qctrl[i].id) {
  349. memcpy(qc, &(mt9v011_qctrl[i]),
  350. sizeof(*qc));
  351. return 0;
  352. }
  353. return -EINVAL;
  354. }
  355. static int mt9v011_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  356. {
  357. struct mt9v011 *core = to_mt9v011(sd);
  358. u8 i, n;
  359. n = ARRAY_SIZE(mt9v011_qctrl);
  360. for (i = 0; i < n; i++) {
  361. if (ctrl->id != mt9v011_qctrl[i].id)
  362. continue;
  363. if (ctrl->value < mt9v011_qctrl[i].minimum ||
  364. ctrl->value > mt9v011_qctrl[i].maximum)
  365. return -ERANGE;
  366. v4l2_dbg(1, debug, sd, "s_ctrl: id=%d, value=%d\n",
  367. ctrl->id, ctrl->value);
  368. break;
  369. }
  370. switch (ctrl->id) {
  371. case V4L2_CID_GAIN:
  372. core->global_gain = ctrl->value;
  373. break;
  374. case V4L2_CID_EXPOSURE:
  375. core->exposure = ctrl->value;
  376. break;
  377. case V4L2_CID_RED_BALANCE:
  378. core->red_bal = ctrl->value;
  379. break;
  380. case V4L2_CID_BLUE_BALANCE:
  381. core->blue_bal = ctrl->value;
  382. break;
  383. case V4L2_CID_HFLIP:
  384. core->hflip = ctrl->value;
  385. set_read_mode(sd);
  386. return 0;
  387. case V4L2_CID_VFLIP:
  388. core->vflip = ctrl->value;
  389. set_read_mode(sd);
  390. return 0;
  391. default:
  392. return -EINVAL;
  393. }
  394. set_balance(sd);
  395. return 0;
  396. }
  397. static int mt9v011_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index,
  398. enum v4l2_mbus_pixelcode *code)
  399. {
  400. if (index > 0)
  401. return -EINVAL;
  402. *code = V4L2_MBUS_FMT_SGRBG8_1X8;
  403. return 0;
  404. }
  405. static int mt9v011_try_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt)
  406. {
  407. if (fmt->code != V4L2_MBUS_FMT_SGRBG8_1X8)
  408. return -EINVAL;
  409. v4l_bound_align_image(&fmt->width, 48, 639, 1,
  410. &fmt->height, 32, 480, 1, 0);
  411. fmt->field = V4L2_FIELD_NONE;
  412. fmt->colorspace = V4L2_COLORSPACE_SRGB;
  413. return 0;
  414. }
  415. static int mt9v011_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
  416. {
  417. struct v4l2_captureparm *cp = &parms->parm.capture;
  418. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  419. return -EINVAL;
  420. memset(cp, 0, sizeof(struct v4l2_captureparm));
  421. cp->capability = V4L2_CAP_TIMEPERFRAME;
  422. calc_fps(sd,
  423. &cp->timeperframe.numerator,
  424. &cp->timeperframe.denominator);
  425. return 0;
  426. }
  427. static int mt9v011_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
  428. {
  429. struct v4l2_captureparm *cp = &parms->parm.capture;
  430. struct v4l2_fract *tpf = &cp->timeperframe;
  431. u16 speed;
  432. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  433. return -EINVAL;
  434. if (cp->extendedmode != 0)
  435. return -EINVAL;
  436. speed = calc_speed(sd, tpf->numerator, tpf->denominator);
  437. mt9v011_write(sd, R0A_MT9V011_CLK_SPEED, speed);
  438. v4l2_dbg(1, debug, sd, "Setting speed to %d\n", speed);
  439. /* Recalculate and update fps info */
  440. calc_fps(sd, &tpf->numerator, &tpf->denominator);
  441. return 0;
  442. }
  443. static int mt9v011_s_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt)
  444. {
  445. struct mt9v011 *core = to_mt9v011(sd);
  446. int rc;
  447. rc = mt9v011_try_mbus_fmt(sd, fmt);
  448. if (rc < 0)
  449. return -EINVAL;
  450. core->width = fmt->width;
  451. core->height = fmt->height;
  452. set_res(sd);
  453. return 0;
  454. }
  455. #ifdef CONFIG_VIDEO_ADV_DEBUG
  456. static int mt9v011_g_register(struct v4l2_subdev *sd,
  457. struct v4l2_dbg_register *reg)
  458. {
  459. struct i2c_client *client = v4l2_get_subdevdata(sd);
  460. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  461. return -EINVAL;
  462. if (!capable(CAP_SYS_ADMIN))
  463. return -EPERM;
  464. reg->val = mt9v011_read(sd, reg->reg & 0xff);
  465. reg->size = 2;
  466. return 0;
  467. }
  468. static int mt9v011_s_register(struct v4l2_subdev *sd,
  469. struct v4l2_dbg_register *reg)
  470. {
  471. struct i2c_client *client = v4l2_get_subdevdata(sd);
  472. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  473. return -EINVAL;
  474. if (!capable(CAP_SYS_ADMIN))
  475. return -EPERM;
  476. mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff);
  477. return 0;
  478. }
  479. #endif
  480. static int mt9v011_g_chip_ident(struct v4l2_subdev *sd,
  481. struct v4l2_dbg_chip_ident *chip)
  482. {
  483. u16 version;
  484. struct i2c_client *client = v4l2_get_subdevdata(sd);
  485. version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
  486. return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_MT9V011,
  487. version);
  488. }
  489. static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
  490. .queryctrl = mt9v011_queryctrl,
  491. .g_ctrl = mt9v011_g_ctrl,
  492. .s_ctrl = mt9v011_s_ctrl,
  493. .reset = mt9v011_reset,
  494. .g_chip_ident = mt9v011_g_chip_ident,
  495. #ifdef CONFIG_VIDEO_ADV_DEBUG
  496. .g_register = mt9v011_g_register,
  497. .s_register = mt9v011_s_register,
  498. #endif
  499. };
  500. static const struct v4l2_subdev_video_ops mt9v011_video_ops = {
  501. .enum_mbus_fmt = mt9v011_enum_mbus_fmt,
  502. .try_mbus_fmt = mt9v011_try_mbus_fmt,
  503. .s_mbus_fmt = mt9v011_s_mbus_fmt,
  504. .g_parm = mt9v011_g_parm,
  505. .s_parm = mt9v011_s_parm,
  506. };
  507. static const struct v4l2_subdev_ops mt9v011_ops = {
  508. .core = &mt9v011_core_ops,
  509. .video = &mt9v011_video_ops,
  510. };
  511. /****************************************************************************
  512. I2C Client & Driver
  513. ****************************************************************************/
  514. static int mt9v011_probe(struct i2c_client *c,
  515. const struct i2c_device_id *id)
  516. {
  517. u16 version;
  518. struct mt9v011 *core;
  519. struct v4l2_subdev *sd;
  520. /* Check if the adapter supports the needed features */
  521. if (!i2c_check_functionality(c->adapter,
  522. I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  523. return -EIO;
  524. core = kzalloc(sizeof(struct mt9v011), GFP_KERNEL);
  525. if (!core)
  526. return -ENOMEM;
  527. sd = &core->sd;
  528. v4l2_i2c_subdev_init(sd, c, &mt9v011_ops);
  529. /* Check if the sensor is really a MT9V011 */
  530. version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
  531. if ((version != MT9V011_VERSION) &&
  532. (version != MT9V011_REV_B_VERSION)) {
  533. v4l2_info(sd, "*** unknown micron chip detected (0x%04x).\n",
  534. version);
  535. kfree(core);
  536. return -EINVAL;
  537. }
  538. core->global_gain = 0x0024;
  539. core->exposure = 0x01fc;
  540. core->width = 640;
  541. core->height = 480;
  542. core->xtal = 27000000; /* Hz */
  543. if (c->dev.platform_data) {
  544. struct mt9v011_platform_data *pdata = c->dev.platform_data;
  545. core->xtal = pdata->xtal;
  546. v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n",
  547. core->xtal / 1000000, (core->xtal / 1000) % 1000);
  548. }
  549. v4l_info(c, "chip found @ 0x%02x (%s - chip version 0x%04x)\n",
  550. c->addr << 1, c->adapter->name, version);
  551. return 0;
  552. }
  553. static int mt9v011_remove(struct i2c_client *c)
  554. {
  555. struct v4l2_subdev *sd = i2c_get_clientdata(c);
  556. v4l2_dbg(1, debug, sd,
  557. "mt9v011.c: removing mt9v011 adapter on address 0x%x\n",
  558. c->addr << 1);
  559. v4l2_device_unregister_subdev(sd);
  560. kfree(to_mt9v011(sd));
  561. return 0;
  562. }
  563. /* ----------------------------------------------------------------------- */
  564. static const struct i2c_device_id mt9v011_id[] = {
  565. { "mt9v011", 0 },
  566. { }
  567. };
  568. MODULE_DEVICE_TABLE(i2c, mt9v011_id);
  569. static struct i2c_driver mt9v011_driver = {
  570. .driver = {
  571. .owner = THIS_MODULE,
  572. .name = "mt9v011",
  573. },
  574. .probe = mt9v011_probe,
  575. .remove = mt9v011_remove,
  576. .id_table = mt9v011_id,
  577. };
  578. module_i2c_driver(mt9v011_driver);