mt9t001.c 23 KB

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  1. /*
  2. * Driver for MT9T001 CMOS Image Sensor from Aptina (Micron)
  3. *
  4. * Copyright (C) 2010-2011, Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  5. *
  6. * Based on the MT9M001 driver,
  7. *
  8. * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/i2c.h>
  15. #include <linux/module.h>
  16. #include <linux/log2.h>
  17. #include <linux/slab.h>
  18. #include <linux/videodev2.h>
  19. #include <linux/v4l2-mediabus.h>
  20. #include <media/mt9t001.h>
  21. #include <media/v4l2-ctrls.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-subdev.h>
  24. #define MT9T001_PIXEL_ARRAY_HEIGHT 1568
  25. #define MT9T001_PIXEL_ARRAY_WIDTH 2112
  26. #define MT9T001_CHIP_VERSION 0x00
  27. #define MT9T001_CHIP_ID 0x1621
  28. #define MT9T001_ROW_START 0x01
  29. #define MT9T001_ROW_START_MIN 0
  30. #define MT9T001_ROW_START_DEF 20
  31. #define MT9T001_ROW_START_MAX 1534
  32. #define MT9T001_COLUMN_START 0x02
  33. #define MT9T001_COLUMN_START_MIN 0
  34. #define MT9T001_COLUMN_START_DEF 32
  35. #define MT9T001_COLUMN_START_MAX 2046
  36. #define MT9T001_WINDOW_HEIGHT 0x03
  37. #define MT9T001_WINDOW_HEIGHT_MIN 1
  38. #define MT9T001_WINDOW_HEIGHT_DEF 1535
  39. #define MT9T001_WINDOW_HEIGHT_MAX 1567
  40. #define MT9T001_WINDOW_WIDTH 0x04
  41. #define MT9T001_WINDOW_WIDTH_MIN 1
  42. #define MT9T001_WINDOW_WIDTH_DEF 2047
  43. #define MT9T001_WINDOW_WIDTH_MAX 2111
  44. #define MT9T001_HORIZONTAL_BLANKING 0x05
  45. #define MT9T001_HORIZONTAL_BLANKING_MIN 21
  46. #define MT9T001_HORIZONTAL_BLANKING_MAX 1023
  47. #define MT9T001_VERTICAL_BLANKING 0x06
  48. #define MT9T001_VERTICAL_BLANKING_MIN 3
  49. #define MT9T001_VERTICAL_BLANKING_MAX 1023
  50. #define MT9T001_OUTPUT_CONTROL 0x07
  51. #define MT9T001_OUTPUT_CONTROL_SYNC (1 << 0)
  52. #define MT9T001_OUTPUT_CONTROL_CHIP_ENABLE (1 << 1)
  53. #define MT9T001_OUTPUT_CONTROL_TEST_DATA (1 << 6)
  54. #define MT9T001_SHUTTER_WIDTH_HIGH 0x08
  55. #define MT9T001_SHUTTER_WIDTH_LOW 0x09
  56. #define MT9T001_SHUTTER_WIDTH_MIN 1
  57. #define MT9T001_SHUTTER_WIDTH_DEF 1561
  58. #define MT9T001_SHUTTER_WIDTH_MAX (1024 * 1024)
  59. #define MT9T001_PIXEL_CLOCK 0x0a
  60. #define MT9T001_PIXEL_CLOCK_INVERT (1 << 15)
  61. #define MT9T001_PIXEL_CLOCK_SHIFT_MASK (7 << 8)
  62. #define MT9T001_PIXEL_CLOCK_SHIFT_SHIFT 8
  63. #define MT9T001_PIXEL_CLOCK_DIVIDE_MASK (0x7f << 0)
  64. #define MT9T001_FRAME_RESTART 0x0b
  65. #define MT9T001_SHUTTER_DELAY 0x0c
  66. #define MT9T001_SHUTTER_DELAY_MAX 2047
  67. #define MT9T001_RESET 0x0d
  68. #define MT9T001_READ_MODE1 0x1e
  69. #define MT9T001_READ_MODE_SNAPSHOT (1 << 8)
  70. #define MT9T001_READ_MODE_STROBE_ENABLE (1 << 9)
  71. #define MT9T001_READ_MODE_STROBE_WIDTH (1 << 10)
  72. #define MT9T001_READ_MODE_STROBE_OVERRIDE (1 << 11)
  73. #define MT9T001_READ_MODE2 0x20
  74. #define MT9T001_READ_MODE_BAD_FRAMES (1 << 0)
  75. #define MT9T001_READ_MODE_LINE_VALID_CONTINUOUS (1 << 9)
  76. #define MT9T001_READ_MODE_LINE_VALID_FRAME (1 << 10)
  77. #define MT9T001_READ_MODE3 0x21
  78. #define MT9T001_READ_MODE_GLOBAL_RESET (1 << 0)
  79. #define MT9T001_READ_MODE_GHST_CTL (1 << 1)
  80. #define MT9T001_ROW_ADDRESS_MODE 0x22
  81. #define MT9T001_ROW_SKIP_MASK (7 << 0)
  82. #define MT9T001_ROW_BIN_MASK (3 << 3)
  83. #define MT9T001_ROW_BIN_SHIFT 3
  84. #define MT9T001_COLUMN_ADDRESS_MODE 0x23
  85. #define MT9T001_COLUMN_SKIP_MASK (7 << 0)
  86. #define MT9T001_COLUMN_BIN_MASK (3 << 3)
  87. #define MT9T001_COLUMN_BIN_SHIFT 3
  88. #define MT9T001_GREEN1_GAIN 0x2b
  89. #define MT9T001_BLUE_GAIN 0x2c
  90. #define MT9T001_RED_GAIN 0x2d
  91. #define MT9T001_GREEN2_GAIN 0x2e
  92. #define MT9T001_TEST_DATA 0x32
  93. #define MT9T001_GLOBAL_GAIN 0x35
  94. #define MT9T001_GLOBAL_GAIN_MIN 8
  95. #define MT9T001_GLOBAL_GAIN_MAX 1024
  96. #define MT9T001_BLACK_LEVEL 0x49
  97. #define MT9T001_ROW_BLACK_DEFAULT_OFFSET 0x4b
  98. #define MT9T001_BLC_DELTA_THRESHOLDS 0x5d
  99. #define MT9T001_CAL_THRESHOLDS 0x5f
  100. #define MT9T001_GREEN1_OFFSET 0x60
  101. #define MT9T001_GREEN2_OFFSET 0x61
  102. #define MT9T001_BLACK_LEVEL_CALIBRATION 0x62
  103. #define MT9T001_BLACK_LEVEL_OVERRIDE (1 << 0)
  104. #define MT9T001_BLACK_LEVEL_DISABLE_OFFSET (1 << 1)
  105. #define MT9T001_BLACK_LEVEL_RECALCULATE (1 << 12)
  106. #define MT9T001_BLACK_LEVEL_LOCK_RED_BLUE (1 << 13)
  107. #define MT9T001_BLACK_LEVEL_LOCK_GREEN (1 << 14)
  108. #define MT9T001_RED_OFFSET 0x63
  109. #define MT9T001_BLUE_OFFSET 0x64
  110. struct mt9t001 {
  111. struct v4l2_subdev subdev;
  112. struct media_pad pad;
  113. struct v4l2_mbus_framefmt format;
  114. struct v4l2_rect crop;
  115. struct v4l2_ctrl_handler ctrls;
  116. struct v4l2_ctrl *gains[4];
  117. u16 output_control;
  118. u16 black_level;
  119. };
  120. static inline struct mt9t001 *to_mt9t001(struct v4l2_subdev *sd)
  121. {
  122. return container_of(sd, struct mt9t001, subdev);
  123. }
  124. static int mt9t001_read(struct i2c_client *client, u8 reg)
  125. {
  126. return i2c_smbus_read_word_swapped(client, reg);
  127. }
  128. static int mt9t001_write(struct i2c_client *client, u8 reg, u16 data)
  129. {
  130. return i2c_smbus_write_word_swapped(client, reg, data);
  131. }
  132. static int mt9t001_set_output_control(struct mt9t001 *mt9t001, u16 clear,
  133. u16 set)
  134. {
  135. struct i2c_client *client = v4l2_get_subdevdata(&mt9t001->subdev);
  136. u16 value = (mt9t001->output_control & ~clear) | set;
  137. int ret;
  138. if (value == mt9t001->output_control)
  139. return 0;
  140. ret = mt9t001_write(client, MT9T001_OUTPUT_CONTROL, value);
  141. if (ret < 0)
  142. return ret;
  143. mt9t001->output_control = value;
  144. return 0;
  145. }
  146. /* -----------------------------------------------------------------------------
  147. * V4L2 subdev video operations
  148. */
  149. static struct v4l2_mbus_framefmt *
  150. __mt9t001_get_pad_format(struct mt9t001 *mt9t001, struct v4l2_subdev_fh *fh,
  151. unsigned int pad, enum v4l2_subdev_format_whence which)
  152. {
  153. switch (which) {
  154. case V4L2_SUBDEV_FORMAT_TRY:
  155. return v4l2_subdev_get_try_format(fh, pad);
  156. case V4L2_SUBDEV_FORMAT_ACTIVE:
  157. return &mt9t001->format;
  158. default:
  159. return NULL;
  160. }
  161. }
  162. static struct v4l2_rect *
  163. __mt9t001_get_pad_crop(struct mt9t001 *mt9t001, struct v4l2_subdev_fh *fh,
  164. unsigned int pad, enum v4l2_subdev_format_whence which)
  165. {
  166. switch (which) {
  167. case V4L2_SUBDEV_FORMAT_TRY:
  168. return v4l2_subdev_get_try_crop(fh, pad);
  169. case V4L2_SUBDEV_FORMAT_ACTIVE:
  170. return &mt9t001->crop;
  171. default:
  172. return NULL;
  173. }
  174. }
  175. static int mt9t001_s_stream(struct v4l2_subdev *subdev, int enable)
  176. {
  177. const u16 mode = MT9T001_OUTPUT_CONTROL_CHIP_ENABLE;
  178. struct i2c_client *client = v4l2_get_subdevdata(subdev);
  179. struct mt9t001 *mt9t001 = to_mt9t001(subdev);
  180. struct v4l2_mbus_framefmt *format = &mt9t001->format;
  181. struct v4l2_rect *crop = &mt9t001->crop;
  182. unsigned int hratio;
  183. unsigned int vratio;
  184. int ret;
  185. if (!enable)
  186. return mt9t001_set_output_control(mt9t001, mode, 0);
  187. /* Configure the window size and row/column bin */
  188. hratio = DIV_ROUND_CLOSEST(crop->width, format->width);
  189. vratio = DIV_ROUND_CLOSEST(crop->height, format->height);
  190. ret = mt9t001_write(client, MT9T001_ROW_ADDRESS_MODE, hratio - 1);
  191. if (ret < 0)
  192. return ret;
  193. ret = mt9t001_write(client, MT9T001_COLUMN_ADDRESS_MODE, vratio - 1);
  194. if (ret < 0)
  195. return ret;
  196. ret = mt9t001_write(client, MT9T001_COLUMN_START, crop->left);
  197. if (ret < 0)
  198. return ret;
  199. ret = mt9t001_write(client, MT9T001_ROW_START, crop->top);
  200. if (ret < 0)
  201. return ret;
  202. ret = mt9t001_write(client, MT9T001_WINDOW_WIDTH, crop->width - 1);
  203. if (ret < 0)
  204. return ret;
  205. ret = mt9t001_write(client, MT9T001_WINDOW_HEIGHT, crop->height - 1);
  206. if (ret < 0)
  207. return ret;
  208. /* Switch to master "normal" mode */
  209. return mt9t001_set_output_control(mt9t001, 0, mode);
  210. }
  211. static int mt9t001_enum_mbus_code(struct v4l2_subdev *subdev,
  212. struct v4l2_subdev_fh *fh,
  213. struct v4l2_subdev_mbus_code_enum *code)
  214. {
  215. if (code->index > 0)
  216. return -EINVAL;
  217. code->code = V4L2_MBUS_FMT_SGRBG10_1X10;
  218. return 0;
  219. }
  220. static int mt9t001_enum_frame_size(struct v4l2_subdev *subdev,
  221. struct v4l2_subdev_fh *fh,
  222. struct v4l2_subdev_frame_size_enum *fse)
  223. {
  224. if (fse->index >= 8 || fse->code != V4L2_MBUS_FMT_SGRBG10_1X10)
  225. return -EINVAL;
  226. fse->min_width = (MT9T001_WINDOW_WIDTH_DEF + 1) / fse->index;
  227. fse->max_width = fse->min_width;
  228. fse->min_height = (MT9T001_WINDOW_HEIGHT_DEF + 1) / fse->index;
  229. fse->max_height = fse->min_height;
  230. return 0;
  231. }
  232. static int mt9t001_get_format(struct v4l2_subdev *subdev,
  233. struct v4l2_subdev_fh *fh,
  234. struct v4l2_subdev_format *format)
  235. {
  236. struct mt9t001 *mt9t001 = to_mt9t001(subdev);
  237. format->format = *__mt9t001_get_pad_format(mt9t001, fh, format->pad,
  238. format->which);
  239. return 0;
  240. }
  241. static int mt9t001_set_format(struct v4l2_subdev *subdev,
  242. struct v4l2_subdev_fh *fh,
  243. struct v4l2_subdev_format *format)
  244. {
  245. struct mt9t001 *mt9t001 = to_mt9t001(subdev);
  246. struct v4l2_mbus_framefmt *__format;
  247. struct v4l2_rect *__crop;
  248. unsigned int width;
  249. unsigned int height;
  250. unsigned int hratio;
  251. unsigned int vratio;
  252. __crop = __mt9t001_get_pad_crop(mt9t001, fh, format->pad,
  253. format->which);
  254. /* Clamp the width and height to avoid dividing by zero. */
  255. width = clamp_t(unsigned int, ALIGN(format->format.width, 2),
  256. max(__crop->width / 8, MT9T001_WINDOW_HEIGHT_MIN + 1),
  257. __crop->width);
  258. height = clamp_t(unsigned int, ALIGN(format->format.height, 2),
  259. max(__crop->height / 8, MT9T001_WINDOW_HEIGHT_MIN + 1),
  260. __crop->height);
  261. hratio = DIV_ROUND_CLOSEST(__crop->width, width);
  262. vratio = DIV_ROUND_CLOSEST(__crop->height, height);
  263. __format = __mt9t001_get_pad_format(mt9t001, fh, format->pad,
  264. format->which);
  265. __format->width = __crop->width / hratio;
  266. __format->height = __crop->height / vratio;
  267. format->format = *__format;
  268. return 0;
  269. }
  270. static int mt9t001_get_crop(struct v4l2_subdev *subdev,
  271. struct v4l2_subdev_fh *fh,
  272. struct v4l2_subdev_crop *crop)
  273. {
  274. struct mt9t001 *mt9t001 = to_mt9t001(subdev);
  275. crop->rect = *__mt9t001_get_pad_crop(mt9t001, fh, crop->pad,
  276. crop->which);
  277. return 0;
  278. }
  279. static int mt9t001_set_crop(struct v4l2_subdev *subdev,
  280. struct v4l2_subdev_fh *fh,
  281. struct v4l2_subdev_crop *crop)
  282. {
  283. struct mt9t001 *mt9t001 = to_mt9t001(subdev);
  284. struct v4l2_mbus_framefmt *__format;
  285. struct v4l2_rect *__crop;
  286. struct v4l2_rect rect;
  287. /* Clamp the crop rectangle boundaries and align them to a multiple of 2
  288. * pixels.
  289. */
  290. rect.left = clamp(ALIGN(crop->rect.left, 2),
  291. MT9T001_COLUMN_START_MIN,
  292. MT9T001_COLUMN_START_MAX);
  293. rect.top = clamp(ALIGN(crop->rect.top, 2),
  294. MT9T001_ROW_START_MIN,
  295. MT9T001_ROW_START_MAX);
  296. rect.width = clamp(ALIGN(crop->rect.width, 2),
  297. MT9T001_WINDOW_WIDTH_MIN + 1,
  298. MT9T001_WINDOW_WIDTH_MAX + 1);
  299. rect.height = clamp(ALIGN(crop->rect.height, 2),
  300. MT9T001_WINDOW_HEIGHT_MIN + 1,
  301. MT9T001_WINDOW_HEIGHT_MAX + 1);
  302. rect.width = min(rect.width, MT9T001_PIXEL_ARRAY_WIDTH - rect.left);
  303. rect.height = min(rect.height, MT9T001_PIXEL_ARRAY_HEIGHT - rect.top);
  304. __crop = __mt9t001_get_pad_crop(mt9t001, fh, crop->pad, crop->which);
  305. if (rect.width != __crop->width || rect.height != __crop->height) {
  306. /* Reset the output image size if the crop rectangle size has
  307. * been modified.
  308. */
  309. __format = __mt9t001_get_pad_format(mt9t001, fh, crop->pad,
  310. crop->which);
  311. __format->width = rect.width;
  312. __format->height = rect.height;
  313. }
  314. *__crop = rect;
  315. crop->rect = rect;
  316. return 0;
  317. }
  318. /* -----------------------------------------------------------------------------
  319. * V4L2 subdev control operations
  320. */
  321. #define V4L2_CID_TEST_PATTERN (V4L2_CID_USER_BASE | 0x1001)
  322. #define V4L2_CID_BLACK_LEVEL_AUTO (V4L2_CID_USER_BASE | 0x1002)
  323. #define V4L2_CID_BLACK_LEVEL_OFFSET (V4L2_CID_USER_BASE | 0x1003)
  324. #define V4L2_CID_BLACK_LEVEL_CALIBRATE (V4L2_CID_USER_BASE | 0x1004)
  325. #define V4L2_CID_GAIN_RED (V4L2_CTRL_CLASS_CAMERA | 0x1001)
  326. #define V4L2_CID_GAIN_GREEN_RED (V4L2_CTRL_CLASS_CAMERA | 0x1002)
  327. #define V4L2_CID_GAIN_GREEN_BLUE (V4L2_CTRL_CLASS_CAMERA | 0x1003)
  328. #define V4L2_CID_GAIN_BLUE (V4L2_CTRL_CLASS_CAMERA | 0x1004)
  329. static u16 mt9t001_gain_value(s32 *gain)
  330. {
  331. /* Gain is controlled by 2 analog stages and a digital stage. Valid
  332. * values for the 3 stages are
  333. *
  334. * Stage Min Max Step
  335. * ------------------------------------------
  336. * First analog stage x1 x2 1
  337. * Second analog stage x1 x4 0.125
  338. * Digital stage x1 x16 0.125
  339. *
  340. * To minimize noise, the gain stages should be used in the second
  341. * analog stage, first analog stage, digital stage order. Gain from a
  342. * previous stage should be pushed to its maximum value before the next
  343. * stage is used.
  344. */
  345. if (*gain <= 32)
  346. return *gain;
  347. if (*gain <= 64) {
  348. *gain &= ~1;
  349. return (1 << 6) | (*gain >> 1);
  350. }
  351. *gain &= ~7;
  352. return ((*gain - 64) << 5) | (1 << 6) | 32;
  353. }
  354. static int mt9t001_ctrl_freeze(struct mt9t001 *mt9t001, bool freeze)
  355. {
  356. return mt9t001_set_output_control(mt9t001,
  357. freeze ? 0 : MT9T001_OUTPUT_CONTROL_SYNC,
  358. freeze ? MT9T001_OUTPUT_CONTROL_SYNC : 0);
  359. }
  360. static int mt9t001_s_ctrl(struct v4l2_ctrl *ctrl)
  361. {
  362. static const u8 gains[4] = {
  363. MT9T001_RED_GAIN, MT9T001_GREEN1_GAIN,
  364. MT9T001_GREEN2_GAIN, MT9T001_BLUE_GAIN
  365. };
  366. struct mt9t001 *mt9t001 =
  367. container_of(ctrl->handler, struct mt9t001, ctrls);
  368. struct i2c_client *client = v4l2_get_subdevdata(&mt9t001->subdev);
  369. unsigned int count;
  370. unsigned int i;
  371. u16 value;
  372. int ret;
  373. switch (ctrl->id) {
  374. case V4L2_CID_GAIN_RED:
  375. case V4L2_CID_GAIN_GREEN_RED:
  376. case V4L2_CID_GAIN_GREEN_BLUE:
  377. case V4L2_CID_GAIN_BLUE:
  378. /* Disable control updates if more than one control has changed
  379. * in the cluster.
  380. */
  381. for (i = 0, count = 0; i < 4; ++i) {
  382. struct v4l2_ctrl *gain = mt9t001->gains[i];
  383. if (gain->val != gain->cur.val)
  384. count++;
  385. }
  386. if (count > 1) {
  387. ret = mt9t001_ctrl_freeze(mt9t001, true);
  388. if (ret < 0)
  389. return ret;
  390. }
  391. /* Update the gain controls. */
  392. for (i = 0; i < 4; ++i) {
  393. struct v4l2_ctrl *gain = mt9t001->gains[i];
  394. if (gain->val == gain->cur.val)
  395. continue;
  396. value = mt9t001_gain_value(&gain->val);
  397. ret = mt9t001_write(client, gains[i], value);
  398. if (ret < 0) {
  399. mt9t001_ctrl_freeze(mt9t001, false);
  400. return ret;
  401. }
  402. }
  403. /* Enable control updates. */
  404. if (count > 1) {
  405. ret = mt9t001_ctrl_freeze(mt9t001, false);
  406. if (ret < 0)
  407. return ret;
  408. }
  409. break;
  410. case V4L2_CID_EXPOSURE:
  411. ret = mt9t001_write(client, MT9T001_SHUTTER_WIDTH_LOW,
  412. ctrl->val & 0xffff);
  413. if (ret < 0)
  414. return ret;
  415. return mt9t001_write(client, MT9T001_SHUTTER_WIDTH_HIGH,
  416. ctrl->val >> 16);
  417. case V4L2_CID_TEST_PATTERN:
  418. ret = mt9t001_set_output_control(mt9t001,
  419. ctrl->val ? 0 : MT9T001_OUTPUT_CONTROL_TEST_DATA,
  420. ctrl->val ? MT9T001_OUTPUT_CONTROL_TEST_DATA : 0);
  421. if (ret < 0)
  422. return ret;
  423. return mt9t001_write(client, MT9T001_TEST_DATA, ctrl->val << 2);
  424. case V4L2_CID_BLACK_LEVEL_AUTO:
  425. value = ctrl->val ? 0 : MT9T001_BLACK_LEVEL_OVERRIDE;
  426. ret = mt9t001_write(client, MT9T001_BLACK_LEVEL_CALIBRATION,
  427. value);
  428. if (ret < 0)
  429. return ret;
  430. mt9t001->black_level = value;
  431. break;
  432. case V4L2_CID_BLACK_LEVEL_OFFSET:
  433. ret = mt9t001_write(client, MT9T001_GREEN1_OFFSET, ctrl->val);
  434. if (ret < 0)
  435. return ret;
  436. ret = mt9t001_write(client, MT9T001_GREEN2_OFFSET, ctrl->val);
  437. if (ret < 0)
  438. return ret;
  439. ret = mt9t001_write(client, MT9T001_RED_OFFSET, ctrl->val);
  440. if (ret < 0)
  441. return ret;
  442. return mt9t001_write(client, MT9T001_BLUE_OFFSET, ctrl->val);
  443. case V4L2_CID_BLACK_LEVEL_CALIBRATE:
  444. return mt9t001_write(client, MT9T001_BLACK_LEVEL_CALIBRATION,
  445. MT9T001_BLACK_LEVEL_RECALCULATE |
  446. mt9t001->black_level);
  447. }
  448. return 0;
  449. }
  450. static struct v4l2_ctrl_ops mt9t001_ctrl_ops = {
  451. .s_ctrl = mt9t001_s_ctrl,
  452. };
  453. static const struct v4l2_ctrl_config mt9t001_ctrls[] = {
  454. {
  455. .ops = &mt9t001_ctrl_ops,
  456. .id = V4L2_CID_TEST_PATTERN,
  457. .type = V4L2_CTRL_TYPE_INTEGER,
  458. .name = "Test pattern",
  459. .min = 0,
  460. .max = 1023,
  461. .step = 1,
  462. .def = 0,
  463. .flags = 0,
  464. }, {
  465. .ops = &mt9t001_ctrl_ops,
  466. .id = V4L2_CID_BLACK_LEVEL_AUTO,
  467. .type = V4L2_CTRL_TYPE_BOOLEAN,
  468. .name = "Black Level, Auto",
  469. .min = 0,
  470. .max = 1,
  471. .step = 1,
  472. .def = 1,
  473. .flags = 0,
  474. }, {
  475. .ops = &mt9t001_ctrl_ops,
  476. .id = V4L2_CID_BLACK_LEVEL_OFFSET,
  477. .type = V4L2_CTRL_TYPE_INTEGER,
  478. .name = "Black Level, Offset",
  479. .min = -256,
  480. .max = 255,
  481. .step = 1,
  482. .def = 32,
  483. .flags = 0,
  484. }, {
  485. .ops = &mt9t001_ctrl_ops,
  486. .id = V4L2_CID_BLACK_LEVEL_CALIBRATE,
  487. .type = V4L2_CTRL_TYPE_BUTTON,
  488. .name = "Black Level, Calibrate",
  489. .min = 0,
  490. .max = 0,
  491. .step = 0,
  492. .def = 0,
  493. .flags = V4L2_CTRL_FLAG_WRITE_ONLY,
  494. },
  495. };
  496. static const struct v4l2_ctrl_config mt9t001_gains[] = {
  497. {
  498. .ops = &mt9t001_ctrl_ops,
  499. .id = V4L2_CID_GAIN_RED,
  500. .type = V4L2_CTRL_TYPE_INTEGER,
  501. .name = "Gain, Red",
  502. .min = MT9T001_GLOBAL_GAIN_MIN,
  503. .max = MT9T001_GLOBAL_GAIN_MAX,
  504. .step = 1,
  505. .def = MT9T001_GLOBAL_GAIN_MIN,
  506. .flags = 0,
  507. }, {
  508. .ops = &mt9t001_ctrl_ops,
  509. .id = V4L2_CID_GAIN_GREEN_RED,
  510. .type = V4L2_CTRL_TYPE_INTEGER,
  511. .name = "Gain, Green (R)",
  512. .min = MT9T001_GLOBAL_GAIN_MIN,
  513. .max = MT9T001_GLOBAL_GAIN_MAX,
  514. .step = 1,
  515. .def = MT9T001_GLOBAL_GAIN_MIN,
  516. .flags = 0,
  517. }, {
  518. .ops = &mt9t001_ctrl_ops,
  519. .id = V4L2_CID_GAIN_GREEN_BLUE,
  520. .type = V4L2_CTRL_TYPE_INTEGER,
  521. .name = "Gain, Green (B)",
  522. .min = MT9T001_GLOBAL_GAIN_MIN,
  523. .max = MT9T001_GLOBAL_GAIN_MAX,
  524. .step = 1,
  525. .def = MT9T001_GLOBAL_GAIN_MIN,
  526. .flags = 0,
  527. }, {
  528. .ops = &mt9t001_ctrl_ops,
  529. .id = V4L2_CID_GAIN_BLUE,
  530. .type = V4L2_CTRL_TYPE_INTEGER,
  531. .name = "Gain, Blue",
  532. .min = MT9T001_GLOBAL_GAIN_MIN,
  533. .max = MT9T001_GLOBAL_GAIN_MAX,
  534. .step = 1,
  535. .def = MT9T001_GLOBAL_GAIN_MIN,
  536. .flags = 0,
  537. },
  538. };
  539. /* -----------------------------------------------------------------------------
  540. * V4L2 subdev internal operations
  541. */
  542. static int mt9t001_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
  543. {
  544. struct v4l2_mbus_framefmt *format;
  545. struct v4l2_rect *crop;
  546. crop = v4l2_subdev_get_try_crop(fh, 0);
  547. crop->left = MT9T001_COLUMN_START_DEF;
  548. crop->top = MT9T001_ROW_START_DEF;
  549. crop->width = MT9T001_WINDOW_WIDTH_DEF + 1;
  550. crop->height = MT9T001_WINDOW_HEIGHT_DEF + 1;
  551. format = v4l2_subdev_get_try_format(fh, 0);
  552. format->code = V4L2_MBUS_FMT_SGRBG10_1X10;
  553. format->width = MT9T001_WINDOW_WIDTH_DEF + 1;
  554. format->height = MT9T001_WINDOW_HEIGHT_DEF + 1;
  555. format->field = V4L2_FIELD_NONE;
  556. format->colorspace = V4L2_COLORSPACE_SRGB;
  557. return 0;
  558. }
  559. static struct v4l2_subdev_video_ops mt9t001_subdev_video_ops = {
  560. .s_stream = mt9t001_s_stream,
  561. };
  562. static struct v4l2_subdev_pad_ops mt9t001_subdev_pad_ops = {
  563. .enum_mbus_code = mt9t001_enum_mbus_code,
  564. .enum_frame_size = mt9t001_enum_frame_size,
  565. .get_fmt = mt9t001_get_format,
  566. .set_fmt = mt9t001_set_format,
  567. .get_crop = mt9t001_get_crop,
  568. .set_crop = mt9t001_set_crop,
  569. };
  570. static struct v4l2_subdev_ops mt9t001_subdev_ops = {
  571. .video = &mt9t001_subdev_video_ops,
  572. .pad = &mt9t001_subdev_pad_ops,
  573. };
  574. static struct v4l2_subdev_internal_ops mt9t001_subdev_internal_ops = {
  575. .open = mt9t001_open,
  576. };
  577. static int mt9t001_video_probe(struct i2c_client *client)
  578. {
  579. struct mt9t001_platform_data *pdata = client->dev.platform_data;
  580. s32 data;
  581. int ret;
  582. dev_info(&client->dev, "Probing MT9T001 at address 0x%02x\n",
  583. client->addr);
  584. /* Reset the chip and stop data read out */
  585. ret = mt9t001_write(client, MT9T001_RESET, 1);
  586. if (ret < 0)
  587. return ret;
  588. ret = mt9t001_write(client, MT9T001_RESET, 0);
  589. if (ret < 0)
  590. return ret;
  591. ret = mt9t001_write(client, MT9T001_OUTPUT_CONTROL, 0);
  592. if (ret < 0)
  593. return ret;
  594. /* Configure the pixel clock polarity */
  595. if (pdata && pdata->clk_pol) {
  596. ret = mt9t001_write(client, MT9T001_PIXEL_CLOCK,
  597. MT9T001_PIXEL_CLOCK_INVERT);
  598. if (ret < 0)
  599. return ret;
  600. }
  601. /* Read and check the sensor version */
  602. data = mt9t001_read(client, MT9T001_CHIP_VERSION);
  603. if (data != MT9T001_CHIP_ID) {
  604. dev_err(&client->dev, "MT9T001 not detected, wrong version "
  605. "0x%04x\n", data);
  606. return -ENODEV;
  607. }
  608. dev_info(&client->dev, "MT9T001 detected at address 0x%02x\n",
  609. client->addr);
  610. return ret;
  611. }
  612. static int mt9t001_probe(struct i2c_client *client,
  613. const struct i2c_device_id *did)
  614. {
  615. struct mt9t001 *mt9t001;
  616. unsigned int i;
  617. int ret;
  618. if (!i2c_check_functionality(client->adapter,
  619. I2C_FUNC_SMBUS_WORD_DATA)) {
  620. dev_warn(&client->adapter->dev,
  621. "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
  622. return -EIO;
  623. }
  624. ret = mt9t001_video_probe(client);
  625. if (ret < 0)
  626. return ret;
  627. mt9t001 = kzalloc(sizeof(*mt9t001), GFP_KERNEL);
  628. if (!mt9t001)
  629. return -ENOMEM;
  630. v4l2_ctrl_handler_init(&mt9t001->ctrls, ARRAY_SIZE(mt9t001_ctrls) +
  631. ARRAY_SIZE(mt9t001_gains) + 2);
  632. v4l2_ctrl_new_std(&mt9t001->ctrls, &mt9t001_ctrl_ops,
  633. V4L2_CID_EXPOSURE, MT9T001_SHUTTER_WIDTH_MIN,
  634. MT9T001_SHUTTER_WIDTH_MAX, 1,
  635. MT9T001_SHUTTER_WIDTH_DEF);
  636. v4l2_ctrl_new_std(&mt9t001->ctrls, &mt9t001_ctrl_ops,
  637. V4L2_CID_BLACK_LEVEL, 1, 1, 1, 1);
  638. for (i = 0; i < ARRAY_SIZE(mt9t001_ctrls); ++i)
  639. v4l2_ctrl_new_custom(&mt9t001->ctrls, &mt9t001_ctrls[i], NULL);
  640. for (i = 0; i < ARRAY_SIZE(mt9t001_gains); ++i)
  641. mt9t001->gains[i] = v4l2_ctrl_new_custom(&mt9t001->ctrls,
  642. &mt9t001_gains[i], NULL);
  643. v4l2_ctrl_cluster(ARRAY_SIZE(mt9t001_gains), mt9t001->gains);
  644. mt9t001->subdev.ctrl_handler = &mt9t001->ctrls;
  645. if (mt9t001->ctrls.error) {
  646. printk(KERN_INFO "%s: control initialization error %d\n",
  647. __func__, mt9t001->ctrls.error);
  648. ret = -EINVAL;
  649. goto done;
  650. }
  651. mt9t001->crop.left = MT9T001_COLUMN_START_DEF;
  652. mt9t001->crop.top = MT9T001_ROW_START_DEF;
  653. mt9t001->crop.width = MT9T001_WINDOW_WIDTH_DEF + 1;
  654. mt9t001->crop.height = MT9T001_WINDOW_HEIGHT_DEF + 1;
  655. mt9t001->format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
  656. mt9t001->format.width = MT9T001_WINDOW_WIDTH_DEF + 1;
  657. mt9t001->format.height = MT9T001_WINDOW_HEIGHT_DEF + 1;
  658. mt9t001->format.field = V4L2_FIELD_NONE;
  659. mt9t001->format.colorspace = V4L2_COLORSPACE_SRGB;
  660. v4l2_i2c_subdev_init(&mt9t001->subdev, client, &mt9t001_subdev_ops);
  661. mt9t001->subdev.internal_ops = &mt9t001_subdev_internal_ops;
  662. mt9t001->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  663. mt9t001->pad.flags = MEDIA_PAD_FL_SOURCE;
  664. ret = media_entity_init(&mt9t001->subdev.entity, 1, &mt9t001->pad, 0);
  665. done:
  666. if (ret < 0) {
  667. v4l2_ctrl_handler_free(&mt9t001->ctrls);
  668. media_entity_cleanup(&mt9t001->subdev.entity);
  669. kfree(mt9t001);
  670. }
  671. return ret;
  672. }
  673. static int mt9t001_remove(struct i2c_client *client)
  674. {
  675. struct v4l2_subdev *subdev = i2c_get_clientdata(client);
  676. struct mt9t001 *mt9t001 = to_mt9t001(subdev);
  677. v4l2_ctrl_handler_free(&mt9t001->ctrls);
  678. v4l2_device_unregister_subdev(subdev);
  679. media_entity_cleanup(&subdev->entity);
  680. kfree(mt9t001);
  681. return 0;
  682. }
  683. static const struct i2c_device_id mt9t001_id[] = {
  684. { "mt9t001", 0 },
  685. { }
  686. };
  687. MODULE_DEVICE_TABLE(i2c, mt9t001_id);
  688. static struct i2c_driver mt9t001_driver = {
  689. .driver = {
  690. .name = "mt9t001",
  691. },
  692. .probe = mt9t001_probe,
  693. .remove = mt9t001_remove,
  694. .id_table = mt9t001_id,
  695. };
  696. module_i2c_driver(mt9t001_driver);
  697. MODULE_DESCRIPTION("Aptina (Micron) MT9T001 Camera driver");
  698. MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
  699. MODULE_LICENSE("GPL");