mt9m111.c 28 KB

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  1. /*
  2. * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina
  3. *
  4. * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/videodev2.h>
  11. #include <linux/slab.h>
  12. #include <linux/i2c.h>
  13. #include <linux/log2.h>
  14. #include <linux/gpio.h>
  15. #include <linux/delay.h>
  16. #include <linux/v4l2-mediabus.h>
  17. #include <linux/module.h>
  18. #include <media/soc_camera.h>
  19. #include <media/v4l2-common.h>
  20. #include <media/v4l2-ctrls.h>
  21. #include <media/v4l2-chip-ident.h>
  22. /*
  23. * MT9M111, MT9M112 and MT9M131:
  24. * i2c address is 0x48 or 0x5d (depending on SADDR pin)
  25. * The platform has to define i2c_board_info and call i2c_register_board_info()
  26. */
  27. /*
  28. * Sensor core register addresses (0x000..0x0ff)
  29. */
  30. #define MT9M111_CHIP_VERSION 0x000
  31. #define MT9M111_ROW_START 0x001
  32. #define MT9M111_COLUMN_START 0x002
  33. #define MT9M111_WINDOW_HEIGHT 0x003
  34. #define MT9M111_WINDOW_WIDTH 0x004
  35. #define MT9M111_HORIZONTAL_BLANKING_B 0x005
  36. #define MT9M111_VERTICAL_BLANKING_B 0x006
  37. #define MT9M111_HORIZONTAL_BLANKING_A 0x007
  38. #define MT9M111_VERTICAL_BLANKING_A 0x008
  39. #define MT9M111_SHUTTER_WIDTH 0x009
  40. #define MT9M111_ROW_SPEED 0x00a
  41. #define MT9M111_EXTRA_DELAY 0x00b
  42. #define MT9M111_SHUTTER_DELAY 0x00c
  43. #define MT9M111_RESET 0x00d
  44. #define MT9M111_READ_MODE_B 0x020
  45. #define MT9M111_READ_MODE_A 0x021
  46. #define MT9M111_FLASH_CONTROL 0x023
  47. #define MT9M111_GREEN1_GAIN 0x02b
  48. #define MT9M111_BLUE_GAIN 0x02c
  49. #define MT9M111_RED_GAIN 0x02d
  50. #define MT9M111_GREEN2_GAIN 0x02e
  51. #define MT9M111_GLOBAL_GAIN 0x02f
  52. #define MT9M111_CONTEXT_CONTROL 0x0c8
  53. #define MT9M111_PAGE_MAP 0x0f0
  54. #define MT9M111_BYTE_WISE_ADDR 0x0f1
  55. #define MT9M111_RESET_SYNC_CHANGES (1 << 15)
  56. #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9)
  57. #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8)
  58. #define MT9M111_RESET_RESET_SOC (1 << 5)
  59. #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4)
  60. #define MT9M111_RESET_CHIP_ENABLE (1 << 3)
  61. #define MT9M111_RESET_ANALOG_STANDBY (1 << 2)
  62. #define MT9M111_RESET_RESTART_FRAME (1 << 1)
  63. #define MT9M111_RESET_RESET_MODE (1 << 0)
  64. #define MT9M111_RM_FULL_POWER_RD (0 << 10)
  65. #define MT9M111_RM_LOW_POWER_RD (1 << 10)
  66. #define MT9M111_RM_COL_SKIP_4X (1 << 5)
  67. #define MT9M111_RM_ROW_SKIP_4X (1 << 4)
  68. #define MT9M111_RM_COL_SKIP_2X (1 << 3)
  69. #define MT9M111_RM_ROW_SKIP_2X (1 << 2)
  70. #define MT9M111_RMB_MIRROR_COLS (1 << 1)
  71. #define MT9M111_RMB_MIRROR_ROWS (1 << 0)
  72. #define MT9M111_CTXT_CTRL_RESTART (1 << 15)
  73. #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12)
  74. #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10)
  75. #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9)
  76. #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8)
  77. #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7)
  78. #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3)
  79. #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2)
  80. #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1)
  81. #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0)
  82. /*
  83. * Colorpipe register addresses (0x100..0x1ff)
  84. */
  85. #define MT9M111_OPER_MODE_CTRL 0x106
  86. #define MT9M111_OUTPUT_FORMAT_CTRL 0x108
  87. #define MT9M111_REDUCER_XZOOM_B 0x1a0
  88. #define MT9M111_REDUCER_XSIZE_B 0x1a1
  89. #define MT9M111_REDUCER_YZOOM_B 0x1a3
  90. #define MT9M111_REDUCER_YSIZE_B 0x1a4
  91. #define MT9M111_REDUCER_XZOOM_A 0x1a6
  92. #define MT9M111_REDUCER_XSIZE_A 0x1a7
  93. #define MT9M111_REDUCER_YZOOM_A 0x1a9
  94. #define MT9M111_REDUCER_YSIZE_A 0x1aa
  95. #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a
  96. #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b
  97. #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14)
  98. #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1)
  99. #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9)
  100. #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8)
  101. #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14)
  102. #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10)
  103. #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9)
  104. #define MT9M111_OUTFMT_RGB (1 << 8)
  105. #define MT9M111_OUTFMT_RGB565 (0 << 6)
  106. #define MT9M111_OUTFMT_RGB555 (1 << 6)
  107. #define MT9M111_OUTFMT_RGB444x (2 << 6)
  108. #define MT9M111_OUTFMT_RGBx444 (3 << 6)
  109. #define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4)
  110. #define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4)
  111. #define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4)
  112. #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4)
  113. #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3)
  114. #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2)
  115. #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1)
  116. #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0)
  117. /*
  118. * Camera control register addresses (0x200..0x2ff not implemented)
  119. */
  120. #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg)
  121. #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val))
  122. #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val))
  123. #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val))
  124. #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \
  125. (val), (mask))
  126. #define MT9M111_MIN_DARK_ROWS 8
  127. #define MT9M111_MIN_DARK_COLS 26
  128. #define MT9M111_MAX_HEIGHT 1024
  129. #define MT9M111_MAX_WIDTH 1280
  130. struct mt9m111_context {
  131. u16 read_mode;
  132. u16 blanking_h;
  133. u16 blanking_v;
  134. u16 reducer_xzoom;
  135. u16 reducer_yzoom;
  136. u16 reducer_xsize;
  137. u16 reducer_ysize;
  138. u16 output_fmt_ctrl2;
  139. u16 control;
  140. };
  141. static struct mt9m111_context context_a = {
  142. .read_mode = MT9M111_READ_MODE_A,
  143. .blanking_h = MT9M111_HORIZONTAL_BLANKING_A,
  144. .blanking_v = MT9M111_VERTICAL_BLANKING_A,
  145. .reducer_xzoom = MT9M111_REDUCER_XZOOM_A,
  146. .reducer_yzoom = MT9M111_REDUCER_YZOOM_A,
  147. .reducer_xsize = MT9M111_REDUCER_XSIZE_A,
  148. .reducer_ysize = MT9M111_REDUCER_YSIZE_A,
  149. .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_A,
  150. .control = MT9M111_CTXT_CTRL_RESTART,
  151. };
  152. static struct mt9m111_context context_b = {
  153. .read_mode = MT9M111_READ_MODE_B,
  154. .blanking_h = MT9M111_HORIZONTAL_BLANKING_B,
  155. .blanking_v = MT9M111_VERTICAL_BLANKING_B,
  156. .reducer_xzoom = MT9M111_REDUCER_XZOOM_B,
  157. .reducer_yzoom = MT9M111_REDUCER_YZOOM_B,
  158. .reducer_xsize = MT9M111_REDUCER_XSIZE_B,
  159. .reducer_ysize = MT9M111_REDUCER_YSIZE_B,
  160. .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_B,
  161. .control = MT9M111_CTXT_CTRL_RESTART |
  162. MT9M111_CTXT_CTRL_DEFECTCOR_B | MT9M111_CTXT_CTRL_RESIZE_B |
  163. MT9M111_CTXT_CTRL_CTRL2_B | MT9M111_CTXT_CTRL_GAMMA_B |
  164. MT9M111_CTXT_CTRL_READ_MODE_B | MT9M111_CTXT_CTRL_VBLANK_SEL_B |
  165. MT9M111_CTXT_CTRL_HBLANK_SEL_B,
  166. };
  167. /* MT9M111 has only one fixed colorspace per pixelcode */
  168. struct mt9m111_datafmt {
  169. enum v4l2_mbus_pixelcode code;
  170. enum v4l2_colorspace colorspace;
  171. };
  172. static const struct mt9m111_datafmt mt9m111_colour_fmts[] = {
  173. {V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
  174. {V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
  175. {V4L2_MBUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_JPEG},
  176. {V4L2_MBUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_JPEG},
  177. {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
  178. {V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
  179. {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
  180. {V4L2_MBUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
  181. {V4L2_MBUS_FMT_BGR565_2X8_LE, V4L2_COLORSPACE_SRGB},
  182. {V4L2_MBUS_FMT_BGR565_2X8_BE, V4L2_COLORSPACE_SRGB},
  183. {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
  184. {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
  185. };
  186. struct mt9m111 {
  187. struct v4l2_subdev subdev;
  188. struct v4l2_ctrl_handler hdl;
  189. struct v4l2_ctrl *gain;
  190. int model; /* V4L2_IDENT_MT9M111 or V4L2_IDENT_MT9M112 code
  191. * from v4l2-chip-ident.h */
  192. struct mt9m111_context *ctx;
  193. struct v4l2_rect rect; /* cropping rectangle */
  194. int width; /* output */
  195. int height; /* sizes */
  196. struct mutex power_lock; /* lock to protect power_count */
  197. int power_count;
  198. const struct mt9m111_datafmt *fmt;
  199. int lastpage; /* PageMap cache value */
  200. unsigned char datawidth;
  201. };
  202. /* Find a data format by a pixel code */
  203. static const struct mt9m111_datafmt *mt9m111_find_datafmt(struct mt9m111 *mt9m111,
  204. enum v4l2_mbus_pixelcode code)
  205. {
  206. int i;
  207. for (i = 0; i < ARRAY_SIZE(mt9m111_colour_fmts); i++)
  208. if (mt9m111_colour_fmts[i].code == code)
  209. return mt9m111_colour_fmts + i;
  210. return mt9m111->fmt;
  211. }
  212. static struct mt9m111 *to_mt9m111(const struct i2c_client *client)
  213. {
  214. return container_of(i2c_get_clientdata(client), struct mt9m111, subdev);
  215. }
  216. static int reg_page_map_set(struct i2c_client *client, const u16 reg)
  217. {
  218. int ret;
  219. u16 page;
  220. struct mt9m111 *mt9m111 = to_mt9m111(client);
  221. page = (reg >> 8);
  222. if (page == mt9m111->lastpage)
  223. return 0;
  224. if (page > 2)
  225. return -EINVAL;
  226. ret = i2c_smbus_write_word_swapped(client, MT9M111_PAGE_MAP, page);
  227. if (!ret)
  228. mt9m111->lastpage = page;
  229. return ret;
  230. }
  231. static int mt9m111_reg_read(struct i2c_client *client, const u16 reg)
  232. {
  233. int ret;
  234. ret = reg_page_map_set(client, reg);
  235. if (!ret)
  236. ret = i2c_smbus_read_word_swapped(client, reg & 0xff);
  237. dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret);
  238. return ret;
  239. }
  240. static int mt9m111_reg_write(struct i2c_client *client, const u16 reg,
  241. const u16 data)
  242. {
  243. int ret;
  244. ret = reg_page_map_set(client, reg);
  245. if (!ret)
  246. ret = i2c_smbus_write_word_swapped(client, reg & 0xff, data);
  247. dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret);
  248. return ret;
  249. }
  250. static int mt9m111_reg_set(struct i2c_client *client, const u16 reg,
  251. const u16 data)
  252. {
  253. int ret;
  254. ret = mt9m111_reg_read(client, reg);
  255. if (ret >= 0)
  256. ret = mt9m111_reg_write(client, reg, ret | data);
  257. return ret;
  258. }
  259. static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg,
  260. const u16 data)
  261. {
  262. int ret;
  263. ret = mt9m111_reg_read(client, reg);
  264. if (ret >= 0)
  265. ret = mt9m111_reg_write(client, reg, ret & ~data);
  266. return ret;
  267. }
  268. static int mt9m111_reg_mask(struct i2c_client *client, const u16 reg,
  269. const u16 data, const u16 mask)
  270. {
  271. int ret;
  272. ret = mt9m111_reg_read(client, reg);
  273. if (ret >= 0)
  274. ret = mt9m111_reg_write(client, reg, (ret & ~mask) | data);
  275. return ret;
  276. }
  277. static int mt9m111_set_context(struct mt9m111 *mt9m111,
  278. struct mt9m111_context *ctx)
  279. {
  280. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  281. return reg_write(CONTEXT_CONTROL, ctx->control);
  282. }
  283. static int mt9m111_setup_rect_ctx(struct mt9m111 *mt9m111,
  284. struct mt9m111_context *ctx, struct v4l2_rect *rect,
  285. unsigned int width, unsigned int height)
  286. {
  287. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  288. int ret = mt9m111_reg_write(client, ctx->reducer_xzoom, rect->width);
  289. if (!ret)
  290. ret = mt9m111_reg_write(client, ctx->reducer_yzoom, rect->height);
  291. if (!ret)
  292. ret = mt9m111_reg_write(client, ctx->reducer_xsize, width);
  293. if (!ret)
  294. ret = mt9m111_reg_write(client, ctx->reducer_ysize, height);
  295. return ret;
  296. }
  297. static int mt9m111_setup_geometry(struct mt9m111 *mt9m111, struct v4l2_rect *rect,
  298. int width, int height, enum v4l2_mbus_pixelcode code)
  299. {
  300. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  301. int ret;
  302. ret = reg_write(COLUMN_START, rect->left);
  303. if (!ret)
  304. ret = reg_write(ROW_START, rect->top);
  305. if (!ret)
  306. ret = reg_write(WINDOW_WIDTH, rect->width);
  307. if (!ret)
  308. ret = reg_write(WINDOW_HEIGHT, rect->height);
  309. if (code != V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
  310. /* IFP in use, down-scaling possible */
  311. if (!ret)
  312. ret = mt9m111_setup_rect_ctx(mt9m111, &context_b,
  313. rect, width, height);
  314. if (!ret)
  315. ret = mt9m111_setup_rect_ctx(mt9m111, &context_a,
  316. rect, width, height);
  317. }
  318. dev_dbg(&client->dev, "%s(%x): %ux%u@%u:%u -> %ux%u = %d\n",
  319. __func__, code, rect->width, rect->height, rect->left, rect->top,
  320. width, height, ret);
  321. return ret;
  322. }
  323. static int mt9m111_enable(struct mt9m111 *mt9m111)
  324. {
  325. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  326. return reg_write(RESET, MT9M111_RESET_CHIP_ENABLE);
  327. }
  328. static int mt9m111_reset(struct mt9m111 *mt9m111)
  329. {
  330. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  331. int ret;
  332. ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
  333. if (!ret)
  334. ret = reg_set(RESET, MT9M111_RESET_RESET_SOC);
  335. if (!ret)
  336. ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE
  337. | MT9M111_RESET_RESET_SOC);
  338. return ret;
  339. }
  340. static int mt9m111_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
  341. {
  342. struct v4l2_rect rect = a->c;
  343. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  344. int width, height;
  345. int ret;
  346. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  347. return -EINVAL;
  348. if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
  349. mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
  350. /* Bayer format - even size lengths */
  351. rect.width = ALIGN(rect.width, 2);
  352. rect.height = ALIGN(rect.height, 2);
  353. /* Let the user play with the starting pixel */
  354. }
  355. /* FIXME: the datasheet doesn't specify minimum sizes */
  356. soc_camera_limit_side(&rect.left, &rect.width,
  357. MT9M111_MIN_DARK_COLS, 2, MT9M111_MAX_WIDTH);
  358. soc_camera_limit_side(&rect.top, &rect.height,
  359. MT9M111_MIN_DARK_ROWS, 2, MT9M111_MAX_HEIGHT);
  360. width = min(mt9m111->width, rect.width);
  361. height = min(mt9m111->height, rect.height);
  362. ret = mt9m111_setup_geometry(mt9m111, &rect, width, height, mt9m111->fmt->code);
  363. if (!ret) {
  364. mt9m111->rect = rect;
  365. mt9m111->width = width;
  366. mt9m111->height = height;
  367. }
  368. return ret;
  369. }
  370. static int mt9m111_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
  371. {
  372. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  373. a->c = mt9m111->rect;
  374. a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  375. return 0;
  376. }
  377. static int mt9m111_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
  378. {
  379. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  380. return -EINVAL;
  381. a->bounds.left = MT9M111_MIN_DARK_COLS;
  382. a->bounds.top = MT9M111_MIN_DARK_ROWS;
  383. a->bounds.width = MT9M111_MAX_WIDTH;
  384. a->bounds.height = MT9M111_MAX_HEIGHT;
  385. a->defrect = a->bounds;
  386. a->pixelaspect.numerator = 1;
  387. a->pixelaspect.denominator = 1;
  388. return 0;
  389. }
  390. static int mt9m111_g_fmt(struct v4l2_subdev *sd,
  391. struct v4l2_mbus_framefmt *mf)
  392. {
  393. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  394. mf->width = mt9m111->width;
  395. mf->height = mt9m111->height;
  396. mf->code = mt9m111->fmt->code;
  397. mf->colorspace = mt9m111->fmt->colorspace;
  398. mf->field = V4L2_FIELD_NONE;
  399. return 0;
  400. }
  401. static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111,
  402. enum v4l2_mbus_pixelcode code)
  403. {
  404. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  405. u16 data_outfmt2, mask_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
  406. MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB |
  407. MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 |
  408. MT9M111_OUTFMT_RGB444x | MT9M111_OUTFMT_RGBx444 |
  409. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  410. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  411. int ret;
  412. switch (code) {
  413. case V4L2_MBUS_FMT_SBGGR8_1X8:
  414. data_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
  415. MT9M111_OUTFMT_RGB;
  416. break;
  417. case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
  418. data_outfmt2 = MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB;
  419. break;
  420. case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
  421. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555 |
  422. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  423. break;
  424. case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE:
  425. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555;
  426. break;
  427. case V4L2_MBUS_FMT_RGB565_2X8_LE:
  428. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  429. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  430. break;
  431. case V4L2_MBUS_FMT_RGB565_2X8_BE:
  432. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565;
  433. break;
  434. case V4L2_MBUS_FMT_BGR565_2X8_BE:
  435. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  436. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  437. break;
  438. case V4L2_MBUS_FMT_BGR565_2X8_LE:
  439. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  440. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  441. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  442. break;
  443. case V4L2_MBUS_FMT_UYVY8_2X8:
  444. data_outfmt2 = 0;
  445. break;
  446. case V4L2_MBUS_FMT_VYUY8_2X8:
  447. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  448. break;
  449. case V4L2_MBUS_FMT_YUYV8_2X8:
  450. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  451. break;
  452. case V4L2_MBUS_FMT_YVYU8_2X8:
  453. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  454. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  455. break;
  456. default:
  457. dev_err(&client->dev, "Pixel format not handled: %x\n", code);
  458. return -EINVAL;
  459. }
  460. ret = mt9m111_reg_mask(client, context_a.output_fmt_ctrl2,
  461. data_outfmt2, mask_outfmt2);
  462. if (!ret)
  463. ret = mt9m111_reg_mask(client, context_b.output_fmt_ctrl2,
  464. data_outfmt2, mask_outfmt2);
  465. return ret;
  466. }
  467. static int mt9m111_try_fmt(struct v4l2_subdev *sd,
  468. struct v4l2_mbus_framefmt *mf)
  469. {
  470. struct i2c_client *client = v4l2_get_subdevdata(sd);
  471. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  472. const struct mt9m111_datafmt *fmt;
  473. struct v4l2_rect *rect = &mt9m111->rect;
  474. bool bayer;
  475. fmt = mt9m111_find_datafmt(mt9m111, mf->code);
  476. bayer = fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
  477. fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE;
  478. /*
  479. * With Bayer format enforce even side lengths, but let the user play
  480. * with the starting pixel
  481. */
  482. if (bayer) {
  483. rect->width = ALIGN(rect->width, 2);
  484. rect->height = ALIGN(rect->height, 2);
  485. }
  486. if (fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
  487. /* IFP bypass mode, no scaling */
  488. mf->width = rect->width;
  489. mf->height = rect->height;
  490. } else {
  491. /* No upscaling */
  492. if (mf->width > rect->width)
  493. mf->width = rect->width;
  494. if (mf->height > rect->height)
  495. mf->height = rect->height;
  496. }
  497. dev_dbg(&client->dev, "%s(): %ux%u, code=%x\n", __func__,
  498. mf->width, mf->height, fmt->code);
  499. mf->code = fmt->code;
  500. mf->colorspace = fmt->colorspace;
  501. return 0;
  502. }
  503. static int mt9m111_s_fmt(struct v4l2_subdev *sd,
  504. struct v4l2_mbus_framefmt *mf)
  505. {
  506. const struct mt9m111_datafmt *fmt;
  507. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  508. struct v4l2_rect *rect = &mt9m111->rect;
  509. int ret;
  510. mt9m111_try_fmt(sd, mf);
  511. fmt = mt9m111_find_datafmt(mt9m111, mf->code);
  512. /* try_fmt() guarantees fmt != NULL && fmt->code == mf->code */
  513. ret = mt9m111_setup_geometry(mt9m111, rect, mf->width, mf->height, mf->code);
  514. if (!ret)
  515. ret = mt9m111_set_pixfmt(mt9m111, mf->code);
  516. if (!ret) {
  517. mt9m111->width = mf->width;
  518. mt9m111->height = mf->height;
  519. mt9m111->fmt = fmt;
  520. }
  521. return ret;
  522. }
  523. static int mt9m111_g_chip_ident(struct v4l2_subdev *sd,
  524. struct v4l2_dbg_chip_ident *id)
  525. {
  526. struct i2c_client *client = v4l2_get_subdevdata(sd);
  527. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  528. if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR)
  529. return -EINVAL;
  530. if (id->match.addr != client->addr)
  531. return -ENODEV;
  532. id->ident = mt9m111->model;
  533. id->revision = 0;
  534. return 0;
  535. }
  536. #ifdef CONFIG_VIDEO_ADV_DEBUG
  537. static int mt9m111_g_register(struct v4l2_subdev *sd,
  538. struct v4l2_dbg_register *reg)
  539. {
  540. struct i2c_client *client = v4l2_get_subdevdata(sd);
  541. int val;
  542. if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff)
  543. return -EINVAL;
  544. if (reg->match.addr != client->addr)
  545. return -ENODEV;
  546. val = mt9m111_reg_read(client, reg->reg);
  547. reg->size = 2;
  548. reg->val = (u64)val;
  549. if (reg->val > 0xffff)
  550. return -EIO;
  551. return 0;
  552. }
  553. static int mt9m111_s_register(struct v4l2_subdev *sd,
  554. struct v4l2_dbg_register *reg)
  555. {
  556. struct i2c_client *client = v4l2_get_subdevdata(sd);
  557. if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff)
  558. return -EINVAL;
  559. if (reg->match.addr != client->addr)
  560. return -ENODEV;
  561. if (mt9m111_reg_write(client, reg->reg, reg->val) < 0)
  562. return -EIO;
  563. return 0;
  564. }
  565. #endif
  566. static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask)
  567. {
  568. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  569. int ret;
  570. if (flip)
  571. ret = mt9m111_reg_set(client, mt9m111->ctx->read_mode, mask);
  572. else
  573. ret = mt9m111_reg_clear(client, mt9m111->ctx->read_mode, mask);
  574. return ret;
  575. }
  576. static int mt9m111_get_global_gain(struct mt9m111 *mt9m111)
  577. {
  578. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  579. int data;
  580. data = reg_read(GLOBAL_GAIN);
  581. if (data >= 0)
  582. return (data & 0x2f) * (1 << ((data >> 10) & 1)) *
  583. (1 << ((data >> 9) & 1));
  584. return data;
  585. }
  586. static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain)
  587. {
  588. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  589. u16 val;
  590. if (gain > 63 * 2 * 2)
  591. return -EINVAL;
  592. if ((gain >= 64 * 2) && (gain < 63 * 2 * 2))
  593. val = (1 << 10) | (1 << 9) | (gain / 4);
  594. else if ((gain >= 64) && (gain < 64 * 2))
  595. val = (1 << 9) | (gain / 2);
  596. else
  597. val = gain;
  598. return reg_write(GLOBAL_GAIN, val);
  599. }
  600. static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int on)
  601. {
  602. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  603. if (on)
  604. return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
  605. return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
  606. }
  607. static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on)
  608. {
  609. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  610. if (on)
  611. return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
  612. return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
  613. }
  614. static int mt9m111_s_ctrl(struct v4l2_ctrl *ctrl)
  615. {
  616. struct mt9m111 *mt9m111 = container_of(ctrl->handler,
  617. struct mt9m111, hdl);
  618. switch (ctrl->id) {
  619. case V4L2_CID_VFLIP:
  620. return mt9m111_set_flip(mt9m111, ctrl->val,
  621. MT9M111_RMB_MIRROR_ROWS);
  622. case V4L2_CID_HFLIP:
  623. return mt9m111_set_flip(mt9m111, ctrl->val,
  624. MT9M111_RMB_MIRROR_COLS);
  625. case V4L2_CID_GAIN:
  626. return mt9m111_set_global_gain(mt9m111, ctrl->val);
  627. case V4L2_CID_EXPOSURE_AUTO:
  628. return mt9m111_set_autoexposure(mt9m111, ctrl->val);
  629. case V4L2_CID_AUTO_WHITE_BALANCE:
  630. return mt9m111_set_autowhitebalance(mt9m111, ctrl->val);
  631. }
  632. return -EINVAL;
  633. }
  634. static int mt9m111_suspend(struct mt9m111 *mt9m111)
  635. {
  636. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  637. int ret;
  638. v4l2_ctrl_s_ctrl(mt9m111->gain, mt9m111_get_global_gain(mt9m111));
  639. ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
  640. if (!ret)
  641. ret = reg_set(RESET, MT9M111_RESET_RESET_SOC |
  642. MT9M111_RESET_OUTPUT_DISABLE |
  643. MT9M111_RESET_ANALOG_STANDBY);
  644. if (!ret)
  645. ret = reg_clear(RESET, MT9M111_RESET_CHIP_ENABLE);
  646. return ret;
  647. }
  648. static void mt9m111_restore_state(struct mt9m111 *mt9m111)
  649. {
  650. mt9m111_set_context(mt9m111, mt9m111->ctx);
  651. mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code);
  652. mt9m111_setup_geometry(mt9m111, &mt9m111->rect,
  653. mt9m111->width, mt9m111->height, mt9m111->fmt->code);
  654. v4l2_ctrl_handler_setup(&mt9m111->hdl);
  655. }
  656. static int mt9m111_resume(struct mt9m111 *mt9m111)
  657. {
  658. int ret = mt9m111_enable(mt9m111);
  659. if (!ret)
  660. ret = mt9m111_reset(mt9m111);
  661. if (!ret)
  662. mt9m111_restore_state(mt9m111);
  663. return ret;
  664. }
  665. static int mt9m111_init(struct mt9m111 *mt9m111)
  666. {
  667. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  668. int ret;
  669. /* Default HIGHPOWER context */
  670. mt9m111->ctx = &context_b;
  671. ret = mt9m111_enable(mt9m111);
  672. if (!ret)
  673. ret = mt9m111_reset(mt9m111);
  674. if (!ret)
  675. ret = mt9m111_set_context(mt9m111, mt9m111->ctx);
  676. if (ret)
  677. dev_err(&client->dev, "mt9m111 init failed: %d\n", ret);
  678. return ret;
  679. }
  680. /*
  681. * Interface active, can use i2c. If it fails, it can indeed mean, that
  682. * this wasn't our capture interface, so, we wait for the right one
  683. */
  684. static int mt9m111_video_probe(struct i2c_client *client)
  685. {
  686. struct mt9m111 *mt9m111 = to_mt9m111(client);
  687. s32 data;
  688. int ret;
  689. data = reg_read(CHIP_VERSION);
  690. switch (data) {
  691. case 0x143a: /* MT9M111 or MT9M131 */
  692. mt9m111->model = V4L2_IDENT_MT9M111;
  693. dev_info(&client->dev,
  694. "Detected a MT9M111/MT9M131 chip ID %x\n", data);
  695. break;
  696. case 0x148c: /* MT9M112 */
  697. mt9m111->model = V4L2_IDENT_MT9M112;
  698. dev_info(&client->dev, "Detected a MT9M112 chip ID %x\n", data);
  699. break;
  700. default:
  701. dev_err(&client->dev,
  702. "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n",
  703. data);
  704. return -ENODEV;
  705. }
  706. ret = mt9m111_init(mt9m111);
  707. if (ret)
  708. return ret;
  709. return v4l2_ctrl_handler_setup(&mt9m111->hdl);
  710. }
  711. static int mt9m111_s_power(struct v4l2_subdev *sd, int on)
  712. {
  713. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  714. struct i2c_client *client = v4l2_get_subdevdata(sd);
  715. int ret = 0;
  716. mutex_lock(&mt9m111->power_lock);
  717. /*
  718. * If the power count is modified from 0 to != 0 or from != 0 to 0,
  719. * update the power state.
  720. */
  721. if (mt9m111->power_count == !on) {
  722. if (on) {
  723. ret = mt9m111_resume(mt9m111);
  724. if (ret) {
  725. dev_err(&client->dev,
  726. "Failed to resume the sensor: %d\n", ret);
  727. goto out;
  728. }
  729. } else {
  730. mt9m111_suspend(mt9m111);
  731. }
  732. }
  733. /* Update the power count. */
  734. mt9m111->power_count += on ? 1 : -1;
  735. WARN_ON(mt9m111->power_count < 0);
  736. out:
  737. mutex_unlock(&mt9m111->power_lock);
  738. return ret;
  739. }
  740. static const struct v4l2_ctrl_ops mt9m111_ctrl_ops = {
  741. .s_ctrl = mt9m111_s_ctrl,
  742. };
  743. static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = {
  744. .g_chip_ident = mt9m111_g_chip_ident,
  745. .s_power = mt9m111_s_power,
  746. #ifdef CONFIG_VIDEO_ADV_DEBUG
  747. .g_register = mt9m111_g_register,
  748. .s_register = mt9m111_s_register,
  749. #endif
  750. };
  751. static int mt9m111_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
  752. enum v4l2_mbus_pixelcode *code)
  753. {
  754. if (index >= ARRAY_SIZE(mt9m111_colour_fmts))
  755. return -EINVAL;
  756. *code = mt9m111_colour_fmts[index].code;
  757. return 0;
  758. }
  759. static int mt9m111_g_mbus_config(struct v4l2_subdev *sd,
  760. struct v4l2_mbus_config *cfg)
  761. {
  762. struct i2c_client *client = v4l2_get_subdevdata(sd);
  763. struct soc_camera_link *icl = soc_camera_i2c_to_link(client);
  764. cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
  765. V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH |
  766. V4L2_MBUS_DATA_ACTIVE_HIGH;
  767. cfg->type = V4L2_MBUS_PARALLEL;
  768. cfg->flags = soc_camera_apply_board_flags(icl, cfg);
  769. return 0;
  770. }
  771. static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = {
  772. .s_mbus_fmt = mt9m111_s_fmt,
  773. .g_mbus_fmt = mt9m111_g_fmt,
  774. .try_mbus_fmt = mt9m111_try_fmt,
  775. .s_crop = mt9m111_s_crop,
  776. .g_crop = mt9m111_g_crop,
  777. .cropcap = mt9m111_cropcap,
  778. .enum_mbus_fmt = mt9m111_enum_fmt,
  779. .g_mbus_config = mt9m111_g_mbus_config,
  780. };
  781. static struct v4l2_subdev_ops mt9m111_subdev_ops = {
  782. .core = &mt9m111_subdev_core_ops,
  783. .video = &mt9m111_subdev_video_ops,
  784. };
  785. static int mt9m111_probe(struct i2c_client *client,
  786. const struct i2c_device_id *did)
  787. {
  788. struct mt9m111 *mt9m111;
  789. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  790. struct soc_camera_link *icl = soc_camera_i2c_to_link(client);
  791. int ret;
  792. if (!icl) {
  793. dev_err(&client->dev, "mt9m111: driver needs platform data\n");
  794. return -EINVAL;
  795. }
  796. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
  797. dev_warn(&adapter->dev,
  798. "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
  799. return -EIO;
  800. }
  801. mt9m111 = kzalloc(sizeof(struct mt9m111), GFP_KERNEL);
  802. if (!mt9m111)
  803. return -ENOMEM;
  804. v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops);
  805. v4l2_ctrl_handler_init(&mt9m111->hdl, 5);
  806. v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  807. V4L2_CID_VFLIP, 0, 1, 1, 0);
  808. v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  809. V4L2_CID_HFLIP, 0, 1, 1, 0);
  810. v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  811. V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
  812. mt9m111->gain = v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  813. V4L2_CID_GAIN, 0, 63 * 2 * 2, 1, 32);
  814. v4l2_ctrl_new_std_menu(&mt9m111->hdl,
  815. &mt9m111_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0,
  816. V4L2_EXPOSURE_AUTO);
  817. mt9m111->subdev.ctrl_handler = &mt9m111->hdl;
  818. if (mt9m111->hdl.error) {
  819. int err = mt9m111->hdl.error;
  820. kfree(mt9m111);
  821. return err;
  822. }
  823. /* Second stage probe - when a capture adapter is there */
  824. mt9m111->rect.left = MT9M111_MIN_DARK_COLS;
  825. mt9m111->rect.top = MT9M111_MIN_DARK_ROWS;
  826. mt9m111->rect.width = MT9M111_MAX_WIDTH;
  827. mt9m111->rect.height = MT9M111_MAX_HEIGHT;
  828. mt9m111->fmt = &mt9m111_colour_fmts[0];
  829. mt9m111->lastpage = -1;
  830. mutex_init(&mt9m111->power_lock);
  831. ret = mt9m111_video_probe(client);
  832. if (ret) {
  833. v4l2_ctrl_handler_free(&mt9m111->hdl);
  834. kfree(mt9m111);
  835. }
  836. return ret;
  837. }
  838. static int mt9m111_remove(struct i2c_client *client)
  839. {
  840. struct mt9m111 *mt9m111 = to_mt9m111(client);
  841. v4l2_device_unregister_subdev(&mt9m111->subdev);
  842. v4l2_ctrl_handler_free(&mt9m111->hdl);
  843. kfree(mt9m111);
  844. return 0;
  845. }
  846. static const struct i2c_device_id mt9m111_id[] = {
  847. { "mt9m111", 0 },
  848. { }
  849. };
  850. MODULE_DEVICE_TABLE(i2c, mt9m111_id);
  851. static struct i2c_driver mt9m111_i2c_driver = {
  852. .driver = {
  853. .name = "mt9m111",
  854. },
  855. .probe = mt9m111_probe,
  856. .remove = mt9m111_remove,
  857. .id_table = mt9m111_id,
  858. };
  859. module_i2c_driver(mt9m111_i2c_driver);
  860. MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver");
  861. MODULE_AUTHOR("Robert Jarzmik");
  862. MODULE_LICENSE("GPL");