ov519.c 134 KB

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  1. /**
  2. * OV519 driver
  3. *
  4. * Copyright (C) 2008-2011 Jean-François Moine <moinejf@free.fr>
  5. * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
  6. *
  7. * This module is adapted from the ov51x-jpeg package, which itself
  8. * was adapted from the ov511 driver.
  9. *
  10. * Original copyright for the ov511 driver is:
  11. *
  12. * Copyright (c) 1999-2006 Mark W. McClelland
  13. * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
  14. * Many improvements by Bret Wallach <bwallac1@san.rr.com>
  15. * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
  16. * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
  17. * Changes by Claudio Matsuoka <claudio@conectiva.com>
  18. *
  19. * ov51x-jpeg original copyright is:
  20. *
  21. * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
  22. * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
  23. *
  24. * This program is free software; you can redistribute it and/or modify
  25. * it under the terms of the GNU General Public License as published by
  26. * the Free Software Foundation; either version 2 of the License, or
  27. * any later version.
  28. *
  29. * This program is distributed in the hope that it will be useful,
  30. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  31. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  32. * GNU General Public License for more details.
  33. *
  34. * You should have received a copy of the GNU General Public License
  35. * along with this program; if not, write to the Free Software
  36. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  37. *
  38. */
  39. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  40. #define MODULE_NAME "ov519"
  41. #include <linux/input.h>
  42. #include "gspca.h"
  43. /* The jpeg_hdr is used by w996Xcf only */
  44. /* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
  45. #define CONEX_CAM
  46. #include "jpeg.h"
  47. MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
  48. MODULE_DESCRIPTION("OV519 USB Camera Driver");
  49. MODULE_LICENSE("GPL");
  50. /* global parameters */
  51. static int frame_rate;
  52. /* Number of times to retry a failed I2C transaction. Increase this if you
  53. * are getting "Failed to read sensor ID..." */
  54. static int i2c_detect_tries = 10;
  55. /* controls */
  56. enum e_ctrl {
  57. BRIGHTNESS,
  58. CONTRAST,
  59. EXPOSURE,
  60. COLORS,
  61. HFLIP,
  62. VFLIP,
  63. AUTOBRIGHT,
  64. AUTOGAIN,
  65. FREQ,
  66. NCTRL /* number of controls */
  67. };
  68. /* ov519 device descriptor */
  69. struct sd {
  70. struct gspca_dev gspca_dev; /* !! must be the first item */
  71. struct gspca_ctrl ctrls[NCTRL];
  72. u8 packet_nr;
  73. char bridge;
  74. #define BRIDGE_OV511 0
  75. #define BRIDGE_OV511PLUS 1
  76. #define BRIDGE_OV518 2
  77. #define BRIDGE_OV518PLUS 3
  78. #define BRIDGE_OV519 4 /* = ov530 */
  79. #define BRIDGE_OVFX2 5
  80. #define BRIDGE_W9968CF 6
  81. #define BRIDGE_MASK 7
  82. char invert_led;
  83. #define BRIDGE_INVERT_LED 8
  84. char snapshot_pressed;
  85. char snapshot_needs_reset;
  86. /* Determined by sensor type */
  87. u8 sif;
  88. u8 quality;
  89. #define QUALITY_MIN 50
  90. #define QUALITY_MAX 70
  91. #define QUALITY_DEF 50
  92. u8 stopped; /* Streaming is temporarily paused */
  93. u8 first_frame;
  94. u8 frame_rate; /* current Framerate */
  95. u8 clockdiv; /* clockdiv override */
  96. s8 sensor; /* Type of image sensor chip (SEN_*) */
  97. u8 sensor_addr;
  98. u16 sensor_width;
  99. u16 sensor_height;
  100. s16 sensor_reg_cache[256];
  101. u8 jpeg_hdr[JPEG_HDR_SZ];
  102. };
  103. enum sensors {
  104. SEN_OV2610,
  105. SEN_OV2610AE,
  106. SEN_OV3610,
  107. SEN_OV6620,
  108. SEN_OV6630,
  109. SEN_OV66308AF,
  110. SEN_OV7610,
  111. SEN_OV7620,
  112. SEN_OV7620AE,
  113. SEN_OV7640,
  114. SEN_OV7648,
  115. SEN_OV7660,
  116. SEN_OV7670,
  117. SEN_OV76BE,
  118. SEN_OV8610,
  119. SEN_OV9600,
  120. };
  121. /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
  122. the ov sensors which is already present here. When we have the time we
  123. really should move the sensor drivers to v4l2 sub drivers. */
  124. #include "w996Xcf.c"
  125. /* V4L2 controls supported by the driver */
  126. static void setbrightness(struct gspca_dev *gspca_dev);
  127. static void setcontrast(struct gspca_dev *gspca_dev);
  128. static void setexposure(struct gspca_dev *gspca_dev);
  129. static void setcolors(struct gspca_dev *gspca_dev);
  130. static void sethvflip(struct gspca_dev *gspca_dev);
  131. static void setautobright(struct gspca_dev *gspca_dev);
  132. static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val);
  133. static void setfreq(struct gspca_dev *gspca_dev);
  134. static void setfreq_i(struct sd *sd);
  135. static const struct ctrl sd_ctrls[] = {
  136. [BRIGHTNESS] = {
  137. {
  138. .id = V4L2_CID_BRIGHTNESS,
  139. .type = V4L2_CTRL_TYPE_INTEGER,
  140. .name = "Brightness",
  141. .minimum = 0,
  142. .maximum = 255,
  143. .step = 1,
  144. .default_value = 127,
  145. },
  146. .set_control = setbrightness,
  147. },
  148. [CONTRAST] = {
  149. {
  150. .id = V4L2_CID_CONTRAST,
  151. .type = V4L2_CTRL_TYPE_INTEGER,
  152. .name = "Contrast",
  153. .minimum = 0,
  154. .maximum = 255,
  155. .step = 1,
  156. .default_value = 127,
  157. },
  158. .set_control = setcontrast,
  159. },
  160. [EXPOSURE] = {
  161. {
  162. .id = V4L2_CID_EXPOSURE,
  163. .type = V4L2_CTRL_TYPE_INTEGER,
  164. .name = "Exposure",
  165. .minimum = 0,
  166. .maximum = 255,
  167. .step = 1,
  168. .default_value = 127,
  169. },
  170. .set_control = setexposure,
  171. },
  172. [COLORS] = {
  173. {
  174. .id = V4L2_CID_SATURATION,
  175. .type = V4L2_CTRL_TYPE_INTEGER,
  176. .name = "Color",
  177. .minimum = 0,
  178. .maximum = 255,
  179. .step = 1,
  180. .default_value = 127,
  181. },
  182. .set_control = setcolors,
  183. },
  184. /* The flip controls work for sensors ov7660 and ov7670 only */
  185. [HFLIP] = {
  186. {
  187. .id = V4L2_CID_HFLIP,
  188. .type = V4L2_CTRL_TYPE_BOOLEAN,
  189. .name = "Mirror",
  190. .minimum = 0,
  191. .maximum = 1,
  192. .step = 1,
  193. .default_value = 0,
  194. },
  195. .set_control = sethvflip,
  196. },
  197. [VFLIP] = {
  198. {
  199. .id = V4L2_CID_VFLIP,
  200. .type = V4L2_CTRL_TYPE_BOOLEAN,
  201. .name = "Vflip",
  202. .minimum = 0,
  203. .maximum = 1,
  204. .step = 1,
  205. .default_value = 0,
  206. },
  207. .set_control = sethvflip,
  208. },
  209. [AUTOBRIGHT] = {
  210. {
  211. .id = V4L2_CID_AUTOBRIGHTNESS,
  212. .type = V4L2_CTRL_TYPE_BOOLEAN,
  213. .name = "Auto Brightness",
  214. .minimum = 0,
  215. .maximum = 1,
  216. .step = 1,
  217. .default_value = 1,
  218. },
  219. .set_control = setautobright,
  220. },
  221. [AUTOGAIN] = {
  222. {
  223. .id = V4L2_CID_AUTOGAIN,
  224. .type = V4L2_CTRL_TYPE_BOOLEAN,
  225. .name = "Auto Gain",
  226. .minimum = 0,
  227. .maximum = 1,
  228. .step = 1,
  229. .default_value = 1,
  230. .flags = V4L2_CTRL_FLAG_UPDATE
  231. },
  232. .set = sd_setautogain,
  233. },
  234. [FREQ] = {
  235. {
  236. .id = V4L2_CID_POWER_LINE_FREQUENCY,
  237. .type = V4L2_CTRL_TYPE_MENU,
  238. .name = "Light frequency filter",
  239. .minimum = 0,
  240. .maximum = 2, /* 0: no flicker, 1: 50Hz, 2:60Hz, 3: auto */
  241. .step = 1,
  242. .default_value = 0,
  243. },
  244. .set_control = setfreq,
  245. },
  246. };
  247. /* table of the disabled controls */
  248. static const unsigned ctrl_dis[] = {
  249. [SEN_OV2610] = ((1 << NCTRL) - 1) /* no control */
  250. ^ ((1 << EXPOSURE) /* but exposure */
  251. | (1 << AUTOGAIN)), /* and autogain */
  252. [SEN_OV2610AE] = ((1 << NCTRL) - 1) /* no control */
  253. ^ ((1 << EXPOSURE) /* but exposure */
  254. | (1 << AUTOGAIN)), /* and autogain */
  255. [SEN_OV3610] = (1 << NCTRL) - 1, /* no control */
  256. [SEN_OV6620] = (1 << HFLIP) |
  257. (1 << VFLIP) |
  258. (1 << EXPOSURE) |
  259. (1 << AUTOGAIN),
  260. [SEN_OV6630] = (1 << HFLIP) |
  261. (1 << VFLIP) |
  262. (1 << EXPOSURE) |
  263. (1 << AUTOGAIN),
  264. [SEN_OV66308AF] = (1 << HFLIP) |
  265. (1 << VFLIP) |
  266. (1 << EXPOSURE) |
  267. (1 << AUTOGAIN),
  268. [SEN_OV7610] = (1 << HFLIP) |
  269. (1 << VFLIP) |
  270. (1 << EXPOSURE) |
  271. (1 << AUTOGAIN),
  272. [SEN_OV7620] = (1 << HFLIP) |
  273. (1 << VFLIP) |
  274. (1 << EXPOSURE) |
  275. (1 << AUTOGAIN),
  276. [SEN_OV7620AE] = (1 << HFLIP) |
  277. (1 << VFLIP) |
  278. (1 << EXPOSURE) |
  279. (1 << AUTOGAIN),
  280. [SEN_OV7640] = (1 << HFLIP) |
  281. (1 << VFLIP) |
  282. (1 << AUTOBRIGHT) |
  283. (1 << CONTRAST) |
  284. (1 << EXPOSURE) |
  285. (1 << AUTOGAIN),
  286. [SEN_OV7648] = (1 << HFLIP) |
  287. (1 << VFLIP) |
  288. (1 << AUTOBRIGHT) |
  289. (1 << CONTRAST) |
  290. (1 << EXPOSURE) |
  291. (1 << AUTOGAIN),
  292. [SEN_OV7660] = (1 << AUTOBRIGHT) |
  293. (1 << EXPOSURE) |
  294. (1 << AUTOGAIN),
  295. [SEN_OV7670] = (1 << COLORS) |
  296. (1 << AUTOBRIGHT) |
  297. (1 << EXPOSURE) |
  298. (1 << AUTOGAIN),
  299. [SEN_OV76BE] = (1 << HFLIP) |
  300. (1 << VFLIP) |
  301. (1 << EXPOSURE) |
  302. (1 << AUTOGAIN),
  303. [SEN_OV8610] = (1 << HFLIP) |
  304. (1 << VFLIP) |
  305. (1 << EXPOSURE) |
  306. (1 << AUTOGAIN) |
  307. (1 << FREQ),
  308. [SEN_OV9600] = ((1 << NCTRL) - 1) /* no control */
  309. ^ ((1 << EXPOSURE) /* but exposure */
  310. | (1 << AUTOGAIN)), /* and autogain */
  311. };
  312. static const struct v4l2_pix_format ov519_vga_mode[] = {
  313. {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  314. .bytesperline = 320,
  315. .sizeimage = 320 * 240 * 3 / 8 + 590,
  316. .colorspace = V4L2_COLORSPACE_JPEG,
  317. .priv = 1},
  318. {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  319. .bytesperline = 640,
  320. .sizeimage = 640 * 480 * 3 / 8 + 590,
  321. .colorspace = V4L2_COLORSPACE_JPEG,
  322. .priv = 0},
  323. };
  324. static const struct v4l2_pix_format ov519_sif_mode[] = {
  325. {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  326. .bytesperline = 160,
  327. .sizeimage = 160 * 120 * 3 / 8 + 590,
  328. .colorspace = V4L2_COLORSPACE_JPEG,
  329. .priv = 3},
  330. {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  331. .bytesperline = 176,
  332. .sizeimage = 176 * 144 * 3 / 8 + 590,
  333. .colorspace = V4L2_COLORSPACE_JPEG,
  334. .priv = 1},
  335. {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  336. .bytesperline = 320,
  337. .sizeimage = 320 * 240 * 3 / 8 + 590,
  338. .colorspace = V4L2_COLORSPACE_JPEG,
  339. .priv = 2},
  340. {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  341. .bytesperline = 352,
  342. .sizeimage = 352 * 288 * 3 / 8 + 590,
  343. .colorspace = V4L2_COLORSPACE_JPEG,
  344. .priv = 0},
  345. };
  346. /* Note some of the sizeimage values for the ov511 / ov518 may seem
  347. larger then necessary, however they need to be this big as the ov511 /
  348. ov518 always fills the entire isoc frame, using 0 padding bytes when
  349. it doesn't have any data. So with low framerates the amount of data
  350. transferred can become quite large (libv4l will remove all the 0 padding
  351. in userspace). */
  352. static const struct v4l2_pix_format ov518_vga_mode[] = {
  353. {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  354. .bytesperline = 320,
  355. .sizeimage = 320 * 240 * 3,
  356. .colorspace = V4L2_COLORSPACE_JPEG,
  357. .priv = 1},
  358. {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  359. .bytesperline = 640,
  360. .sizeimage = 640 * 480 * 2,
  361. .colorspace = V4L2_COLORSPACE_JPEG,
  362. .priv = 0},
  363. };
  364. static const struct v4l2_pix_format ov518_sif_mode[] = {
  365. {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  366. .bytesperline = 160,
  367. .sizeimage = 70000,
  368. .colorspace = V4L2_COLORSPACE_JPEG,
  369. .priv = 3},
  370. {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  371. .bytesperline = 176,
  372. .sizeimage = 70000,
  373. .colorspace = V4L2_COLORSPACE_JPEG,
  374. .priv = 1},
  375. {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  376. .bytesperline = 320,
  377. .sizeimage = 320 * 240 * 3,
  378. .colorspace = V4L2_COLORSPACE_JPEG,
  379. .priv = 2},
  380. {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  381. .bytesperline = 352,
  382. .sizeimage = 352 * 288 * 3,
  383. .colorspace = V4L2_COLORSPACE_JPEG,
  384. .priv = 0},
  385. };
  386. static const struct v4l2_pix_format ov511_vga_mode[] = {
  387. {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
  388. .bytesperline = 320,
  389. .sizeimage = 320 * 240 * 3,
  390. .colorspace = V4L2_COLORSPACE_JPEG,
  391. .priv = 1},
  392. {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
  393. .bytesperline = 640,
  394. .sizeimage = 640 * 480 * 2,
  395. .colorspace = V4L2_COLORSPACE_JPEG,
  396. .priv = 0},
  397. };
  398. static const struct v4l2_pix_format ov511_sif_mode[] = {
  399. {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
  400. .bytesperline = 160,
  401. .sizeimage = 70000,
  402. .colorspace = V4L2_COLORSPACE_JPEG,
  403. .priv = 3},
  404. {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
  405. .bytesperline = 176,
  406. .sizeimage = 70000,
  407. .colorspace = V4L2_COLORSPACE_JPEG,
  408. .priv = 1},
  409. {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
  410. .bytesperline = 320,
  411. .sizeimage = 320 * 240 * 3,
  412. .colorspace = V4L2_COLORSPACE_JPEG,
  413. .priv = 2},
  414. {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
  415. .bytesperline = 352,
  416. .sizeimage = 352 * 288 * 3,
  417. .colorspace = V4L2_COLORSPACE_JPEG,
  418. .priv = 0},
  419. };
  420. static const struct v4l2_pix_format ovfx2_vga_mode[] = {
  421. {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  422. .bytesperline = 320,
  423. .sizeimage = 320 * 240,
  424. .colorspace = V4L2_COLORSPACE_SRGB,
  425. .priv = 1},
  426. {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  427. .bytesperline = 640,
  428. .sizeimage = 640 * 480,
  429. .colorspace = V4L2_COLORSPACE_SRGB,
  430. .priv = 0},
  431. };
  432. static const struct v4l2_pix_format ovfx2_cif_mode[] = {
  433. {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  434. .bytesperline = 160,
  435. .sizeimage = 160 * 120,
  436. .colorspace = V4L2_COLORSPACE_SRGB,
  437. .priv = 3},
  438. {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  439. .bytesperline = 176,
  440. .sizeimage = 176 * 144,
  441. .colorspace = V4L2_COLORSPACE_SRGB,
  442. .priv = 1},
  443. {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  444. .bytesperline = 320,
  445. .sizeimage = 320 * 240,
  446. .colorspace = V4L2_COLORSPACE_SRGB,
  447. .priv = 2},
  448. {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  449. .bytesperline = 352,
  450. .sizeimage = 352 * 288,
  451. .colorspace = V4L2_COLORSPACE_SRGB,
  452. .priv = 0},
  453. };
  454. static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
  455. {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  456. .bytesperline = 800,
  457. .sizeimage = 800 * 600,
  458. .colorspace = V4L2_COLORSPACE_SRGB,
  459. .priv = 1},
  460. {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  461. .bytesperline = 1600,
  462. .sizeimage = 1600 * 1200,
  463. .colorspace = V4L2_COLORSPACE_SRGB},
  464. };
  465. static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
  466. {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  467. .bytesperline = 640,
  468. .sizeimage = 640 * 480,
  469. .colorspace = V4L2_COLORSPACE_SRGB,
  470. .priv = 1},
  471. {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  472. .bytesperline = 800,
  473. .sizeimage = 800 * 600,
  474. .colorspace = V4L2_COLORSPACE_SRGB,
  475. .priv = 1},
  476. {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  477. .bytesperline = 1024,
  478. .sizeimage = 1024 * 768,
  479. .colorspace = V4L2_COLORSPACE_SRGB,
  480. .priv = 1},
  481. {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  482. .bytesperline = 1600,
  483. .sizeimage = 1600 * 1200,
  484. .colorspace = V4L2_COLORSPACE_SRGB,
  485. .priv = 0},
  486. {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  487. .bytesperline = 2048,
  488. .sizeimage = 2048 * 1536,
  489. .colorspace = V4L2_COLORSPACE_SRGB,
  490. .priv = 0},
  491. };
  492. static const struct v4l2_pix_format ovfx2_ov9600_mode[] = {
  493. {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  494. .bytesperline = 640,
  495. .sizeimage = 640 * 480,
  496. .colorspace = V4L2_COLORSPACE_SRGB,
  497. .priv = 1},
  498. {1280, 1024, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  499. .bytesperline = 1280,
  500. .sizeimage = 1280 * 1024,
  501. .colorspace = V4L2_COLORSPACE_SRGB},
  502. };
  503. /* Registers common to OV511 / OV518 */
  504. #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
  505. #define R51x_SYS_RESET 0x50
  506. /* Reset type flags */
  507. #define OV511_RESET_OMNICE 0x08
  508. #define R51x_SYS_INIT 0x53
  509. #define R51x_SYS_SNAP 0x52
  510. #define R51x_SYS_CUST_ID 0x5f
  511. #define R51x_COMP_LUT_BEGIN 0x80
  512. /* OV511 Camera interface register numbers */
  513. #define R511_CAM_DELAY 0x10
  514. #define R511_CAM_EDGE 0x11
  515. #define R511_CAM_PXCNT 0x12
  516. #define R511_CAM_LNCNT 0x13
  517. #define R511_CAM_PXDIV 0x14
  518. #define R511_CAM_LNDIV 0x15
  519. #define R511_CAM_UV_EN 0x16
  520. #define R511_CAM_LINE_MODE 0x17
  521. #define R511_CAM_OPTS 0x18
  522. #define R511_SNAP_FRAME 0x19
  523. #define R511_SNAP_PXCNT 0x1a
  524. #define R511_SNAP_LNCNT 0x1b
  525. #define R511_SNAP_PXDIV 0x1c
  526. #define R511_SNAP_LNDIV 0x1d
  527. #define R511_SNAP_UV_EN 0x1e
  528. #define R511_SNAP_OPTS 0x1f
  529. #define R511_DRAM_FLOW_CTL 0x20
  530. #define R511_FIFO_OPTS 0x31
  531. #define R511_I2C_CTL 0x40
  532. #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
  533. #define R511_COMP_EN 0x78
  534. #define R511_COMP_LUT_EN 0x79
  535. /* OV518 Camera interface register numbers */
  536. #define R518_GPIO_OUT 0x56 /* OV518(+) only */
  537. #define R518_GPIO_CTL 0x57 /* OV518(+) only */
  538. /* OV519 Camera interface register numbers */
  539. #define OV519_R10_H_SIZE 0x10
  540. #define OV519_R11_V_SIZE 0x11
  541. #define OV519_R12_X_OFFSETL 0x12
  542. #define OV519_R13_X_OFFSETH 0x13
  543. #define OV519_R14_Y_OFFSETL 0x14
  544. #define OV519_R15_Y_OFFSETH 0x15
  545. #define OV519_R16_DIVIDER 0x16
  546. #define OV519_R20_DFR 0x20
  547. #define OV519_R25_FORMAT 0x25
  548. /* OV519 System Controller register numbers */
  549. #define OV519_R51_RESET1 0x51
  550. #define OV519_R54_EN_CLK1 0x54
  551. #define OV519_R57_SNAPSHOT 0x57
  552. #define OV519_GPIO_DATA_OUT0 0x71
  553. #define OV519_GPIO_IO_CTRL0 0x72
  554. /*#define OV511_ENDPOINT_ADDRESS 1 * Isoc endpoint number */
  555. /*
  556. * The FX2 chip does not give us a zero length read at end of frame.
  557. * It does, however, give a short read at the end of a frame, if
  558. * necessary, rather than run two frames together.
  559. *
  560. * By choosing the right bulk transfer size, we are guaranteed to always
  561. * get a short read for the last read of each frame. Frame sizes are
  562. * always a composite number (width * height, or a multiple) so if we
  563. * choose a prime number, we are guaranteed that the last read of a
  564. * frame will be short.
  565. *
  566. * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
  567. * otherwise EOVERFLOW "babbling" errors occur. I have not been able
  568. * to figure out why. [PMiller]
  569. *
  570. * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
  571. *
  572. * It isn't enough to know the number of bytes per frame, in case we
  573. * have data dropouts or buffer overruns (even though the FX2 double
  574. * buffers, there are some pretty strict real time constraints for
  575. * isochronous transfer for larger frame sizes).
  576. */
  577. /*jfm: this value does not work for 800x600 - see isoc_init */
  578. #define OVFX2_BULK_SIZE (13 * 4096)
  579. /* I2C registers */
  580. #define R51x_I2C_W_SID 0x41
  581. #define R51x_I2C_SADDR_3 0x42
  582. #define R51x_I2C_SADDR_2 0x43
  583. #define R51x_I2C_R_SID 0x44
  584. #define R51x_I2C_DATA 0x45
  585. #define R518_I2C_CTL 0x47 /* OV518(+) only */
  586. #define OVFX2_I2C_ADDR 0x00
  587. /* I2C ADDRESSES */
  588. #define OV7xx0_SID 0x42
  589. #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
  590. #define OV8xx0_SID 0xa0
  591. #define OV6xx0_SID 0xc0
  592. /* OV7610 registers */
  593. #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
  594. #define OV7610_REG_BLUE 0x01 /* blue channel balance */
  595. #define OV7610_REG_RED 0x02 /* red channel balance */
  596. #define OV7610_REG_SAT 0x03 /* saturation */
  597. #define OV8610_REG_HUE 0x04 /* 04 reserved */
  598. #define OV7610_REG_CNT 0x05 /* Y contrast */
  599. #define OV7610_REG_BRT 0x06 /* Y brightness */
  600. #define OV7610_REG_COM_C 0x14 /* misc common regs */
  601. #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
  602. #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
  603. #define OV7610_REG_COM_I 0x29 /* misc settings */
  604. /* OV7660 and OV7670 registers */
  605. #define OV7670_R00_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
  606. #define OV7670_R01_BLUE 0x01 /* blue gain */
  607. #define OV7670_R02_RED 0x02 /* red gain */
  608. #define OV7670_R03_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
  609. #define OV7670_R04_COM1 0x04 /* Control 1 */
  610. /*#define OV7670_R07_AECHH 0x07 * AEC MS 5 bits */
  611. #define OV7670_R0C_COM3 0x0c /* Control 3 */
  612. #define OV7670_R0D_COM4 0x0d /* Control 4 */
  613. #define OV7670_R0E_COM5 0x0e /* All "reserved" */
  614. #define OV7670_R0F_COM6 0x0f /* Control 6 */
  615. #define OV7670_R10_AECH 0x10 /* More bits of AEC value */
  616. #define OV7670_R11_CLKRC 0x11 /* Clock control */
  617. #define OV7670_R12_COM7 0x12 /* Control 7 */
  618. #define OV7670_COM7_FMT_VGA 0x00
  619. /*#define OV7670_COM7_YUV 0x00 * YUV */
  620. #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
  621. #define OV7670_COM7_FMT_MASK 0x38
  622. #define OV7670_COM7_RESET 0x80 /* Register reset */
  623. #define OV7670_R13_COM8 0x13 /* Control 8 */
  624. #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
  625. #define OV7670_COM8_AWB 0x02 /* White balance enable */
  626. #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
  627. #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
  628. #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
  629. #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
  630. #define OV7670_R14_COM9 0x14 /* Control 9 - gain ceiling */
  631. #define OV7670_R15_COM10 0x15 /* Control 10 */
  632. #define OV7670_R17_HSTART 0x17 /* Horiz start high bits */
  633. #define OV7670_R18_HSTOP 0x18 /* Horiz stop high bits */
  634. #define OV7670_R19_VSTART 0x19 /* Vert start high bits */
  635. #define OV7670_R1A_VSTOP 0x1a /* Vert stop high bits */
  636. #define OV7670_R1E_MVFP 0x1e /* Mirror / vflip */
  637. #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
  638. #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
  639. #define OV7670_R24_AEW 0x24 /* AGC upper limit */
  640. #define OV7670_R25_AEB 0x25 /* AGC lower limit */
  641. #define OV7670_R26_VPT 0x26 /* AGC/AEC fast mode op region */
  642. #define OV7670_R32_HREF 0x32 /* HREF pieces */
  643. #define OV7670_R3A_TSLB 0x3a /* lots of stuff */
  644. #define OV7670_R3B_COM11 0x3b /* Control 11 */
  645. #define OV7670_COM11_EXP 0x02
  646. #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
  647. #define OV7670_R3C_COM12 0x3c /* Control 12 */
  648. #define OV7670_R3D_COM13 0x3d /* Control 13 */
  649. #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
  650. #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
  651. #define OV7670_R3E_COM14 0x3e /* Control 14 */
  652. #define OV7670_R3F_EDGE 0x3f /* Edge enhancement factor */
  653. #define OV7670_R40_COM15 0x40 /* Control 15 */
  654. /*#define OV7670_COM15_R00FF 0xc0 * 00 to FF */
  655. #define OV7670_R41_COM16 0x41 /* Control 16 */
  656. #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
  657. /* end of ov7660 common registers */
  658. #define OV7670_R55_BRIGHT 0x55 /* Brightness */
  659. #define OV7670_R56_CONTRAS 0x56 /* Contrast control */
  660. #define OV7670_R69_GFIX 0x69 /* Fix gain control */
  661. /*#define OV7670_R8C_RGB444 0x8c * RGB 444 control */
  662. #define OV7670_R9F_HAECC1 0x9f /* Hist AEC/AGC control 1 */
  663. #define OV7670_RA0_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
  664. #define OV7670_RA5_BD50MAX 0xa5 /* 50hz banding step limit */
  665. #define OV7670_RA6_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
  666. #define OV7670_RA7_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
  667. #define OV7670_RA8_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
  668. #define OV7670_RA9_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
  669. #define OV7670_RAA_HAECC7 0xaa /* Hist AEC/AGC control 7 */
  670. #define OV7670_RAB_BD60MAX 0xab /* 60hz banding step limit */
  671. struct ov_regvals {
  672. u8 reg;
  673. u8 val;
  674. };
  675. struct ov_i2c_regvals {
  676. u8 reg;
  677. u8 val;
  678. };
  679. /* Settings for OV2610 camera chip */
  680. static const struct ov_i2c_regvals norm_2610[] = {
  681. { 0x12, 0x80 }, /* reset */
  682. };
  683. static const struct ov_i2c_regvals norm_2610ae[] = {
  684. {0x12, 0x80}, /* reset */
  685. {0x13, 0xcd},
  686. {0x09, 0x01},
  687. {0x0d, 0x00},
  688. {0x11, 0x80},
  689. {0x12, 0x20}, /* 1600x1200 */
  690. {0x33, 0x0c},
  691. {0x35, 0x90},
  692. {0x36, 0x37},
  693. /* ms-win traces */
  694. {0x11, 0x83}, /* clock / 3 ? */
  695. {0x2d, 0x00}, /* 60 Hz filter */
  696. {0x24, 0xb0}, /* normal colors */
  697. {0x25, 0x90},
  698. {0x10, 0x43},
  699. };
  700. static const struct ov_i2c_regvals norm_3620b[] = {
  701. /*
  702. * From the datasheet: "Note that after writing to register COMH
  703. * (0x12) to change the sensor mode, registers related to the
  704. * sensor’s cropping window will be reset back to their default
  705. * values."
  706. *
  707. * "wait 4096 external clock ... to make sure the sensor is
  708. * stable and ready to access registers" i.e. 160us at 24MHz
  709. */
  710. { 0x12, 0x80 }, /* COMH reset */
  711. { 0x12, 0x00 }, /* QXGA, master */
  712. /*
  713. * 11 CLKRC "Clock Rate Control"
  714. * [7] internal frequency doublers: on
  715. * [6] video port mode: master
  716. * [5:0] clock divider: 1
  717. */
  718. { 0x11, 0x80 },
  719. /*
  720. * 13 COMI "Common Control I"
  721. * = 192 (0xC0) 11000000
  722. * COMI[7] "AEC speed selection"
  723. * = 1 (0x01) 1....... "Faster AEC correction"
  724. * COMI[6] "AEC speed step selection"
  725. * = 1 (0x01) .1...... "Big steps, fast"
  726. * COMI[5] "Banding filter on off"
  727. * = 0 (0x00) ..0..... "Off"
  728. * COMI[4] "Banding filter option"
  729. * = 0 (0x00) ...0.... "Main clock is 48 MHz and
  730. * the PLL is ON"
  731. * COMI[3] "Reserved"
  732. * = 0 (0x00) ....0...
  733. * COMI[2] "AGC auto manual control selection"
  734. * = 0 (0x00) .....0.. "Manual"
  735. * COMI[1] "AWB auto manual control selection"
  736. * = 0 (0x00) ......0. "Manual"
  737. * COMI[0] "Exposure control"
  738. * = 0 (0x00) .......0 "Manual"
  739. */
  740. { 0x13, 0xc0 },
  741. /*
  742. * 09 COMC "Common Control C"
  743. * = 8 (0x08) 00001000
  744. * COMC[7:5] "Reserved"
  745. * = 0 (0x00) 000.....
  746. * COMC[4] "Sleep Mode Enable"
  747. * = 0 (0x00) ...0.... "Normal mode"
  748. * COMC[3:2] "Sensor sampling reset timing selection"
  749. * = 2 (0x02) ....10.. "Longer reset time"
  750. * COMC[1:0] "Output drive current select"
  751. * = 0 (0x00) ......00 "Weakest"
  752. */
  753. { 0x09, 0x08 },
  754. /*
  755. * 0C COMD "Common Control D"
  756. * = 8 (0x08) 00001000
  757. * COMD[7] "Reserved"
  758. * = 0 (0x00) 0.......
  759. * COMD[6] "Swap MSB and LSB at the output port"
  760. * = 0 (0x00) .0...... "False"
  761. * COMD[5:3] "Reserved"
  762. * = 1 (0x01) ..001...
  763. * COMD[2] "Output Average On Off"
  764. * = 0 (0x00) .....0.. "Output Normal"
  765. * COMD[1] "Sensor precharge voltage selection"
  766. * = 0 (0x00) ......0. "Selects internal
  767. * reference precharge
  768. * voltage"
  769. * COMD[0] "Snapshot option"
  770. * = 0 (0x00) .......0 "Enable live video output
  771. * after snapshot sequence"
  772. */
  773. { 0x0c, 0x08 },
  774. /*
  775. * 0D COME "Common Control E"
  776. * = 161 (0xA1) 10100001
  777. * COME[7] "Output average option"
  778. * = 1 (0x01) 1....... "Output average of 4 pixels"
  779. * COME[6] "Anti-blooming control"
  780. * = 0 (0x00) .0...... "Off"
  781. * COME[5:3] "Reserved"
  782. * = 4 (0x04) ..100...
  783. * COME[2] "Clock output power down pin status"
  784. * = 0 (0x00) .....0.. "Tri-state data output pin
  785. * on power down"
  786. * COME[1] "Data output pin status selection at power down"
  787. * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
  788. * HREF, and CHSYNC pins on
  789. * power down"
  790. * COME[0] "Auto zero circuit select"
  791. * = 1 (0x01) .......1 "On"
  792. */
  793. { 0x0d, 0xa1 },
  794. /*
  795. * 0E COMF "Common Control F"
  796. * = 112 (0x70) 01110000
  797. * COMF[7] "System clock selection"
  798. * = 0 (0x00) 0....... "Use 24 MHz system clock"
  799. * COMF[6:4] "Reserved"
  800. * = 7 (0x07) .111....
  801. * COMF[3] "Manual auto negative offset canceling selection"
  802. * = 0 (0x00) ....0... "Auto detect negative
  803. * offset and cancel it"
  804. * COMF[2:0] "Reserved"
  805. * = 0 (0x00) .....000
  806. */
  807. { 0x0e, 0x70 },
  808. /*
  809. * 0F COMG "Common Control G"
  810. * = 66 (0x42) 01000010
  811. * COMG[7] "Optical black output selection"
  812. * = 0 (0x00) 0....... "Disable"
  813. * COMG[6] "Black level calibrate selection"
  814. * = 1 (0x01) .1...... "Use optical black pixels
  815. * to calibrate"
  816. * COMG[5:4] "Reserved"
  817. * = 0 (0x00) ..00....
  818. * COMG[3] "Channel offset adjustment"
  819. * = 0 (0x00) ....0... "Disable offset adjustment"
  820. * COMG[2] "ADC black level calibration option"
  821. * = 0 (0x00) .....0.. "Use B/G line and G/R
  822. * line to calibrate each
  823. * channel's black level"
  824. * COMG[1] "Reserved"
  825. * = 1 (0x01) ......1.
  826. * COMG[0] "ADC black level calibration enable"
  827. * = 0 (0x00) .......0 "Disable"
  828. */
  829. { 0x0f, 0x42 },
  830. /*
  831. * 14 COMJ "Common Control J"
  832. * = 198 (0xC6) 11000110
  833. * COMJ[7:6] "AGC gain ceiling"
  834. * = 3 (0x03) 11...... "8x"
  835. * COMJ[5:4] "Reserved"
  836. * = 0 (0x00) ..00....
  837. * COMJ[3] "Auto banding filter"
  838. * = 0 (0x00) ....0... "Banding filter is always
  839. * on off depending on
  840. * COMI[5] setting"
  841. * COMJ[2] "VSYNC drop option"
  842. * = 1 (0x01) .....1.. "SYNC is dropped if frame
  843. * data is dropped"
  844. * COMJ[1] "Frame data drop"
  845. * = 1 (0x01) ......1. "Drop frame data if
  846. * exposure is not within
  847. * tolerance. In AEC mode,
  848. * data is normally dropped
  849. * when data is out of
  850. * range."
  851. * COMJ[0] "Reserved"
  852. * = 0 (0x00) .......0
  853. */
  854. { 0x14, 0xc6 },
  855. /*
  856. * 15 COMK "Common Control K"
  857. * = 2 (0x02) 00000010
  858. * COMK[7] "CHSYNC pin output swap"
  859. * = 0 (0x00) 0....... "CHSYNC"
  860. * COMK[6] "HREF pin output swap"
  861. * = 0 (0x00) .0...... "HREF"
  862. * COMK[5] "PCLK output selection"
  863. * = 0 (0x00) ..0..... "PCLK always output"
  864. * COMK[4] "PCLK edge selection"
  865. * = 0 (0x00) ...0.... "Data valid on falling edge"
  866. * COMK[3] "HREF output polarity"
  867. * = 0 (0x00) ....0... "positive"
  868. * COMK[2] "Reserved"
  869. * = 0 (0x00) .....0..
  870. * COMK[1] "VSYNC polarity"
  871. * = 1 (0x01) ......1. "negative"
  872. * COMK[0] "HSYNC polarity"
  873. * = 0 (0x00) .......0 "positive"
  874. */
  875. { 0x15, 0x02 },
  876. /*
  877. * 33 CHLF "Current Control"
  878. * = 9 (0x09) 00001001
  879. * CHLF[7:6] "Sensor current control"
  880. * = 0 (0x00) 00......
  881. * CHLF[5] "Sensor current range control"
  882. * = 0 (0x00) ..0..... "normal range"
  883. * CHLF[4] "Sensor current"
  884. * = 0 (0x00) ...0.... "normal current"
  885. * CHLF[3] "Sensor buffer current control"
  886. * = 1 (0x01) ....1... "half current"
  887. * CHLF[2] "Column buffer current control"
  888. * = 0 (0x00) .....0.. "normal current"
  889. * CHLF[1] "Analog DSP current control"
  890. * = 0 (0x00) ......0. "normal current"
  891. * CHLF[1] "ADC current control"
  892. * = 0 (0x00) ......0. "normal current"
  893. */
  894. { 0x33, 0x09 },
  895. /*
  896. * 34 VBLM "Blooming Control"
  897. * = 80 (0x50) 01010000
  898. * VBLM[7] "Hard soft reset switch"
  899. * = 0 (0x00) 0....... "Hard reset"
  900. * VBLM[6:4] "Blooming voltage selection"
  901. * = 5 (0x05) .101....
  902. * VBLM[3:0] "Sensor current control"
  903. * = 0 (0x00) ....0000
  904. */
  905. { 0x34, 0x50 },
  906. /*
  907. * 36 VCHG "Sensor Precharge Voltage Control"
  908. * = 0 (0x00) 00000000
  909. * VCHG[7] "Reserved"
  910. * = 0 (0x00) 0.......
  911. * VCHG[6:4] "Sensor precharge voltage control"
  912. * = 0 (0x00) .000....
  913. * VCHG[3:0] "Sensor array common reference"
  914. * = 0 (0x00) ....0000
  915. */
  916. { 0x36, 0x00 },
  917. /*
  918. * 37 ADC "ADC Reference Control"
  919. * = 4 (0x04) 00000100
  920. * ADC[7:4] "Reserved"
  921. * = 0 (0x00) 0000....
  922. * ADC[3] "ADC input signal range"
  923. * = 0 (0x00) ....0... "Input signal 1.0x"
  924. * ADC[2:0] "ADC range control"
  925. * = 4 (0x04) .....100
  926. */
  927. { 0x37, 0x04 },
  928. /*
  929. * 38 ACOM "Analog Common Ground"
  930. * = 82 (0x52) 01010010
  931. * ACOM[7] "Analog gain control"
  932. * = 0 (0x00) 0....... "Gain 1x"
  933. * ACOM[6] "Analog black level calibration"
  934. * = 1 (0x01) .1...... "On"
  935. * ACOM[5:0] "Reserved"
  936. * = 18 (0x12) ..010010
  937. */
  938. { 0x38, 0x52 },
  939. /*
  940. * 3A FREFA "Internal Reference Adjustment"
  941. * = 0 (0x00) 00000000
  942. * FREFA[7:0] "Range"
  943. * = 0 (0x00) 00000000
  944. */
  945. { 0x3a, 0x00 },
  946. /*
  947. * 3C FVOPT "Internal Reference Adjustment"
  948. * = 31 (0x1F) 00011111
  949. * FVOPT[7:0] "Range"
  950. * = 31 (0x1F) 00011111
  951. */
  952. { 0x3c, 0x1f },
  953. /*
  954. * 44 Undocumented = 0 (0x00) 00000000
  955. * 44[7:0] "It's a secret"
  956. * = 0 (0x00) 00000000
  957. */
  958. { 0x44, 0x00 },
  959. /*
  960. * 40 Undocumented = 0 (0x00) 00000000
  961. * 40[7:0] "It's a secret"
  962. * = 0 (0x00) 00000000
  963. */
  964. { 0x40, 0x00 },
  965. /*
  966. * 41 Undocumented = 0 (0x00) 00000000
  967. * 41[7:0] "It's a secret"
  968. * = 0 (0x00) 00000000
  969. */
  970. { 0x41, 0x00 },
  971. /*
  972. * 42 Undocumented = 0 (0x00) 00000000
  973. * 42[7:0] "It's a secret"
  974. * = 0 (0x00) 00000000
  975. */
  976. { 0x42, 0x00 },
  977. /*
  978. * 43 Undocumented = 0 (0x00) 00000000
  979. * 43[7:0] "It's a secret"
  980. * = 0 (0x00) 00000000
  981. */
  982. { 0x43, 0x00 },
  983. /*
  984. * 45 Undocumented = 128 (0x80) 10000000
  985. * 45[7:0] "It's a secret"
  986. * = 128 (0x80) 10000000
  987. */
  988. { 0x45, 0x80 },
  989. /*
  990. * 48 Undocumented = 192 (0xC0) 11000000
  991. * 48[7:0] "It's a secret"
  992. * = 192 (0xC0) 11000000
  993. */
  994. { 0x48, 0xc0 },
  995. /*
  996. * 49 Undocumented = 25 (0x19) 00011001
  997. * 49[7:0] "It's a secret"
  998. * = 25 (0x19) 00011001
  999. */
  1000. { 0x49, 0x19 },
  1001. /*
  1002. * 4B Undocumented = 128 (0x80) 10000000
  1003. * 4B[7:0] "It's a secret"
  1004. * = 128 (0x80) 10000000
  1005. */
  1006. { 0x4b, 0x80 },
  1007. /*
  1008. * 4D Undocumented = 196 (0xC4) 11000100
  1009. * 4D[7:0] "It's a secret"
  1010. * = 196 (0xC4) 11000100
  1011. */
  1012. { 0x4d, 0xc4 },
  1013. /*
  1014. * 35 VREF "Reference Voltage Control"
  1015. * = 76 (0x4c) 01001100
  1016. * VREF[7:5] "Column high reference control"
  1017. * = 2 (0x02) 010..... "higher voltage"
  1018. * VREF[4:2] "Column low reference control"
  1019. * = 3 (0x03) ...011.. "Highest voltage"
  1020. * VREF[1:0] "Reserved"
  1021. * = 0 (0x00) ......00
  1022. */
  1023. { 0x35, 0x4c },
  1024. /*
  1025. * 3D Undocumented = 0 (0x00) 00000000
  1026. * 3D[7:0] "It's a secret"
  1027. * = 0 (0x00) 00000000
  1028. */
  1029. { 0x3d, 0x00 },
  1030. /*
  1031. * 3E Undocumented = 0 (0x00) 00000000
  1032. * 3E[7:0] "It's a secret"
  1033. * = 0 (0x00) 00000000
  1034. */
  1035. { 0x3e, 0x00 },
  1036. /*
  1037. * 3B FREFB "Internal Reference Adjustment"
  1038. * = 24 (0x18) 00011000
  1039. * FREFB[7:0] "Range"
  1040. * = 24 (0x18) 00011000
  1041. */
  1042. { 0x3b, 0x18 },
  1043. /*
  1044. * 33 CHLF "Current Control"
  1045. * = 25 (0x19) 00011001
  1046. * CHLF[7:6] "Sensor current control"
  1047. * = 0 (0x00) 00......
  1048. * CHLF[5] "Sensor current range control"
  1049. * = 0 (0x00) ..0..... "normal range"
  1050. * CHLF[4] "Sensor current"
  1051. * = 1 (0x01) ...1.... "double current"
  1052. * CHLF[3] "Sensor buffer current control"
  1053. * = 1 (0x01) ....1... "half current"
  1054. * CHLF[2] "Column buffer current control"
  1055. * = 0 (0x00) .....0.. "normal current"
  1056. * CHLF[1] "Analog DSP current control"
  1057. * = 0 (0x00) ......0. "normal current"
  1058. * CHLF[1] "ADC current control"
  1059. * = 0 (0x00) ......0. "normal current"
  1060. */
  1061. { 0x33, 0x19 },
  1062. /*
  1063. * 34 VBLM "Blooming Control"
  1064. * = 90 (0x5A) 01011010
  1065. * VBLM[7] "Hard soft reset switch"
  1066. * = 0 (0x00) 0....... "Hard reset"
  1067. * VBLM[6:4] "Blooming voltage selection"
  1068. * = 5 (0x05) .101....
  1069. * VBLM[3:0] "Sensor current control"
  1070. * = 10 (0x0A) ....1010
  1071. */
  1072. { 0x34, 0x5a },
  1073. /*
  1074. * 3B FREFB "Internal Reference Adjustment"
  1075. * = 0 (0x00) 00000000
  1076. * FREFB[7:0] "Range"
  1077. * = 0 (0x00) 00000000
  1078. */
  1079. { 0x3b, 0x00 },
  1080. /*
  1081. * 33 CHLF "Current Control"
  1082. * = 9 (0x09) 00001001
  1083. * CHLF[7:6] "Sensor current control"
  1084. * = 0 (0x00) 00......
  1085. * CHLF[5] "Sensor current range control"
  1086. * = 0 (0x00) ..0..... "normal range"
  1087. * CHLF[4] "Sensor current"
  1088. * = 0 (0x00) ...0.... "normal current"
  1089. * CHLF[3] "Sensor buffer current control"
  1090. * = 1 (0x01) ....1... "half current"
  1091. * CHLF[2] "Column buffer current control"
  1092. * = 0 (0x00) .....0.. "normal current"
  1093. * CHLF[1] "Analog DSP current control"
  1094. * = 0 (0x00) ......0. "normal current"
  1095. * CHLF[1] "ADC current control"
  1096. * = 0 (0x00) ......0. "normal current"
  1097. */
  1098. { 0x33, 0x09 },
  1099. /*
  1100. * 34 VBLM "Blooming Control"
  1101. * = 80 (0x50) 01010000
  1102. * VBLM[7] "Hard soft reset switch"
  1103. * = 0 (0x00) 0....... "Hard reset"
  1104. * VBLM[6:4] "Blooming voltage selection"
  1105. * = 5 (0x05) .101....
  1106. * VBLM[3:0] "Sensor current control"
  1107. * = 0 (0x00) ....0000
  1108. */
  1109. { 0x34, 0x50 },
  1110. /*
  1111. * 12 COMH "Common Control H"
  1112. * = 64 (0x40) 01000000
  1113. * COMH[7] "SRST"
  1114. * = 0 (0x00) 0....... "No-op"
  1115. * COMH[6:4] "Resolution selection"
  1116. * = 4 (0x04) .100.... "XGA"
  1117. * COMH[3] "Master slave selection"
  1118. * = 0 (0x00) ....0... "Master mode"
  1119. * COMH[2] "Internal B/R channel option"
  1120. * = 0 (0x00) .....0.. "B/R use same channel"
  1121. * COMH[1] "Color bar test pattern"
  1122. * = 0 (0x00) ......0. "Off"
  1123. * COMH[0] "Reserved"
  1124. * = 0 (0x00) .......0
  1125. */
  1126. { 0x12, 0x40 },
  1127. /*
  1128. * 17 HREFST "Horizontal window start"
  1129. * = 31 (0x1F) 00011111
  1130. * HREFST[7:0] "Horizontal window start, 8 MSBs"
  1131. * = 31 (0x1F) 00011111
  1132. */
  1133. { 0x17, 0x1f },
  1134. /*
  1135. * 18 HREFEND "Horizontal window end"
  1136. * = 95 (0x5F) 01011111
  1137. * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
  1138. * = 95 (0x5F) 01011111
  1139. */
  1140. { 0x18, 0x5f },
  1141. /*
  1142. * 19 VSTRT "Vertical window start"
  1143. * = 0 (0x00) 00000000
  1144. * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
  1145. * = 0 (0x00) 00000000
  1146. */
  1147. { 0x19, 0x00 },
  1148. /*
  1149. * 1A VEND "Vertical window end"
  1150. * = 96 (0x60) 01100000
  1151. * VEND[7:0] "Vertical Window End, 8 MSBs"
  1152. * = 96 (0x60) 01100000
  1153. */
  1154. { 0x1a, 0x60 },
  1155. /*
  1156. * 32 COMM "Common Control M"
  1157. * = 18 (0x12) 00010010
  1158. * COMM[7:6] "Pixel clock divide option"
  1159. * = 0 (0x00) 00...... "/1"
  1160. * COMM[5:3] "Horizontal window end position, 3 LSBs"
  1161. * = 2 (0x02) ..010...
  1162. * COMM[2:0] "Horizontal window start position, 3 LSBs"
  1163. * = 2 (0x02) .....010
  1164. */
  1165. { 0x32, 0x12 },
  1166. /*
  1167. * 03 COMA "Common Control A"
  1168. * = 74 (0x4A) 01001010
  1169. * COMA[7:4] "AWB Update Threshold"
  1170. * = 4 (0x04) 0100....
  1171. * COMA[3:2] "Vertical window end line control 2 LSBs"
  1172. * = 2 (0x02) ....10..
  1173. * COMA[1:0] "Vertical window start line control 2 LSBs"
  1174. * = 2 (0x02) ......10
  1175. */
  1176. { 0x03, 0x4a },
  1177. /*
  1178. * 11 CLKRC "Clock Rate Control"
  1179. * = 128 (0x80) 10000000
  1180. * CLKRC[7] "Internal frequency doublers on off seclection"
  1181. * = 1 (0x01) 1....... "On"
  1182. * CLKRC[6] "Digital video master slave selection"
  1183. * = 0 (0x00) .0...... "Master mode, sensor
  1184. * provides PCLK"
  1185. * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
  1186. * = 0 (0x00) ..000000
  1187. */
  1188. { 0x11, 0x80 },
  1189. /*
  1190. * 12 COMH "Common Control H"
  1191. * = 0 (0x00) 00000000
  1192. * COMH[7] "SRST"
  1193. * = 0 (0x00) 0....... "No-op"
  1194. * COMH[6:4] "Resolution selection"
  1195. * = 0 (0x00) .000.... "QXGA"
  1196. * COMH[3] "Master slave selection"
  1197. * = 0 (0x00) ....0... "Master mode"
  1198. * COMH[2] "Internal B/R channel option"
  1199. * = 0 (0x00) .....0.. "B/R use same channel"
  1200. * COMH[1] "Color bar test pattern"
  1201. * = 0 (0x00) ......0. "Off"
  1202. * COMH[0] "Reserved"
  1203. * = 0 (0x00) .......0
  1204. */
  1205. { 0x12, 0x00 },
  1206. /*
  1207. * 12 COMH "Common Control H"
  1208. * = 64 (0x40) 01000000
  1209. * COMH[7] "SRST"
  1210. * = 0 (0x00) 0....... "No-op"
  1211. * COMH[6:4] "Resolution selection"
  1212. * = 4 (0x04) .100.... "XGA"
  1213. * COMH[3] "Master slave selection"
  1214. * = 0 (0x00) ....0... "Master mode"
  1215. * COMH[2] "Internal B/R channel option"
  1216. * = 0 (0x00) .....0.. "B/R use same channel"
  1217. * COMH[1] "Color bar test pattern"
  1218. * = 0 (0x00) ......0. "Off"
  1219. * COMH[0] "Reserved"
  1220. * = 0 (0x00) .......0
  1221. */
  1222. { 0x12, 0x40 },
  1223. /*
  1224. * 17 HREFST "Horizontal window start"
  1225. * = 31 (0x1F) 00011111
  1226. * HREFST[7:0] "Horizontal window start, 8 MSBs"
  1227. * = 31 (0x1F) 00011111
  1228. */
  1229. { 0x17, 0x1f },
  1230. /*
  1231. * 18 HREFEND "Horizontal window end"
  1232. * = 95 (0x5F) 01011111
  1233. * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
  1234. * = 95 (0x5F) 01011111
  1235. */
  1236. { 0x18, 0x5f },
  1237. /*
  1238. * 19 VSTRT "Vertical window start"
  1239. * = 0 (0x00) 00000000
  1240. * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
  1241. * = 0 (0x00) 00000000
  1242. */
  1243. { 0x19, 0x00 },
  1244. /*
  1245. * 1A VEND "Vertical window end"
  1246. * = 96 (0x60) 01100000
  1247. * VEND[7:0] "Vertical Window End, 8 MSBs"
  1248. * = 96 (0x60) 01100000
  1249. */
  1250. { 0x1a, 0x60 },
  1251. /*
  1252. * 32 COMM "Common Control M"
  1253. * = 18 (0x12) 00010010
  1254. * COMM[7:6] "Pixel clock divide option"
  1255. * = 0 (0x00) 00...... "/1"
  1256. * COMM[5:3] "Horizontal window end position, 3 LSBs"
  1257. * = 2 (0x02) ..010...
  1258. * COMM[2:0] "Horizontal window start position, 3 LSBs"
  1259. * = 2 (0x02) .....010
  1260. */
  1261. { 0x32, 0x12 },
  1262. /*
  1263. * 03 COMA "Common Control A"
  1264. * = 74 (0x4A) 01001010
  1265. * COMA[7:4] "AWB Update Threshold"
  1266. * = 4 (0x04) 0100....
  1267. * COMA[3:2] "Vertical window end line control 2 LSBs"
  1268. * = 2 (0x02) ....10..
  1269. * COMA[1:0] "Vertical window start line control 2 LSBs"
  1270. * = 2 (0x02) ......10
  1271. */
  1272. { 0x03, 0x4a },
  1273. /*
  1274. * 02 RED "Red Gain Control"
  1275. * = 175 (0xAF) 10101111
  1276. * RED[7] "Action"
  1277. * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
  1278. * RED[6:0] "Value"
  1279. * = 47 (0x2F) .0101111
  1280. */
  1281. { 0x02, 0xaf },
  1282. /*
  1283. * 2D ADDVSL "VSYNC Pulse Width"
  1284. * = 210 (0xD2) 11010010
  1285. * ADDVSL[7:0] "VSYNC pulse width, LSB"
  1286. * = 210 (0xD2) 11010010
  1287. */
  1288. { 0x2d, 0xd2 },
  1289. /*
  1290. * 00 GAIN = 24 (0x18) 00011000
  1291. * GAIN[7:6] "Reserved"
  1292. * = 0 (0x00) 00......
  1293. * GAIN[5] "Double"
  1294. * = 0 (0x00) ..0..... "False"
  1295. * GAIN[4] "Double"
  1296. * = 1 (0x01) ...1.... "True"
  1297. * GAIN[3:0] "Range"
  1298. * = 8 (0x08) ....1000
  1299. */
  1300. { 0x00, 0x18 },
  1301. /*
  1302. * 01 BLUE "Blue Gain Control"
  1303. * = 240 (0xF0) 11110000
  1304. * BLUE[7] "Action"
  1305. * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
  1306. * BLUE[6:0] "Value"
  1307. * = 112 (0x70) .1110000
  1308. */
  1309. { 0x01, 0xf0 },
  1310. /*
  1311. * 10 AEC "Automatic Exposure Control"
  1312. * = 10 (0x0A) 00001010
  1313. * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
  1314. * = 10 (0x0A) 00001010
  1315. */
  1316. { 0x10, 0x0a },
  1317. { 0xe1, 0x67 },
  1318. { 0xe3, 0x03 },
  1319. { 0xe4, 0x26 },
  1320. { 0xe5, 0x3e },
  1321. { 0xf8, 0x01 },
  1322. { 0xff, 0x01 },
  1323. };
  1324. static const struct ov_i2c_regvals norm_6x20[] = {
  1325. { 0x12, 0x80 }, /* reset */
  1326. { 0x11, 0x01 },
  1327. { 0x03, 0x60 },
  1328. { 0x05, 0x7f }, /* For when autoadjust is off */
  1329. { 0x07, 0xa8 },
  1330. /* The ratio of 0x0c and 0x0d controls the white point */
  1331. { 0x0c, 0x24 },
  1332. { 0x0d, 0x24 },
  1333. { 0x0f, 0x15 }, /* COMS */
  1334. { 0x10, 0x75 }, /* AEC Exposure time */
  1335. { 0x12, 0x24 }, /* Enable AGC */
  1336. { 0x14, 0x04 },
  1337. /* 0x16: 0x06 helps frame stability with moving objects */
  1338. { 0x16, 0x06 },
  1339. /* { 0x20, 0x30 }, * Aperture correction enable */
  1340. { 0x26, 0xb2 }, /* BLC enable */
  1341. /* 0x28: 0x05 Selects RGB format if RGB on */
  1342. { 0x28, 0x05 },
  1343. { 0x2a, 0x04 }, /* Disable framerate adjust */
  1344. /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
  1345. { 0x2d, 0x85 },
  1346. { 0x33, 0xa0 }, /* Color Processing Parameter */
  1347. { 0x34, 0xd2 }, /* Max A/D range */
  1348. { 0x38, 0x8b },
  1349. { 0x39, 0x40 },
  1350. { 0x3c, 0x39 }, /* Enable AEC mode changing */
  1351. { 0x3c, 0x3c }, /* Change AEC mode */
  1352. { 0x3c, 0x24 }, /* Disable AEC mode changing */
  1353. { 0x3d, 0x80 },
  1354. /* These next two registers (0x4a, 0x4b) are undocumented.
  1355. * They control the color balance */
  1356. { 0x4a, 0x80 },
  1357. { 0x4b, 0x80 },
  1358. { 0x4d, 0xd2 }, /* This reduces noise a bit */
  1359. { 0x4e, 0xc1 },
  1360. { 0x4f, 0x04 },
  1361. /* Do 50-53 have any effect? */
  1362. /* Toggle 0x12[2] off and on here? */
  1363. };
  1364. static const struct ov_i2c_regvals norm_6x30[] = {
  1365. { 0x12, 0x80 }, /* Reset */
  1366. { 0x00, 0x1f }, /* Gain */
  1367. { 0x01, 0x99 }, /* Blue gain */
  1368. { 0x02, 0x7c }, /* Red gain */
  1369. { 0x03, 0xc0 }, /* Saturation */
  1370. { 0x05, 0x0a }, /* Contrast */
  1371. { 0x06, 0x95 }, /* Brightness */
  1372. { 0x07, 0x2d }, /* Sharpness */
  1373. { 0x0c, 0x20 },
  1374. { 0x0d, 0x20 },
  1375. { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
  1376. { 0x0f, 0x05 },
  1377. { 0x10, 0x9a },
  1378. { 0x11, 0x00 }, /* Pixel clock = fastest */
  1379. { 0x12, 0x24 }, /* Enable AGC and AWB */
  1380. { 0x13, 0x21 },
  1381. { 0x14, 0x80 },
  1382. { 0x15, 0x01 },
  1383. { 0x16, 0x03 },
  1384. { 0x17, 0x38 },
  1385. { 0x18, 0xea },
  1386. { 0x19, 0x04 },
  1387. { 0x1a, 0x93 },
  1388. { 0x1b, 0x00 },
  1389. { 0x1e, 0xc4 },
  1390. { 0x1f, 0x04 },
  1391. { 0x20, 0x20 },
  1392. { 0x21, 0x10 },
  1393. { 0x22, 0x88 },
  1394. { 0x23, 0xc0 }, /* Crystal circuit power level */
  1395. { 0x25, 0x9a }, /* Increase AEC black ratio */
  1396. { 0x26, 0xb2 }, /* BLC enable */
  1397. { 0x27, 0xa2 },
  1398. { 0x28, 0x00 },
  1399. { 0x29, 0x00 },
  1400. { 0x2a, 0x84 }, /* 60 Hz power */
  1401. { 0x2b, 0xa8 }, /* 60 Hz power */
  1402. { 0x2c, 0xa0 },
  1403. { 0x2d, 0x95 }, /* Enable auto-brightness */
  1404. { 0x2e, 0x88 },
  1405. { 0x33, 0x26 },
  1406. { 0x34, 0x03 },
  1407. { 0x36, 0x8f },
  1408. { 0x37, 0x80 },
  1409. { 0x38, 0x83 },
  1410. { 0x39, 0x80 },
  1411. { 0x3a, 0x0f },
  1412. { 0x3b, 0x3c },
  1413. { 0x3c, 0x1a },
  1414. { 0x3d, 0x80 },
  1415. { 0x3e, 0x80 },
  1416. { 0x3f, 0x0e },
  1417. { 0x40, 0x00 }, /* White bal */
  1418. { 0x41, 0x00 }, /* White bal */
  1419. { 0x42, 0x80 },
  1420. { 0x43, 0x3f }, /* White bal */
  1421. { 0x44, 0x80 },
  1422. { 0x45, 0x20 },
  1423. { 0x46, 0x20 },
  1424. { 0x47, 0x80 },
  1425. { 0x48, 0x7f },
  1426. { 0x49, 0x00 },
  1427. { 0x4a, 0x00 },
  1428. { 0x4b, 0x80 },
  1429. { 0x4c, 0xd0 },
  1430. { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
  1431. { 0x4e, 0x40 },
  1432. { 0x4f, 0x07 }, /* UV avg., col. killer: max */
  1433. { 0x50, 0xff },
  1434. { 0x54, 0x23 }, /* Max AGC gain: 18dB */
  1435. { 0x55, 0xff },
  1436. { 0x56, 0x12 },
  1437. { 0x57, 0x81 },
  1438. { 0x58, 0x75 },
  1439. { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
  1440. { 0x5a, 0x2c },
  1441. { 0x5b, 0x0f }, /* AWB chrominance levels */
  1442. { 0x5c, 0x10 },
  1443. { 0x3d, 0x80 },
  1444. { 0x27, 0xa6 },
  1445. { 0x12, 0x20 }, /* Toggle AWB */
  1446. { 0x12, 0x24 },
  1447. };
  1448. /* Lawrence Glaister <lg@jfm.bc.ca> reports:
  1449. *
  1450. * Register 0x0f in the 7610 has the following effects:
  1451. *
  1452. * 0x85 (AEC method 1): Best overall, good contrast range
  1453. * 0x45 (AEC method 2): Very overexposed
  1454. * 0xa5 (spec sheet default): Ok, but the black level is
  1455. * shifted resulting in loss of contrast
  1456. * 0x05 (old driver setting): very overexposed, too much
  1457. * contrast
  1458. */
  1459. static const struct ov_i2c_regvals norm_7610[] = {
  1460. { 0x10, 0xff },
  1461. { 0x16, 0x06 },
  1462. { 0x28, 0x24 },
  1463. { 0x2b, 0xac },
  1464. { 0x12, 0x00 },
  1465. { 0x38, 0x81 },
  1466. { 0x28, 0x24 }, /* 0c */
  1467. { 0x0f, 0x85 }, /* lg's setting */
  1468. { 0x15, 0x01 },
  1469. { 0x20, 0x1c },
  1470. { 0x23, 0x2a },
  1471. { 0x24, 0x10 },
  1472. { 0x25, 0x8a },
  1473. { 0x26, 0xa2 },
  1474. { 0x27, 0xc2 },
  1475. { 0x2a, 0x04 },
  1476. { 0x2c, 0xfe },
  1477. { 0x2d, 0x93 },
  1478. { 0x30, 0x71 },
  1479. { 0x31, 0x60 },
  1480. { 0x32, 0x26 },
  1481. { 0x33, 0x20 },
  1482. { 0x34, 0x48 },
  1483. { 0x12, 0x24 },
  1484. { 0x11, 0x01 },
  1485. { 0x0c, 0x24 },
  1486. { 0x0d, 0x24 },
  1487. };
  1488. static const struct ov_i2c_regvals norm_7620[] = {
  1489. { 0x12, 0x80 }, /* reset */
  1490. { 0x00, 0x00 }, /* gain */
  1491. { 0x01, 0x80 }, /* blue gain */
  1492. { 0x02, 0x80 }, /* red gain */
  1493. { 0x03, 0xc0 }, /* OV7670_R03_VREF */
  1494. { 0x06, 0x60 },
  1495. { 0x07, 0x00 },
  1496. { 0x0c, 0x24 },
  1497. { 0x0c, 0x24 },
  1498. { 0x0d, 0x24 },
  1499. { 0x11, 0x01 },
  1500. { 0x12, 0x24 },
  1501. { 0x13, 0x01 },
  1502. { 0x14, 0x84 },
  1503. { 0x15, 0x01 },
  1504. { 0x16, 0x03 },
  1505. { 0x17, 0x2f },
  1506. { 0x18, 0xcf },
  1507. { 0x19, 0x06 },
  1508. { 0x1a, 0xf5 },
  1509. { 0x1b, 0x00 },
  1510. { 0x20, 0x18 },
  1511. { 0x21, 0x80 },
  1512. { 0x22, 0x80 },
  1513. { 0x23, 0x00 },
  1514. { 0x26, 0xa2 },
  1515. { 0x27, 0xea },
  1516. { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
  1517. { 0x29, 0x00 },
  1518. { 0x2a, 0x10 },
  1519. { 0x2b, 0x00 },
  1520. { 0x2c, 0x88 },
  1521. { 0x2d, 0x91 },
  1522. { 0x2e, 0x80 },
  1523. { 0x2f, 0x44 },
  1524. { 0x60, 0x27 },
  1525. { 0x61, 0x02 },
  1526. { 0x62, 0x5f },
  1527. { 0x63, 0xd5 },
  1528. { 0x64, 0x57 },
  1529. { 0x65, 0x83 },
  1530. { 0x66, 0x55 },
  1531. { 0x67, 0x92 },
  1532. { 0x68, 0xcf },
  1533. { 0x69, 0x76 },
  1534. { 0x6a, 0x22 },
  1535. { 0x6b, 0x00 },
  1536. { 0x6c, 0x02 },
  1537. { 0x6d, 0x44 },
  1538. { 0x6e, 0x80 },
  1539. { 0x6f, 0x1d },
  1540. { 0x70, 0x8b },
  1541. { 0x71, 0x00 },
  1542. { 0x72, 0x14 },
  1543. { 0x73, 0x54 },
  1544. { 0x74, 0x00 },
  1545. { 0x75, 0x8e },
  1546. { 0x76, 0x00 },
  1547. { 0x77, 0xff },
  1548. { 0x78, 0x80 },
  1549. { 0x79, 0x80 },
  1550. { 0x7a, 0x80 },
  1551. { 0x7b, 0xe2 },
  1552. { 0x7c, 0x00 },
  1553. };
  1554. /* 7640 and 7648. The defaults should be OK for most registers. */
  1555. static const struct ov_i2c_regvals norm_7640[] = {
  1556. { 0x12, 0x80 },
  1557. { 0x12, 0x14 },
  1558. };
  1559. static const struct ov_regvals init_519_ov7660[] = {
  1560. { 0x5d, 0x03 }, /* Turn off suspend mode */
  1561. { 0x53, 0x9b }, /* 0x9f enables the (unused) microcontroller */
  1562. { 0x54, 0x0f }, /* bit2 (jpeg enable) */
  1563. { 0xa2, 0x20 }, /* a2-a5 are undocumented */
  1564. { 0xa3, 0x18 },
  1565. { 0xa4, 0x04 },
  1566. { 0xa5, 0x28 },
  1567. { 0x37, 0x00 }, /* SetUsbInit */
  1568. { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
  1569. /* Enable both fields, YUV Input, disable defect comp (why?) */
  1570. { 0x20, 0x0c }, /* 0x0d does U <-> V swap */
  1571. { 0x21, 0x38 },
  1572. { 0x22, 0x1d },
  1573. { 0x17, 0x50 }, /* undocumented */
  1574. { 0x37, 0x00 }, /* undocumented */
  1575. { 0x40, 0xff }, /* I2C timeout counter */
  1576. { 0x46, 0x00 }, /* I2C clock prescaler */
  1577. };
  1578. static const struct ov_i2c_regvals norm_7660[] = {
  1579. {OV7670_R12_COM7, OV7670_COM7_RESET},
  1580. {OV7670_R11_CLKRC, 0x81},
  1581. {0x92, 0x00}, /* DM_LNL */
  1582. {0x93, 0x00}, /* DM_LNH */
  1583. {0x9d, 0x4c}, /* BD50ST */
  1584. {0x9e, 0x3f}, /* BD60ST */
  1585. {OV7670_R3B_COM11, 0x02},
  1586. {OV7670_R13_COM8, 0xf5},
  1587. {OV7670_R10_AECH, 0x00},
  1588. {OV7670_R00_GAIN, 0x00},
  1589. {OV7670_R01_BLUE, 0x7c},
  1590. {OV7670_R02_RED, 0x9d},
  1591. {OV7670_R12_COM7, 0x00},
  1592. {OV7670_R04_COM1, 00},
  1593. {OV7670_R18_HSTOP, 0x01},
  1594. {OV7670_R17_HSTART, 0x13},
  1595. {OV7670_R32_HREF, 0x92},
  1596. {OV7670_R19_VSTART, 0x02},
  1597. {OV7670_R1A_VSTOP, 0x7a},
  1598. {OV7670_R03_VREF, 0x00},
  1599. {OV7670_R0E_COM5, 0x04},
  1600. {OV7670_R0F_COM6, 0x62},
  1601. {OV7670_R15_COM10, 0x00},
  1602. {0x16, 0x02}, /* RSVD */
  1603. {0x1b, 0x00}, /* PSHFT */
  1604. {OV7670_R1E_MVFP, 0x01},
  1605. {0x29, 0x3c}, /* RSVD */
  1606. {0x33, 0x00}, /* CHLF */
  1607. {0x34, 0x07}, /* ARBLM */
  1608. {0x35, 0x84}, /* RSVD */
  1609. {0x36, 0x00}, /* RSVD */
  1610. {0x37, 0x04}, /* ADC */
  1611. {0x39, 0x43}, /* OFON */
  1612. {OV7670_R3A_TSLB, 0x00},
  1613. {OV7670_R3C_COM12, 0x6c},
  1614. {OV7670_R3D_COM13, 0x98},
  1615. {OV7670_R3F_EDGE, 0x23},
  1616. {OV7670_R40_COM15, 0xc1},
  1617. {OV7670_R41_COM16, 0x22},
  1618. {0x6b, 0x0a}, /* DBLV */
  1619. {0xa1, 0x08}, /* RSVD */
  1620. {0x69, 0x80}, /* HV */
  1621. {0x43, 0xf0}, /* RSVD.. */
  1622. {0x44, 0x10},
  1623. {0x45, 0x78},
  1624. {0x46, 0xa8},
  1625. {0x47, 0x60},
  1626. {0x48, 0x80},
  1627. {0x59, 0xba},
  1628. {0x5a, 0x9a},
  1629. {0x5b, 0x22},
  1630. {0x5c, 0xb9},
  1631. {0x5d, 0x9b},
  1632. {0x5e, 0x10},
  1633. {0x5f, 0xe0},
  1634. {0x60, 0x85},
  1635. {0x61, 0x60},
  1636. {0x9f, 0x9d}, /* RSVD */
  1637. {0xa0, 0xa0}, /* DSPC2 */
  1638. {0x4f, 0x60}, /* matrix */
  1639. {0x50, 0x64},
  1640. {0x51, 0x04},
  1641. {0x52, 0x18},
  1642. {0x53, 0x3c},
  1643. {0x54, 0x54},
  1644. {0x55, 0x40},
  1645. {0x56, 0x40},
  1646. {0x57, 0x40},
  1647. {0x58, 0x0d}, /* matrix sign */
  1648. {0x8b, 0xcc}, /* RSVD */
  1649. {0x8c, 0xcc},
  1650. {0x8d, 0xcf},
  1651. {0x6c, 0x40}, /* gamma curve */
  1652. {0x6d, 0xe0},
  1653. {0x6e, 0xa0},
  1654. {0x6f, 0x80},
  1655. {0x70, 0x70},
  1656. {0x71, 0x80},
  1657. {0x72, 0x60},
  1658. {0x73, 0x60},
  1659. {0x74, 0x50},
  1660. {0x75, 0x40},
  1661. {0x76, 0x38},
  1662. {0x77, 0x3c},
  1663. {0x78, 0x32},
  1664. {0x79, 0x1a},
  1665. {0x7a, 0x28},
  1666. {0x7b, 0x24},
  1667. {0x7c, 0x04}, /* gamma curve */
  1668. {0x7d, 0x12},
  1669. {0x7e, 0x26},
  1670. {0x7f, 0x46},
  1671. {0x80, 0x54},
  1672. {0x81, 0x64},
  1673. {0x82, 0x70},
  1674. {0x83, 0x7c},
  1675. {0x84, 0x86},
  1676. {0x85, 0x8e},
  1677. {0x86, 0x9c},
  1678. {0x87, 0xab},
  1679. {0x88, 0xc4},
  1680. {0x89, 0xd1},
  1681. {0x8a, 0xe5},
  1682. {OV7670_R14_COM9, 0x1e},
  1683. {OV7670_R24_AEW, 0x80},
  1684. {OV7670_R25_AEB, 0x72},
  1685. {OV7670_R26_VPT, 0xb3},
  1686. {0x62, 0x80}, /* LCC1 */
  1687. {0x63, 0x80}, /* LCC2 */
  1688. {0x64, 0x06}, /* LCC3 */
  1689. {0x65, 0x00}, /* LCC4 */
  1690. {0x66, 0x01}, /* LCC5 */
  1691. {0x94, 0x0e}, /* RSVD.. */
  1692. {0x95, 0x14},
  1693. {OV7670_R13_COM8, OV7670_COM8_FASTAEC
  1694. | OV7670_COM8_AECSTEP
  1695. | OV7670_COM8_BFILT
  1696. | 0x10
  1697. | OV7670_COM8_AGC
  1698. | OV7670_COM8_AWB
  1699. | OV7670_COM8_AEC},
  1700. {0xa1, 0xc8}
  1701. };
  1702. static const struct ov_i2c_regvals norm_9600[] = {
  1703. {0x12, 0x80},
  1704. {0x0c, 0x28},
  1705. {0x11, 0x80},
  1706. {0x13, 0xb5},
  1707. {0x14, 0x3e},
  1708. {0x1b, 0x04},
  1709. {0x24, 0xb0},
  1710. {0x25, 0x90},
  1711. {0x26, 0x94},
  1712. {0x35, 0x90},
  1713. {0x37, 0x07},
  1714. {0x38, 0x08},
  1715. {0x01, 0x8e},
  1716. {0x02, 0x85}
  1717. };
  1718. /* 7670. Defaults taken from OmniVision provided data,
  1719. * as provided by Jonathan Corbet of OLPC */
  1720. static const struct ov_i2c_regvals norm_7670[] = {
  1721. { OV7670_R12_COM7, OV7670_COM7_RESET },
  1722. { OV7670_R3A_TSLB, 0x04 }, /* OV */
  1723. { OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
  1724. { OV7670_R11_CLKRC, 0x01 },
  1725. /*
  1726. * Set the hardware window. These values from OV don't entirely
  1727. * make sense - hstop is less than hstart. But they work...
  1728. */
  1729. { OV7670_R17_HSTART, 0x13 },
  1730. { OV7670_R18_HSTOP, 0x01 },
  1731. { OV7670_R32_HREF, 0xb6 },
  1732. { OV7670_R19_VSTART, 0x02 },
  1733. { OV7670_R1A_VSTOP, 0x7a },
  1734. { OV7670_R03_VREF, 0x0a },
  1735. { OV7670_R0C_COM3, 0x00 },
  1736. { OV7670_R3E_COM14, 0x00 },
  1737. /* Mystery scaling numbers */
  1738. { 0x70, 0x3a },
  1739. { 0x71, 0x35 },
  1740. { 0x72, 0x11 },
  1741. { 0x73, 0xf0 },
  1742. { 0xa2, 0x02 },
  1743. /* { OV7670_R15_COM10, 0x0 }, */
  1744. /* Gamma curve values */
  1745. { 0x7a, 0x20 },
  1746. { 0x7b, 0x10 },
  1747. { 0x7c, 0x1e },
  1748. { 0x7d, 0x35 },
  1749. { 0x7e, 0x5a },
  1750. { 0x7f, 0x69 },
  1751. { 0x80, 0x76 },
  1752. { 0x81, 0x80 },
  1753. { 0x82, 0x88 },
  1754. { 0x83, 0x8f },
  1755. { 0x84, 0x96 },
  1756. { 0x85, 0xa3 },
  1757. { 0x86, 0xaf },
  1758. { 0x87, 0xc4 },
  1759. { 0x88, 0xd7 },
  1760. { 0x89, 0xe8 },
  1761. /* AGC and AEC parameters. Note we start by disabling those features,
  1762. then turn them only after tweaking the values. */
  1763. { OV7670_R13_COM8, OV7670_COM8_FASTAEC
  1764. | OV7670_COM8_AECSTEP
  1765. | OV7670_COM8_BFILT },
  1766. { OV7670_R00_GAIN, 0x00 },
  1767. { OV7670_R10_AECH, 0x00 },
  1768. { OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
  1769. { OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
  1770. { OV7670_RA5_BD50MAX, 0x05 },
  1771. { OV7670_RAB_BD60MAX, 0x07 },
  1772. { OV7670_R24_AEW, 0x95 },
  1773. { OV7670_R25_AEB, 0x33 },
  1774. { OV7670_R26_VPT, 0xe3 },
  1775. { OV7670_R9F_HAECC1, 0x78 },
  1776. { OV7670_RA0_HAECC2, 0x68 },
  1777. { 0xa1, 0x03 }, /* magic */
  1778. { OV7670_RA6_HAECC3, 0xd8 },
  1779. { OV7670_RA7_HAECC4, 0xd8 },
  1780. { OV7670_RA8_HAECC5, 0xf0 },
  1781. { OV7670_RA9_HAECC6, 0x90 },
  1782. { OV7670_RAA_HAECC7, 0x94 },
  1783. { OV7670_R13_COM8, OV7670_COM8_FASTAEC
  1784. | OV7670_COM8_AECSTEP
  1785. | OV7670_COM8_BFILT
  1786. | OV7670_COM8_AGC
  1787. | OV7670_COM8_AEC },
  1788. /* Almost all of these are magic "reserved" values. */
  1789. { OV7670_R0E_COM5, 0x61 },
  1790. { OV7670_R0F_COM6, 0x4b },
  1791. { 0x16, 0x02 },
  1792. { OV7670_R1E_MVFP, 0x07 },
  1793. { 0x21, 0x02 },
  1794. { 0x22, 0x91 },
  1795. { 0x29, 0x07 },
  1796. { 0x33, 0x0b },
  1797. { 0x35, 0x0b },
  1798. { 0x37, 0x1d },
  1799. { 0x38, 0x71 },
  1800. { 0x39, 0x2a },
  1801. { OV7670_R3C_COM12, 0x78 },
  1802. { 0x4d, 0x40 },
  1803. { 0x4e, 0x20 },
  1804. { OV7670_R69_GFIX, 0x00 },
  1805. { 0x6b, 0x4a },
  1806. { 0x74, 0x10 },
  1807. { 0x8d, 0x4f },
  1808. { 0x8e, 0x00 },
  1809. { 0x8f, 0x00 },
  1810. { 0x90, 0x00 },
  1811. { 0x91, 0x00 },
  1812. { 0x96, 0x00 },
  1813. { 0x9a, 0x00 },
  1814. { 0xb0, 0x84 },
  1815. { 0xb1, 0x0c },
  1816. { 0xb2, 0x0e },
  1817. { 0xb3, 0x82 },
  1818. { 0xb8, 0x0a },
  1819. /* More reserved magic, some of which tweaks white balance */
  1820. { 0x43, 0x0a },
  1821. { 0x44, 0xf0 },
  1822. { 0x45, 0x34 },
  1823. { 0x46, 0x58 },
  1824. { 0x47, 0x28 },
  1825. { 0x48, 0x3a },
  1826. { 0x59, 0x88 },
  1827. { 0x5a, 0x88 },
  1828. { 0x5b, 0x44 },
  1829. { 0x5c, 0x67 },
  1830. { 0x5d, 0x49 },
  1831. { 0x5e, 0x0e },
  1832. { 0x6c, 0x0a },
  1833. { 0x6d, 0x55 },
  1834. { 0x6e, 0x11 },
  1835. { 0x6f, 0x9f }, /* "9e for advance AWB" */
  1836. { 0x6a, 0x40 },
  1837. { OV7670_R01_BLUE, 0x40 },
  1838. { OV7670_R02_RED, 0x60 },
  1839. { OV7670_R13_COM8, OV7670_COM8_FASTAEC
  1840. | OV7670_COM8_AECSTEP
  1841. | OV7670_COM8_BFILT
  1842. | OV7670_COM8_AGC
  1843. | OV7670_COM8_AEC
  1844. | OV7670_COM8_AWB },
  1845. /* Matrix coefficients */
  1846. { 0x4f, 0x80 },
  1847. { 0x50, 0x80 },
  1848. { 0x51, 0x00 },
  1849. { 0x52, 0x22 },
  1850. { 0x53, 0x5e },
  1851. { 0x54, 0x80 },
  1852. { 0x58, 0x9e },
  1853. { OV7670_R41_COM16, OV7670_COM16_AWBGAIN },
  1854. { OV7670_R3F_EDGE, 0x00 },
  1855. { 0x75, 0x05 },
  1856. { 0x76, 0xe1 },
  1857. { 0x4c, 0x00 },
  1858. { 0x77, 0x01 },
  1859. { OV7670_R3D_COM13, OV7670_COM13_GAMMA
  1860. | OV7670_COM13_UVSAT
  1861. | 2}, /* was 3 */
  1862. { 0x4b, 0x09 },
  1863. { 0xc9, 0x60 },
  1864. { OV7670_R41_COM16, 0x38 },
  1865. { 0x56, 0x40 },
  1866. { 0x34, 0x11 },
  1867. { OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
  1868. { 0xa4, 0x88 },
  1869. { 0x96, 0x00 },
  1870. { 0x97, 0x30 },
  1871. { 0x98, 0x20 },
  1872. { 0x99, 0x30 },
  1873. { 0x9a, 0x84 },
  1874. { 0x9b, 0x29 },
  1875. { 0x9c, 0x03 },
  1876. { 0x9d, 0x4c },
  1877. { 0x9e, 0x3f },
  1878. { 0x78, 0x04 },
  1879. /* Extra-weird stuff. Some sort of multiplexor register */
  1880. { 0x79, 0x01 },
  1881. { 0xc8, 0xf0 },
  1882. { 0x79, 0x0f },
  1883. { 0xc8, 0x00 },
  1884. { 0x79, 0x10 },
  1885. { 0xc8, 0x7e },
  1886. { 0x79, 0x0a },
  1887. { 0xc8, 0x80 },
  1888. { 0x79, 0x0b },
  1889. { 0xc8, 0x01 },
  1890. { 0x79, 0x0c },
  1891. { 0xc8, 0x0f },
  1892. { 0x79, 0x0d },
  1893. { 0xc8, 0x20 },
  1894. { 0x79, 0x09 },
  1895. { 0xc8, 0x80 },
  1896. { 0x79, 0x02 },
  1897. { 0xc8, 0xc0 },
  1898. { 0x79, 0x03 },
  1899. { 0xc8, 0x40 },
  1900. { 0x79, 0x05 },
  1901. { 0xc8, 0x30 },
  1902. { 0x79, 0x26 },
  1903. };
  1904. static const struct ov_i2c_regvals norm_8610[] = {
  1905. { 0x12, 0x80 },
  1906. { 0x00, 0x00 },
  1907. { 0x01, 0x80 },
  1908. { 0x02, 0x80 },
  1909. { 0x03, 0xc0 },
  1910. { 0x04, 0x30 },
  1911. { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
  1912. { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
  1913. { 0x0a, 0x86 },
  1914. { 0x0b, 0xb0 },
  1915. { 0x0c, 0x20 },
  1916. { 0x0d, 0x20 },
  1917. { 0x11, 0x01 },
  1918. { 0x12, 0x25 },
  1919. { 0x13, 0x01 },
  1920. { 0x14, 0x04 },
  1921. { 0x15, 0x01 }, /* Lin and Win think different about UV order */
  1922. { 0x16, 0x03 },
  1923. { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
  1924. { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
  1925. { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
  1926. { 0x1a, 0xf5 },
  1927. { 0x1b, 0x00 },
  1928. { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
  1929. { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
  1930. { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
  1931. { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
  1932. { 0x26, 0xa2 },
  1933. { 0x27, 0xea },
  1934. { 0x28, 0x00 },
  1935. { 0x29, 0x00 },
  1936. { 0x2a, 0x80 },
  1937. { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
  1938. { 0x2c, 0xac },
  1939. { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
  1940. { 0x2e, 0x80 },
  1941. { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
  1942. { 0x4c, 0x00 },
  1943. { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
  1944. { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
  1945. { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
  1946. { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
  1947. { 0x63, 0xff },
  1948. { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
  1949. * maybe thats wrong */
  1950. { 0x65, 0x00 },
  1951. { 0x66, 0x55 },
  1952. { 0x67, 0xb0 },
  1953. { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
  1954. { 0x69, 0x02 },
  1955. { 0x6a, 0x22 },
  1956. { 0x6b, 0x00 },
  1957. { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
  1958. * deleting bit7 colors the first images red */
  1959. { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
  1960. { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
  1961. { 0x6f, 0x01 },
  1962. { 0x70, 0x8b },
  1963. { 0x71, 0x00 },
  1964. { 0x72, 0x14 },
  1965. { 0x73, 0x54 },
  1966. { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
  1967. { 0x75, 0x0e },
  1968. { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
  1969. { 0x77, 0xff },
  1970. { 0x78, 0x80 },
  1971. { 0x79, 0x80 },
  1972. { 0x7a, 0x80 },
  1973. { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
  1974. { 0x7c, 0x00 },
  1975. { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
  1976. { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
  1977. { 0x7f, 0xfb },
  1978. { 0x80, 0x28 },
  1979. { 0x81, 0x00 },
  1980. { 0x82, 0x23 },
  1981. { 0x83, 0x0b },
  1982. { 0x84, 0x00 },
  1983. { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
  1984. { 0x86, 0xc9 },
  1985. { 0x87, 0x00 },
  1986. { 0x88, 0x00 },
  1987. { 0x89, 0x01 },
  1988. { 0x12, 0x20 },
  1989. { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
  1990. };
  1991. static unsigned char ov7670_abs_to_sm(unsigned char v)
  1992. {
  1993. if (v > 127)
  1994. return v & 0x7f;
  1995. return (128 - v) | 0x80;
  1996. }
  1997. /* Write a OV519 register */
  1998. static void reg_w(struct sd *sd, u16 index, u16 value)
  1999. {
  2000. int ret, req = 0;
  2001. if (sd->gspca_dev.usb_err < 0)
  2002. return;
  2003. switch (sd->bridge) {
  2004. case BRIDGE_OV511:
  2005. case BRIDGE_OV511PLUS:
  2006. req = 2;
  2007. break;
  2008. case BRIDGE_OVFX2:
  2009. req = 0x0a;
  2010. /* fall through */
  2011. case BRIDGE_W9968CF:
  2012. PDEBUG(D_USBO, "SET %02x %04x %04x",
  2013. req, value, index);
  2014. ret = usb_control_msg(sd->gspca_dev.dev,
  2015. usb_sndctrlpipe(sd->gspca_dev.dev, 0),
  2016. req,
  2017. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  2018. value, index, NULL, 0, 500);
  2019. goto leave;
  2020. default:
  2021. req = 1;
  2022. }
  2023. PDEBUG(D_USBO, "SET %02x 0000 %04x %02x",
  2024. req, index, value);
  2025. sd->gspca_dev.usb_buf[0] = value;
  2026. ret = usb_control_msg(sd->gspca_dev.dev,
  2027. usb_sndctrlpipe(sd->gspca_dev.dev, 0),
  2028. req,
  2029. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  2030. 0, index,
  2031. sd->gspca_dev.usb_buf, 1, 500);
  2032. leave:
  2033. if (ret < 0) {
  2034. pr_err("reg_w %02x failed %d\n", index, ret);
  2035. sd->gspca_dev.usb_err = ret;
  2036. return;
  2037. }
  2038. }
  2039. /* Read from a OV519 register, note not valid for the w9968cf!! */
  2040. /* returns: negative is error, pos or zero is data */
  2041. static int reg_r(struct sd *sd, u16 index)
  2042. {
  2043. int ret;
  2044. int req;
  2045. if (sd->gspca_dev.usb_err < 0)
  2046. return -1;
  2047. switch (sd->bridge) {
  2048. case BRIDGE_OV511:
  2049. case BRIDGE_OV511PLUS:
  2050. req = 3;
  2051. break;
  2052. case BRIDGE_OVFX2:
  2053. req = 0x0b;
  2054. break;
  2055. default:
  2056. req = 1;
  2057. }
  2058. ret = usb_control_msg(sd->gspca_dev.dev,
  2059. usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
  2060. req,
  2061. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  2062. 0, index, sd->gspca_dev.usb_buf, 1, 500);
  2063. if (ret >= 0) {
  2064. ret = sd->gspca_dev.usb_buf[0];
  2065. PDEBUG(D_USBI, "GET %02x 0000 %04x %02x",
  2066. req, index, ret);
  2067. } else {
  2068. pr_err("reg_r %02x failed %d\n", index, ret);
  2069. sd->gspca_dev.usb_err = ret;
  2070. }
  2071. return ret;
  2072. }
  2073. /* Read 8 values from a OV519 register */
  2074. static int reg_r8(struct sd *sd,
  2075. u16 index)
  2076. {
  2077. int ret;
  2078. if (sd->gspca_dev.usb_err < 0)
  2079. return -1;
  2080. ret = usb_control_msg(sd->gspca_dev.dev,
  2081. usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
  2082. 1, /* REQ_IO */
  2083. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  2084. 0, index, sd->gspca_dev.usb_buf, 8, 500);
  2085. if (ret >= 0) {
  2086. ret = sd->gspca_dev.usb_buf[0];
  2087. } else {
  2088. pr_err("reg_r8 %02x failed %d\n", index, ret);
  2089. sd->gspca_dev.usb_err = ret;
  2090. }
  2091. return ret;
  2092. }
  2093. /*
  2094. * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
  2095. * the same position as 1's in "mask" are cleared and set to "value". Bits
  2096. * that are in the same position as 0's in "mask" are preserved, regardless
  2097. * of their respective state in "value".
  2098. */
  2099. static void reg_w_mask(struct sd *sd,
  2100. u16 index,
  2101. u8 value,
  2102. u8 mask)
  2103. {
  2104. int ret;
  2105. u8 oldval;
  2106. if (mask != 0xff) {
  2107. value &= mask; /* Enforce mask on value */
  2108. ret = reg_r(sd, index);
  2109. if (ret < 0)
  2110. return;
  2111. oldval = ret & ~mask; /* Clear the masked bits */
  2112. value |= oldval; /* Set the desired bits */
  2113. }
  2114. reg_w(sd, index, value);
  2115. }
  2116. /*
  2117. * Writes multiple (n) byte value to a single register. Only valid with certain
  2118. * registers (0x30 and 0xc4 - 0xce).
  2119. */
  2120. static void ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
  2121. {
  2122. int ret;
  2123. if (sd->gspca_dev.usb_err < 0)
  2124. return;
  2125. *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
  2126. ret = usb_control_msg(sd->gspca_dev.dev,
  2127. usb_sndctrlpipe(sd->gspca_dev.dev, 0),
  2128. 1 /* REG_IO */,
  2129. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  2130. 0, index,
  2131. sd->gspca_dev.usb_buf, n, 500);
  2132. if (ret < 0) {
  2133. pr_err("reg_w32 %02x failed %d\n", index, ret);
  2134. sd->gspca_dev.usb_err = ret;
  2135. }
  2136. }
  2137. static void ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
  2138. {
  2139. int rc, retries;
  2140. PDEBUG(D_USBO, "ov511_i2c_w %02x %02x", reg, value);
  2141. /* Three byte write cycle */
  2142. for (retries = 6; ; ) {
  2143. /* Select camera register */
  2144. reg_w(sd, R51x_I2C_SADDR_3, reg);
  2145. /* Write "value" to I2C data port of OV511 */
  2146. reg_w(sd, R51x_I2C_DATA, value);
  2147. /* Initiate 3-byte write cycle */
  2148. reg_w(sd, R511_I2C_CTL, 0x01);
  2149. do {
  2150. rc = reg_r(sd, R511_I2C_CTL);
  2151. } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
  2152. if (rc < 0)
  2153. return;
  2154. if ((rc & 2) == 0) /* Ack? */
  2155. break;
  2156. if (--retries < 0) {
  2157. PDEBUG(D_USBO, "i2c write retries exhausted");
  2158. return;
  2159. }
  2160. }
  2161. }
  2162. static int ov511_i2c_r(struct sd *sd, u8 reg)
  2163. {
  2164. int rc, value, retries;
  2165. /* Two byte write cycle */
  2166. for (retries = 6; ; ) {
  2167. /* Select camera register */
  2168. reg_w(sd, R51x_I2C_SADDR_2, reg);
  2169. /* Initiate 2-byte write cycle */
  2170. reg_w(sd, R511_I2C_CTL, 0x03);
  2171. do {
  2172. rc = reg_r(sd, R511_I2C_CTL);
  2173. } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
  2174. if (rc < 0)
  2175. return rc;
  2176. if ((rc & 2) == 0) /* Ack? */
  2177. break;
  2178. /* I2C abort */
  2179. reg_w(sd, R511_I2C_CTL, 0x10);
  2180. if (--retries < 0) {
  2181. PDEBUG(D_USBI, "i2c write retries exhausted");
  2182. return -1;
  2183. }
  2184. }
  2185. /* Two byte read cycle */
  2186. for (retries = 6; ; ) {
  2187. /* Initiate 2-byte read cycle */
  2188. reg_w(sd, R511_I2C_CTL, 0x05);
  2189. do {
  2190. rc = reg_r(sd, R511_I2C_CTL);
  2191. } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
  2192. if (rc < 0)
  2193. return rc;
  2194. if ((rc & 2) == 0) /* Ack? */
  2195. break;
  2196. /* I2C abort */
  2197. reg_w(sd, R511_I2C_CTL, 0x10);
  2198. if (--retries < 0) {
  2199. PDEBUG(D_USBI, "i2c read retries exhausted");
  2200. return -1;
  2201. }
  2202. }
  2203. value = reg_r(sd, R51x_I2C_DATA);
  2204. PDEBUG(D_USBI, "ov511_i2c_r %02x %02x", reg, value);
  2205. /* This is needed to make i2c_w() work */
  2206. reg_w(sd, R511_I2C_CTL, 0x05);
  2207. return value;
  2208. }
  2209. /*
  2210. * The OV518 I2C I/O procedure is different, hence, this function.
  2211. * This is normally only called from i2c_w(). Note that this function
  2212. * always succeeds regardless of whether the sensor is present and working.
  2213. */
  2214. static void ov518_i2c_w(struct sd *sd,
  2215. u8 reg,
  2216. u8 value)
  2217. {
  2218. PDEBUG(D_USBO, "ov518_i2c_w %02x %02x", reg, value);
  2219. /* Select camera register */
  2220. reg_w(sd, R51x_I2C_SADDR_3, reg);
  2221. /* Write "value" to I2C data port of OV511 */
  2222. reg_w(sd, R51x_I2C_DATA, value);
  2223. /* Initiate 3-byte write cycle */
  2224. reg_w(sd, R518_I2C_CTL, 0x01);
  2225. /* wait for write complete */
  2226. msleep(4);
  2227. reg_r8(sd, R518_I2C_CTL);
  2228. }
  2229. /*
  2230. * returns: negative is error, pos or zero is data
  2231. *
  2232. * The OV518 I2C I/O procedure is different, hence, this function.
  2233. * This is normally only called from i2c_r(). Note that this function
  2234. * always succeeds regardless of whether the sensor is present and working.
  2235. */
  2236. static int ov518_i2c_r(struct sd *sd, u8 reg)
  2237. {
  2238. int value;
  2239. /* Select camera register */
  2240. reg_w(sd, R51x_I2C_SADDR_2, reg);
  2241. /* Initiate 2-byte write cycle */
  2242. reg_w(sd, R518_I2C_CTL, 0x03);
  2243. reg_r8(sd, R518_I2C_CTL);
  2244. /* Initiate 2-byte read cycle */
  2245. reg_w(sd, R518_I2C_CTL, 0x05);
  2246. reg_r8(sd, R518_I2C_CTL);
  2247. value = reg_r(sd, R51x_I2C_DATA);
  2248. PDEBUG(D_USBI, "ov518_i2c_r %02x %02x", reg, value);
  2249. return value;
  2250. }
  2251. static void ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
  2252. {
  2253. int ret;
  2254. if (sd->gspca_dev.usb_err < 0)
  2255. return;
  2256. ret = usb_control_msg(sd->gspca_dev.dev,
  2257. usb_sndctrlpipe(sd->gspca_dev.dev, 0),
  2258. 0x02,
  2259. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  2260. (u16) value, (u16) reg, NULL, 0, 500);
  2261. if (ret < 0) {
  2262. pr_err("ovfx2_i2c_w %02x failed %d\n", reg, ret);
  2263. sd->gspca_dev.usb_err = ret;
  2264. }
  2265. PDEBUG(D_USBO, "ovfx2_i2c_w %02x %02x", reg, value);
  2266. }
  2267. static int ovfx2_i2c_r(struct sd *sd, u8 reg)
  2268. {
  2269. int ret;
  2270. if (sd->gspca_dev.usb_err < 0)
  2271. return -1;
  2272. ret = usb_control_msg(sd->gspca_dev.dev,
  2273. usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
  2274. 0x03,
  2275. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  2276. 0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
  2277. if (ret >= 0) {
  2278. ret = sd->gspca_dev.usb_buf[0];
  2279. PDEBUG(D_USBI, "ovfx2_i2c_r %02x %02x", reg, ret);
  2280. } else {
  2281. pr_err("ovfx2_i2c_r %02x failed %d\n", reg, ret);
  2282. sd->gspca_dev.usb_err = ret;
  2283. }
  2284. return ret;
  2285. }
  2286. static void i2c_w(struct sd *sd, u8 reg, u8 value)
  2287. {
  2288. if (sd->sensor_reg_cache[reg] == value)
  2289. return;
  2290. switch (sd->bridge) {
  2291. case BRIDGE_OV511:
  2292. case BRIDGE_OV511PLUS:
  2293. ov511_i2c_w(sd, reg, value);
  2294. break;
  2295. case BRIDGE_OV518:
  2296. case BRIDGE_OV518PLUS:
  2297. case BRIDGE_OV519:
  2298. ov518_i2c_w(sd, reg, value);
  2299. break;
  2300. case BRIDGE_OVFX2:
  2301. ovfx2_i2c_w(sd, reg, value);
  2302. break;
  2303. case BRIDGE_W9968CF:
  2304. w9968cf_i2c_w(sd, reg, value);
  2305. break;
  2306. }
  2307. if (sd->gspca_dev.usb_err >= 0) {
  2308. /* Up on sensor reset empty the register cache */
  2309. if (reg == 0x12 && (value & 0x80))
  2310. memset(sd->sensor_reg_cache, -1,
  2311. sizeof(sd->sensor_reg_cache));
  2312. else
  2313. sd->sensor_reg_cache[reg] = value;
  2314. }
  2315. }
  2316. static int i2c_r(struct sd *sd, u8 reg)
  2317. {
  2318. int ret = -1;
  2319. if (sd->sensor_reg_cache[reg] != -1)
  2320. return sd->sensor_reg_cache[reg];
  2321. switch (sd->bridge) {
  2322. case BRIDGE_OV511:
  2323. case BRIDGE_OV511PLUS:
  2324. ret = ov511_i2c_r(sd, reg);
  2325. break;
  2326. case BRIDGE_OV518:
  2327. case BRIDGE_OV518PLUS:
  2328. case BRIDGE_OV519:
  2329. ret = ov518_i2c_r(sd, reg);
  2330. break;
  2331. case BRIDGE_OVFX2:
  2332. ret = ovfx2_i2c_r(sd, reg);
  2333. break;
  2334. case BRIDGE_W9968CF:
  2335. ret = w9968cf_i2c_r(sd, reg);
  2336. break;
  2337. }
  2338. if (ret >= 0)
  2339. sd->sensor_reg_cache[reg] = ret;
  2340. return ret;
  2341. }
  2342. /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
  2343. * the same position as 1's in "mask" are cleared and set to "value". Bits
  2344. * that are in the same position as 0's in "mask" are preserved, regardless
  2345. * of their respective state in "value".
  2346. */
  2347. static void i2c_w_mask(struct sd *sd,
  2348. u8 reg,
  2349. u8 value,
  2350. u8 mask)
  2351. {
  2352. int rc;
  2353. u8 oldval;
  2354. value &= mask; /* Enforce mask on value */
  2355. rc = i2c_r(sd, reg);
  2356. if (rc < 0)
  2357. return;
  2358. oldval = rc & ~mask; /* Clear the masked bits */
  2359. value |= oldval; /* Set the desired bits */
  2360. i2c_w(sd, reg, value);
  2361. }
  2362. /* Temporarily stops OV511 from functioning. Must do this before changing
  2363. * registers while the camera is streaming */
  2364. static inline void ov51x_stop(struct sd *sd)
  2365. {
  2366. PDEBUG(D_STREAM, "stopping");
  2367. sd->stopped = 1;
  2368. switch (sd->bridge) {
  2369. case BRIDGE_OV511:
  2370. case BRIDGE_OV511PLUS:
  2371. reg_w(sd, R51x_SYS_RESET, 0x3d);
  2372. break;
  2373. case BRIDGE_OV518:
  2374. case BRIDGE_OV518PLUS:
  2375. reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
  2376. break;
  2377. case BRIDGE_OV519:
  2378. reg_w(sd, OV519_R51_RESET1, 0x0f);
  2379. reg_w(sd, OV519_R51_RESET1, 0x00);
  2380. reg_w(sd, 0x22, 0x00); /* FRAR */
  2381. break;
  2382. case BRIDGE_OVFX2:
  2383. reg_w_mask(sd, 0x0f, 0x00, 0x02);
  2384. break;
  2385. case BRIDGE_W9968CF:
  2386. reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
  2387. break;
  2388. }
  2389. }
  2390. /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
  2391. * actually stopped (for performance). */
  2392. static inline void ov51x_restart(struct sd *sd)
  2393. {
  2394. PDEBUG(D_STREAM, "restarting");
  2395. if (!sd->stopped)
  2396. return;
  2397. sd->stopped = 0;
  2398. /* Reinitialize the stream */
  2399. switch (sd->bridge) {
  2400. case BRIDGE_OV511:
  2401. case BRIDGE_OV511PLUS:
  2402. reg_w(sd, R51x_SYS_RESET, 0x00);
  2403. break;
  2404. case BRIDGE_OV518:
  2405. case BRIDGE_OV518PLUS:
  2406. reg_w(sd, 0x2f, 0x80);
  2407. reg_w(sd, R51x_SYS_RESET, 0x00);
  2408. break;
  2409. case BRIDGE_OV519:
  2410. reg_w(sd, OV519_R51_RESET1, 0x0f);
  2411. reg_w(sd, OV519_R51_RESET1, 0x00);
  2412. reg_w(sd, 0x22, 0x1d); /* FRAR */
  2413. break;
  2414. case BRIDGE_OVFX2:
  2415. reg_w_mask(sd, 0x0f, 0x02, 0x02);
  2416. break;
  2417. case BRIDGE_W9968CF:
  2418. reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
  2419. break;
  2420. }
  2421. }
  2422. static void ov51x_set_slave_ids(struct sd *sd, u8 slave);
  2423. /* This does an initial reset of an OmniVision sensor and ensures that I2C
  2424. * is synchronized. Returns <0 on failure.
  2425. */
  2426. static int init_ov_sensor(struct sd *sd, u8 slave)
  2427. {
  2428. int i;
  2429. ov51x_set_slave_ids(sd, slave);
  2430. /* Reset the sensor */
  2431. i2c_w(sd, 0x12, 0x80);
  2432. /* Wait for it to initialize */
  2433. msleep(150);
  2434. for (i = 0; i < i2c_detect_tries; i++) {
  2435. if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
  2436. i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
  2437. PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
  2438. return 0;
  2439. }
  2440. /* Reset the sensor */
  2441. i2c_w(sd, 0x12, 0x80);
  2442. /* Wait for it to initialize */
  2443. msleep(150);
  2444. /* Dummy read to sync I2C */
  2445. if (i2c_r(sd, 0x00) < 0)
  2446. return -1;
  2447. }
  2448. return -1;
  2449. }
  2450. /* Set the read and write slave IDs. The "slave" argument is the write slave,
  2451. * and the read slave will be set to (slave + 1).
  2452. * This should not be called from outside the i2c I/O functions.
  2453. * Sets I2C read and write slave IDs. Returns <0 for error
  2454. */
  2455. static void ov51x_set_slave_ids(struct sd *sd,
  2456. u8 slave)
  2457. {
  2458. switch (sd->bridge) {
  2459. case BRIDGE_OVFX2:
  2460. reg_w(sd, OVFX2_I2C_ADDR, slave);
  2461. return;
  2462. case BRIDGE_W9968CF:
  2463. sd->sensor_addr = slave;
  2464. return;
  2465. }
  2466. reg_w(sd, R51x_I2C_W_SID, slave);
  2467. reg_w(sd, R51x_I2C_R_SID, slave + 1);
  2468. }
  2469. static void write_regvals(struct sd *sd,
  2470. const struct ov_regvals *regvals,
  2471. int n)
  2472. {
  2473. while (--n >= 0) {
  2474. reg_w(sd, regvals->reg, regvals->val);
  2475. regvals++;
  2476. }
  2477. }
  2478. static void write_i2c_regvals(struct sd *sd,
  2479. const struct ov_i2c_regvals *regvals,
  2480. int n)
  2481. {
  2482. while (--n >= 0) {
  2483. i2c_w(sd, regvals->reg, regvals->val);
  2484. regvals++;
  2485. }
  2486. }
  2487. /****************************************************************************
  2488. *
  2489. * OV511 and sensor configuration
  2490. *
  2491. ***************************************************************************/
  2492. /* This initializes the OV2x10 / OV3610 / OV3620 / OV9600 */
  2493. static void ov_hires_configure(struct sd *sd)
  2494. {
  2495. int high, low;
  2496. if (sd->bridge != BRIDGE_OVFX2) {
  2497. pr_err("error hires sensors only supported with ovfx2\n");
  2498. return;
  2499. }
  2500. PDEBUG(D_PROBE, "starting ov hires configuration");
  2501. /* Detect sensor (sub)type */
  2502. high = i2c_r(sd, 0x0a);
  2503. low = i2c_r(sd, 0x0b);
  2504. /* info("%x, %x", high, low); */
  2505. switch (high) {
  2506. case 0x96:
  2507. switch (low) {
  2508. case 0x40:
  2509. PDEBUG(D_PROBE, "Sensor is a OV2610");
  2510. sd->sensor = SEN_OV2610;
  2511. return;
  2512. case 0x41:
  2513. PDEBUG(D_PROBE, "Sensor is a OV2610AE");
  2514. sd->sensor = SEN_OV2610AE;
  2515. return;
  2516. case 0xb1:
  2517. PDEBUG(D_PROBE, "Sensor is a OV9600");
  2518. sd->sensor = SEN_OV9600;
  2519. return;
  2520. }
  2521. break;
  2522. case 0x36:
  2523. if ((low & 0x0f) == 0x00) {
  2524. PDEBUG(D_PROBE, "Sensor is a OV3610");
  2525. sd->sensor = SEN_OV3610;
  2526. return;
  2527. }
  2528. break;
  2529. }
  2530. pr_err("Error unknown sensor type: %02x%02x\n", high, low);
  2531. }
  2532. /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
  2533. * the same register settings as the OV8610, since they are very similar.
  2534. */
  2535. static void ov8xx0_configure(struct sd *sd)
  2536. {
  2537. int rc;
  2538. PDEBUG(D_PROBE, "starting ov8xx0 configuration");
  2539. /* Detect sensor (sub)type */
  2540. rc = i2c_r(sd, OV7610_REG_COM_I);
  2541. if (rc < 0) {
  2542. PDEBUG(D_ERR, "Error detecting sensor type");
  2543. return;
  2544. }
  2545. if ((rc & 3) == 1)
  2546. sd->sensor = SEN_OV8610;
  2547. else
  2548. pr_err("Unknown image sensor version: %d\n", rc & 3);
  2549. }
  2550. /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
  2551. * the same register settings as the OV7610, since they are very similar.
  2552. */
  2553. static void ov7xx0_configure(struct sd *sd)
  2554. {
  2555. int rc, high, low;
  2556. PDEBUG(D_PROBE, "starting OV7xx0 configuration");
  2557. /* Detect sensor (sub)type */
  2558. rc = i2c_r(sd, OV7610_REG_COM_I);
  2559. /* add OV7670 here
  2560. * it appears to be wrongly detected as a 7610 by default */
  2561. if (rc < 0) {
  2562. PDEBUG(D_ERR, "Error detecting sensor type");
  2563. return;
  2564. }
  2565. if ((rc & 3) == 3) {
  2566. /* quick hack to make OV7670s work */
  2567. high = i2c_r(sd, 0x0a);
  2568. low = i2c_r(sd, 0x0b);
  2569. /* info("%x, %x", high, low); */
  2570. if (high == 0x76 && (low & 0xf0) == 0x70) {
  2571. PDEBUG(D_PROBE, "Sensor is an OV76%02x", low);
  2572. sd->sensor = SEN_OV7670;
  2573. } else {
  2574. PDEBUG(D_PROBE, "Sensor is an OV7610");
  2575. sd->sensor = SEN_OV7610;
  2576. }
  2577. } else if ((rc & 3) == 1) {
  2578. /* I don't know what's different about the 76BE yet. */
  2579. if (i2c_r(sd, 0x15) & 1) {
  2580. PDEBUG(D_PROBE, "Sensor is an OV7620AE");
  2581. sd->sensor = SEN_OV7620AE;
  2582. } else {
  2583. PDEBUG(D_PROBE, "Sensor is an OV76BE");
  2584. sd->sensor = SEN_OV76BE;
  2585. }
  2586. } else if ((rc & 3) == 0) {
  2587. /* try to read product id registers */
  2588. high = i2c_r(sd, 0x0a);
  2589. if (high < 0) {
  2590. PDEBUG(D_ERR, "Error detecting camera chip PID");
  2591. return;
  2592. }
  2593. low = i2c_r(sd, 0x0b);
  2594. if (low < 0) {
  2595. PDEBUG(D_ERR, "Error detecting camera chip VER");
  2596. return;
  2597. }
  2598. if (high == 0x76) {
  2599. switch (low) {
  2600. case 0x30:
  2601. pr_err("Sensor is an OV7630/OV7635\n");
  2602. pr_err("7630 is not supported by this driver\n");
  2603. return;
  2604. case 0x40:
  2605. PDEBUG(D_PROBE, "Sensor is an OV7645");
  2606. sd->sensor = SEN_OV7640; /* FIXME */
  2607. break;
  2608. case 0x45:
  2609. PDEBUG(D_PROBE, "Sensor is an OV7645B");
  2610. sd->sensor = SEN_OV7640; /* FIXME */
  2611. break;
  2612. case 0x48:
  2613. PDEBUG(D_PROBE, "Sensor is an OV7648");
  2614. sd->sensor = SEN_OV7648;
  2615. break;
  2616. case 0x60:
  2617. PDEBUG(D_PROBE, "Sensor is a OV7660");
  2618. sd->sensor = SEN_OV7660;
  2619. break;
  2620. default:
  2621. PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
  2622. return;
  2623. }
  2624. } else {
  2625. PDEBUG(D_PROBE, "Sensor is an OV7620");
  2626. sd->sensor = SEN_OV7620;
  2627. }
  2628. } else {
  2629. pr_err("Unknown image sensor version: %d\n", rc & 3);
  2630. }
  2631. }
  2632. /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
  2633. static void ov6xx0_configure(struct sd *sd)
  2634. {
  2635. int rc;
  2636. PDEBUG(D_PROBE, "starting OV6xx0 configuration");
  2637. /* Detect sensor (sub)type */
  2638. rc = i2c_r(sd, OV7610_REG_COM_I);
  2639. if (rc < 0) {
  2640. PDEBUG(D_ERR, "Error detecting sensor type");
  2641. return;
  2642. }
  2643. /* Ugh. The first two bits are the version bits, but
  2644. * the entire register value must be used. I guess OVT
  2645. * underestimated how many variants they would make. */
  2646. switch (rc) {
  2647. case 0x00:
  2648. sd->sensor = SEN_OV6630;
  2649. pr_warn("WARNING: Sensor is an OV66308. Your camera may have been misdetected in previous driver versions.\n");
  2650. break;
  2651. case 0x01:
  2652. sd->sensor = SEN_OV6620;
  2653. PDEBUG(D_PROBE, "Sensor is an OV6620");
  2654. break;
  2655. case 0x02:
  2656. sd->sensor = SEN_OV6630;
  2657. PDEBUG(D_PROBE, "Sensor is an OV66308AE");
  2658. break;
  2659. case 0x03:
  2660. sd->sensor = SEN_OV66308AF;
  2661. PDEBUG(D_PROBE, "Sensor is an OV66308AF");
  2662. break;
  2663. case 0x90:
  2664. sd->sensor = SEN_OV6630;
  2665. pr_warn("WARNING: Sensor is an OV66307. Your camera may have been misdetected in previous driver versions.\n");
  2666. break;
  2667. default:
  2668. pr_err("FATAL: Unknown sensor version: 0x%02x\n", rc);
  2669. return;
  2670. }
  2671. /* Set sensor-specific vars */
  2672. sd->sif = 1;
  2673. }
  2674. /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
  2675. static void ov51x_led_control(struct sd *sd, int on)
  2676. {
  2677. if (sd->invert_led)
  2678. on = !on;
  2679. switch (sd->bridge) {
  2680. /* OV511 has no LED control */
  2681. case BRIDGE_OV511PLUS:
  2682. reg_w(sd, R511_SYS_LED_CTL, on);
  2683. break;
  2684. case BRIDGE_OV518:
  2685. case BRIDGE_OV518PLUS:
  2686. reg_w_mask(sd, R518_GPIO_OUT, 0x02 * on, 0x02);
  2687. break;
  2688. case BRIDGE_OV519:
  2689. reg_w_mask(sd, OV519_GPIO_DATA_OUT0, on, 1);
  2690. break;
  2691. }
  2692. }
  2693. static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
  2694. {
  2695. struct sd *sd = (struct sd *) gspca_dev;
  2696. if (!sd->snapshot_needs_reset)
  2697. return;
  2698. /* Note it is important that we clear sd->snapshot_needs_reset,
  2699. before actually clearing the snapshot state in the bridge
  2700. otherwise we might race with the pkt_scan interrupt handler */
  2701. sd->snapshot_needs_reset = 0;
  2702. switch (sd->bridge) {
  2703. case BRIDGE_OV511:
  2704. case BRIDGE_OV511PLUS:
  2705. reg_w(sd, R51x_SYS_SNAP, 0x02);
  2706. reg_w(sd, R51x_SYS_SNAP, 0x00);
  2707. break;
  2708. case BRIDGE_OV518:
  2709. case BRIDGE_OV518PLUS:
  2710. reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
  2711. reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
  2712. break;
  2713. case BRIDGE_OV519:
  2714. reg_w(sd, R51x_SYS_RESET, 0x40);
  2715. reg_w(sd, R51x_SYS_RESET, 0x00);
  2716. break;
  2717. }
  2718. }
  2719. static void ov51x_upload_quan_tables(struct sd *sd)
  2720. {
  2721. const unsigned char yQuanTable511[] = {
  2722. 0, 1, 1, 2, 2, 3, 3, 4,
  2723. 1, 1, 1, 2, 2, 3, 4, 4,
  2724. 1, 1, 2, 2, 3, 4, 4, 4,
  2725. 2, 2, 2, 3, 4, 4, 4, 4,
  2726. 2, 2, 3, 4, 4, 5, 5, 5,
  2727. 3, 3, 4, 4, 5, 5, 5, 5,
  2728. 3, 4, 4, 4, 5, 5, 5, 5,
  2729. 4, 4, 4, 4, 5, 5, 5, 5
  2730. };
  2731. const unsigned char uvQuanTable511[] = {
  2732. 0, 2, 2, 3, 4, 4, 4, 4,
  2733. 2, 2, 2, 4, 4, 4, 4, 4,
  2734. 2, 2, 3, 4, 4, 4, 4, 4,
  2735. 3, 4, 4, 4, 4, 4, 4, 4,
  2736. 4, 4, 4, 4, 4, 4, 4, 4,
  2737. 4, 4, 4, 4, 4, 4, 4, 4,
  2738. 4, 4, 4, 4, 4, 4, 4, 4,
  2739. 4, 4, 4, 4, 4, 4, 4, 4
  2740. };
  2741. /* OV518 quantization tables are 8x4 (instead of 8x8) */
  2742. const unsigned char yQuanTable518[] = {
  2743. 5, 4, 5, 6, 6, 7, 7, 7,
  2744. 5, 5, 5, 5, 6, 7, 7, 7,
  2745. 6, 6, 6, 6, 7, 7, 7, 8,
  2746. 7, 7, 6, 7, 7, 7, 8, 8
  2747. };
  2748. const unsigned char uvQuanTable518[] = {
  2749. 6, 6, 6, 7, 7, 7, 7, 7,
  2750. 6, 6, 6, 7, 7, 7, 7, 7,
  2751. 6, 6, 6, 7, 7, 7, 7, 8,
  2752. 7, 7, 7, 7, 7, 7, 8, 8
  2753. };
  2754. const unsigned char *pYTable, *pUVTable;
  2755. unsigned char val0, val1;
  2756. int i, size, reg = R51x_COMP_LUT_BEGIN;
  2757. PDEBUG(D_PROBE, "Uploading quantization tables");
  2758. if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
  2759. pYTable = yQuanTable511;
  2760. pUVTable = uvQuanTable511;
  2761. size = 32;
  2762. } else {
  2763. pYTable = yQuanTable518;
  2764. pUVTable = uvQuanTable518;
  2765. size = 16;
  2766. }
  2767. for (i = 0; i < size; i++) {
  2768. val0 = *pYTable++;
  2769. val1 = *pYTable++;
  2770. val0 &= 0x0f;
  2771. val1 &= 0x0f;
  2772. val0 |= val1 << 4;
  2773. reg_w(sd, reg, val0);
  2774. val0 = *pUVTable++;
  2775. val1 = *pUVTable++;
  2776. val0 &= 0x0f;
  2777. val1 &= 0x0f;
  2778. val0 |= val1 << 4;
  2779. reg_w(sd, reg + size, val0);
  2780. reg++;
  2781. }
  2782. }
  2783. /* This initializes the OV511/OV511+ and the sensor */
  2784. static void ov511_configure(struct gspca_dev *gspca_dev)
  2785. {
  2786. struct sd *sd = (struct sd *) gspca_dev;
  2787. /* For 511 and 511+ */
  2788. const struct ov_regvals init_511[] = {
  2789. { R51x_SYS_RESET, 0x7f },
  2790. { R51x_SYS_INIT, 0x01 },
  2791. { R51x_SYS_RESET, 0x7f },
  2792. { R51x_SYS_INIT, 0x01 },
  2793. { R51x_SYS_RESET, 0x3f },
  2794. { R51x_SYS_INIT, 0x01 },
  2795. { R51x_SYS_RESET, 0x3d },
  2796. };
  2797. const struct ov_regvals norm_511[] = {
  2798. { R511_DRAM_FLOW_CTL, 0x01 },
  2799. { R51x_SYS_SNAP, 0x00 },
  2800. { R51x_SYS_SNAP, 0x02 },
  2801. { R51x_SYS_SNAP, 0x00 },
  2802. { R511_FIFO_OPTS, 0x1f },
  2803. { R511_COMP_EN, 0x00 },
  2804. { R511_COMP_LUT_EN, 0x03 },
  2805. };
  2806. const struct ov_regvals norm_511_p[] = {
  2807. { R511_DRAM_FLOW_CTL, 0xff },
  2808. { R51x_SYS_SNAP, 0x00 },
  2809. { R51x_SYS_SNAP, 0x02 },
  2810. { R51x_SYS_SNAP, 0x00 },
  2811. { R511_FIFO_OPTS, 0xff },
  2812. { R511_COMP_EN, 0x00 },
  2813. { R511_COMP_LUT_EN, 0x03 },
  2814. };
  2815. const struct ov_regvals compress_511[] = {
  2816. { 0x70, 0x1f },
  2817. { 0x71, 0x05 },
  2818. { 0x72, 0x06 },
  2819. { 0x73, 0x06 },
  2820. { 0x74, 0x14 },
  2821. { 0x75, 0x03 },
  2822. { 0x76, 0x04 },
  2823. { 0x77, 0x04 },
  2824. };
  2825. PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
  2826. write_regvals(sd, init_511, ARRAY_SIZE(init_511));
  2827. switch (sd->bridge) {
  2828. case BRIDGE_OV511:
  2829. write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
  2830. break;
  2831. case BRIDGE_OV511PLUS:
  2832. write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
  2833. break;
  2834. }
  2835. /* Init compression */
  2836. write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
  2837. ov51x_upload_quan_tables(sd);
  2838. }
  2839. /* This initializes the OV518/OV518+ and the sensor */
  2840. static void ov518_configure(struct gspca_dev *gspca_dev)
  2841. {
  2842. struct sd *sd = (struct sd *) gspca_dev;
  2843. /* For 518 and 518+ */
  2844. const struct ov_regvals init_518[] = {
  2845. { R51x_SYS_RESET, 0x40 },
  2846. { R51x_SYS_INIT, 0xe1 },
  2847. { R51x_SYS_RESET, 0x3e },
  2848. { R51x_SYS_INIT, 0xe1 },
  2849. { R51x_SYS_RESET, 0x00 },
  2850. { R51x_SYS_INIT, 0xe1 },
  2851. { 0x46, 0x00 },
  2852. { 0x5d, 0x03 },
  2853. };
  2854. const struct ov_regvals norm_518[] = {
  2855. { R51x_SYS_SNAP, 0x02 }, /* Reset */
  2856. { R51x_SYS_SNAP, 0x01 }, /* Enable */
  2857. { 0x31, 0x0f },
  2858. { 0x5d, 0x03 },
  2859. { 0x24, 0x9f },
  2860. { 0x25, 0x90 },
  2861. { 0x20, 0x00 },
  2862. { 0x51, 0x04 },
  2863. { 0x71, 0x19 },
  2864. { 0x2f, 0x80 },
  2865. };
  2866. const struct ov_regvals norm_518_p[] = {
  2867. { R51x_SYS_SNAP, 0x02 }, /* Reset */
  2868. { R51x_SYS_SNAP, 0x01 }, /* Enable */
  2869. { 0x31, 0x0f },
  2870. { 0x5d, 0x03 },
  2871. { 0x24, 0x9f },
  2872. { 0x25, 0x90 },
  2873. { 0x20, 0x60 },
  2874. { 0x51, 0x02 },
  2875. { 0x71, 0x19 },
  2876. { 0x40, 0xff },
  2877. { 0x41, 0x42 },
  2878. { 0x46, 0x00 },
  2879. { 0x33, 0x04 },
  2880. { 0x21, 0x19 },
  2881. { 0x3f, 0x10 },
  2882. { 0x2f, 0x80 },
  2883. };
  2884. /* First 5 bits of custom ID reg are a revision ID on OV518 */
  2885. PDEBUG(D_PROBE, "Device revision %d",
  2886. 0x1f & reg_r(sd, R51x_SYS_CUST_ID));
  2887. write_regvals(sd, init_518, ARRAY_SIZE(init_518));
  2888. /* Set LED GPIO pin to output mode */
  2889. reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
  2890. switch (sd->bridge) {
  2891. case BRIDGE_OV518:
  2892. write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
  2893. break;
  2894. case BRIDGE_OV518PLUS:
  2895. write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
  2896. break;
  2897. }
  2898. ov51x_upload_quan_tables(sd);
  2899. reg_w(sd, 0x2f, 0x80);
  2900. }
  2901. static void ov519_configure(struct sd *sd)
  2902. {
  2903. static const struct ov_regvals init_519[] = {
  2904. { 0x5a, 0x6d }, /* EnableSystem */
  2905. { 0x53, 0x9b }, /* don't enable the microcontroller */
  2906. { OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
  2907. { 0x5d, 0x03 },
  2908. { 0x49, 0x01 },
  2909. { 0x48, 0x00 },
  2910. /* Set LED pin to output mode. Bit 4 must be cleared or sensor
  2911. * detection will fail. This deserves further investigation. */
  2912. { OV519_GPIO_IO_CTRL0, 0xee },
  2913. { OV519_R51_RESET1, 0x0f },
  2914. { OV519_R51_RESET1, 0x00 },
  2915. { 0x22, 0x00 },
  2916. /* windows reads 0x55 at this point*/
  2917. };
  2918. write_regvals(sd, init_519, ARRAY_SIZE(init_519));
  2919. }
  2920. static void ovfx2_configure(struct sd *sd)
  2921. {
  2922. static const struct ov_regvals init_fx2[] = {
  2923. { 0x00, 0x60 },
  2924. { 0x02, 0x01 },
  2925. { 0x0f, 0x1d },
  2926. { 0xe9, 0x82 },
  2927. { 0xea, 0xc7 },
  2928. { 0xeb, 0x10 },
  2929. { 0xec, 0xf6 },
  2930. };
  2931. sd->stopped = 1;
  2932. write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
  2933. }
  2934. /* set the mode */
  2935. /* This function works for ov7660 only */
  2936. static void ov519_set_mode(struct sd *sd)
  2937. {
  2938. static const struct ov_regvals bridge_ov7660[2][10] = {
  2939. {{0x10, 0x14}, {0x11, 0x1e}, {0x12, 0x00}, {0x13, 0x00},
  2940. {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
  2941. {0x25, 0x01}, {0x26, 0x00}},
  2942. {{0x10, 0x28}, {0x11, 0x3c}, {0x12, 0x00}, {0x13, 0x00},
  2943. {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
  2944. {0x25, 0x03}, {0x26, 0x00}}
  2945. };
  2946. static const struct ov_i2c_regvals sensor_ov7660[2][3] = {
  2947. {{0x12, 0x00}, {0x24, 0x00}, {0x0c, 0x0c}},
  2948. {{0x12, 0x00}, {0x04, 0x00}, {0x0c, 0x00}}
  2949. };
  2950. static const struct ov_i2c_regvals sensor_ov7660_2[] = {
  2951. {OV7670_R17_HSTART, 0x13},
  2952. {OV7670_R18_HSTOP, 0x01},
  2953. {OV7670_R32_HREF, 0x92},
  2954. {OV7670_R19_VSTART, 0x02},
  2955. {OV7670_R1A_VSTOP, 0x7a},
  2956. {OV7670_R03_VREF, 0x00},
  2957. /* {0x33, 0x00}, */
  2958. /* {0x34, 0x07}, */
  2959. /* {0x36, 0x00}, */
  2960. /* {0x6b, 0x0a}, */
  2961. };
  2962. write_regvals(sd, bridge_ov7660[sd->gspca_dev.curr_mode],
  2963. ARRAY_SIZE(bridge_ov7660[0]));
  2964. write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode],
  2965. ARRAY_SIZE(sensor_ov7660[0]));
  2966. write_i2c_regvals(sd, sensor_ov7660_2,
  2967. ARRAY_SIZE(sensor_ov7660_2));
  2968. }
  2969. /* set the frame rate */
  2970. /* This function works for sensors ov7640, ov7648 ov7660 and ov7670 only */
  2971. static void ov519_set_fr(struct sd *sd)
  2972. {
  2973. int fr;
  2974. u8 clock;
  2975. /* frame rate table with indices:
  2976. * - mode = 0: 320x240, 1: 640x480
  2977. * - fr rate = 0: 30, 1: 25, 2: 20, 3: 15, 4: 10, 5: 5
  2978. * - reg = 0: bridge a4, 1: bridge 23, 2: sensor 11 (clock)
  2979. */
  2980. static const u8 fr_tb[2][6][3] = {
  2981. {{0x04, 0xff, 0x00},
  2982. {0x04, 0x1f, 0x00},
  2983. {0x04, 0x1b, 0x00},
  2984. {0x04, 0x15, 0x00},
  2985. {0x04, 0x09, 0x00},
  2986. {0x04, 0x01, 0x00}},
  2987. {{0x0c, 0xff, 0x00},
  2988. {0x0c, 0x1f, 0x00},
  2989. {0x0c, 0x1b, 0x00},
  2990. {0x04, 0xff, 0x01},
  2991. {0x04, 0x1f, 0x01},
  2992. {0x04, 0x1b, 0x01}},
  2993. };
  2994. if (frame_rate > 0)
  2995. sd->frame_rate = frame_rate;
  2996. if (sd->frame_rate >= 30)
  2997. fr = 0;
  2998. else if (sd->frame_rate >= 25)
  2999. fr = 1;
  3000. else if (sd->frame_rate >= 20)
  3001. fr = 2;
  3002. else if (sd->frame_rate >= 15)
  3003. fr = 3;
  3004. else if (sd->frame_rate >= 10)
  3005. fr = 4;
  3006. else
  3007. fr = 5;
  3008. reg_w(sd, 0xa4, fr_tb[sd->gspca_dev.curr_mode][fr][0]);
  3009. reg_w(sd, 0x23, fr_tb[sd->gspca_dev.curr_mode][fr][1]);
  3010. clock = fr_tb[sd->gspca_dev.curr_mode][fr][2];
  3011. if (sd->sensor == SEN_OV7660)
  3012. clock |= 0x80; /* enable double clock */
  3013. ov518_i2c_w(sd, OV7670_R11_CLKRC, clock);
  3014. }
  3015. static void setautogain(struct gspca_dev *gspca_dev)
  3016. {
  3017. struct sd *sd = (struct sd *) gspca_dev;
  3018. i2c_w_mask(sd, 0x13, sd->ctrls[AUTOGAIN].val ? 0x05 : 0x00, 0x05);
  3019. }
  3020. /* this function is called at probe time */
  3021. static int sd_config(struct gspca_dev *gspca_dev,
  3022. const struct usb_device_id *id)
  3023. {
  3024. struct sd *sd = (struct sd *) gspca_dev;
  3025. struct cam *cam = &gspca_dev->cam;
  3026. sd->bridge = id->driver_info & BRIDGE_MASK;
  3027. sd->invert_led = (id->driver_info & BRIDGE_INVERT_LED) != 0;
  3028. switch (sd->bridge) {
  3029. case BRIDGE_OV511:
  3030. case BRIDGE_OV511PLUS:
  3031. cam->cam_mode = ov511_vga_mode;
  3032. cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
  3033. break;
  3034. case BRIDGE_OV518:
  3035. case BRIDGE_OV518PLUS:
  3036. cam->cam_mode = ov518_vga_mode;
  3037. cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
  3038. break;
  3039. case BRIDGE_OV519:
  3040. cam->cam_mode = ov519_vga_mode;
  3041. cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
  3042. break;
  3043. case BRIDGE_OVFX2:
  3044. cam->cam_mode = ov519_vga_mode;
  3045. cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
  3046. cam->bulk_size = OVFX2_BULK_SIZE;
  3047. cam->bulk_nurbs = MAX_NURBS;
  3048. cam->bulk = 1;
  3049. break;
  3050. case BRIDGE_W9968CF:
  3051. cam->cam_mode = w9968cf_vga_mode;
  3052. cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
  3053. break;
  3054. }
  3055. gspca_dev->cam.ctrls = sd->ctrls;
  3056. sd->quality = QUALITY_DEF;
  3057. sd->frame_rate = 15;
  3058. return 0;
  3059. }
  3060. /* this function is called at probe and resume time */
  3061. static int sd_init(struct gspca_dev *gspca_dev)
  3062. {
  3063. struct sd *sd = (struct sd *) gspca_dev;
  3064. struct cam *cam = &gspca_dev->cam;
  3065. switch (sd->bridge) {
  3066. case BRIDGE_OV511:
  3067. case BRIDGE_OV511PLUS:
  3068. ov511_configure(gspca_dev);
  3069. break;
  3070. case BRIDGE_OV518:
  3071. case BRIDGE_OV518PLUS:
  3072. ov518_configure(gspca_dev);
  3073. break;
  3074. case BRIDGE_OV519:
  3075. ov519_configure(sd);
  3076. break;
  3077. case BRIDGE_OVFX2:
  3078. ovfx2_configure(sd);
  3079. break;
  3080. case BRIDGE_W9968CF:
  3081. w9968cf_configure(sd);
  3082. break;
  3083. }
  3084. /* The OV519 must be more aggressive about sensor detection since
  3085. * I2C write will never fail if the sensor is not present. We have
  3086. * to try to initialize the sensor to detect its presence */
  3087. sd->sensor = -1;
  3088. /* Test for 76xx */
  3089. if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
  3090. ov7xx0_configure(sd);
  3091. /* Test for 6xx0 */
  3092. } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
  3093. ov6xx0_configure(sd);
  3094. /* Test for 8xx0 */
  3095. } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
  3096. ov8xx0_configure(sd);
  3097. /* Test for 3xxx / 2xxx */
  3098. } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
  3099. ov_hires_configure(sd);
  3100. } else {
  3101. pr_err("Can't determine sensor slave IDs\n");
  3102. goto error;
  3103. }
  3104. if (sd->sensor < 0)
  3105. goto error;
  3106. ov51x_led_control(sd, 0); /* turn LED off */
  3107. switch (sd->bridge) {
  3108. case BRIDGE_OV511:
  3109. case BRIDGE_OV511PLUS:
  3110. if (sd->sif) {
  3111. cam->cam_mode = ov511_sif_mode;
  3112. cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
  3113. }
  3114. break;
  3115. case BRIDGE_OV518:
  3116. case BRIDGE_OV518PLUS:
  3117. if (sd->sif) {
  3118. cam->cam_mode = ov518_sif_mode;
  3119. cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
  3120. }
  3121. break;
  3122. case BRIDGE_OV519:
  3123. if (sd->sif) {
  3124. cam->cam_mode = ov519_sif_mode;
  3125. cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
  3126. }
  3127. break;
  3128. case BRIDGE_OVFX2:
  3129. switch (sd->sensor) {
  3130. case SEN_OV2610:
  3131. case SEN_OV2610AE:
  3132. cam->cam_mode = ovfx2_ov2610_mode;
  3133. cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
  3134. break;
  3135. case SEN_OV3610:
  3136. cam->cam_mode = ovfx2_ov3610_mode;
  3137. cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
  3138. break;
  3139. case SEN_OV9600:
  3140. cam->cam_mode = ovfx2_ov9600_mode;
  3141. cam->nmodes = ARRAY_SIZE(ovfx2_ov9600_mode);
  3142. break;
  3143. default:
  3144. if (sd->sif) {
  3145. cam->cam_mode = ov519_sif_mode;
  3146. cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
  3147. }
  3148. break;
  3149. }
  3150. break;
  3151. case BRIDGE_W9968CF:
  3152. if (sd->sif)
  3153. cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode) - 1;
  3154. /* w9968cf needs initialisation once the sensor is known */
  3155. w9968cf_init(sd);
  3156. break;
  3157. }
  3158. gspca_dev->ctrl_dis = ctrl_dis[sd->sensor];
  3159. /* initialize the sensor */
  3160. switch (sd->sensor) {
  3161. case SEN_OV2610:
  3162. write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610));
  3163. /* Enable autogain, autoexpo, awb, bandfilter */
  3164. i2c_w_mask(sd, 0x13, 0x27, 0x27);
  3165. break;
  3166. case SEN_OV2610AE:
  3167. write_i2c_regvals(sd, norm_2610ae, ARRAY_SIZE(norm_2610ae));
  3168. /* enable autoexpo */
  3169. i2c_w_mask(sd, 0x13, 0x05, 0x05);
  3170. break;
  3171. case SEN_OV3610:
  3172. write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b));
  3173. /* Enable autogain, autoexpo, awb, bandfilter */
  3174. i2c_w_mask(sd, 0x13, 0x27, 0x27);
  3175. break;
  3176. case SEN_OV6620:
  3177. write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20));
  3178. break;
  3179. case SEN_OV6630:
  3180. case SEN_OV66308AF:
  3181. sd->ctrls[CONTRAST].def = 200;
  3182. /* The default is too low for the ov6630 */
  3183. write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30));
  3184. break;
  3185. default:
  3186. /* case SEN_OV7610: */
  3187. /* case SEN_OV76BE: */
  3188. write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610));
  3189. i2c_w_mask(sd, 0x0e, 0x00, 0x40);
  3190. break;
  3191. case SEN_OV7620:
  3192. case SEN_OV7620AE:
  3193. write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620));
  3194. break;
  3195. case SEN_OV7640:
  3196. case SEN_OV7648:
  3197. write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640));
  3198. break;
  3199. case SEN_OV7660:
  3200. i2c_w(sd, OV7670_R12_COM7, OV7670_COM7_RESET);
  3201. msleep(14);
  3202. reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
  3203. write_regvals(sd, init_519_ov7660,
  3204. ARRAY_SIZE(init_519_ov7660));
  3205. write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660));
  3206. sd->gspca_dev.curr_mode = 1; /* 640x480 */
  3207. ov519_set_mode(sd);
  3208. ov519_set_fr(sd);
  3209. sd->ctrls[COLORS].max = 4; /* 0..4 */
  3210. sd->ctrls[COLORS].val =
  3211. sd->ctrls[COLORS].def = 2;
  3212. setcolors(gspca_dev);
  3213. sd->ctrls[CONTRAST].max = 6; /* 0..6 */
  3214. sd->ctrls[CONTRAST].val =
  3215. sd->ctrls[CONTRAST].def = 3;
  3216. setcontrast(gspca_dev);
  3217. sd->ctrls[BRIGHTNESS].max = 6; /* 0..6 */
  3218. sd->ctrls[BRIGHTNESS].val =
  3219. sd->ctrls[BRIGHTNESS].def = 3;
  3220. setbrightness(gspca_dev);
  3221. sd_reset_snapshot(gspca_dev);
  3222. ov51x_restart(sd);
  3223. ov51x_stop(sd); /* not in win traces */
  3224. ov51x_led_control(sd, 0);
  3225. break;
  3226. case SEN_OV7670:
  3227. sd->ctrls[FREQ].max = 3; /* auto */
  3228. sd->ctrls[FREQ].def = 3;
  3229. write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670));
  3230. break;
  3231. case SEN_OV8610:
  3232. write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610));
  3233. break;
  3234. case SEN_OV9600:
  3235. write_i2c_regvals(sd, norm_9600, ARRAY_SIZE(norm_9600));
  3236. /* enable autoexpo */
  3237. /* i2c_w_mask(sd, 0x13, 0x05, 0x05); */
  3238. break;
  3239. }
  3240. return gspca_dev->usb_err;
  3241. error:
  3242. PDEBUG(D_ERR, "OV519 Config failed");
  3243. return -EINVAL;
  3244. }
  3245. /* function called at start time before URB creation */
  3246. static int sd_isoc_init(struct gspca_dev *gspca_dev)
  3247. {
  3248. struct sd *sd = (struct sd *) gspca_dev;
  3249. switch (sd->bridge) {
  3250. case BRIDGE_OVFX2:
  3251. if (gspca_dev->width != 800)
  3252. gspca_dev->cam.bulk_size = OVFX2_BULK_SIZE;
  3253. else
  3254. gspca_dev->cam.bulk_size = 7 * 4096;
  3255. break;
  3256. }
  3257. return 0;
  3258. }
  3259. /* Set up the OV511/OV511+ with the given image parameters.
  3260. *
  3261. * Do not put any sensor-specific code in here (including I2C I/O functions)
  3262. */
  3263. static void ov511_mode_init_regs(struct sd *sd)
  3264. {
  3265. int hsegs, vsegs, packet_size, fps, needed;
  3266. int interlaced = 0;
  3267. struct usb_host_interface *alt;
  3268. struct usb_interface *intf;
  3269. intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
  3270. alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
  3271. if (!alt) {
  3272. pr_err("Couldn't get altsetting\n");
  3273. sd->gspca_dev.usb_err = -EIO;
  3274. return;
  3275. }
  3276. packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
  3277. reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
  3278. reg_w(sd, R511_CAM_UV_EN, 0x01);
  3279. reg_w(sd, R511_SNAP_UV_EN, 0x01);
  3280. reg_w(sd, R511_SNAP_OPTS, 0x03);
  3281. /* Here I'm assuming that snapshot size == image size.
  3282. * I hope that's always true. --claudio
  3283. */
  3284. hsegs = (sd->gspca_dev.width >> 3) - 1;
  3285. vsegs = (sd->gspca_dev.height >> 3) - 1;
  3286. reg_w(sd, R511_CAM_PXCNT, hsegs);
  3287. reg_w(sd, R511_CAM_LNCNT, vsegs);
  3288. reg_w(sd, R511_CAM_PXDIV, 0x00);
  3289. reg_w(sd, R511_CAM_LNDIV, 0x00);
  3290. /* YUV420, low pass filter on */
  3291. reg_w(sd, R511_CAM_OPTS, 0x03);
  3292. /* Snapshot additions */
  3293. reg_w(sd, R511_SNAP_PXCNT, hsegs);
  3294. reg_w(sd, R511_SNAP_LNCNT, vsegs);
  3295. reg_w(sd, R511_SNAP_PXDIV, 0x00);
  3296. reg_w(sd, R511_SNAP_LNDIV, 0x00);
  3297. /******** Set the framerate ********/
  3298. if (frame_rate > 0)
  3299. sd->frame_rate = frame_rate;
  3300. switch (sd->sensor) {
  3301. case SEN_OV6620:
  3302. /* No framerate control, doesn't like higher rates yet */
  3303. sd->clockdiv = 3;
  3304. break;
  3305. /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
  3306. for more sensors we need to do this for them too */
  3307. case SEN_OV7620:
  3308. case SEN_OV7620AE:
  3309. case SEN_OV7640:
  3310. case SEN_OV7648:
  3311. case SEN_OV76BE:
  3312. if (sd->gspca_dev.width == 320)
  3313. interlaced = 1;
  3314. /* Fall through */
  3315. case SEN_OV6630:
  3316. case SEN_OV7610:
  3317. case SEN_OV7670:
  3318. switch (sd->frame_rate) {
  3319. case 30:
  3320. case 25:
  3321. /* Not enough bandwidth to do 640x480 @ 30 fps */
  3322. if (sd->gspca_dev.width != 640) {
  3323. sd->clockdiv = 0;
  3324. break;
  3325. }
  3326. /* Fall through for 640x480 case */
  3327. default:
  3328. /* case 20: */
  3329. /* case 15: */
  3330. sd->clockdiv = 1;
  3331. break;
  3332. case 10:
  3333. sd->clockdiv = 2;
  3334. break;
  3335. case 5:
  3336. sd->clockdiv = 5;
  3337. break;
  3338. }
  3339. if (interlaced) {
  3340. sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
  3341. /* Higher then 10 does not work */
  3342. if (sd->clockdiv > 10)
  3343. sd->clockdiv = 10;
  3344. }
  3345. break;
  3346. case SEN_OV8610:
  3347. /* No framerate control ?? */
  3348. sd->clockdiv = 0;
  3349. break;
  3350. }
  3351. /* Check if we have enough bandwidth to disable compression */
  3352. fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
  3353. needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
  3354. /* 1000 isoc packets/sec */
  3355. if (needed > 1000 * packet_size) {
  3356. /* Enable Y and UV quantization and compression */
  3357. reg_w(sd, R511_COMP_EN, 0x07);
  3358. reg_w(sd, R511_COMP_LUT_EN, 0x03);
  3359. } else {
  3360. reg_w(sd, R511_COMP_EN, 0x06);
  3361. reg_w(sd, R511_COMP_LUT_EN, 0x00);
  3362. }
  3363. reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
  3364. reg_w(sd, R51x_SYS_RESET, 0);
  3365. }
  3366. /* Sets up the OV518/OV518+ with the given image parameters
  3367. *
  3368. * OV518 needs a completely different approach, until we can figure out what
  3369. * the individual registers do. Also, only 15 FPS is supported now.
  3370. *
  3371. * Do not put any sensor-specific code in here (including I2C I/O functions)
  3372. */
  3373. static void ov518_mode_init_regs(struct sd *sd)
  3374. {
  3375. int hsegs, vsegs, packet_size;
  3376. struct usb_host_interface *alt;
  3377. struct usb_interface *intf;
  3378. intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
  3379. alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
  3380. if (!alt) {
  3381. pr_err("Couldn't get altsetting\n");
  3382. sd->gspca_dev.usb_err = -EIO;
  3383. return;
  3384. }
  3385. packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
  3386. ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
  3387. /******** Set the mode ********/
  3388. reg_w(sd, 0x2b, 0);
  3389. reg_w(sd, 0x2c, 0);
  3390. reg_w(sd, 0x2d, 0);
  3391. reg_w(sd, 0x2e, 0);
  3392. reg_w(sd, 0x3b, 0);
  3393. reg_w(sd, 0x3c, 0);
  3394. reg_w(sd, 0x3d, 0);
  3395. reg_w(sd, 0x3e, 0);
  3396. if (sd->bridge == BRIDGE_OV518) {
  3397. /* Set 8-bit (YVYU) input format */
  3398. reg_w_mask(sd, 0x20, 0x08, 0x08);
  3399. /* Set 12-bit (4:2:0) output format */
  3400. reg_w_mask(sd, 0x28, 0x80, 0xf0);
  3401. reg_w_mask(sd, 0x38, 0x80, 0xf0);
  3402. } else {
  3403. reg_w(sd, 0x28, 0x80);
  3404. reg_w(sd, 0x38, 0x80);
  3405. }
  3406. hsegs = sd->gspca_dev.width / 16;
  3407. vsegs = sd->gspca_dev.height / 4;
  3408. reg_w(sd, 0x29, hsegs);
  3409. reg_w(sd, 0x2a, vsegs);
  3410. reg_w(sd, 0x39, hsegs);
  3411. reg_w(sd, 0x3a, vsegs);
  3412. /* Windows driver does this here; who knows why */
  3413. reg_w(sd, 0x2f, 0x80);
  3414. /******** Set the framerate ********/
  3415. sd->clockdiv = 1;
  3416. /* Mode independent, but framerate dependent, regs */
  3417. /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
  3418. reg_w(sd, 0x51, 0x04);
  3419. reg_w(sd, 0x22, 0x18);
  3420. reg_w(sd, 0x23, 0xff);
  3421. if (sd->bridge == BRIDGE_OV518PLUS) {
  3422. switch (sd->sensor) {
  3423. case SEN_OV7620AE:
  3424. if (sd->gspca_dev.width == 320) {
  3425. reg_w(sd, 0x20, 0x00);
  3426. reg_w(sd, 0x21, 0x19);
  3427. } else {
  3428. reg_w(sd, 0x20, 0x60);
  3429. reg_w(sd, 0x21, 0x1f);
  3430. }
  3431. break;
  3432. case SEN_OV7620:
  3433. reg_w(sd, 0x20, 0x00);
  3434. reg_w(sd, 0x21, 0x19);
  3435. break;
  3436. default:
  3437. reg_w(sd, 0x21, 0x19);
  3438. }
  3439. } else
  3440. reg_w(sd, 0x71, 0x17); /* Compression-related? */
  3441. /* FIXME: Sensor-specific */
  3442. /* Bit 5 is what matters here. Of course, it is "reserved" */
  3443. i2c_w(sd, 0x54, 0x23);
  3444. reg_w(sd, 0x2f, 0x80);
  3445. if (sd->bridge == BRIDGE_OV518PLUS) {
  3446. reg_w(sd, 0x24, 0x94);
  3447. reg_w(sd, 0x25, 0x90);
  3448. ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
  3449. ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
  3450. ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
  3451. ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
  3452. ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
  3453. ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
  3454. ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
  3455. ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
  3456. ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
  3457. } else {
  3458. reg_w(sd, 0x24, 0x9f);
  3459. reg_w(sd, 0x25, 0x90);
  3460. ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
  3461. ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
  3462. ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
  3463. ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
  3464. ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
  3465. ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
  3466. ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
  3467. ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
  3468. ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
  3469. }
  3470. reg_w(sd, 0x2f, 0x80);
  3471. }
  3472. /* Sets up the OV519 with the given image parameters
  3473. *
  3474. * OV519 needs a completely different approach, until we can figure out what
  3475. * the individual registers do.
  3476. *
  3477. * Do not put any sensor-specific code in here (including I2C I/O functions)
  3478. */
  3479. static void ov519_mode_init_regs(struct sd *sd)
  3480. {
  3481. static const struct ov_regvals mode_init_519_ov7670[] = {
  3482. { 0x5d, 0x03 }, /* Turn off suspend mode */
  3483. { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
  3484. { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
  3485. { 0xa2, 0x20 }, /* a2-a5 are undocumented */
  3486. { 0xa3, 0x18 },
  3487. { 0xa4, 0x04 },
  3488. { 0xa5, 0x28 },
  3489. { 0x37, 0x00 }, /* SetUsbInit */
  3490. { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
  3491. /* Enable both fields, YUV Input, disable defect comp (why?) */
  3492. { 0x20, 0x0c },
  3493. { 0x21, 0x38 },
  3494. { 0x22, 0x1d },
  3495. { 0x17, 0x50 }, /* undocumented */
  3496. { 0x37, 0x00 }, /* undocumented */
  3497. { 0x40, 0xff }, /* I2C timeout counter */
  3498. { 0x46, 0x00 }, /* I2C clock prescaler */
  3499. { 0x59, 0x04 }, /* new from windrv 090403 */
  3500. { 0xff, 0x00 }, /* undocumented */
  3501. /* windows reads 0x55 at this point, why? */
  3502. };
  3503. static const struct ov_regvals mode_init_519[] = {
  3504. { 0x5d, 0x03 }, /* Turn off suspend mode */
  3505. { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
  3506. { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
  3507. { 0xa2, 0x20 }, /* a2-a5 are undocumented */
  3508. { 0xa3, 0x18 },
  3509. { 0xa4, 0x04 },
  3510. { 0xa5, 0x28 },
  3511. { 0x37, 0x00 }, /* SetUsbInit */
  3512. { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
  3513. /* Enable both fields, YUV Input, disable defect comp (why?) */
  3514. { 0x22, 0x1d },
  3515. { 0x17, 0x50 }, /* undocumented */
  3516. { 0x37, 0x00 }, /* undocumented */
  3517. { 0x40, 0xff }, /* I2C timeout counter */
  3518. { 0x46, 0x00 }, /* I2C clock prescaler */
  3519. { 0x59, 0x04 }, /* new from windrv 090403 */
  3520. { 0xff, 0x00 }, /* undocumented */
  3521. /* windows reads 0x55 at this point, why? */
  3522. };
  3523. /******** Set the mode ********/
  3524. switch (sd->sensor) {
  3525. default:
  3526. write_regvals(sd, mode_init_519, ARRAY_SIZE(mode_init_519));
  3527. if (sd->sensor == SEN_OV7640 ||
  3528. sd->sensor == SEN_OV7648) {
  3529. /* Select 8-bit input mode */
  3530. reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
  3531. }
  3532. break;
  3533. case SEN_OV7660:
  3534. return; /* done by ov519_set_mode/fr() */
  3535. case SEN_OV7670:
  3536. write_regvals(sd, mode_init_519_ov7670,
  3537. ARRAY_SIZE(mode_init_519_ov7670));
  3538. break;
  3539. }
  3540. reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
  3541. reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
  3542. if (sd->sensor == SEN_OV7670 &&
  3543. sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
  3544. reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
  3545. else if (sd->sensor == SEN_OV7648 &&
  3546. sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
  3547. reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
  3548. else
  3549. reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
  3550. reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
  3551. reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
  3552. reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
  3553. reg_w(sd, OV519_R16_DIVIDER, 0x00);
  3554. reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
  3555. reg_w(sd, 0x26, 0x00); /* Undocumented */
  3556. /******** Set the framerate ********/
  3557. if (frame_rate > 0)
  3558. sd->frame_rate = frame_rate;
  3559. /* FIXME: These are only valid at the max resolution. */
  3560. sd->clockdiv = 0;
  3561. switch (sd->sensor) {
  3562. case SEN_OV7640:
  3563. case SEN_OV7648:
  3564. switch (sd->frame_rate) {
  3565. default:
  3566. /* case 30: */
  3567. reg_w(sd, 0xa4, 0x0c);
  3568. reg_w(sd, 0x23, 0xff);
  3569. break;
  3570. case 25:
  3571. reg_w(sd, 0xa4, 0x0c);
  3572. reg_w(sd, 0x23, 0x1f);
  3573. break;
  3574. case 20:
  3575. reg_w(sd, 0xa4, 0x0c);
  3576. reg_w(sd, 0x23, 0x1b);
  3577. break;
  3578. case 15:
  3579. reg_w(sd, 0xa4, 0x04);
  3580. reg_w(sd, 0x23, 0xff);
  3581. sd->clockdiv = 1;
  3582. break;
  3583. case 10:
  3584. reg_w(sd, 0xa4, 0x04);
  3585. reg_w(sd, 0x23, 0x1f);
  3586. sd->clockdiv = 1;
  3587. break;
  3588. case 5:
  3589. reg_w(sd, 0xa4, 0x04);
  3590. reg_w(sd, 0x23, 0x1b);
  3591. sd->clockdiv = 1;
  3592. break;
  3593. }
  3594. break;
  3595. case SEN_OV8610:
  3596. switch (sd->frame_rate) {
  3597. default: /* 15 fps */
  3598. /* case 15: */
  3599. reg_w(sd, 0xa4, 0x06);
  3600. reg_w(sd, 0x23, 0xff);
  3601. break;
  3602. case 10:
  3603. reg_w(sd, 0xa4, 0x06);
  3604. reg_w(sd, 0x23, 0x1f);
  3605. break;
  3606. case 5:
  3607. reg_w(sd, 0xa4, 0x06);
  3608. reg_w(sd, 0x23, 0x1b);
  3609. break;
  3610. }
  3611. break;
  3612. case SEN_OV7670: /* guesses, based on 7640 */
  3613. PDEBUG(D_STREAM, "Setting framerate to %d fps",
  3614. (sd->frame_rate == 0) ? 15 : sd->frame_rate);
  3615. reg_w(sd, 0xa4, 0x10);
  3616. switch (sd->frame_rate) {
  3617. case 30:
  3618. reg_w(sd, 0x23, 0xff);
  3619. break;
  3620. case 20:
  3621. reg_w(sd, 0x23, 0x1b);
  3622. break;
  3623. default:
  3624. /* case 15: */
  3625. reg_w(sd, 0x23, 0xff);
  3626. sd->clockdiv = 1;
  3627. break;
  3628. }
  3629. break;
  3630. }
  3631. }
  3632. static void mode_init_ov_sensor_regs(struct sd *sd)
  3633. {
  3634. struct gspca_dev *gspca_dev;
  3635. int qvga, xstart, xend, ystart, yend;
  3636. u8 v;
  3637. gspca_dev = &sd->gspca_dev;
  3638. qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
  3639. /******** Mode (VGA/QVGA) and sensor specific regs ********/
  3640. switch (sd->sensor) {
  3641. case SEN_OV2610:
  3642. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  3643. i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
  3644. i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
  3645. i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
  3646. i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
  3647. i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
  3648. i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
  3649. return;
  3650. case SEN_OV2610AE: {
  3651. u8 v;
  3652. /* frame rates:
  3653. * 10fps / 5 fps for 1600x1200
  3654. * 40fps / 20fps for 800x600
  3655. */
  3656. v = 80;
  3657. if (qvga) {
  3658. if (sd->frame_rate < 25)
  3659. v = 0x81;
  3660. } else {
  3661. if (sd->frame_rate < 10)
  3662. v = 0x81;
  3663. }
  3664. i2c_w(sd, 0x11, v);
  3665. i2c_w(sd, 0x12, qvga ? 0x60 : 0x20);
  3666. return;
  3667. }
  3668. case SEN_OV3610:
  3669. if (qvga) {
  3670. xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
  3671. ystart = (776 - gspca_dev->height) / 2;
  3672. } else {
  3673. xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
  3674. ystart = (1544 - gspca_dev->height) / 2;
  3675. }
  3676. xend = xstart + gspca_dev->width;
  3677. yend = ystart + gspca_dev->height;
  3678. /* Writing to the COMH register resets the other windowing regs
  3679. to their default values, so we must do this first. */
  3680. i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
  3681. i2c_w_mask(sd, 0x32,
  3682. (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
  3683. 0x3f);
  3684. i2c_w_mask(sd, 0x03,
  3685. (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
  3686. 0x0f);
  3687. i2c_w(sd, 0x17, xstart >> 4);
  3688. i2c_w(sd, 0x18, xend >> 4);
  3689. i2c_w(sd, 0x19, ystart >> 3);
  3690. i2c_w(sd, 0x1a, yend >> 3);
  3691. return;
  3692. case SEN_OV8610:
  3693. /* For OV8610 qvga means qsvga */
  3694. i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
  3695. i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
  3696. i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
  3697. i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
  3698. i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
  3699. break;
  3700. case SEN_OV7610:
  3701. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  3702. i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
  3703. i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
  3704. i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
  3705. break;
  3706. case SEN_OV7620:
  3707. case SEN_OV7620AE:
  3708. case SEN_OV76BE:
  3709. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  3710. i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
  3711. i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
  3712. i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
  3713. i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
  3714. i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
  3715. i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
  3716. i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
  3717. i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
  3718. if (sd->sensor == SEN_OV76BE)
  3719. i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
  3720. break;
  3721. case SEN_OV7640:
  3722. case SEN_OV7648:
  3723. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  3724. i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
  3725. /* Setting this undocumented bit in qvga mode removes a very
  3726. annoying vertical shaking of the image */
  3727. i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
  3728. /* Unknown */
  3729. i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
  3730. /* Allow higher automatic gain (to allow higher framerates) */
  3731. i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
  3732. i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
  3733. break;
  3734. case SEN_OV7670:
  3735. /* set COM7_FMT_VGA or COM7_FMT_QVGA
  3736. * do we need to set anything else?
  3737. * HSTART etc are set in set_ov_sensor_window itself */
  3738. i2c_w_mask(sd, OV7670_R12_COM7,
  3739. qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
  3740. OV7670_COM7_FMT_MASK);
  3741. i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
  3742. i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
  3743. OV7670_COM8_AWB);
  3744. if (qvga) { /* QVGA from ov7670.c by
  3745. * Jonathan Corbet */
  3746. xstart = 164;
  3747. xend = 28;
  3748. ystart = 14;
  3749. yend = 494;
  3750. } else { /* VGA */
  3751. xstart = 158;
  3752. xend = 14;
  3753. ystart = 10;
  3754. yend = 490;
  3755. }
  3756. /* OV7670 hardware window registers are split across
  3757. * multiple locations */
  3758. i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
  3759. i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
  3760. v = i2c_r(sd, OV7670_R32_HREF);
  3761. v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
  3762. msleep(10); /* need to sleep between read and write to
  3763. * same reg! */
  3764. i2c_w(sd, OV7670_R32_HREF, v);
  3765. i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
  3766. i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
  3767. v = i2c_r(sd, OV7670_R03_VREF);
  3768. v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
  3769. msleep(10); /* need to sleep between read and write to
  3770. * same reg! */
  3771. i2c_w(sd, OV7670_R03_VREF, v);
  3772. break;
  3773. case SEN_OV6620:
  3774. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  3775. i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
  3776. i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
  3777. break;
  3778. case SEN_OV6630:
  3779. case SEN_OV66308AF:
  3780. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  3781. i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
  3782. break;
  3783. case SEN_OV9600: {
  3784. const struct ov_i2c_regvals *vals;
  3785. static const struct ov_i2c_regvals sxga_15[] = {
  3786. {0x11, 0x80}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
  3787. };
  3788. static const struct ov_i2c_regvals sxga_7_5[] = {
  3789. {0x11, 0x81}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
  3790. };
  3791. static const struct ov_i2c_regvals vga_30[] = {
  3792. {0x11, 0x81}, {0x14, 0x7e}, {0x24, 0x70}, {0x25, 0x60}
  3793. };
  3794. static const struct ov_i2c_regvals vga_15[] = {
  3795. {0x11, 0x83}, {0x14, 0x3e}, {0x24, 0x80}, {0x25, 0x70}
  3796. };
  3797. /* frame rates:
  3798. * 15fps / 7.5 fps for 1280x1024
  3799. * 30fps / 15fps for 640x480
  3800. */
  3801. i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0x40);
  3802. if (qvga)
  3803. vals = sd->frame_rate < 30 ? vga_15 : vga_30;
  3804. else
  3805. vals = sd->frame_rate < 15 ? sxga_7_5 : sxga_15;
  3806. write_i2c_regvals(sd, vals, ARRAY_SIZE(sxga_15));
  3807. return;
  3808. }
  3809. default:
  3810. return;
  3811. }
  3812. /******** Clock programming ********/
  3813. i2c_w(sd, 0x11, sd->clockdiv);
  3814. }
  3815. /* this function works for bridge ov519 and sensors ov7660 and ov7670 only */
  3816. static void sethvflip(struct gspca_dev *gspca_dev)
  3817. {
  3818. struct sd *sd = (struct sd *) gspca_dev;
  3819. if (sd->gspca_dev.streaming)
  3820. reg_w(sd, OV519_R51_RESET1, 0x0f); /* block stream */
  3821. i2c_w_mask(sd, OV7670_R1E_MVFP,
  3822. OV7670_MVFP_MIRROR * sd->ctrls[HFLIP].val
  3823. | OV7670_MVFP_VFLIP * sd->ctrls[VFLIP].val,
  3824. OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
  3825. if (sd->gspca_dev.streaming)
  3826. reg_w(sd, OV519_R51_RESET1, 0x00); /* restart stream */
  3827. }
  3828. static void set_ov_sensor_window(struct sd *sd)
  3829. {
  3830. struct gspca_dev *gspca_dev;
  3831. int qvga, crop;
  3832. int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
  3833. /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
  3834. switch (sd->sensor) {
  3835. case SEN_OV2610:
  3836. case SEN_OV2610AE:
  3837. case SEN_OV3610:
  3838. case SEN_OV7670:
  3839. case SEN_OV9600:
  3840. mode_init_ov_sensor_regs(sd);
  3841. return;
  3842. case SEN_OV7660:
  3843. ov519_set_mode(sd);
  3844. ov519_set_fr(sd);
  3845. return;
  3846. }
  3847. gspca_dev = &sd->gspca_dev;
  3848. qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
  3849. crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2;
  3850. /* The different sensor ICs handle setting up of window differently.
  3851. * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
  3852. switch (sd->sensor) {
  3853. case SEN_OV8610:
  3854. hwsbase = 0x1e;
  3855. hwebase = 0x1e;
  3856. vwsbase = 0x02;
  3857. vwebase = 0x02;
  3858. break;
  3859. case SEN_OV7610:
  3860. case SEN_OV76BE:
  3861. hwsbase = 0x38;
  3862. hwebase = 0x3a;
  3863. vwsbase = vwebase = 0x05;
  3864. break;
  3865. case SEN_OV6620:
  3866. case SEN_OV6630:
  3867. case SEN_OV66308AF:
  3868. hwsbase = 0x38;
  3869. hwebase = 0x3a;
  3870. vwsbase = 0x05;
  3871. vwebase = 0x06;
  3872. if (sd->sensor == SEN_OV66308AF && qvga)
  3873. /* HDG: this fixes U and V getting swapped */
  3874. hwsbase++;
  3875. if (crop) {
  3876. hwsbase += 8;
  3877. hwebase += 8;
  3878. vwsbase += 11;
  3879. vwebase += 11;
  3880. }
  3881. break;
  3882. case SEN_OV7620:
  3883. case SEN_OV7620AE:
  3884. hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
  3885. hwebase = 0x2f;
  3886. vwsbase = vwebase = 0x05;
  3887. break;
  3888. case SEN_OV7640:
  3889. case SEN_OV7648:
  3890. hwsbase = 0x1a;
  3891. hwebase = 0x1a;
  3892. vwsbase = vwebase = 0x03;
  3893. break;
  3894. default:
  3895. return;
  3896. }
  3897. switch (sd->sensor) {
  3898. case SEN_OV6620:
  3899. case SEN_OV6630:
  3900. case SEN_OV66308AF:
  3901. if (qvga) { /* QCIF */
  3902. hwscale = 0;
  3903. vwscale = 0;
  3904. } else { /* CIF */
  3905. hwscale = 1;
  3906. vwscale = 1; /* The datasheet says 0;
  3907. * it's wrong */
  3908. }
  3909. break;
  3910. case SEN_OV8610:
  3911. if (qvga) { /* QSVGA */
  3912. hwscale = 1;
  3913. vwscale = 1;
  3914. } else { /* SVGA */
  3915. hwscale = 2;
  3916. vwscale = 2;
  3917. }
  3918. break;
  3919. default: /* SEN_OV7xx0 */
  3920. if (qvga) { /* QVGA */
  3921. hwscale = 1;
  3922. vwscale = 0;
  3923. } else { /* VGA */
  3924. hwscale = 2;
  3925. vwscale = 1;
  3926. }
  3927. }
  3928. mode_init_ov_sensor_regs(sd);
  3929. i2c_w(sd, 0x17, hwsbase);
  3930. i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
  3931. i2c_w(sd, 0x19, vwsbase);
  3932. i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
  3933. }
  3934. /* -- start the camera -- */
  3935. static int sd_start(struct gspca_dev *gspca_dev)
  3936. {
  3937. struct sd *sd = (struct sd *) gspca_dev;
  3938. /* Default for most bridges, allow bridge_mode_init_regs to override */
  3939. sd->sensor_width = sd->gspca_dev.width;
  3940. sd->sensor_height = sd->gspca_dev.height;
  3941. switch (sd->bridge) {
  3942. case BRIDGE_OV511:
  3943. case BRIDGE_OV511PLUS:
  3944. ov511_mode_init_regs(sd);
  3945. break;
  3946. case BRIDGE_OV518:
  3947. case BRIDGE_OV518PLUS:
  3948. ov518_mode_init_regs(sd);
  3949. break;
  3950. case BRIDGE_OV519:
  3951. ov519_mode_init_regs(sd);
  3952. break;
  3953. /* case BRIDGE_OVFX2: nothing to do */
  3954. case BRIDGE_W9968CF:
  3955. w9968cf_mode_init_regs(sd);
  3956. break;
  3957. }
  3958. set_ov_sensor_window(sd);
  3959. if (!(sd->gspca_dev.ctrl_dis & (1 << CONTRAST)))
  3960. setcontrast(gspca_dev);
  3961. if (!(sd->gspca_dev.ctrl_dis & (1 << BRIGHTNESS)))
  3962. setbrightness(gspca_dev);
  3963. if (!(sd->gspca_dev.ctrl_dis & (1 << EXPOSURE)))
  3964. setexposure(gspca_dev);
  3965. if (!(sd->gspca_dev.ctrl_dis & (1 << COLORS)))
  3966. setcolors(gspca_dev);
  3967. if (!(sd->gspca_dev.ctrl_dis & ((1 << HFLIP) | (1 << VFLIP))))
  3968. sethvflip(gspca_dev);
  3969. if (!(sd->gspca_dev.ctrl_dis & (1 << AUTOBRIGHT)))
  3970. setautobright(gspca_dev);
  3971. if (!(sd->gspca_dev.ctrl_dis & (1 << AUTOGAIN)))
  3972. setautogain(gspca_dev);
  3973. if (!(sd->gspca_dev.ctrl_dis & (1 << FREQ)))
  3974. setfreq_i(sd);
  3975. /* Force clear snapshot state in case the snapshot button was
  3976. pressed while we weren't streaming */
  3977. sd->snapshot_needs_reset = 1;
  3978. sd_reset_snapshot(gspca_dev);
  3979. sd->first_frame = 3;
  3980. ov51x_restart(sd);
  3981. ov51x_led_control(sd, 1);
  3982. return gspca_dev->usb_err;
  3983. }
  3984. static void sd_stopN(struct gspca_dev *gspca_dev)
  3985. {
  3986. struct sd *sd = (struct sd *) gspca_dev;
  3987. ov51x_stop(sd);
  3988. ov51x_led_control(sd, 0);
  3989. }
  3990. static void sd_stop0(struct gspca_dev *gspca_dev)
  3991. {
  3992. struct sd *sd = (struct sd *) gspca_dev;
  3993. if (!sd->gspca_dev.present)
  3994. return;
  3995. if (sd->bridge == BRIDGE_W9968CF)
  3996. w9968cf_stop0(sd);
  3997. #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
  3998. /* If the last button state is pressed, release it now! */
  3999. if (sd->snapshot_pressed) {
  4000. input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
  4001. input_sync(gspca_dev->input_dev);
  4002. sd->snapshot_pressed = 0;
  4003. }
  4004. #endif
  4005. if (sd->bridge == BRIDGE_OV519)
  4006. reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
  4007. }
  4008. static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
  4009. {
  4010. struct sd *sd = (struct sd *) gspca_dev;
  4011. if (sd->snapshot_pressed != state) {
  4012. #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
  4013. input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
  4014. input_sync(gspca_dev->input_dev);
  4015. #endif
  4016. if (state)
  4017. sd->snapshot_needs_reset = 1;
  4018. sd->snapshot_pressed = state;
  4019. } else {
  4020. /* On the ov511 / ov519 we need to reset the button state
  4021. multiple times, as resetting does not work as long as the
  4022. button stays pressed */
  4023. switch (sd->bridge) {
  4024. case BRIDGE_OV511:
  4025. case BRIDGE_OV511PLUS:
  4026. case BRIDGE_OV519:
  4027. if (state)
  4028. sd->snapshot_needs_reset = 1;
  4029. break;
  4030. }
  4031. }
  4032. }
  4033. static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
  4034. u8 *in, /* isoc packet */
  4035. int len) /* iso packet length */
  4036. {
  4037. struct sd *sd = (struct sd *) gspca_dev;
  4038. /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
  4039. * byte non-zero. The EOF packet has image width/height in the
  4040. * 10th and 11th bytes. The 9th byte is given as follows:
  4041. *
  4042. * bit 7: EOF
  4043. * 6: compression enabled
  4044. * 5: 422/420/400 modes
  4045. * 4: 422/420/400 modes
  4046. * 3: 1
  4047. * 2: snapshot button on
  4048. * 1: snapshot frame
  4049. * 0: even/odd field
  4050. */
  4051. if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
  4052. (in[8] & 0x08)) {
  4053. ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
  4054. if (in[8] & 0x80) {
  4055. /* Frame end */
  4056. if ((in[9] + 1) * 8 != gspca_dev->width ||
  4057. (in[10] + 1) * 8 != gspca_dev->height) {
  4058. PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
  4059. " requested: %dx%d\n",
  4060. (in[9] + 1) * 8, (in[10] + 1) * 8,
  4061. gspca_dev->width, gspca_dev->height);
  4062. gspca_dev->last_packet_type = DISCARD_PACKET;
  4063. return;
  4064. }
  4065. /* Add 11 byte footer to frame, might be useful */
  4066. gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
  4067. return;
  4068. } else {
  4069. /* Frame start */
  4070. gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
  4071. sd->packet_nr = 0;
  4072. }
  4073. }
  4074. /* Ignore the packet number */
  4075. len--;
  4076. /* intermediate packet */
  4077. gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
  4078. }
  4079. static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
  4080. u8 *data, /* isoc packet */
  4081. int len) /* iso packet length */
  4082. {
  4083. struct sd *sd = (struct sd *) gspca_dev;
  4084. /* A false positive here is likely, until OVT gives me
  4085. * the definitive SOF/EOF format */
  4086. if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
  4087. ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
  4088. gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
  4089. gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
  4090. sd->packet_nr = 0;
  4091. }
  4092. if (gspca_dev->last_packet_type == DISCARD_PACKET)
  4093. return;
  4094. /* Does this device use packet numbers ? */
  4095. if (len & 7) {
  4096. len--;
  4097. if (sd->packet_nr == data[len])
  4098. sd->packet_nr++;
  4099. /* The last few packets of the frame (which are all 0's
  4100. except that they may contain part of the footer), are
  4101. numbered 0 */
  4102. else if (sd->packet_nr == 0 || data[len]) {
  4103. PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
  4104. (int)data[len], (int)sd->packet_nr);
  4105. gspca_dev->last_packet_type = DISCARD_PACKET;
  4106. return;
  4107. }
  4108. }
  4109. /* intermediate packet */
  4110. gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
  4111. }
  4112. static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
  4113. u8 *data, /* isoc packet */
  4114. int len) /* iso packet length */
  4115. {
  4116. /* Header of ov519 is 16 bytes:
  4117. * Byte Value Description
  4118. * 0 0xff magic
  4119. * 1 0xff magic
  4120. * 2 0xff magic
  4121. * 3 0xXX 0x50 = SOF, 0x51 = EOF
  4122. * 9 0xXX 0x01 initial frame without data,
  4123. * 0x00 standard frame with image
  4124. * 14 Lo in EOF: length of image data / 8
  4125. * 15 Hi
  4126. */
  4127. if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
  4128. switch (data[3]) {
  4129. case 0x50: /* start of frame */
  4130. /* Don't check the button state here, as the state
  4131. usually (always ?) changes at EOF and checking it
  4132. here leads to unnecessary snapshot state resets. */
  4133. #define HDRSZ 16
  4134. data += HDRSZ;
  4135. len -= HDRSZ;
  4136. #undef HDRSZ
  4137. if (data[0] == 0xff || data[1] == 0xd8)
  4138. gspca_frame_add(gspca_dev, FIRST_PACKET,
  4139. data, len);
  4140. else
  4141. gspca_dev->last_packet_type = DISCARD_PACKET;
  4142. return;
  4143. case 0x51: /* end of frame */
  4144. ov51x_handle_button(gspca_dev, data[11] & 1);
  4145. if (data[9] != 0)
  4146. gspca_dev->last_packet_type = DISCARD_PACKET;
  4147. gspca_frame_add(gspca_dev, LAST_PACKET,
  4148. NULL, 0);
  4149. return;
  4150. }
  4151. }
  4152. /* intermediate packet */
  4153. gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
  4154. }
  4155. static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
  4156. u8 *data, /* isoc packet */
  4157. int len) /* iso packet length */
  4158. {
  4159. struct sd *sd = (struct sd *) gspca_dev;
  4160. gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
  4161. /* A short read signals EOF */
  4162. if (len < gspca_dev->cam.bulk_size) {
  4163. /* If the frame is short, and it is one of the first ones
  4164. the sensor and bridge are still syncing, so drop it. */
  4165. if (sd->first_frame) {
  4166. sd->first_frame--;
  4167. if (gspca_dev->image_len <
  4168. sd->gspca_dev.width * sd->gspca_dev.height)
  4169. gspca_dev->last_packet_type = DISCARD_PACKET;
  4170. }
  4171. gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
  4172. gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
  4173. }
  4174. }
  4175. static void sd_pkt_scan(struct gspca_dev *gspca_dev,
  4176. u8 *data, /* isoc packet */
  4177. int len) /* iso packet length */
  4178. {
  4179. struct sd *sd = (struct sd *) gspca_dev;
  4180. switch (sd->bridge) {
  4181. case BRIDGE_OV511:
  4182. case BRIDGE_OV511PLUS:
  4183. ov511_pkt_scan(gspca_dev, data, len);
  4184. break;
  4185. case BRIDGE_OV518:
  4186. case BRIDGE_OV518PLUS:
  4187. ov518_pkt_scan(gspca_dev, data, len);
  4188. break;
  4189. case BRIDGE_OV519:
  4190. ov519_pkt_scan(gspca_dev, data, len);
  4191. break;
  4192. case BRIDGE_OVFX2:
  4193. ovfx2_pkt_scan(gspca_dev, data, len);
  4194. break;
  4195. case BRIDGE_W9968CF:
  4196. w9968cf_pkt_scan(gspca_dev, data, len);
  4197. break;
  4198. }
  4199. }
  4200. /* -- management routines -- */
  4201. static void setbrightness(struct gspca_dev *gspca_dev)
  4202. {
  4203. struct sd *sd = (struct sd *) gspca_dev;
  4204. int val;
  4205. static const struct ov_i2c_regvals brit_7660[][7] = {
  4206. {{0x0f, 0x6a}, {0x24, 0x40}, {0x25, 0x2b}, {0x26, 0x90},
  4207. {0x27, 0xe0}, {0x28, 0xe0}, {0x2c, 0xe0}},
  4208. {{0x0f, 0x6a}, {0x24, 0x50}, {0x25, 0x40}, {0x26, 0xa1},
  4209. {0x27, 0xc0}, {0x28, 0xc0}, {0x2c, 0xc0}},
  4210. {{0x0f, 0x6a}, {0x24, 0x68}, {0x25, 0x58}, {0x26, 0xc2},
  4211. {0x27, 0xa0}, {0x28, 0xa0}, {0x2c, 0xa0}},
  4212. {{0x0f, 0x6a}, {0x24, 0x70}, {0x25, 0x68}, {0x26, 0xd3},
  4213. {0x27, 0x80}, {0x28, 0x80}, {0x2c, 0x80}},
  4214. {{0x0f, 0x6a}, {0x24, 0x80}, {0x25, 0x70}, {0x26, 0xd3},
  4215. {0x27, 0x20}, {0x28, 0x20}, {0x2c, 0x20}},
  4216. {{0x0f, 0x6a}, {0x24, 0x88}, {0x25, 0x78}, {0x26, 0xd3},
  4217. {0x27, 0x40}, {0x28, 0x40}, {0x2c, 0x40}},
  4218. {{0x0f, 0x6a}, {0x24, 0x90}, {0x25, 0x80}, {0x26, 0xd4},
  4219. {0x27, 0x60}, {0x28, 0x60}, {0x2c, 0x60}}
  4220. };
  4221. val = sd->ctrls[BRIGHTNESS].val;
  4222. switch (sd->sensor) {
  4223. case SEN_OV8610:
  4224. case SEN_OV7610:
  4225. case SEN_OV76BE:
  4226. case SEN_OV6620:
  4227. case SEN_OV6630:
  4228. case SEN_OV66308AF:
  4229. case SEN_OV7640:
  4230. case SEN_OV7648:
  4231. i2c_w(sd, OV7610_REG_BRT, val);
  4232. break;
  4233. case SEN_OV7620:
  4234. case SEN_OV7620AE:
  4235. /* 7620 doesn't like manual changes when in auto mode */
  4236. if (!sd->ctrls[AUTOBRIGHT].val)
  4237. i2c_w(sd, OV7610_REG_BRT, val);
  4238. break;
  4239. case SEN_OV7660:
  4240. write_i2c_regvals(sd, brit_7660[val],
  4241. ARRAY_SIZE(brit_7660[0]));
  4242. break;
  4243. case SEN_OV7670:
  4244. /*win trace
  4245. * i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */
  4246. i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val));
  4247. break;
  4248. }
  4249. }
  4250. static void setcontrast(struct gspca_dev *gspca_dev)
  4251. {
  4252. struct sd *sd = (struct sd *) gspca_dev;
  4253. int val;
  4254. static const struct ov_i2c_regvals contrast_7660[][31] = {
  4255. {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0xa0},
  4256. {0x70, 0x58}, {0x71, 0x38}, {0x72, 0x30}, {0x73, 0x30},
  4257. {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x24}, {0x77, 0x24},
  4258. {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x34},
  4259. {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x65},
  4260. {0x80, 0x70}, {0x81, 0x77}, {0x82, 0x7d}, {0x83, 0x83},
  4261. {0x84, 0x88}, {0x85, 0x8d}, {0x86, 0x96}, {0x87, 0x9f},
  4262. {0x88, 0xb0}, {0x89, 0xc4}, {0x8a, 0xd9}},
  4263. {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0x94},
  4264. {0x70, 0x58}, {0x71, 0x40}, {0x72, 0x30}, {0x73, 0x30},
  4265. {0x74, 0x30}, {0x75, 0x30}, {0x76, 0x2c}, {0x77, 0x24},
  4266. {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x31},
  4267. {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x62},
  4268. {0x80, 0x6d}, {0x81, 0x75}, {0x82, 0x7b}, {0x83, 0x81},
  4269. {0x84, 0x87}, {0x85, 0x8d}, {0x86, 0x98}, {0x87, 0xa1},
  4270. {0x88, 0xb2}, {0x89, 0xc6}, {0x8a, 0xdb}},
  4271. {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x84},
  4272. {0x70, 0x58}, {0x71, 0x48}, {0x72, 0x40}, {0x73, 0x40},
  4273. {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x28}, {0x77, 0x24},
  4274. {0x78, 0x26}, {0x79, 0x28}, {0x7a, 0x28}, {0x7b, 0x34},
  4275. {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x5d},
  4276. {0x80, 0x68}, {0x81, 0x71}, {0x82, 0x79}, {0x83, 0x81},
  4277. {0x84, 0x86}, {0x85, 0x8b}, {0x86, 0x95}, {0x87, 0x9e},
  4278. {0x88, 0xb1}, {0x89, 0xc5}, {0x8a, 0xd9}},
  4279. {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x70},
  4280. {0x70, 0x58}, {0x71, 0x58}, {0x72, 0x48}, {0x73, 0x48},
  4281. {0x74, 0x38}, {0x75, 0x40}, {0x76, 0x34}, {0x77, 0x34},
  4282. {0x78, 0x2e}, {0x79, 0x28}, {0x7a, 0x24}, {0x7b, 0x22},
  4283. {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x58},
  4284. {0x80, 0x63}, {0x81, 0x6e}, {0x82, 0x77}, {0x83, 0x80},
  4285. {0x84, 0x87}, {0x85, 0x8f}, {0x86, 0x9c}, {0x87, 0xa9},
  4286. {0x88, 0xc0}, {0x89, 0xd4}, {0x8a, 0xe6}},
  4287. {{0x6c, 0xa0}, {0x6d, 0xf0}, {0x6e, 0x90}, {0x6f, 0x80},
  4288. {0x70, 0x70}, {0x71, 0x80}, {0x72, 0x60}, {0x73, 0x60},
  4289. {0x74, 0x58}, {0x75, 0x60}, {0x76, 0x4c}, {0x77, 0x38},
  4290. {0x78, 0x38}, {0x79, 0x2a}, {0x7a, 0x20}, {0x7b, 0x0e},
  4291. {0x7c, 0x0a}, {0x7d, 0x14}, {0x7e, 0x26}, {0x7f, 0x46},
  4292. {0x80, 0x54}, {0x81, 0x64}, {0x82, 0x70}, {0x83, 0x7c},
  4293. {0x84, 0x87}, {0x85, 0x93}, {0x86, 0xa6}, {0x87, 0xb4},
  4294. {0x88, 0xd0}, {0x89, 0xe5}, {0x8a, 0xf5}},
  4295. {{0x6c, 0x60}, {0x6d, 0x80}, {0x6e, 0x60}, {0x6f, 0x80},
  4296. {0x70, 0x80}, {0x71, 0x80}, {0x72, 0x88}, {0x73, 0x30},
  4297. {0x74, 0x70}, {0x75, 0x68}, {0x76, 0x64}, {0x77, 0x50},
  4298. {0x78, 0x3c}, {0x79, 0x22}, {0x7a, 0x10}, {0x7b, 0x08},
  4299. {0x7c, 0x06}, {0x7d, 0x0e}, {0x7e, 0x1a}, {0x7f, 0x3a},
  4300. {0x80, 0x4a}, {0x81, 0x5a}, {0x82, 0x6b}, {0x83, 0x7b},
  4301. {0x84, 0x89}, {0x85, 0x96}, {0x86, 0xaf}, {0x87, 0xc3},
  4302. {0x88, 0xe1}, {0x89, 0xf2}, {0x8a, 0xfa}},
  4303. {{0x6c, 0x20}, {0x6d, 0x40}, {0x6e, 0x20}, {0x6f, 0x60},
  4304. {0x70, 0x88}, {0x71, 0xc8}, {0x72, 0xc0}, {0x73, 0xb8},
  4305. {0x74, 0xa8}, {0x75, 0xb8}, {0x76, 0x80}, {0x77, 0x5c},
  4306. {0x78, 0x26}, {0x79, 0x10}, {0x7a, 0x08}, {0x7b, 0x04},
  4307. {0x7c, 0x02}, {0x7d, 0x06}, {0x7e, 0x0a}, {0x7f, 0x22},
  4308. {0x80, 0x33}, {0x81, 0x4c}, {0x82, 0x64}, {0x83, 0x7b},
  4309. {0x84, 0x90}, {0x85, 0xa7}, {0x86, 0xc7}, {0x87, 0xde},
  4310. {0x88, 0xf1}, {0x89, 0xf9}, {0x8a, 0xfd}},
  4311. };
  4312. val = sd->ctrls[CONTRAST].val;
  4313. switch (sd->sensor) {
  4314. case SEN_OV7610:
  4315. case SEN_OV6620:
  4316. i2c_w(sd, OV7610_REG_CNT, val);
  4317. break;
  4318. case SEN_OV6630:
  4319. case SEN_OV66308AF:
  4320. i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
  4321. break;
  4322. case SEN_OV8610: {
  4323. static const u8 ctab[] = {
  4324. 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
  4325. };
  4326. /* Use Y gamma control instead. Bit 0 enables it. */
  4327. i2c_w(sd, 0x64, ctab[val >> 5]);
  4328. break;
  4329. }
  4330. case SEN_OV7620:
  4331. case SEN_OV7620AE: {
  4332. static const u8 ctab[] = {
  4333. 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
  4334. 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
  4335. };
  4336. /* Use Y gamma control instead. Bit 0 enables it. */
  4337. i2c_w(sd, 0x64, ctab[val >> 4]);
  4338. break;
  4339. }
  4340. case SEN_OV7660:
  4341. write_i2c_regvals(sd, contrast_7660[val],
  4342. ARRAY_SIZE(contrast_7660[0]));
  4343. break;
  4344. case SEN_OV7670:
  4345. /* check that this isn't just the same as ov7610 */
  4346. i2c_w(sd, OV7670_R56_CONTRAS, val >> 1);
  4347. break;
  4348. }
  4349. }
  4350. static void setexposure(struct gspca_dev *gspca_dev)
  4351. {
  4352. struct sd *sd = (struct sd *) gspca_dev;
  4353. if (!sd->ctrls[AUTOGAIN].val)
  4354. i2c_w(sd, 0x10, sd->ctrls[EXPOSURE].val);
  4355. }
  4356. static void setcolors(struct gspca_dev *gspca_dev)
  4357. {
  4358. struct sd *sd = (struct sd *) gspca_dev;
  4359. int val;
  4360. static const struct ov_i2c_regvals colors_7660[][6] = {
  4361. {{0x4f, 0x28}, {0x50, 0x2a}, {0x51, 0x02}, {0x52, 0x0a},
  4362. {0x53, 0x19}, {0x54, 0x23}},
  4363. {{0x4f, 0x47}, {0x50, 0x4a}, {0x51, 0x03}, {0x52, 0x11},
  4364. {0x53, 0x2c}, {0x54, 0x3e}},
  4365. {{0x4f, 0x66}, {0x50, 0x6b}, {0x51, 0x05}, {0x52, 0x19},
  4366. {0x53, 0x40}, {0x54, 0x59}},
  4367. {{0x4f, 0x84}, {0x50, 0x8b}, {0x51, 0x06}, {0x52, 0x20},
  4368. {0x53, 0x53}, {0x54, 0x73}},
  4369. {{0x4f, 0xa3}, {0x50, 0xab}, {0x51, 0x08}, {0x52, 0x28},
  4370. {0x53, 0x66}, {0x54, 0x8e}},
  4371. };
  4372. val = sd->ctrls[COLORS].val;
  4373. switch (sd->sensor) {
  4374. case SEN_OV8610:
  4375. case SEN_OV7610:
  4376. case SEN_OV76BE:
  4377. case SEN_OV6620:
  4378. case SEN_OV6630:
  4379. case SEN_OV66308AF:
  4380. i2c_w(sd, OV7610_REG_SAT, val);
  4381. break;
  4382. case SEN_OV7620:
  4383. case SEN_OV7620AE:
  4384. /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
  4385. /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
  4386. if (rc < 0)
  4387. goto out; */
  4388. i2c_w(sd, OV7610_REG_SAT, val);
  4389. break;
  4390. case SEN_OV7640:
  4391. case SEN_OV7648:
  4392. i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
  4393. break;
  4394. case SEN_OV7660:
  4395. write_i2c_regvals(sd, colors_7660[val],
  4396. ARRAY_SIZE(colors_7660[0]));
  4397. break;
  4398. case SEN_OV7670:
  4399. /* supported later once I work out how to do it
  4400. * transparently fail now! */
  4401. /* set REG_COM13 values for UV sat auto mode */
  4402. break;
  4403. }
  4404. }
  4405. static void setautobright(struct gspca_dev *gspca_dev)
  4406. {
  4407. struct sd *sd = (struct sd *) gspca_dev;
  4408. i2c_w_mask(sd, 0x2d, sd->ctrls[AUTOBRIGHT].val ? 0x10 : 0x00, 0x10);
  4409. }
  4410. static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)
  4411. {
  4412. struct sd *sd = (struct sd *) gspca_dev;
  4413. sd->ctrls[AUTOGAIN].val = val;
  4414. if (val) {
  4415. gspca_dev->ctrl_inac |= (1 << EXPOSURE);
  4416. } else {
  4417. gspca_dev->ctrl_inac &= ~(1 << EXPOSURE);
  4418. sd->ctrls[EXPOSURE].val = i2c_r(sd, 0x10);
  4419. }
  4420. if (gspca_dev->streaming)
  4421. setautogain(gspca_dev);
  4422. return gspca_dev->usb_err;
  4423. }
  4424. static void setfreq_i(struct sd *sd)
  4425. {
  4426. if (sd->sensor == SEN_OV7660
  4427. || sd->sensor == SEN_OV7670) {
  4428. switch (sd->ctrls[FREQ].val) {
  4429. case 0: /* Banding filter disabled */
  4430. i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT);
  4431. break;
  4432. case 1: /* 50 hz */
  4433. i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
  4434. OV7670_COM8_BFILT);
  4435. i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18);
  4436. break;
  4437. case 2: /* 60 hz */
  4438. i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
  4439. OV7670_COM8_BFILT);
  4440. i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18);
  4441. break;
  4442. case 3: /* Auto hz - ov7670 only */
  4443. i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
  4444. OV7670_COM8_BFILT);
  4445. i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO,
  4446. 0x18);
  4447. break;
  4448. }
  4449. } else {
  4450. switch (sd->ctrls[FREQ].val) {
  4451. case 0: /* Banding filter disabled */
  4452. i2c_w_mask(sd, 0x2d, 0x00, 0x04);
  4453. i2c_w_mask(sd, 0x2a, 0x00, 0x80);
  4454. break;
  4455. case 1: /* 50 hz (filter on and framerate adj) */
  4456. i2c_w_mask(sd, 0x2d, 0x04, 0x04);
  4457. i2c_w_mask(sd, 0x2a, 0x80, 0x80);
  4458. /* 20 fps -> 16.667 fps */
  4459. if (sd->sensor == SEN_OV6620 ||
  4460. sd->sensor == SEN_OV6630 ||
  4461. sd->sensor == SEN_OV66308AF)
  4462. i2c_w(sd, 0x2b, 0x5e);
  4463. else
  4464. i2c_w(sd, 0x2b, 0xac);
  4465. break;
  4466. case 2: /* 60 hz (filter on, ...) */
  4467. i2c_w_mask(sd, 0x2d, 0x04, 0x04);
  4468. if (sd->sensor == SEN_OV6620 ||
  4469. sd->sensor == SEN_OV6630 ||
  4470. sd->sensor == SEN_OV66308AF) {
  4471. /* 20 fps -> 15 fps */
  4472. i2c_w_mask(sd, 0x2a, 0x80, 0x80);
  4473. i2c_w(sd, 0x2b, 0xa8);
  4474. } else {
  4475. /* no framerate adj. */
  4476. i2c_w_mask(sd, 0x2a, 0x00, 0x80);
  4477. }
  4478. break;
  4479. }
  4480. }
  4481. }
  4482. static void setfreq(struct gspca_dev *gspca_dev)
  4483. {
  4484. struct sd *sd = (struct sd *) gspca_dev;
  4485. setfreq_i(sd);
  4486. /* Ugly but necessary */
  4487. if (sd->bridge == BRIDGE_W9968CF)
  4488. w9968cf_set_crop_window(sd);
  4489. }
  4490. static int sd_querymenu(struct gspca_dev *gspca_dev,
  4491. struct v4l2_querymenu *menu)
  4492. {
  4493. struct sd *sd = (struct sd *) gspca_dev;
  4494. switch (menu->id) {
  4495. case V4L2_CID_POWER_LINE_FREQUENCY:
  4496. switch (menu->index) {
  4497. case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
  4498. strcpy((char *) menu->name, "NoFliker");
  4499. return 0;
  4500. case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
  4501. strcpy((char *) menu->name, "50 Hz");
  4502. return 0;
  4503. case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
  4504. strcpy((char *) menu->name, "60 Hz");
  4505. return 0;
  4506. case 3:
  4507. if (sd->sensor != SEN_OV7670)
  4508. return -EINVAL;
  4509. strcpy((char *) menu->name, "Automatic");
  4510. return 0;
  4511. }
  4512. break;
  4513. }
  4514. return -EINVAL;
  4515. }
  4516. static int sd_get_jcomp(struct gspca_dev *gspca_dev,
  4517. struct v4l2_jpegcompression *jcomp)
  4518. {
  4519. struct sd *sd = (struct sd *) gspca_dev;
  4520. if (sd->bridge != BRIDGE_W9968CF)
  4521. return -EINVAL;
  4522. memset(jcomp, 0, sizeof *jcomp);
  4523. jcomp->quality = sd->quality;
  4524. jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
  4525. V4L2_JPEG_MARKER_DRI;
  4526. return 0;
  4527. }
  4528. static int sd_set_jcomp(struct gspca_dev *gspca_dev,
  4529. struct v4l2_jpegcompression *jcomp)
  4530. {
  4531. struct sd *sd = (struct sd *) gspca_dev;
  4532. if (sd->bridge != BRIDGE_W9968CF)
  4533. return -EINVAL;
  4534. if (gspca_dev->streaming)
  4535. return -EBUSY;
  4536. if (jcomp->quality < QUALITY_MIN)
  4537. sd->quality = QUALITY_MIN;
  4538. else if (jcomp->quality > QUALITY_MAX)
  4539. sd->quality = QUALITY_MAX;
  4540. else
  4541. sd->quality = jcomp->quality;
  4542. /* Return resulting jcomp params to app */
  4543. sd_get_jcomp(gspca_dev, jcomp);
  4544. return 0;
  4545. }
  4546. /* sub-driver description */
  4547. static const struct sd_desc sd_desc = {
  4548. .name = MODULE_NAME,
  4549. .ctrls = sd_ctrls,
  4550. .nctrls = ARRAY_SIZE(sd_ctrls),
  4551. .config = sd_config,
  4552. .init = sd_init,
  4553. .isoc_init = sd_isoc_init,
  4554. .start = sd_start,
  4555. .stopN = sd_stopN,
  4556. .stop0 = sd_stop0,
  4557. .pkt_scan = sd_pkt_scan,
  4558. .dq_callback = sd_reset_snapshot,
  4559. .querymenu = sd_querymenu,
  4560. .get_jcomp = sd_get_jcomp,
  4561. .set_jcomp = sd_set_jcomp,
  4562. #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
  4563. .other_input = 1,
  4564. #endif
  4565. };
  4566. /* -- module initialisation -- */
  4567. static const struct usb_device_id device_table[] = {
  4568. {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
  4569. {USB_DEVICE(0x041e, 0x4052),
  4570. .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
  4571. {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
  4572. {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
  4573. {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
  4574. {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 },
  4575. {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
  4576. {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 },
  4577. {USB_DEVICE(0x045e, 0x028c),
  4578. .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
  4579. {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
  4580. {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
  4581. {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
  4582. {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
  4583. {USB_DEVICE(0x05a9, 0x0519),
  4584. .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
  4585. {USB_DEVICE(0x05a9, 0x0530),
  4586. .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
  4587. {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
  4588. {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
  4589. {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
  4590. {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
  4591. {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
  4592. {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
  4593. {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
  4594. {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
  4595. {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
  4596. {USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 },
  4597. {}
  4598. };
  4599. MODULE_DEVICE_TABLE(usb, device_table);
  4600. /* -- device connect -- */
  4601. static int sd_probe(struct usb_interface *intf,
  4602. const struct usb_device_id *id)
  4603. {
  4604. return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
  4605. THIS_MODULE);
  4606. }
  4607. static struct usb_driver sd_driver = {
  4608. .name = MODULE_NAME,
  4609. .id_table = device_table,
  4610. .probe = sd_probe,
  4611. .disconnect = gspca_disconnect,
  4612. #ifdef CONFIG_PM
  4613. .suspend = gspca_suspend,
  4614. .resume = gspca_resume,
  4615. #endif
  4616. };
  4617. module_usb_driver(sd_driver);
  4618. module_param(frame_rate, int, 0644);
  4619. MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");