fc8050_ppi.c 7.0 KB

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  1. /*****************************************************************************
  2. Copyright(c) 2009 FCI Inc. All Rights Reserved
  3. File name : fc8050_ppi.c
  4. Description : fc8050 host interface
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  16. History :
  17. ----------------------------------------------------------------------
  18. 2009/09/14 jason initial
  19. *******************************************************************************/
  20. #include <linux/spinlock.h>
  21. #include "fci_types.h"
  22. #include "fc8050_regs.h"
  23. #include "fc8050_ppi.h"
  24. #include <linux/io.h>
  25. static DEFINE_SPINLOCK(fci_lock);
  26. #ifdef CONFIG_TDMB_EBI
  27. u32 base_address;
  28. #define BBM_BASE_ADDR (void __iomem *)base_address
  29. #define BBM_BASE_OFFSET 0x00
  30. #else
  31. #define BBM_BASE_ADDR 0x00
  32. #define BBM_BASE_OFFSET 0x00
  33. #endif
  34. #define PPI_BMODE 0x00
  35. #define PPI_WMODE 0x10
  36. #define PPI_LMODE 0x20
  37. #define PPI_READ 0x40
  38. #define PPI_WRITE 0x00
  39. #define PPI_AINC 0x80
  40. int fc8050_ppi_init(HANDLE hDevice, u16 param1, u16 param2)
  41. {
  42. base_address = param2;
  43. base_address <<= 16;
  44. base_address |= param1;
  45. DPRINTK("%s : 0x%p\n", __func__, (void __iomem *)base_address);
  46. return BBM_OK;
  47. }
  48. int fc8050_ppi_byteread(HANDLE hDevice, u16 addr, u8 *data)
  49. {
  50. u16 length = 1;
  51. unsigned long flags;
  52. spin_lock_irqsave(&fci_lock, flags);
  53. iowrite8((addr & 0xff), BBM_BASE_ADDR);
  54. iowrite8(((addr & 0xff00) >> 8), BBM_BASE_ADDR);
  55. iowrite8((PPI_READ | ((length & 0x0f00) >> 8)), BBM_BASE_ADDR);
  56. iowrite8((length & 0xff), BBM_BASE_ADDR);
  57. *data = ioread8(BBM_BASE_ADDR);
  58. spin_unlock_irqrestore(&fci_lock, flags);
  59. return BBM_OK;
  60. }
  61. int fc8050_ppi_wordread(HANDLE hDevice, u16 addr, u16 *data)
  62. {
  63. u16 length = 2;
  64. u8 command = PPI_AINC | PPI_READ | PPI_BMODE;
  65. unsigned long flags;
  66. spin_lock_irqsave(&fci_lock, flags);
  67. if (BBM_SCI_DATA <= addr && BBM_SCI_SYNCRX >= addr)
  68. command = PPI_READ | PPI_WMODE;
  69. iowrite8((addr & 0xff), BBM_BASE_ADDR);
  70. iowrite8(((addr & 0xff00) >> 8), BBM_BASE_ADDR);
  71. iowrite8((command | ((length & 0x0f00) >> 8)), BBM_BASE_ADDR);
  72. iowrite8((length & 0xff), BBM_BASE_ADDR);
  73. *data = ioread8(BBM_BASE_ADDR);
  74. *data |= ioread8(BBM_BASE_ADDR) << 8;
  75. spin_unlock_irqrestore(&fci_lock, flags);
  76. return BBM_OK;
  77. }
  78. int fc8050_ppi_longread(HANDLE hDevice, u16 addr, u32 *data)
  79. {
  80. u16 length = 4;
  81. unsigned long flags;
  82. u8 command = (PPI_AINC | PPI_READ | ((length & 0x0f00) >> 8));
  83. spin_lock_irqsave(&fci_lock, flags);
  84. iowrite8((addr & 0xff), BBM_BASE_ADDR);
  85. iowrite8(((addr & 0xff00) >> 8), BBM_BASE_ADDR);
  86. iowrite8(command, BBM_BASE_ADDR);
  87. iowrite8((length & 0xff), BBM_BASE_ADDR);
  88. *data = ioread8(BBM_BASE_ADDR);
  89. *data |= ioread8(BBM_BASE_ADDR) << 8;
  90. *data |= ioread8(BBM_BASE_ADDR) << 16;
  91. *data |= ioread8(BBM_BASE_ADDR) << 24;
  92. spin_unlock_irqrestore(&fci_lock, flags);
  93. return BBM_OK;
  94. }
  95. int fc8050_ppi_bulkread(HANDLE hDevice, u16 addr, u8 *data, u16 length)
  96. {
  97. int i;
  98. unsigned long flags;
  99. u8 command = (PPI_AINC | PPI_READ | ((length & 0x0f00) >> 8));
  100. spin_lock_irqsave(&fci_lock, flags);
  101. iowrite8((addr & 0xff), BBM_BASE_ADDR);
  102. iowrite8(((addr & 0xff00) >> 8), BBM_BASE_ADDR);
  103. iowrite8(command, BBM_BASE_ADDR);
  104. iowrite8((length & 0xff), BBM_BASE_ADDR);
  105. for (i = 0; i < length; i++)
  106. data[i] = ioread8(BBM_BASE_ADDR);
  107. spin_unlock_irqrestore(&fci_lock, flags);
  108. return BBM_OK;
  109. }
  110. int fc8050_ppi_bytewrite(HANDLE hDevice, u16 addr, u8 data)
  111. {
  112. u16 length = 1;
  113. unsigned long flags;
  114. spin_lock_irqsave(&fci_lock, flags);
  115. iowrite8((addr & 0xff), BBM_BASE_ADDR);
  116. iowrite8(((addr & 0xff00) >> 8), BBM_BASE_ADDR);
  117. iowrite8((PPI_WRITE | ((length & 0x0f00) >> 8)), BBM_BASE_ADDR);
  118. iowrite8((length & 0xff), BBM_BASE_ADDR);
  119. iowrite8(data, BBM_BASE_ADDR);
  120. spin_unlock_irqrestore(&fci_lock, flags);
  121. return BBM_OK;
  122. }
  123. int fc8050_ppi_wordwrite(HANDLE hDevice, u16 addr, u16 data)
  124. {
  125. u16 length = 2;
  126. u8 command = PPI_AINC | PPI_WRITE | PPI_BMODE;
  127. unsigned long flags;
  128. spin_lock_irqsave(&fci_lock, flags);
  129. if (BBM_SCI_DATA <= addr && BBM_SCI_SYNCRX >= addr)
  130. command = PPI_WRITE | PPI_WMODE;
  131. iowrite8((addr & 0xff), BBM_BASE_ADDR);
  132. iowrite8(((addr & 0xff00) >> 8), BBM_BASE_ADDR);
  133. iowrite8((command | ((length & 0x0f00) >> 8)), BBM_BASE_ADDR);
  134. iowrite8((length & 0xff), BBM_BASE_ADDR);
  135. iowrite8((data & 0xff), BBM_BASE_ADDR);
  136. iowrite8(((data & 0xff00) >> 8), BBM_BASE_ADDR);
  137. spin_unlock_irqrestore(&fci_lock, flags);
  138. return BBM_OK;
  139. }
  140. int fc8050_ppi_longwrite(HANDLE hDevice, u16 addr, u32 data)
  141. {
  142. u16 length = 4;
  143. unsigned long flags;
  144. u8 command = PPI_AINC | PPI_WRITE | ((length & 0x0f00) >> 8);
  145. spin_lock_irqsave(&fci_lock, flags);
  146. iowrite8((addr & 0xff), BBM_BASE_ADDR);
  147. iowrite8(((addr & 0xff00) >> 8), BBM_BASE_ADDR);
  148. iowrite8(command, BBM_BASE_ADDR);
  149. iowrite8((length & 0xff), BBM_BASE_ADDR);
  150. iowrite8((data & 0x000000ff), BBM_BASE_ADDR);
  151. iowrite8(((data & 0x0000ff00) >> 8), BBM_BASE_ADDR);
  152. iowrite8(((data & 0x00ff0000) >> 16), BBM_BASE_ADDR);
  153. iowrite8(((data & 0xff000000) >> 24), BBM_BASE_ADDR);
  154. spin_unlock_irqrestore(&fci_lock, flags);
  155. return BBM_OK;
  156. }
  157. int fc8050_ppi_bulkwrite(HANDLE hDevice, u16 addr, u8 *data, u16 length)
  158. {
  159. int i;
  160. unsigned long flags;
  161. u8 command = PPI_AINC | PPI_WRITE | ((length & 0x0f00) >> 8);
  162. spin_lock_irqsave(&fci_lock, flags);
  163. iowrite8((addr & 0xff), BBM_BASE_ADDR);
  164. iowrite8(((addr & 0xff00) >> 8), BBM_BASE_ADDR);
  165. iowrite8(command, BBM_BASE_ADDR);
  166. iowrite8((length & 0xff), BBM_BASE_ADDR);
  167. for (i = 0; i < length; i++)
  168. iowrite8(data[i], BBM_BASE_ADDR);
  169. spin_unlock_irqrestore(&fci_lock, flags);
  170. return BBM_OK;
  171. }
  172. int fc8050_ppi_dataread(HANDLE hDevice, u16 addr, u8 *data, u16 length)
  173. {
  174. int i, j;
  175. u16 x, y;
  176. unsigned long flags;
  177. x = length / 4095;
  178. y = length % 4095;
  179. spin_lock_irqsave(&fci_lock, flags);
  180. for (i = 0; i < x; i++) {
  181. iowrite8((addr & 0xff), BBM_BASE_ADDR);
  182. iowrite8(((addr & 0xff00) >> 8), BBM_BASE_ADDR);
  183. iowrite8((PPI_READ | ((4095 & 0x0f00) >> 8)), BBM_BASE_ADDR);
  184. iowrite8((4095 & 0xff), BBM_BASE_ADDR);
  185. for (j = 0; j < 4095; j++)
  186. data[4095*i+j] = ioread8(BBM_BASE_ADDR);
  187. }
  188. if (y) {
  189. iowrite8((addr & 0xff), BBM_BASE_ADDR);
  190. iowrite8(((addr & 0xff00) >> 8), BBM_BASE_ADDR);
  191. iowrite8((PPI_READ | ((y & 0x0f00) >> 8)), BBM_BASE_ADDR);
  192. iowrite8((y & 0xff), BBM_BASE_ADDR);
  193. for (j = 0; j < y; j++)
  194. data[4095*x+j] = ioread8(BBM_BASE_ADDR);
  195. }
  196. spin_unlock_irqrestore(&fci_lock, flags);
  197. return BBM_OK;
  198. }
  199. int fc8050_ppi_deinit(HANDLE hDevice)
  200. {
  201. base_address = 0;
  202. return BBM_OK;
  203. }