ite-cir.c 46 KB

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  1. /*
  2. * Driver for ITE Tech Inc. IT8712F/IT8512 CIR
  3. *
  4. * Copyright (C) 2010 Juan Jesús García de Soria <skandalfo@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation; either version 2 of the
  9. * License, or (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
  19. * USA.
  20. *
  21. * Inspired by the original lirc_it87 and lirc_ite8709 drivers, on top of the
  22. * skeleton provided by the nuvoton-cir driver.
  23. *
  24. * The lirc_it87 driver was originally written by Hans-Gunter Lutke Uphues
  25. * <hg_lu@web.de> in 2001, with enhancements by Christoph Bartelmus
  26. * <lirc@bartelmus.de>, Andrew Calkin <r_tay@hotmail.com> and James Edwards
  27. * <jimbo-lirc@edwardsclan.net>.
  28. *
  29. * The lirc_ite8709 driver was written by Grégory Lardière
  30. * <spmf2004-lirc@yahoo.fr> in 2008.
  31. */
  32. #include <linux/kernel.h>
  33. #include <linux/module.h>
  34. #include <linux/pnp.h>
  35. #include <linux/io.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/sched.h>
  38. #include <linux/delay.h>
  39. #include <linux/slab.h>
  40. #include <linux/input.h>
  41. #include <linux/bitops.h>
  42. #include <media/rc-core.h>
  43. #include <linux/pci_ids.h>
  44. #include "ite-cir.h"
  45. /* module parameters */
  46. /* debug level */
  47. static int debug;
  48. module_param(debug, int, S_IRUGO | S_IWUSR);
  49. MODULE_PARM_DESC(debug, "Enable debugging output");
  50. /* low limit for RX carrier freq, Hz, 0 for no RX demodulation */
  51. static int rx_low_carrier_freq;
  52. module_param(rx_low_carrier_freq, int, S_IRUGO | S_IWUSR);
  53. MODULE_PARM_DESC(rx_low_carrier_freq, "Override low RX carrier frequency, Hz, "
  54. "0 for no RX demodulation");
  55. /* high limit for RX carrier freq, Hz, 0 for no RX demodulation */
  56. static int rx_high_carrier_freq;
  57. module_param(rx_high_carrier_freq, int, S_IRUGO | S_IWUSR);
  58. MODULE_PARM_DESC(rx_high_carrier_freq, "Override high RX carrier frequency, "
  59. "Hz, 0 for no RX demodulation");
  60. /* override tx carrier frequency */
  61. static int tx_carrier_freq;
  62. module_param(tx_carrier_freq, int, S_IRUGO | S_IWUSR);
  63. MODULE_PARM_DESC(tx_carrier_freq, "Override TX carrier frequency, Hz");
  64. /* override tx duty cycle */
  65. static int tx_duty_cycle;
  66. module_param(tx_duty_cycle, int, S_IRUGO | S_IWUSR);
  67. MODULE_PARM_DESC(tx_duty_cycle, "Override TX duty cycle, 1-100");
  68. /* override default sample period */
  69. static long sample_period;
  70. module_param(sample_period, long, S_IRUGO | S_IWUSR);
  71. MODULE_PARM_DESC(sample_period, "Override carrier sample period, us");
  72. /* override detected model id */
  73. static int model_number = -1;
  74. module_param(model_number, int, S_IRUGO | S_IWUSR);
  75. MODULE_PARM_DESC(model_number, "Use this model number, don't autodetect");
  76. /* HW-independent code functions */
  77. /* check whether carrier frequency is high frequency */
  78. static inline bool ite_is_high_carrier_freq(unsigned int freq)
  79. {
  80. return freq >= ITE_HCF_MIN_CARRIER_FREQ;
  81. }
  82. /* get the bits required to program the carrier frequency in CFQ bits,
  83. * unshifted */
  84. static u8 ite_get_carrier_freq_bits(unsigned int freq)
  85. {
  86. if (ite_is_high_carrier_freq(freq)) {
  87. if (freq < 425000)
  88. return ITE_CFQ_400;
  89. else if (freq < 465000)
  90. return ITE_CFQ_450;
  91. else if (freq < 490000)
  92. return ITE_CFQ_480;
  93. else
  94. return ITE_CFQ_500;
  95. } else {
  96. /* trim to limits */
  97. if (freq < ITE_LCF_MIN_CARRIER_FREQ)
  98. freq = ITE_LCF_MIN_CARRIER_FREQ;
  99. if (freq > ITE_LCF_MAX_CARRIER_FREQ)
  100. freq = ITE_LCF_MAX_CARRIER_FREQ;
  101. /* convert to kHz and subtract the base freq */
  102. freq =
  103. DIV_ROUND_CLOSEST(freq - ITE_LCF_MIN_CARRIER_FREQ,
  104. 1000);
  105. return (u8) freq;
  106. }
  107. }
  108. /* get the bits required to program the pulse with in TXMPW */
  109. static u8 ite_get_pulse_width_bits(unsigned int freq, int duty_cycle)
  110. {
  111. unsigned long period_ns, on_ns;
  112. /* sanitize freq into range */
  113. if (freq < ITE_LCF_MIN_CARRIER_FREQ)
  114. freq = ITE_LCF_MIN_CARRIER_FREQ;
  115. if (freq > ITE_HCF_MAX_CARRIER_FREQ)
  116. freq = ITE_HCF_MAX_CARRIER_FREQ;
  117. period_ns = 1000000000UL / freq;
  118. on_ns = period_ns * duty_cycle / 100;
  119. if (ite_is_high_carrier_freq(freq)) {
  120. if (on_ns < 750)
  121. return ITE_TXMPW_A;
  122. else if (on_ns < 850)
  123. return ITE_TXMPW_B;
  124. else if (on_ns < 950)
  125. return ITE_TXMPW_C;
  126. else if (on_ns < 1080)
  127. return ITE_TXMPW_D;
  128. else
  129. return ITE_TXMPW_E;
  130. } else {
  131. if (on_ns < 6500)
  132. return ITE_TXMPW_A;
  133. else if (on_ns < 7850)
  134. return ITE_TXMPW_B;
  135. else if (on_ns < 9650)
  136. return ITE_TXMPW_C;
  137. else if (on_ns < 11950)
  138. return ITE_TXMPW_D;
  139. else
  140. return ITE_TXMPW_E;
  141. }
  142. }
  143. /* decode raw bytes as received by the hardware, and push them to the ir-core
  144. * layer */
  145. static void ite_decode_bytes(struct ite_dev *dev, const u8 * data, int
  146. length)
  147. {
  148. u32 sample_period;
  149. unsigned long *ldata;
  150. unsigned int next_one, next_zero, size;
  151. DEFINE_IR_RAW_EVENT(ev);
  152. if (length == 0)
  153. return;
  154. sample_period = dev->params.sample_period;
  155. ldata = (unsigned long *)data;
  156. size = length << 3;
  157. next_one = find_next_bit_le(ldata, size, 0);
  158. if (next_one > 0) {
  159. ev.pulse = true;
  160. ev.duration =
  161. ITE_BITS_TO_NS(next_one, sample_period);
  162. ir_raw_event_store_with_filter(dev->rdev, &ev);
  163. }
  164. while (next_one < size) {
  165. next_zero = find_next_zero_bit_le(ldata, size, next_one + 1);
  166. ev.pulse = false;
  167. ev.duration = ITE_BITS_TO_NS(next_zero - next_one, sample_period);
  168. ir_raw_event_store_with_filter(dev->rdev, &ev);
  169. if (next_zero < size) {
  170. next_one =
  171. find_next_bit_le(ldata,
  172. size,
  173. next_zero + 1);
  174. ev.pulse = true;
  175. ev.duration =
  176. ITE_BITS_TO_NS(next_one - next_zero,
  177. sample_period);
  178. ir_raw_event_store_with_filter
  179. (dev->rdev, &ev);
  180. } else
  181. next_one = size;
  182. }
  183. ir_raw_event_handle(dev->rdev);
  184. ite_dbg_verbose("decoded %d bytes.", length);
  185. }
  186. /* set all the rx/tx carrier parameters; this must be called with the device
  187. * spinlock held */
  188. static void ite_set_carrier_params(struct ite_dev *dev)
  189. {
  190. unsigned int freq, low_freq, high_freq;
  191. int allowance;
  192. bool use_demodulator;
  193. bool for_tx = dev->transmitting;
  194. ite_dbg("%s called", __func__);
  195. if (for_tx) {
  196. /* we don't need no stinking calculations */
  197. freq = dev->params.tx_carrier_freq;
  198. allowance = ITE_RXDCR_DEFAULT;
  199. use_demodulator = false;
  200. } else {
  201. low_freq = dev->params.rx_low_carrier_freq;
  202. high_freq = dev->params.rx_high_carrier_freq;
  203. if (low_freq == 0) {
  204. /* don't demodulate */
  205. freq =
  206. ITE_DEFAULT_CARRIER_FREQ;
  207. allowance = ITE_RXDCR_DEFAULT;
  208. use_demodulator = false;
  209. } else {
  210. /* calculate the middle freq */
  211. freq = (low_freq + high_freq) / 2;
  212. /* calculate the allowance */
  213. allowance =
  214. DIV_ROUND_CLOSEST(10000 * (high_freq - low_freq),
  215. ITE_RXDCR_PER_10000_STEP
  216. * (high_freq + low_freq));
  217. if (allowance < 1)
  218. allowance = 1;
  219. if (allowance > ITE_RXDCR_MAX)
  220. allowance = ITE_RXDCR_MAX;
  221. }
  222. }
  223. /* set the carrier parameters in a device-dependent way */
  224. dev->params.set_carrier_params(dev, ite_is_high_carrier_freq(freq),
  225. use_demodulator, ite_get_carrier_freq_bits(freq), allowance,
  226. ite_get_pulse_width_bits(freq, dev->params.tx_duty_cycle));
  227. }
  228. /* interrupt service routine for incoming and outgoing CIR data */
  229. static irqreturn_t ite_cir_isr(int irq, void *data)
  230. {
  231. struct ite_dev *dev = data;
  232. unsigned long flags;
  233. irqreturn_t ret = IRQ_RETVAL(IRQ_NONE);
  234. u8 rx_buf[ITE_RX_FIFO_LEN];
  235. int rx_bytes;
  236. int iflags;
  237. ite_dbg_verbose("%s firing", __func__);
  238. /* grab the spinlock */
  239. spin_lock_irqsave(&dev->lock, flags);
  240. /* read the interrupt flags */
  241. iflags = dev->params.get_irq_causes(dev);
  242. /* check for the receive interrupt */
  243. if (iflags & (ITE_IRQ_RX_FIFO | ITE_IRQ_RX_FIFO_OVERRUN)) {
  244. /* read the FIFO bytes */
  245. rx_bytes =
  246. dev->params.get_rx_bytes(dev, rx_buf,
  247. ITE_RX_FIFO_LEN);
  248. if (rx_bytes > 0) {
  249. /* drop the spinlock, since the ir-core layer
  250. * may call us back again through
  251. * ite_s_idle() */
  252. spin_unlock_irqrestore(&dev->
  253. lock,
  254. flags);
  255. /* decode the data we've just received */
  256. ite_decode_bytes(dev, rx_buf,
  257. rx_bytes);
  258. /* reacquire the spinlock */
  259. spin_lock_irqsave(&dev->lock,
  260. flags);
  261. /* mark the interrupt as serviced */
  262. ret = IRQ_RETVAL(IRQ_HANDLED);
  263. }
  264. } else if (iflags & ITE_IRQ_TX_FIFO) {
  265. /* FIFO space available interrupt */
  266. ite_dbg_verbose("got interrupt for TX FIFO");
  267. /* wake any sleeping transmitter */
  268. wake_up_interruptible(&dev->tx_queue);
  269. /* mark the interrupt as serviced */
  270. ret = IRQ_RETVAL(IRQ_HANDLED);
  271. }
  272. /* drop the spinlock */
  273. spin_unlock_irqrestore(&dev->lock, flags);
  274. ite_dbg_verbose("%s done returning %d", __func__, (int)ret);
  275. return ret;
  276. }
  277. /* set the rx carrier freq range, guess it's in Hz... */
  278. static int ite_set_rx_carrier_range(struct rc_dev *rcdev, u32 carrier_low, u32
  279. carrier_high)
  280. {
  281. unsigned long flags;
  282. struct ite_dev *dev = rcdev->priv;
  283. spin_lock_irqsave(&dev->lock, flags);
  284. dev->params.rx_low_carrier_freq = carrier_low;
  285. dev->params.rx_high_carrier_freq = carrier_high;
  286. ite_set_carrier_params(dev);
  287. spin_unlock_irqrestore(&dev->lock, flags);
  288. return 0;
  289. }
  290. /* set the tx carrier freq, guess it's in Hz... */
  291. static int ite_set_tx_carrier(struct rc_dev *rcdev, u32 carrier)
  292. {
  293. unsigned long flags;
  294. struct ite_dev *dev = rcdev->priv;
  295. spin_lock_irqsave(&dev->lock, flags);
  296. dev->params.tx_carrier_freq = carrier;
  297. ite_set_carrier_params(dev);
  298. spin_unlock_irqrestore(&dev->lock, flags);
  299. return 0;
  300. }
  301. /* set the tx duty cycle by controlling the pulse width */
  302. static int ite_set_tx_duty_cycle(struct rc_dev *rcdev, u32 duty_cycle)
  303. {
  304. unsigned long flags;
  305. struct ite_dev *dev = rcdev->priv;
  306. spin_lock_irqsave(&dev->lock, flags);
  307. dev->params.tx_duty_cycle = duty_cycle;
  308. ite_set_carrier_params(dev);
  309. spin_unlock_irqrestore(&dev->lock, flags);
  310. return 0;
  311. }
  312. /* transmit out IR pulses; what you get here is a batch of alternating
  313. * pulse/space/pulse/space lengths that we should write out completely through
  314. * the FIFO, blocking on a full FIFO */
  315. static int ite_tx_ir(struct rc_dev *rcdev, unsigned *txbuf, unsigned n)
  316. {
  317. unsigned long flags;
  318. struct ite_dev *dev = rcdev->priv;
  319. bool is_pulse = false;
  320. int remaining_us, fifo_avail, fifo_remaining, last_idx = 0;
  321. int max_rle_us, next_rle_us;
  322. int ret = n;
  323. u8 last_sent[ITE_TX_FIFO_LEN];
  324. u8 val;
  325. ite_dbg("%s called", __func__);
  326. /* clear the array just in case */
  327. memset(last_sent, 0, ARRAY_SIZE(last_sent));
  328. spin_lock_irqsave(&dev->lock, flags);
  329. /* let everybody know we're now transmitting */
  330. dev->transmitting = true;
  331. /* and set the carrier values for transmission */
  332. ite_set_carrier_params(dev);
  333. /* calculate how much time we can send in one byte */
  334. max_rle_us =
  335. (ITE_BAUDRATE_DIVISOR * dev->params.sample_period *
  336. ITE_TX_MAX_RLE) / 1000;
  337. /* disable the receiver */
  338. dev->params.disable_rx(dev);
  339. /* this is where we'll begin filling in the FIFO, until it's full.
  340. * then we'll just activate the interrupt, wait for it to wake us up
  341. * again, disable it, continue filling the FIFO... until everything
  342. * has been pushed out */
  343. fifo_avail =
  344. ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev);
  345. while (n > 0 && dev->in_use) {
  346. /* transmit the next sample */
  347. is_pulse = !is_pulse;
  348. remaining_us = *(txbuf++);
  349. n--;
  350. ite_dbg("%s: %ld",
  351. ((is_pulse) ? "pulse" : "space"),
  352. (long int)
  353. remaining_us);
  354. /* repeat while the pulse is non-zero length */
  355. while (remaining_us > 0 && dev->in_use) {
  356. if (remaining_us > max_rle_us)
  357. next_rle_us = max_rle_us;
  358. else
  359. next_rle_us = remaining_us;
  360. remaining_us -= next_rle_us;
  361. /* check what's the length we have to pump out */
  362. val = (ITE_TX_MAX_RLE * next_rle_us) / max_rle_us;
  363. /* put it into the sent buffer */
  364. last_sent[last_idx++] = val;
  365. last_idx &= (ITE_TX_FIFO_LEN);
  366. /* encode it for 7 bits */
  367. val = (val - 1) & ITE_TX_RLE_MASK;
  368. /* take into account pulse/space prefix */
  369. if (is_pulse)
  370. val |= ITE_TX_PULSE;
  371. else
  372. val |= ITE_TX_SPACE;
  373. /*
  374. * if we get to 0 available, read again, just in case
  375. * some other slot got freed
  376. */
  377. if (fifo_avail <= 0)
  378. fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev);
  379. /* if it's still full */
  380. if (fifo_avail <= 0) {
  381. /* enable the tx interrupt */
  382. dev->params.
  383. enable_tx_interrupt(dev);
  384. /* drop the spinlock */
  385. spin_unlock_irqrestore(&dev->lock, flags);
  386. /* wait for the FIFO to empty enough */
  387. wait_event_interruptible(dev->tx_queue, (fifo_avail = ITE_TX_FIFO_LEN - dev->params.get_tx_used_slots(dev)) >= 8);
  388. /* get the spinlock again */
  389. spin_lock_irqsave(&dev->lock, flags);
  390. /* disable the tx interrupt again. */
  391. dev->params.
  392. disable_tx_interrupt(dev);
  393. }
  394. /* now send the byte through the FIFO */
  395. dev->params.put_tx_byte(dev, val);
  396. fifo_avail--;
  397. }
  398. }
  399. /* wait and don't return until the whole FIFO has been sent out;
  400. * otherwise we could configure the RX carrier params instead of the
  401. * TX ones while the transmission is still being performed! */
  402. fifo_remaining = dev->params.get_tx_used_slots(dev);
  403. remaining_us = 0;
  404. while (fifo_remaining > 0) {
  405. fifo_remaining--;
  406. last_idx--;
  407. last_idx &= (ITE_TX_FIFO_LEN - 1);
  408. remaining_us += last_sent[last_idx];
  409. }
  410. remaining_us = (remaining_us * max_rle_us) / (ITE_TX_MAX_RLE);
  411. /* drop the spinlock while we sleep */
  412. spin_unlock_irqrestore(&dev->lock, flags);
  413. /* sleep remaining_us microseconds */
  414. mdelay(DIV_ROUND_UP(remaining_us, 1000));
  415. /* reacquire the spinlock */
  416. spin_lock_irqsave(&dev->lock, flags);
  417. /* now we're not transmitting anymore */
  418. dev->transmitting = false;
  419. /* and set the carrier values for reception */
  420. ite_set_carrier_params(dev);
  421. /* reenable the receiver */
  422. if (dev->in_use)
  423. dev->params.enable_rx(dev);
  424. /* notify transmission end */
  425. wake_up_interruptible(&dev->tx_ended);
  426. spin_unlock_irqrestore(&dev->lock, flags);
  427. return ret;
  428. }
  429. /* idle the receiver if needed */
  430. static void ite_s_idle(struct rc_dev *rcdev, bool enable)
  431. {
  432. unsigned long flags;
  433. struct ite_dev *dev = rcdev->priv;
  434. ite_dbg("%s called", __func__);
  435. if (enable) {
  436. spin_lock_irqsave(&dev->lock, flags);
  437. dev->params.idle_rx(dev);
  438. spin_unlock_irqrestore(&dev->lock, flags);
  439. }
  440. }
  441. /* IT8712F HW-specific functions */
  442. /* retrieve a bitmask of the current causes for a pending interrupt; this may
  443. * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
  444. * */
  445. static int it87_get_irq_causes(struct ite_dev *dev)
  446. {
  447. u8 iflags;
  448. int ret = 0;
  449. ite_dbg("%s called", __func__);
  450. /* read the interrupt flags */
  451. iflags = inb(dev->cir_addr + IT87_IIR) & IT87_II;
  452. switch (iflags) {
  453. case IT87_II_RXDS:
  454. ret = ITE_IRQ_RX_FIFO;
  455. break;
  456. case IT87_II_RXFO:
  457. ret = ITE_IRQ_RX_FIFO_OVERRUN;
  458. break;
  459. case IT87_II_TXLDL:
  460. ret = ITE_IRQ_TX_FIFO;
  461. break;
  462. }
  463. return ret;
  464. }
  465. /* set the carrier parameters; to be called with the spinlock held */
  466. static void it87_set_carrier_params(struct ite_dev *dev, bool high_freq,
  467. bool use_demodulator,
  468. u8 carrier_freq_bits, u8 allowance_bits,
  469. u8 pulse_width_bits)
  470. {
  471. u8 val;
  472. ite_dbg("%s called", __func__);
  473. /* program the RCR register */
  474. val = inb(dev->cir_addr + IT87_RCR)
  475. & ~(IT87_HCFS | IT87_RXEND | IT87_RXDCR);
  476. if (high_freq)
  477. val |= IT87_HCFS;
  478. if (use_demodulator)
  479. val |= IT87_RXEND;
  480. val |= allowance_bits;
  481. outb(val, dev->cir_addr + IT87_RCR);
  482. /* program the TCR2 register */
  483. outb((carrier_freq_bits << IT87_CFQ_SHIFT) | pulse_width_bits,
  484. dev->cir_addr + IT87_TCR2);
  485. }
  486. /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
  487. * held */
  488. static int it87_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
  489. {
  490. int fifo, read = 0;
  491. ite_dbg("%s called", __func__);
  492. /* read how many bytes are still in the FIFO */
  493. fifo = inb(dev->cir_addr + IT87_RSR) & IT87_RXFBC;
  494. while (fifo > 0 && buf_size > 0) {
  495. *(buf++) = inb(dev->cir_addr + IT87_DR);
  496. fifo--;
  497. read++;
  498. buf_size--;
  499. }
  500. return read;
  501. }
  502. /* return how many bytes are still in the FIFO; this will be called
  503. * with the device spinlock NOT HELD while waiting for the TX FIFO to get
  504. * empty; let's expect this won't be a problem */
  505. static int it87_get_tx_used_slots(struct ite_dev *dev)
  506. {
  507. ite_dbg("%s called", __func__);
  508. return inb(dev->cir_addr + IT87_TSR) & IT87_TXFBC;
  509. }
  510. /* put a byte to the TX fifo; this should be called with the spinlock held */
  511. static void it87_put_tx_byte(struct ite_dev *dev, u8 value)
  512. {
  513. outb(value, dev->cir_addr + IT87_DR);
  514. }
  515. /* idle the receiver so that we won't receive samples until another
  516. pulse is detected; this must be called with the device spinlock held */
  517. static void it87_idle_rx(struct ite_dev *dev)
  518. {
  519. ite_dbg("%s called", __func__);
  520. /* disable streaming by clearing RXACT writing it as 1 */
  521. outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXACT,
  522. dev->cir_addr + IT87_RCR);
  523. /* clear the FIFO */
  524. outb(inb(dev->cir_addr + IT87_TCR1) | IT87_FIFOCLR,
  525. dev->cir_addr + IT87_TCR1);
  526. }
  527. /* disable the receiver; this must be called with the device spinlock held */
  528. static void it87_disable_rx(struct ite_dev *dev)
  529. {
  530. ite_dbg("%s called", __func__);
  531. /* disable the receiver interrupts */
  532. outb(inb(dev->cir_addr + IT87_IER) & ~(IT87_RDAIE | IT87_RFOIE),
  533. dev->cir_addr + IT87_IER);
  534. /* disable the receiver */
  535. outb(inb(dev->cir_addr + IT87_RCR) & ~IT87_RXEN,
  536. dev->cir_addr + IT87_RCR);
  537. /* clear the FIFO and RXACT (actually RXACT should have been cleared
  538. * in the previous outb() call) */
  539. it87_idle_rx(dev);
  540. }
  541. /* enable the receiver; this must be called with the device spinlock held */
  542. static void it87_enable_rx(struct ite_dev *dev)
  543. {
  544. ite_dbg("%s called", __func__);
  545. /* enable the receiver by setting RXEN */
  546. outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXEN,
  547. dev->cir_addr + IT87_RCR);
  548. /* just prepare it to idle for the next reception */
  549. it87_idle_rx(dev);
  550. /* enable the receiver interrupts and master enable flag */
  551. outb(inb(dev->cir_addr + IT87_IER) | IT87_RDAIE | IT87_RFOIE | IT87_IEC,
  552. dev->cir_addr + IT87_IER);
  553. }
  554. /* disable the transmitter interrupt; this must be called with the device
  555. * spinlock held */
  556. static void it87_disable_tx_interrupt(struct ite_dev *dev)
  557. {
  558. ite_dbg("%s called", __func__);
  559. /* disable the transmitter interrupts */
  560. outb(inb(dev->cir_addr + IT87_IER) & ~IT87_TLDLIE,
  561. dev->cir_addr + IT87_IER);
  562. }
  563. /* enable the transmitter interrupt; this must be called with the device
  564. * spinlock held */
  565. static void it87_enable_tx_interrupt(struct ite_dev *dev)
  566. {
  567. ite_dbg("%s called", __func__);
  568. /* enable the transmitter interrupts and master enable flag */
  569. outb(inb(dev->cir_addr + IT87_IER) | IT87_TLDLIE | IT87_IEC,
  570. dev->cir_addr + IT87_IER);
  571. }
  572. /* disable the device; this must be called with the device spinlock held */
  573. static void it87_disable(struct ite_dev *dev)
  574. {
  575. ite_dbg("%s called", __func__);
  576. /* clear out all interrupt enable flags */
  577. outb(inb(dev->cir_addr + IT87_IER) &
  578. ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE),
  579. dev->cir_addr + IT87_IER);
  580. /* disable the receiver */
  581. it87_disable_rx(dev);
  582. /* erase the FIFO */
  583. outb(IT87_FIFOCLR | inb(dev->cir_addr + IT87_TCR1),
  584. dev->cir_addr + IT87_TCR1);
  585. }
  586. /* initialize the hardware */
  587. static void it87_init_hardware(struct ite_dev *dev)
  588. {
  589. ite_dbg("%s called", __func__);
  590. /* enable just the baud rate divisor register,
  591. disabling all the interrupts at the same time */
  592. outb((inb(dev->cir_addr + IT87_IER) &
  593. ~(IT87_IEC | IT87_RFOIE | IT87_RDAIE | IT87_TLDLIE)) | IT87_BR,
  594. dev->cir_addr + IT87_IER);
  595. /* write out the baud rate divisor */
  596. outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT87_BDLR);
  597. outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff, dev->cir_addr + IT87_BDHR);
  598. /* disable the baud rate divisor register again */
  599. outb(inb(dev->cir_addr + IT87_IER) & ~IT87_BR,
  600. dev->cir_addr + IT87_IER);
  601. /* program the RCR register defaults */
  602. outb(ITE_RXDCR_DEFAULT, dev->cir_addr + IT87_RCR);
  603. /* program the TCR1 register */
  604. outb(IT87_TXMPM_DEFAULT | IT87_TXENDF | IT87_TXRLE
  605. | IT87_FIFOTL_DEFAULT | IT87_FIFOCLR,
  606. dev->cir_addr + IT87_TCR1);
  607. /* program the carrier parameters */
  608. ite_set_carrier_params(dev);
  609. }
  610. /* IT8512F on ITE8708 HW-specific functions */
  611. /* retrieve a bitmask of the current causes for a pending interrupt; this may
  612. * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
  613. * */
  614. static int it8708_get_irq_causes(struct ite_dev *dev)
  615. {
  616. u8 iflags;
  617. int ret = 0;
  618. ite_dbg("%s called", __func__);
  619. /* read the interrupt flags */
  620. iflags = inb(dev->cir_addr + IT8708_C0IIR);
  621. if (iflags & IT85_TLDLI)
  622. ret |= ITE_IRQ_TX_FIFO;
  623. if (iflags & IT85_RDAI)
  624. ret |= ITE_IRQ_RX_FIFO;
  625. if (iflags & IT85_RFOI)
  626. ret |= ITE_IRQ_RX_FIFO_OVERRUN;
  627. return ret;
  628. }
  629. /* set the carrier parameters; to be called with the spinlock held */
  630. static void it8708_set_carrier_params(struct ite_dev *dev, bool high_freq,
  631. bool use_demodulator,
  632. u8 carrier_freq_bits, u8 allowance_bits,
  633. u8 pulse_width_bits)
  634. {
  635. u8 val;
  636. ite_dbg("%s called", __func__);
  637. /* program the C0CFR register, with HRAE=1 */
  638. outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,
  639. dev->cir_addr + IT8708_BANKSEL);
  640. val = (inb(dev->cir_addr + IT8708_C0CFR)
  641. & ~(IT85_HCFS | IT85_CFQ)) | carrier_freq_bits;
  642. if (high_freq)
  643. val |= IT85_HCFS;
  644. outb(val, dev->cir_addr + IT8708_C0CFR);
  645. outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,
  646. dev->cir_addr + IT8708_BANKSEL);
  647. /* program the C0RCR register */
  648. val = inb(dev->cir_addr + IT8708_C0RCR)
  649. & ~(IT85_RXEND | IT85_RXDCR);
  650. if (use_demodulator)
  651. val |= IT85_RXEND;
  652. val |= allowance_bits;
  653. outb(val, dev->cir_addr + IT8708_C0RCR);
  654. /* program the C0TCR register */
  655. val = inb(dev->cir_addr + IT8708_C0TCR) & ~IT85_TXMPW;
  656. val |= pulse_width_bits;
  657. outb(val, dev->cir_addr + IT8708_C0TCR);
  658. }
  659. /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
  660. * held */
  661. static int it8708_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
  662. {
  663. int fifo, read = 0;
  664. ite_dbg("%s called", __func__);
  665. /* read how many bytes are still in the FIFO */
  666. fifo = inb(dev->cir_addr + IT8708_C0RFSR) & IT85_RXFBC;
  667. while (fifo > 0 && buf_size > 0) {
  668. *(buf++) = inb(dev->cir_addr + IT8708_C0DR);
  669. fifo--;
  670. read++;
  671. buf_size--;
  672. }
  673. return read;
  674. }
  675. /* return how many bytes are still in the FIFO; this will be called
  676. * with the device spinlock NOT HELD while waiting for the TX FIFO to get
  677. * empty; let's expect this won't be a problem */
  678. static int it8708_get_tx_used_slots(struct ite_dev *dev)
  679. {
  680. ite_dbg("%s called", __func__);
  681. return inb(dev->cir_addr + IT8708_C0TFSR) & IT85_TXFBC;
  682. }
  683. /* put a byte to the TX fifo; this should be called with the spinlock held */
  684. static void it8708_put_tx_byte(struct ite_dev *dev, u8 value)
  685. {
  686. outb(value, dev->cir_addr + IT8708_C0DR);
  687. }
  688. /* idle the receiver so that we won't receive samples until another
  689. pulse is detected; this must be called with the device spinlock held */
  690. static void it8708_idle_rx(struct ite_dev *dev)
  691. {
  692. ite_dbg("%s called", __func__);
  693. /* disable streaming by clearing RXACT writing it as 1 */
  694. outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXACT,
  695. dev->cir_addr + IT8708_C0RCR);
  696. /* clear the FIFO */
  697. outb(inb(dev->cir_addr + IT8708_C0MSTCR) | IT85_FIFOCLR,
  698. dev->cir_addr + IT8708_C0MSTCR);
  699. }
  700. /* disable the receiver; this must be called with the device spinlock held */
  701. static void it8708_disable_rx(struct ite_dev *dev)
  702. {
  703. ite_dbg("%s called", __func__);
  704. /* disable the receiver interrupts */
  705. outb(inb(dev->cir_addr + IT8708_C0IER) &
  706. ~(IT85_RDAIE | IT85_RFOIE),
  707. dev->cir_addr + IT8708_C0IER);
  708. /* disable the receiver */
  709. outb(inb(dev->cir_addr + IT8708_C0RCR) & ~IT85_RXEN,
  710. dev->cir_addr + IT8708_C0RCR);
  711. /* clear the FIFO and RXACT (actually RXACT should have been cleared
  712. * in the previous outb() call) */
  713. it8708_idle_rx(dev);
  714. }
  715. /* enable the receiver; this must be called with the device spinlock held */
  716. static void it8708_enable_rx(struct ite_dev *dev)
  717. {
  718. ite_dbg("%s called", __func__);
  719. /* enable the receiver by setting RXEN */
  720. outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXEN,
  721. dev->cir_addr + IT8708_C0RCR);
  722. /* just prepare it to idle for the next reception */
  723. it8708_idle_rx(dev);
  724. /* enable the receiver interrupts and master enable flag */
  725. outb(inb(dev->cir_addr + IT8708_C0IER)
  726. |IT85_RDAIE | IT85_RFOIE | IT85_IEC,
  727. dev->cir_addr + IT8708_C0IER);
  728. }
  729. /* disable the transmitter interrupt; this must be called with the device
  730. * spinlock held */
  731. static void it8708_disable_tx_interrupt(struct ite_dev *dev)
  732. {
  733. ite_dbg("%s called", __func__);
  734. /* disable the transmitter interrupts */
  735. outb(inb(dev->cir_addr + IT8708_C0IER) & ~IT85_TLDLIE,
  736. dev->cir_addr + IT8708_C0IER);
  737. }
  738. /* enable the transmitter interrupt; this must be called with the device
  739. * spinlock held */
  740. static void it8708_enable_tx_interrupt(struct ite_dev *dev)
  741. {
  742. ite_dbg("%s called", __func__);
  743. /* enable the transmitter interrupts and master enable flag */
  744. outb(inb(dev->cir_addr + IT8708_C0IER)
  745. |IT85_TLDLIE | IT85_IEC,
  746. dev->cir_addr + IT8708_C0IER);
  747. }
  748. /* disable the device; this must be called with the device spinlock held */
  749. static void it8708_disable(struct ite_dev *dev)
  750. {
  751. ite_dbg("%s called", __func__);
  752. /* clear out all interrupt enable flags */
  753. outb(inb(dev->cir_addr + IT8708_C0IER) &
  754. ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
  755. dev->cir_addr + IT8708_C0IER);
  756. /* disable the receiver */
  757. it8708_disable_rx(dev);
  758. /* erase the FIFO */
  759. outb(IT85_FIFOCLR | inb(dev->cir_addr + IT8708_C0MSTCR),
  760. dev->cir_addr + IT8708_C0MSTCR);
  761. }
  762. /* initialize the hardware */
  763. static void it8708_init_hardware(struct ite_dev *dev)
  764. {
  765. ite_dbg("%s called", __func__);
  766. /* disable all the interrupts */
  767. outb(inb(dev->cir_addr + IT8708_C0IER) &
  768. ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
  769. dev->cir_addr + IT8708_C0IER);
  770. /* program the baud rate divisor */
  771. outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,
  772. dev->cir_addr + IT8708_BANKSEL);
  773. outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT8708_C0BDLR);
  774. outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff,
  775. dev->cir_addr + IT8708_C0BDHR);
  776. outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,
  777. dev->cir_addr + IT8708_BANKSEL);
  778. /* program the C0MSTCR register defaults */
  779. outb((inb(dev->cir_addr + IT8708_C0MSTCR) &
  780. ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL |
  781. IT85_FIFOCLR | IT85_RESET)) |
  782. IT85_FIFOTL_DEFAULT,
  783. dev->cir_addr + IT8708_C0MSTCR);
  784. /* program the C0RCR register defaults */
  785. outb((inb(dev->cir_addr + IT8708_C0RCR) &
  786. ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND |
  787. IT85_RXACT | IT85_RXDCR)) |
  788. ITE_RXDCR_DEFAULT,
  789. dev->cir_addr + IT8708_C0RCR);
  790. /* program the C0TCR register defaults */
  791. outb((inb(dev->cir_addr + IT8708_C0TCR) &
  792. ~(IT85_TXMPM | IT85_TXMPW))
  793. |IT85_TXRLE | IT85_TXENDF |
  794. IT85_TXMPM_DEFAULT | IT85_TXMPW_DEFAULT,
  795. dev->cir_addr + IT8708_C0TCR);
  796. /* program the carrier parameters */
  797. ite_set_carrier_params(dev);
  798. }
  799. /* IT8512F on ITE8709 HW-specific functions */
  800. /* read a byte from the SRAM module */
  801. static inline u8 it8709_rm(struct ite_dev *dev, int index)
  802. {
  803. outb(index, dev->cir_addr + IT8709_RAM_IDX);
  804. return inb(dev->cir_addr + IT8709_RAM_VAL);
  805. }
  806. /* write a byte to the SRAM module */
  807. static inline void it8709_wm(struct ite_dev *dev, u8 val, int index)
  808. {
  809. outb(index, dev->cir_addr + IT8709_RAM_IDX);
  810. outb(val, dev->cir_addr + IT8709_RAM_VAL);
  811. }
  812. static void it8709_wait(struct ite_dev *dev)
  813. {
  814. int i = 0;
  815. /*
  816. * loop until device tells it's ready to continue
  817. * iterations count is usually ~750 but can sometimes achieve 13000
  818. */
  819. for (i = 0; i < 15000; i++) {
  820. udelay(2);
  821. if (it8709_rm(dev, IT8709_MODE) == IT8709_IDLE)
  822. break;
  823. }
  824. }
  825. /* read the value of a CIR register */
  826. static u8 it8709_rr(struct ite_dev *dev, int index)
  827. {
  828. /* just wait in case the previous access was a write */
  829. it8709_wait(dev);
  830. it8709_wm(dev, index, IT8709_REG_IDX);
  831. it8709_wm(dev, IT8709_READ, IT8709_MODE);
  832. /* wait for the read data to be available */
  833. it8709_wait(dev);
  834. /* return the read value */
  835. return it8709_rm(dev, IT8709_REG_VAL);
  836. }
  837. /* write the value of a CIR register */
  838. static void it8709_wr(struct ite_dev *dev, u8 val, int index)
  839. {
  840. /* we wait before writing, and not afterwards, since this allows us to
  841. * pipeline the host CPU with the microcontroller */
  842. it8709_wait(dev);
  843. it8709_wm(dev, val, IT8709_REG_VAL);
  844. it8709_wm(dev, index, IT8709_REG_IDX);
  845. it8709_wm(dev, IT8709_WRITE, IT8709_MODE);
  846. }
  847. /* retrieve a bitmask of the current causes for a pending interrupt; this may
  848. * be composed of ITE_IRQ_TX_FIFO, ITE_IRQ_RX_FIFO and ITE_IRQ_RX_FIFO_OVERRUN
  849. * */
  850. static int it8709_get_irq_causes(struct ite_dev *dev)
  851. {
  852. u8 iflags;
  853. int ret = 0;
  854. ite_dbg("%s called", __func__);
  855. /* read the interrupt flags */
  856. iflags = it8709_rm(dev, IT8709_IIR);
  857. if (iflags & IT85_TLDLI)
  858. ret |= ITE_IRQ_TX_FIFO;
  859. if (iflags & IT85_RDAI)
  860. ret |= ITE_IRQ_RX_FIFO;
  861. if (iflags & IT85_RFOI)
  862. ret |= ITE_IRQ_RX_FIFO_OVERRUN;
  863. return ret;
  864. }
  865. /* set the carrier parameters; to be called with the spinlock held */
  866. static void it8709_set_carrier_params(struct ite_dev *dev, bool high_freq,
  867. bool use_demodulator,
  868. u8 carrier_freq_bits, u8 allowance_bits,
  869. u8 pulse_width_bits)
  870. {
  871. u8 val;
  872. ite_dbg("%s called", __func__);
  873. val = (it8709_rr(dev, IT85_C0CFR)
  874. &~(IT85_HCFS | IT85_CFQ)) |
  875. carrier_freq_bits;
  876. if (high_freq)
  877. val |= IT85_HCFS;
  878. it8709_wr(dev, val, IT85_C0CFR);
  879. /* program the C0RCR register */
  880. val = it8709_rr(dev, IT85_C0RCR)
  881. & ~(IT85_RXEND | IT85_RXDCR);
  882. if (use_demodulator)
  883. val |= IT85_RXEND;
  884. val |= allowance_bits;
  885. it8709_wr(dev, val, IT85_C0RCR);
  886. /* program the C0TCR register */
  887. val = it8709_rr(dev, IT85_C0TCR) & ~IT85_TXMPW;
  888. val |= pulse_width_bits;
  889. it8709_wr(dev, val, IT85_C0TCR);
  890. }
  891. /* read up to buf_size bytes from the RX FIFO; to be called with the spinlock
  892. * held */
  893. static int it8709_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
  894. {
  895. int fifo, read = 0;
  896. ite_dbg("%s called", __func__);
  897. /* read how many bytes are still in the FIFO */
  898. fifo = it8709_rm(dev, IT8709_RFSR) & IT85_RXFBC;
  899. while (fifo > 0 && buf_size > 0) {
  900. *(buf++) = it8709_rm(dev, IT8709_FIFO + read);
  901. fifo--;
  902. read++;
  903. buf_size--;
  904. }
  905. /* 'clear' the FIFO by setting the writing index to 0; this is
  906. * completely bound to be racy, but we can't help it, since it's a
  907. * limitation of the protocol */
  908. it8709_wm(dev, 0, IT8709_RFSR);
  909. return read;
  910. }
  911. /* return how many bytes are still in the FIFO; this will be called
  912. * with the device spinlock NOT HELD while waiting for the TX FIFO to get
  913. * empty; let's expect this won't be a problem */
  914. static int it8709_get_tx_used_slots(struct ite_dev *dev)
  915. {
  916. ite_dbg("%s called", __func__);
  917. return it8709_rr(dev, IT85_C0TFSR) & IT85_TXFBC;
  918. }
  919. /* put a byte to the TX fifo; this should be called with the spinlock held */
  920. static void it8709_put_tx_byte(struct ite_dev *dev, u8 value)
  921. {
  922. it8709_wr(dev, value, IT85_C0DR);
  923. }
  924. /* idle the receiver so that we won't receive samples until another
  925. pulse is detected; this must be called with the device spinlock held */
  926. static void it8709_idle_rx(struct ite_dev *dev)
  927. {
  928. ite_dbg("%s called", __func__);
  929. /* disable streaming by clearing RXACT writing it as 1 */
  930. it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXACT,
  931. IT85_C0RCR);
  932. /* clear the FIFO */
  933. it8709_wr(dev, it8709_rr(dev, IT85_C0MSTCR) | IT85_FIFOCLR,
  934. IT85_C0MSTCR);
  935. }
  936. /* disable the receiver; this must be called with the device spinlock held */
  937. static void it8709_disable_rx(struct ite_dev *dev)
  938. {
  939. ite_dbg("%s called", __func__);
  940. /* disable the receiver interrupts */
  941. it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
  942. ~(IT85_RDAIE | IT85_RFOIE),
  943. IT85_C0IER);
  944. /* disable the receiver */
  945. it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) & ~IT85_RXEN,
  946. IT85_C0RCR);
  947. /* clear the FIFO and RXACT (actually RXACT should have been cleared
  948. * in the previous it8709_wr(dev, ) call) */
  949. it8709_idle_rx(dev);
  950. }
  951. /* enable the receiver; this must be called with the device spinlock held */
  952. static void it8709_enable_rx(struct ite_dev *dev)
  953. {
  954. ite_dbg("%s called", __func__);
  955. /* enable the receiver by setting RXEN */
  956. it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXEN,
  957. IT85_C0RCR);
  958. /* just prepare it to idle for the next reception */
  959. it8709_idle_rx(dev);
  960. /* enable the receiver interrupts and master enable flag */
  961. it8709_wr(dev, it8709_rr(dev, IT85_C0IER)
  962. |IT85_RDAIE | IT85_RFOIE | IT85_IEC,
  963. IT85_C0IER);
  964. }
  965. /* disable the transmitter interrupt; this must be called with the device
  966. * spinlock held */
  967. static void it8709_disable_tx_interrupt(struct ite_dev *dev)
  968. {
  969. ite_dbg("%s called", __func__);
  970. /* disable the transmitter interrupts */
  971. it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & ~IT85_TLDLIE,
  972. IT85_C0IER);
  973. }
  974. /* enable the transmitter interrupt; this must be called with the device
  975. * spinlock held */
  976. static void it8709_enable_tx_interrupt(struct ite_dev *dev)
  977. {
  978. ite_dbg("%s called", __func__);
  979. /* enable the transmitter interrupts and master enable flag */
  980. it8709_wr(dev, it8709_rr(dev, IT85_C0IER)
  981. |IT85_TLDLIE | IT85_IEC,
  982. IT85_C0IER);
  983. }
  984. /* disable the device; this must be called with the device spinlock held */
  985. static void it8709_disable(struct ite_dev *dev)
  986. {
  987. ite_dbg("%s called", __func__);
  988. /* clear out all interrupt enable flags */
  989. it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
  990. ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
  991. IT85_C0IER);
  992. /* disable the receiver */
  993. it8709_disable_rx(dev);
  994. /* erase the FIFO */
  995. it8709_wr(dev, IT85_FIFOCLR | it8709_rr(dev, IT85_C0MSTCR),
  996. IT85_C0MSTCR);
  997. }
  998. /* initialize the hardware */
  999. static void it8709_init_hardware(struct ite_dev *dev)
  1000. {
  1001. ite_dbg("%s called", __func__);
  1002. /* disable all the interrupts */
  1003. it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
  1004. ~(IT85_IEC | IT85_RFOIE | IT85_RDAIE | IT85_TLDLIE),
  1005. IT85_C0IER);
  1006. /* program the baud rate divisor */
  1007. it8709_wr(dev, ITE_BAUDRATE_DIVISOR & 0xff, IT85_C0BDLR);
  1008. it8709_wr(dev, (ITE_BAUDRATE_DIVISOR >> 8) & 0xff,
  1009. IT85_C0BDHR);
  1010. /* program the C0MSTCR register defaults */
  1011. it8709_wr(dev, (it8709_rr(dev, IT85_C0MSTCR) &
  1012. ~(IT85_ILSEL | IT85_ILE | IT85_FIFOTL
  1013. | IT85_FIFOCLR | IT85_RESET)) | IT85_FIFOTL_DEFAULT,
  1014. IT85_C0MSTCR);
  1015. /* program the C0RCR register defaults */
  1016. it8709_wr(dev, (it8709_rr(dev, IT85_C0RCR) &
  1017. ~(IT85_RXEN | IT85_RDWOS | IT85_RXEND | IT85_RXACT
  1018. | IT85_RXDCR)) | ITE_RXDCR_DEFAULT,
  1019. IT85_C0RCR);
  1020. /* program the C0TCR register defaults */
  1021. it8709_wr(dev, (it8709_rr(dev, IT85_C0TCR) & ~(IT85_TXMPM | IT85_TXMPW))
  1022. | IT85_TXRLE | IT85_TXENDF | IT85_TXMPM_DEFAULT
  1023. | IT85_TXMPW_DEFAULT,
  1024. IT85_C0TCR);
  1025. /* program the carrier parameters */
  1026. ite_set_carrier_params(dev);
  1027. }
  1028. /* generic hardware setup/teardown code */
  1029. /* activate the device for use */
  1030. static int ite_open(struct rc_dev *rcdev)
  1031. {
  1032. struct ite_dev *dev = rcdev->priv;
  1033. unsigned long flags;
  1034. ite_dbg("%s called", __func__);
  1035. spin_lock_irqsave(&dev->lock, flags);
  1036. dev->in_use = true;
  1037. /* enable the receiver */
  1038. dev->params.enable_rx(dev);
  1039. spin_unlock_irqrestore(&dev->lock, flags);
  1040. return 0;
  1041. }
  1042. /* deactivate the device for use */
  1043. static void ite_close(struct rc_dev *rcdev)
  1044. {
  1045. struct ite_dev *dev = rcdev->priv;
  1046. unsigned long flags;
  1047. ite_dbg("%s called", __func__);
  1048. spin_lock_irqsave(&dev->lock, flags);
  1049. dev->in_use = false;
  1050. /* wait for any transmission to end */
  1051. spin_unlock_irqrestore(&dev->lock, flags);
  1052. wait_event_interruptible(dev->tx_ended, !dev->transmitting);
  1053. spin_lock_irqsave(&dev->lock, flags);
  1054. dev->params.disable(dev);
  1055. spin_unlock_irqrestore(&dev->lock, flags);
  1056. }
  1057. /* supported models and their parameters */
  1058. static const struct ite_dev_params ite_dev_descs[] = {
  1059. { /* 0: ITE8704 */
  1060. .model = "ITE8704 CIR transceiver",
  1061. .io_region_size = IT87_IOREG_LENGTH,
  1062. .io_rsrc_no = 0,
  1063. .hw_tx_capable = true,
  1064. .sample_period = (u32) (1000000000ULL / 115200),
  1065. .tx_carrier_freq = 38000,
  1066. .tx_duty_cycle = 33,
  1067. .rx_low_carrier_freq = 0,
  1068. .rx_high_carrier_freq = 0,
  1069. /* operations */
  1070. .get_irq_causes = it87_get_irq_causes,
  1071. .enable_rx = it87_enable_rx,
  1072. .idle_rx = it87_idle_rx,
  1073. .disable_rx = it87_idle_rx,
  1074. .get_rx_bytes = it87_get_rx_bytes,
  1075. .enable_tx_interrupt = it87_enable_tx_interrupt,
  1076. .disable_tx_interrupt = it87_disable_tx_interrupt,
  1077. .get_tx_used_slots = it87_get_tx_used_slots,
  1078. .put_tx_byte = it87_put_tx_byte,
  1079. .disable = it87_disable,
  1080. .init_hardware = it87_init_hardware,
  1081. .set_carrier_params = it87_set_carrier_params,
  1082. },
  1083. { /* 1: ITE8713 */
  1084. .model = "ITE8713 CIR transceiver",
  1085. .io_region_size = IT87_IOREG_LENGTH,
  1086. .io_rsrc_no = 0,
  1087. .hw_tx_capable = true,
  1088. .sample_period = (u32) (1000000000ULL / 115200),
  1089. .tx_carrier_freq = 38000,
  1090. .tx_duty_cycle = 33,
  1091. .rx_low_carrier_freq = 0,
  1092. .rx_high_carrier_freq = 0,
  1093. /* operations */
  1094. .get_irq_causes = it87_get_irq_causes,
  1095. .enable_rx = it87_enable_rx,
  1096. .idle_rx = it87_idle_rx,
  1097. .disable_rx = it87_idle_rx,
  1098. .get_rx_bytes = it87_get_rx_bytes,
  1099. .enable_tx_interrupt = it87_enable_tx_interrupt,
  1100. .disable_tx_interrupt = it87_disable_tx_interrupt,
  1101. .get_tx_used_slots = it87_get_tx_used_slots,
  1102. .put_tx_byte = it87_put_tx_byte,
  1103. .disable = it87_disable,
  1104. .init_hardware = it87_init_hardware,
  1105. .set_carrier_params = it87_set_carrier_params,
  1106. },
  1107. { /* 2: ITE8708 */
  1108. .model = "ITE8708 CIR transceiver",
  1109. .io_region_size = IT8708_IOREG_LENGTH,
  1110. .io_rsrc_no = 0,
  1111. .hw_tx_capable = true,
  1112. .sample_period = (u32) (1000000000ULL / 115200),
  1113. .tx_carrier_freq = 38000,
  1114. .tx_duty_cycle = 33,
  1115. .rx_low_carrier_freq = 0,
  1116. .rx_high_carrier_freq = 0,
  1117. /* operations */
  1118. .get_irq_causes = it8708_get_irq_causes,
  1119. .enable_rx = it8708_enable_rx,
  1120. .idle_rx = it8708_idle_rx,
  1121. .disable_rx = it8708_idle_rx,
  1122. .get_rx_bytes = it8708_get_rx_bytes,
  1123. .enable_tx_interrupt = it8708_enable_tx_interrupt,
  1124. .disable_tx_interrupt =
  1125. it8708_disable_tx_interrupt,
  1126. .get_tx_used_slots = it8708_get_tx_used_slots,
  1127. .put_tx_byte = it8708_put_tx_byte,
  1128. .disable = it8708_disable,
  1129. .init_hardware = it8708_init_hardware,
  1130. .set_carrier_params = it8708_set_carrier_params,
  1131. },
  1132. { /* 3: ITE8709 */
  1133. .model = "ITE8709 CIR transceiver",
  1134. .io_region_size = IT8709_IOREG_LENGTH,
  1135. .io_rsrc_no = 2,
  1136. .hw_tx_capable = true,
  1137. .sample_period = (u32) (1000000000ULL / 115200),
  1138. .tx_carrier_freq = 38000,
  1139. .tx_duty_cycle = 33,
  1140. .rx_low_carrier_freq = 0,
  1141. .rx_high_carrier_freq = 0,
  1142. /* operations */
  1143. .get_irq_causes = it8709_get_irq_causes,
  1144. .enable_rx = it8709_enable_rx,
  1145. .idle_rx = it8709_idle_rx,
  1146. .disable_rx = it8709_idle_rx,
  1147. .get_rx_bytes = it8709_get_rx_bytes,
  1148. .enable_tx_interrupt = it8709_enable_tx_interrupt,
  1149. .disable_tx_interrupt =
  1150. it8709_disable_tx_interrupt,
  1151. .get_tx_used_slots = it8709_get_tx_used_slots,
  1152. .put_tx_byte = it8709_put_tx_byte,
  1153. .disable = it8709_disable,
  1154. .init_hardware = it8709_init_hardware,
  1155. .set_carrier_params = it8709_set_carrier_params,
  1156. },
  1157. };
  1158. static const struct pnp_device_id ite_ids[] = {
  1159. {"ITE8704", 0}, /* Default model */
  1160. {"ITE8713", 1}, /* CIR found in EEEBox 1501U */
  1161. {"ITE8708", 2}, /* Bridged IT8512 */
  1162. {"ITE8709", 3}, /* SRAM-Bridged IT8512 */
  1163. {"", 0},
  1164. };
  1165. /* allocate memory, probe hardware, and initialize everything */
  1166. static int ite_probe(struct pnp_dev *pdev, const struct pnp_device_id
  1167. *dev_id)
  1168. {
  1169. const struct ite_dev_params *dev_desc = NULL;
  1170. struct ite_dev *itdev = NULL;
  1171. struct rc_dev *rdev = NULL;
  1172. int ret = -ENOMEM;
  1173. int model_no;
  1174. int io_rsrc_no;
  1175. ite_dbg("%s called", __func__);
  1176. itdev = kzalloc(sizeof(struct ite_dev), GFP_KERNEL);
  1177. if (!itdev)
  1178. return ret;
  1179. /* input device for IR remote (and tx) */
  1180. rdev = rc_allocate_device();
  1181. if (!rdev)
  1182. goto failure;
  1183. itdev->rdev = rdev;
  1184. ret = -ENODEV;
  1185. /* get the model number */
  1186. model_no = (int)dev_id->driver_data;
  1187. ite_pr(KERN_NOTICE, "Auto-detected model: %s\n",
  1188. ite_dev_descs[model_no].model);
  1189. if (model_number >= 0 && model_number < ARRAY_SIZE(ite_dev_descs)) {
  1190. model_no = model_number;
  1191. ite_pr(KERN_NOTICE, "The model has been fixed by a module "
  1192. "parameter.");
  1193. }
  1194. ite_pr(KERN_NOTICE, "Using model: %s\n", ite_dev_descs[model_no].model);
  1195. /* get the description for the device */
  1196. dev_desc = &ite_dev_descs[model_no];
  1197. io_rsrc_no = dev_desc->io_rsrc_no;
  1198. /* validate pnp resources */
  1199. if (!pnp_port_valid(pdev, io_rsrc_no) ||
  1200. pnp_port_len(pdev, io_rsrc_no) != dev_desc->io_region_size) {
  1201. dev_err(&pdev->dev, "IR PNP Port not valid!\n");
  1202. goto failure;
  1203. }
  1204. if (!pnp_irq_valid(pdev, 0)) {
  1205. dev_err(&pdev->dev, "PNP IRQ not valid!\n");
  1206. goto failure;
  1207. }
  1208. /* store resource values */
  1209. itdev->cir_addr = pnp_port_start(pdev, io_rsrc_no);
  1210. itdev->cir_irq = pnp_irq(pdev, 0);
  1211. /* initialize spinlocks */
  1212. spin_lock_init(&itdev->lock);
  1213. /* initialize raw event */
  1214. init_ir_raw_event(&itdev->rawir);
  1215. /* set driver data into the pnp device */
  1216. pnp_set_drvdata(pdev, itdev);
  1217. itdev->pdev = pdev;
  1218. /* initialize waitqueues for transmission */
  1219. init_waitqueue_head(&itdev->tx_queue);
  1220. init_waitqueue_head(&itdev->tx_ended);
  1221. /* copy model-specific parameters */
  1222. itdev->params = *dev_desc;
  1223. /* apply any overrides */
  1224. if (sample_period > 0)
  1225. itdev->params.sample_period = sample_period;
  1226. if (tx_carrier_freq > 0)
  1227. itdev->params.tx_carrier_freq = tx_carrier_freq;
  1228. if (tx_duty_cycle > 0 && tx_duty_cycle <= 100)
  1229. itdev->params.tx_duty_cycle = tx_duty_cycle;
  1230. if (rx_low_carrier_freq > 0)
  1231. itdev->params.rx_low_carrier_freq = rx_low_carrier_freq;
  1232. if (rx_high_carrier_freq > 0)
  1233. itdev->params.rx_high_carrier_freq = rx_high_carrier_freq;
  1234. /* print out parameters */
  1235. ite_pr(KERN_NOTICE, "TX-capable: %d\n", (int)
  1236. itdev->params.hw_tx_capable);
  1237. ite_pr(KERN_NOTICE, "Sample period (ns): %ld\n", (long)
  1238. itdev->params.sample_period);
  1239. ite_pr(KERN_NOTICE, "TX carrier frequency (Hz): %d\n", (int)
  1240. itdev->params.tx_carrier_freq);
  1241. ite_pr(KERN_NOTICE, "TX duty cycle (%%): %d\n", (int)
  1242. itdev->params.tx_duty_cycle);
  1243. ite_pr(KERN_NOTICE, "RX low carrier frequency (Hz): %d\n", (int)
  1244. itdev->params.rx_low_carrier_freq);
  1245. ite_pr(KERN_NOTICE, "RX high carrier frequency (Hz): %d\n", (int)
  1246. itdev->params.rx_high_carrier_freq);
  1247. /* set up hardware initial state */
  1248. itdev->params.init_hardware(itdev);
  1249. /* set up ir-core props */
  1250. rdev->priv = itdev;
  1251. rdev->driver_type = RC_DRIVER_IR_RAW;
  1252. rdev->allowed_protos = RC_TYPE_ALL;
  1253. rdev->open = ite_open;
  1254. rdev->close = ite_close;
  1255. rdev->s_idle = ite_s_idle;
  1256. rdev->s_rx_carrier_range = ite_set_rx_carrier_range;
  1257. rdev->min_timeout = ITE_MIN_IDLE_TIMEOUT;
  1258. rdev->max_timeout = ITE_MAX_IDLE_TIMEOUT;
  1259. rdev->timeout = ITE_IDLE_TIMEOUT;
  1260. rdev->rx_resolution = ITE_BAUDRATE_DIVISOR *
  1261. itdev->params.sample_period;
  1262. rdev->tx_resolution = ITE_BAUDRATE_DIVISOR *
  1263. itdev->params.sample_period;
  1264. /* set up transmitter related values if needed */
  1265. if (itdev->params.hw_tx_capable) {
  1266. rdev->tx_ir = ite_tx_ir;
  1267. rdev->s_tx_carrier = ite_set_tx_carrier;
  1268. rdev->s_tx_duty_cycle = ite_set_tx_duty_cycle;
  1269. }
  1270. rdev->input_name = dev_desc->model;
  1271. rdev->input_id.bustype = BUS_HOST;
  1272. rdev->input_id.vendor = PCI_VENDOR_ID_ITE;
  1273. rdev->input_id.product = 0;
  1274. rdev->input_id.version = 0;
  1275. rdev->driver_name = ITE_DRIVER_NAME;
  1276. rdev->map_name = RC_MAP_RC6_MCE;
  1277. ret = -EBUSY;
  1278. /* now claim resources */
  1279. if (!request_region(itdev->cir_addr,
  1280. dev_desc->io_region_size, ITE_DRIVER_NAME))
  1281. goto failure;
  1282. if (request_irq(itdev->cir_irq, ite_cir_isr, IRQF_SHARED,
  1283. ITE_DRIVER_NAME, (void *)itdev))
  1284. goto failure;
  1285. ret = rc_register_device(rdev);
  1286. if (ret)
  1287. goto failure;
  1288. ite_pr(KERN_NOTICE, "driver has been successfully loaded\n");
  1289. return 0;
  1290. failure:
  1291. if (itdev->cir_irq)
  1292. free_irq(itdev->cir_irq, itdev);
  1293. if (itdev->cir_addr)
  1294. release_region(itdev->cir_addr, itdev->params.io_region_size);
  1295. rc_free_device(rdev);
  1296. kfree(itdev);
  1297. return ret;
  1298. }
  1299. static void __devexit ite_remove(struct pnp_dev *pdev)
  1300. {
  1301. struct ite_dev *dev = pnp_get_drvdata(pdev);
  1302. unsigned long flags;
  1303. ite_dbg("%s called", __func__);
  1304. spin_lock_irqsave(&dev->lock, flags);
  1305. /* disable hardware */
  1306. dev->params.disable(dev);
  1307. spin_unlock_irqrestore(&dev->lock, flags);
  1308. /* free resources */
  1309. free_irq(dev->cir_irq, dev);
  1310. release_region(dev->cir_addr, dev->params.io_region_size);
  1311. rc_unregister_device(dev->rdev);
  1312. kfree(dev);
  1313. }
  1314. static int ite_suspend(struct pnp_dev *pdev, pm_message_t state)
  1315. {
  1316. struct ite_dev *dev = pnp_get_drvdata(pdev);
  1317. unsigned long flags;
  1318. ite_dbg("%s called", __func__);
  1319. /* wait for any transmission to end */
  1320. wait_event_interruptible(dev->tx_ended, !dev->transmitting);
  1321. spin_lock_irqsave(&dev->lock, flags);
  1322. /* disable all interrupts */
  1323. dev->params.disable(dev);
  1324. spin_unlock_irqrestore(&dev->lock, flags);
  1325. return 0;
  1326. }
  1327. static int ite_resume(struct pnp_dev *pdev)
  1328. {
  1329. int ret = 0;
  1330. struct ite_dev *dev = pnp_get_drvdata(pdev);
  1331. unsigned long flags;
  1332. ite_dbg("%s called", __func__);
  1333. spin_lock_irqsave(&dev->lock, flags);
  1334. /* reinitialize hardware config registers */
  1335. dev->params.init_hardware(dev);
  1336. /* enable the receiver */
  1337. dev->params.enable_rx(dev);
  1338. spin_unlock_irqrestore(&dev->lock, flags);
  1339. return ret;
  1340. }
  1341. static void ite_shutdown(struct pnp_dev *pdev)
  1342. {
  1343. struct ite_dev *dev = pnp_get_drvdata(pdev);
  1344. unsigned long flags;
  1345. ite_dbg("%s called", __func__);
  1346. spin_lock_irqsave(&dev->lock, flags);
  1347. /* disable all interrupts */
  1348. dev->params.disable(dev);
  1349. spin_unlock_irqrestore(&dev->lock, flags);
  1350. }
  1351. static struct pnp_driver ite_driver = {
  1352. .name = ITE_DRIVER_NAME,
  1353. .id_table = ite_ids,
  1354. .probe = ite_probe,
  1355. .remove = __devexit_p(ite_remove),
  1356. .suspend = ite_suspend,
  1357. .resume = ite_resume,
  1358. .shutdown = ite_shutdown,
  1359. };
  1360. int ite_init(void)
  1361. {
  1362. return pnp_register_driver(&ite_driver);
  1363. }
  1364. void ite_exit(void)
  1365. {
  1366. pnp_unregister_driver(&ite_driver);
  1367. }
  1368. MODULE_DEVICE_TABLE(pnp, ite_ids);
  1369. MODULE_DESCRIPTION("ITE Tech Inc. IT8712F/ITE8512F CIR driver");
  1370. MODULE_AUTHOR("Juan J. Garcia de Soria <skandalfo@gmail.com>");
  1371. MODULE_LICENSE("GPL");
  1372. module_init(ite_init);
  1373. module_exit(ite_exit);