bt878.c 15 KB

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  1. /*
  2. * bt878.c: part of the driver for the Pinnacle PCTV Sat DVB PCI card
  3. *
  4. * Copyright (C) 2002 Peter Hettkamp <peter.hettkamp@htp-tel.de>
  5. *
  6. * large parts based on the bttv driver
  7. * Copyright (C) 1996,97,98 Ralph Metzler (rjkm@metzlerbros.de)
  8. * & Marcus Metzler (mocm@metzlerbros.de)
  9. * (c) 1999,2000 Gerd Knorr <kraxel@goldbach.in-berlin.de>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  24. * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  25. *
  26. */
  27. #include <linux/module.h>
  28. #include <linux/kernel.h>
  29. #include <linux/pci.h>
  30. #include <asm/io.h>
  31. #include <linux/ioport.h>
  32. #include <asm/pgtable.h>
  33. #include <asm/page.h>
  34. #include <linux/types.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/kmod.h>
  37. #include <linux/vmalloc.h>
  38. #include <linux/init.h>
  39. #include "dmxdev.h"
  40. #include "dvbdev.h"
  41. #include "bt878.h"
  42. #include "dst_priv.h"
  43. /**************************************/
  44. /* Miscellaneous utility definitions */
  45. /**************************************/
  46. static unsigned int bt878_verbose = 1;
  47. static unsigned int bt878_debug;
  48. module_param_named(verbose, bt878_verbose, int, 0444);
  49. MODULE_PARM_DESC(verbose,
  50. "verbose startup messages, default is 1 (yes)");
  51. module_param_named(debug, bt878_debug, int, 0644);
  52. MODULE_PARM_DESC(debug, "Turn on/off debugging, default is 0 (off).");
  53. int bt878_num;
  54. struct bt878 bt878[BT878_MAX];
  55. EXPORT_SYMBOL(bt878_num);
  56. EXPORT_SYMBOL(bt878);
  57. #define btwrite(dat,adr) bmtwrite((dat), (bt->bt878_mem+(adr)))
  58. #define btread(adr) bmtread(bt->bt878_mem+(adr))
  59. #define btand(dat,adr) btwrite((dat) & btread(adr), adr)
  60. #define btor(dat,adr) btwrite((dat) | btread(adr), adr)
  61. #define btaor(dat,mask,adr) btwrite((dat) | ((mask) & btread(adr)), adr)
  62. #if defined(dprintk)
  63. #undef dprintk
  64. #endif
  65. #define dprintk(fmt, arg...) \
  66. do { \
  67. if (bt878_debug) \
  68. printk(KERN_DEBUG fmt, ##arg); \
  69. } while (0)
  70. static void bt878_mem_free(struct bt878 *bt)
  71. {
  72. if (bt->buf_cpu) {
  73. pci_free_consistent(bt->dev, bt->buf_size, bt->buf_cpu,
  74. bt->buf_dma);
  75. bt->buf_cpu = NULL;
  76. }
  77. if (bt->risc_cpu) {
  78. pci_free_consistent(bt->dev, bt->risc_size, bt->risc_cpu,
  79. bt->risc_dma);
  80. bt->risc_cpu = NULL;
  81. }
  82. }
  83. static int bt878_mem_alloc(struct bt878 *bt)
  84. {
  85. if (!bt->buf_cpu) {
  86. bt->buf_size = 128 * 1024;
  87. bt->buf_cpu =
  88. pci_alloc_consistent(bt->dev, bt->buf_size,
  89. &bt->buf_dma);
  90. if (!bt->buf_cpu)
  91. return -ENOMEM;
  92. memset(bt->buf_cpu, 0, bt->buf_size);
  93. }
  94. if (!bt->risc_cpu) {
  95. bt->risc_size = PAGE_SIZE;
  96. bt->risc_cpu =
  97. pci_alloc_consistent(bt->dev, bt->risc_size,
  98. &bt->risc_dma);
  99. if (!bt->risc_cpu) {
  100. bt878_mem_free(bt);
  101. return -ENOMEM;
  102. }
  103. memset(bt->risc_cpu, 0, bt->risc_size);
  104. }
  105. return 0;
  106. }
  107. /* RISC instructions */
  108. #define RISC_WRITE (0x01 << 28)
  109. #define RISC_JUMP (0x07 << 28)
  110. #define RISC_SYNC (0x08 << 28)
  111. /* RISC bits */
  112. #define RISC_WR_SOL (1 << 27)
  113. #define RISC_WR_EOL (1 << 26)
  114. #define RISC_IRQ (1 << 24)
  115. #define RISC_STATUS(status) ((((~status) & 0x0F) << 20) | ((status & 0x0F) << 16))
  116. #define RISC_SYNC_RESYNC (1 << 15)
  117. #define RISC_SYNC_FM1 0x06
  118. #define RISC_SYNC_VRO 0x0C
  119. #define RISC_FLUSH() bt->risc_pos = 0
  120. #define RISC_INSTR(instr) bt->risc_cpu[bt->risc_pos++] = cpu_to_le32(instr)
  121. static int bt878_make_risc(struct bt878 *bt)
  122. {
  123. bt->block_bytes = bt->buf_size >> 4;
  124. bt->block_count = 1 << 4;
  125. bt->line_bytes = bt->block_bytes;
  126. bt->line_count = bt->block_count;
  127. while (bt->line_bytes > 4095) {
  128. bt->line_bytes >>= 1;
  129. bt->line_count <<= 1;
  130. }
  131. if (bt->line_count > 255) {
  132. printk(KERN_ERR "bt878: buffer size error!\n");
  133. return -EINVAL;
  134. }
  135. return 0;
  136. }
  137. static void bt878_risc_program(struct bt878 *bt, u32 op_sync_orin)
  138. {
  139. u32 buf_pos = 0;
  140. u32 line;
  141. RISC_FLUSH();
  142. RISC_INSTR(RISC_SYNC | RISC_SYNC_FM1 | op_sync_orin);
  143. RISC_INSTR(0);
  144. dprintk("bt878: risc len lines %u, bytes per line %u\n",
  145. bt->line_count, bt->line_bytes);
  146. for (line = 0; line < bt->line_count; line++) {
  147. // At the beginning of every block we issue an IRQ with previous (finished) block number set
  148. if (!(buf_pos % bt->block_bytes))
  149. RISC_INSTR(RISC_WRITE | RISC_WR_SOL | RISC_WR_EOL |
  150. RISC_IRQ |
  151. RISC_STATUS(((buf_pos /
  152. bt->block_bytes) +
  153. (bt->block_count -
  154. 1)) %
  155. bt->block_count) | bt->
  156. line_bytes);
  157. else
  158. RISC_INSTR(RISC_WRITE | RISC_WR_SOL | RISC_WR_EOL |
  159. bt->line_bytes);
  160. RISC_INSTR(bt->buf_dma + buf_pos);
  161. buf_pos += bt->line_bytes;
  162. }
  163. RISC_INSTR(RISC_SYNC | op_sync_orin | RISC_SYNC_VRO);
  164. RISC_INSTR(0);
  165. RISC_INSTR(RISC_JUMP);
  166. RISC_INSTR(bt->risc_dma);
  167. btwrite((bt->line_count << 16) | bt->line_bytes, BT878_APACK_LEN);
  168. }
  169. /*****************************/
  170. /* Start/Stop grabbing funcs */
  171. /*****************************/
  172. void bt878_start(struct bt878 *bt, u32 controlreg, u32 op_sync_orin,
  173. u32 irq_err_ignore)
  174. {
  175. u32 int_mask;
  176. dprintk("bt878 debug: bt878_start (ctl=%8.8x)\n", controlreg);
  177. /* complete the writing of the risc dma program now we have
  178. * the card specifics
  179. */
  180. bt878_risc_program(bt, op_sync_orin);
  181. controlreg &= ~0x1f;
  182. controlreg |= 0x1b;
  183. btwrite(bt->risc_dma, BT878_ARISC_START);
  184. /* original int mask had :
  185. * 6 2 8 4 0
  186. * 1111 1111 1000 0000 0000
  187. * SCERR|OCERR|PABORT|RIPERR|FDSR|FTRGT|FBUS|RISCI
  188. * Hacked for DST to:
  189. * SCERR | OCERR | FDSR | FTRGT | FBUS | RISCI
  190. */
  191. int_mask = BT878_ASCERR | BT878_AOCERR | BT878_APABORT |
  192. BT878_ARIPERR | BT878_APPERR | BT878_AFDSR | BT878_AFTRGT |
  193. BT878_AFBUS | BT878_ARISCI;
  194. /* ignore pesky bits */
  195. int_mask &= ~irq_err_ignore;
  196. btwrite(int_mask, BT878_AINT_MASK);
  197. btwrite(controlreg, BT878_AGPIO_DMA_CTL);
  198. }
  199. void bt878_stop(struct bt878 *bt)
  200. {
  201. u32 stat;
  202. int i = 0;
  203. dprintk("bt878 debug: bt878_stop\n");
  204. btwrite(0, BT878_AINT_MASK);
  205. btand(~0x13, BT878_AGPIO_DMA_CTL);
  206. do {
  207. stat = btread(BT878_AINT_STAT);
  208. if (!(stat & BT878_ARISC_EN))
  209. break;
  210. i++;
  211. } while (i < 500);
  212. dprintk("bt878(%d) debug: bt878_stop, i=%d, stat=0x%8.8x\n",
  213. bt->nr, i, stat);
  214. }
  215. EXPORT_SYMBOL(bt878_start);
  216. EXPORT_SYMBOL(bt878_stop);
  217. /*****************************/
  218. /* Interrupt service routine */
  219. /*****************************/
  220. static irqreturn_t bt878_irq(int irq, void *dev_id)
  221. {
  222. u32 stat, astat, mask;
  223. int count;
  224. struct bt878 *bt;
  225. bt = (struct bt878 *) dev_id;
  226. count = 0;
  227. while (1) {
  228. stat = btread(BT878_AINT_STAT);
  229. mask = btread(BT878_AINT_MASK);
  230. if (!(astat = (stat & mask)))
  231. return IRQ_NONE; /* this interrupt is not for me */
  232. /* dprintk("bt878(%d) debug: irq count %d, stat 0x%8.8x, mask 0x%8.8x\n",bt->nr,count,stat,mask); */
  233. btwrite(astat, BT878_AINT_STAT); /* try to clear interrupt condition */
  234. if (astat & (BT878_ASCERR | BT878_AOCERR)) {
  235. if (bt878_verbose) {
  236. printk(KERN_INFO
  237. "bt878(%d): irq%s%s risc_pc=%08x\n",
  238. bt->nr,
  239. (astat & BT878_ASCERR) ? " SCERR" :
  240. "",
  241. (astat & BT878_AOCERR) ? " OCERR" :
  242. "", btread(BT878_ARISC_PC));
  243. }
  244. }
  245. if (astat & (BT878_APABORT | BT878_ARIPERR | BT878_APPERR)) {
  246. if (bt878_verbose) {
  247. printk(KERN_INFO
  248. "bt878(%d): irq%s%s%s risc_pc=%08x\n",
  249. bt->nr,
  250. (astat & BT878_APABORT) ? " PABORT" :
  251. "",
  252. (astat & BT878_ARIPERR) ? " RIPERR" :
  253. "",
  254. (astat & BT878_APPERR) ? " PPERR" :
  255. "", btread(BT878_ARISC_PC));
  256. }
  257. }
  258. if (astat & (BT878_AFDSR | BT878_AFTRGT | BT878_AFBUS)) {
  259. if (bt878_verbose) {
  260. printk(KERN_INFO
  261. "bt878(%d): irq%s%s%s risc_pc=%08x\n",
  262. bt->nr,
  263. (astat & BT878_AFDSR) ? " FDSR" : "",
  264. (astat & BT878_AFTRGT) ? " FTRGT" :
  265. "",
  266. (astat & BT878_AFBUS) ? " FBUS" : "",
  267. btread(BT878_ARISC_PC));
  268. }
  269. }
  270. if (astat & BT878_ARISCI) {
  271. bt->finished_block = (stat & BT878_ARISCS) >> 28;
  272. tasklet_schedule(&bt->tasklet);
  273. break;
  274. }
  275. count++;
  276. if (count > 20) {
  277. btwrite(0, BT878_AINT_MASK);
  278. printk(KERN_ERR
  279. "bt878(%d): IRQ lockup, cleared int mask\n",
  280. bt->nr);
  281. break;
  282. }
  283. }
  284. return IRQ_HANDLED;
  285. }
  286. int
  287. bt878_device_control(struct bt878 *bt, unsigned int cmd, union dst_gpio_packet *mp)
  288. {
  289. int retval;
  290. retval = 0;
  291. if (mutex_lock_interruptible(&bt->gpio_lock))
  292. return -ERESTARTSYS;
  293. /* special gpio signal */
  294. switch (cmd) {
  295. case DST_IG_ENABLE:
  296. // dprintk("dvb_bt8xx: dst enable mask 0x%02x enb 0x%02x \n", mp->dstg.enb.mask, mp->dstg.enb.enable);
  297. retval = bttv_gpio_enable(bt->bttv_nr,
  298. mp->enb.mask,
  299. mp->enb.enable);
  300. break;
  301. case DST_IG_WRITE:
  302. // dprintk("dvb_bt8xx: dst write gpio mask 0x%02x out 0x%02x\n", mp->dstg.outp.mask, mp->dstg.outp.highvals);
  303. retval = bttv_write_gpio(bt->bttv_nr,
  304. mp->outp.mask,
  305. mp->outp.highvals);
  306. break;
  307. case DST_IG_READ:
  308. /* read */
  309. retval = bttv_read_gpio(bt->bttv_nr, &mp->rd.value);
  310. // dprintk("dvb_bt8xx: dst read gpio 0x%02x\n", (unsigned)mp->dstg.rd.value);
  311. break;
  312. case DST_IG_TS:
  313. /* Set packet size */
  314. bt->TS_Size = mp->psize;
  315. break;
  316. default:
  317. retval = -EINVAL;
  318. break;
  319. }
  320. mutex_unlock(&bt->gpio_lock);
  321. return retval;
  322. }
  323. EXPORT_SYMBOL(bt878_device_control);
  324. #define BROOKTREE_878_DEVICE(vend, dev, name) \
  325. { \
  326. .vendor = PCI_VENDOR_ID_BROOKTREE, \
  327. .device = PCI_DEVICE_ID_BROOKTREE_878, \
  328. .subvendor = (vend), .subdevice = (dev), \
  329. .driver_data = (unsigned long) name \
  330. }
  331. static struct pci_device_id bt878_pci_tbl[] __devinitdata = {
  332. BROOKTREE_878_DEVICE(0x0071, 0x0101, "Nebula Electronics DigiTV"),
  333. BROOKTREE_878_DEVICE(0x1461, 0x0761, "AverMedia AverTV DVB-T 761"),
  334. BROOKTREE_878_DEVICE(0x11bd, 0x001c, "Pinnacle PCTV Sat"),
  335. BROOKTREE_878_DEVICE(0x11bd, 0x0026, "Pinnacle PCTV SAT CI"),
  336. BROOKTREE_878_DEVICE(0x1822, 0x0001, "Twinhan VisionPlus DVB"),
  337. BROOKTREE_878_DEVICE(0x270f, 0xfc00,
  338. "ChainTech digitop DST-1000 DVB-S"),
  339. BROOKTREE_878_DEVICE(0x1461, 0x0771, "AVermedia AverTV DVB-T 771"),
  340. BROOKTREE_878_DEVICE(0x18ac, 0xdb10, "DViCO FusionHDTV DVB-T Lite"),
  341. BROOKTREE_878_DEVICE(0x18ac, 0xdb11, "Ultraview DVB-T Lite"),
  342. BROOKTREE_878_DEVICE(0x18ac, 0xd500, "DViCO FusionHDTV 5 Lite"),
  343. BROOKTREE_878_DEVICE(0x7063, 0x2000, "pcHDTV HD-2000 TV"),
  344. BROOKTREE_878_DEVICE(0x1822, 0x0026, "DNTV Live! Mini"),
  345. { }
  346. };
  347. MODULE_DEVICE_TABLE(pci, bt878_pci_tbl);
  348. static const char * __devinit card_name(const struct pci_device_id *id)
  349. {
  350. return id->driver_data ? (const char *)id->driver_data : "Unknown";
  351. }
  352. /***********************/
  353. /* PCI device handling */
  354. /***********************/
  355. static int __devinit bt878_probe(struct pci_dev *dev,
  356. const struct pci_device_id *pci_id)
  357. {
  358. int result = 0;
  359. unsigned char lat;
  360. struct bt878 *bt;
  361. #if defined(__powerpc__)
  362. unsigned int cmd;
  363. #endif
  364. unsigned int cardid;
  365. printk(KERN_INFO "bt878: Bt878 AUDIO function found (%d).\n",
  366. bt878_num);
  367. if (bt878_num >= BT878_MAX) {
  368. printk(KERN_ERR "bt878: Too many devices inserted\n");
  369. result = -ENOMEM;
  370. goto fail0;
  371. }
  372. if (pci_enable_device(dev))
  373. return -EIO;
  374. cardid = dev->subsystem_device << 16;
  375. cardid |= dev->subsystem_vendor;
  376. printk(KERN_INFO "%s: card id=[0x%x],[ %s ] has DVB functions.\n",
  377. __func__, cardid, card_name(pci_id));
  378. bt = &bt878[bt878_num];
  379. bt->dev = dev;
  380. bt->nr = bt878_num;
  381. bt->shutdown = 0;
  382. bt->id = dev->device;
  383. bt->irq = dev->irq;
  384. bt->bt878_adr = pci_resource_start(dev, 0);
  385. if (!request_mem_region(pci_resource_start(dev, 0),
  386. pci_resource_len(dev, 0), "bt878")) {
  387. result = -EBUSY;
  388. goto fail0;
  389. }
  390. bt->revision = dev->revision;
  391. pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
  392. printk(KERN_INFO "bt878(%d): Bt%x (rev %d) at %02x:%02x.%x, ",
  393. bt878_num, bt->id, bt->revision, dev->bus->number,
  394. PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
  395. printk("irq: %d, latency: %d, memory: 0x%lx\n",
  396. bt->irq, lat, bt->bt878_adr);
  397. #if defined(__powerpc__)
  398. /* on OpenFirmware machines (PowerMac at least), PCI memory cycle */
  399. /* response on cards with no firmware is not enabled by OF */
  400. pci_read_config_dword(dev, PCI_COMMAND, &cmd);
  401. cmd = (cmd | PCI_COMMAND_MEMORY);
  402. pci_write_config_dword(dev, PCI_COMMAND, cmd);
  403. #endif
  404. #ifdef __sparc__
  405. bt->bt878_mem = (unsigned char *) bt->bt878_adr;
  406. #else
  407. bt->bt878_mem = ioremap(bt->bt878_adr, 0x1000);
  408. #endif
  409. /* clear interrupt mask */
  410. btwrite(0, BT848_INT_MASK);
  411. result = request_irq(bt->irq, bt878_irq,
  412. IRQF_SHARED | IRQF_DISABLED, "bt878",
  413. (void *) bt);
  414. if (result == -EINVAL) {
  415. printk(KERN_ERR "bt878(%d): Bad irq number or handler\n",
  416. bt878_num);
  417. goto fail1;
  418. }
  419. if (result == -EBUSY) {
  420. printk(KERN_ERR
  421. "bt878(%d): IRQ %d busy, change your PnP config in BIOS\n",
  422. bt878_num, bt->irq);
  423. goto fail1;
  424. }
  425. if (result < 0)
  426. goto fail1;
  427. pci_set_master(dev);
  428. pci_set_drvdata(dev, bt);
  429. if ((result = bt878_mem_alloc(bt))) {
  430. printk(KERN_ERR "bt878: failed to allocate memory!\n");
  431. goto fail2;
  432. }
  433. bt878_make_risc(bt);
  434. btwrite(0, BT878_AINT_MASK);
  435. bt878_num++;
  436. return 0;
  437. fail2:
  438. free_irq(bt->irq, bt);
  439. fail1:
  440. release_mem_region(pci_resource_start(bt->dev, 0),
  441. pci_resource_len(bt->dev, 0));
  442. fail0:
  443. pci_disable_device(dev);
  444. return result;
  445. }
  446. static void __devexit bt878_remove(struct pci_dev *pci_dev)
  447. {
  448. u8 command;
  449. struct bt878 *bt = pci_get_drvdata(pci_dev);
  450. if (bt878_verbose)
  451. printk(KERN_INFO "bt878(%d): unloading\n", bt->nr);
  452. /* turn off all capturing, DMA and IRQs */
  453. btand(~0x13, BT878_AGPIO_DMA_CTL);
  454. /* first disable interrupts before unmapping the memory! */
  455. btwrite(0, BT878_AINT_MASK);
  456. btwrite(~0U, BT878_AINT_STAT);
  457. /* disable PCI bus-mastering */
  458. pci_read_config_byte(bt->dev, PCI_COMMAND, &command);
  459. /* Should this be &=~ ?? */
  460. command &= ~PCI_COMMAND_MASTER;
  461. pci_write_config_byte(bt->dev, PCI_COMMAND, command);
  462. free_irq(bt->irq, bt);
  463. printk(KERN_DEBUG "bt878_mem: 0x%p.\n", bt->bt878_mem);
  464. if (bt->bt878_mem)
  465. iounmap(bt->bt878_mem);
  466. release_mem_region(pci_resource_start(bt->dev, 0),
  467. pci_resource_len(bt->dev, 0));
  468. /* wake up any waiting processes
  469. because shutdown flag is set, no new processes (in this queue)
  470. are expected
  471. */
  472. bt->shutdown = 1;
  473. bt878_mem_free(bt);
  474. pci_set_drvdata(pci_dev, NULL);
  475. pci_disable_device(pci_dev);
  476. return;
  477. }
  478. static struct pci_driver bt878_pci_driver = {
  479. .name = "bt878",
  480. .id_table = bt878_pci_tbl,
  481. .probe = bt878_probe,
  482. .remove = __devexit_p(bt878_remove),
  483. };
  484. /*******************************/
  485. /* Module management functions */
  486. /*******************************/
  487. static int __init bt878_init_module(void)
  488. {
  489. bt878_num = 0;
  490. printk(KERN_INFO "bt878: AUDIO driver version %d.%d.%d loaded\n",
  491. (BT878_VERSION_CODE >> 16) & 0xff,
  492. (BT878_VERSION_CODE >> 8) & 0xff,
  493. BT878_VERSION_CODE & 0xff);
  494. return pci_register_driver(&bt878_pci_driver);
  495. }
  496. static void __exit bt878_cleanup_module(void)
  497. {
  498. pci_unregister_driver(&bt878_pci_driver);
  499. }
  500. module_init(bt878_init_module);
  501. module_exit(bt878_cleanup_module);
  502. MODULE_LICENSE("GPL");
  503. /*
  504. * Local variables:
  505. * c-basic-offset: 8
  506. * End:
  507. */