mucmc52.dts 5.1 KB

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  1. /*
  2. * Manroland mucmc52 board Device Tree Source
  3. *
  4. * Copyright (C) 2009 DENX Software Engineering GmbH
  5. * Heiko Schocher <hs@denx.de>
  6. * Copyright 2006-2007 Secret Lab Technologies Ltd.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. /include/ "mpc5200b.dtsi"
  14. / {
  15. model = "manroland,mucmc52";
  16. compatible = "manroland,mucmc52";
  17. soc5200@f0000000 {
  18. gpt0: timer@600 { // GPT 0 in GPIO mode
  19. gpio-controller;
  20. #gpio-cells = <2>;
  21. };
  22. gpt1: timer@610 { // General Purpose Timer in GPIO mode
  23. gpio-controller;
  24. #gpio-cells = <2>;
  25. };
  26. gpt2: timer@620 { // General Purpose Timer in GPIO mode
  27. gpio-controller;
  28. #gpio-cells = <2>;
  29. };
  30. gpt3: timer@630 { // General Purpose Timer in GPIO mode
  31. gpio-controller;
  32. #gpio-cells = <2>;
  33. };
  34. timer@640 {
  35. status = "disabled";
  36. };
  37. timer@650 {
  38. status = "disabled";
  39. };
  40. timer@660 {
  41. status = "disabled";
  42. };
  43. timer@670 {
  44. status = "disabled";
  45. };
  46. rtc@800 {
  47. status = "disabled";
  48. };
  49. can@900 {
  50. status = "disabled";
  51. };
  52. can@980 {
  53. status = "disabled";
  54. };
  55. spi@f00 {
  56. status = "disabled";
  57. };
  58. usb@1000 {
  59. status = "disabled";
  60. };
  61. psc@2000 { // PSC1
  62. compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
  63. };
  64. psc@2200 { // PSC2
  65. compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
  66. };
  67. psc@2400 { // PSC3
  68. status = "disabled";
  69. };
  70. psc@2600 { // PSC4
  71. status = "disabled";
  72. };
  73. psc@2800 { // PSC5
  74. status = "disabled";
  75. };
  76. psc@2c00 { // PSC6
  77. compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
  78. };
  79. ethernet@3000 {
  80. phy-handle = <&phy0>;
  81. };
  82. mdio@3000 {
  83. phy0: ethernet-phy@0 {
  84. compatible = "intel,lxt971";
  85. reg = <0>;
  86. };
  87. };
  88. i2c@3d00 {
  89. status = "disabled";
  90. };
  91. i2c@3d40 {
  92. hwmon@2c {
  93. compatible = "ad,adm9240";
  94. reg = <0x2c>;
  95. };
  96. rtc@51 {
  97. compatible = "nxp,pcf8563";
  98. reg = <0x51>;
  99. };
  100. };
  101. };
  102. pci@f0000d00 {
  103. interrupt-map-mask = <0xf800 0 0 7>;
  104. interrupt-map = <
  105. /* IDSEL 0x10 */
  106. 0x8000 0 0 1 &mpc5200_pic 0 3 3
  107. 0x8000 0 0 2 &mpc5200_pic 0 3 3
  108. 0x8000 0 0 3 &mpc5200_pic 0 2 3
  109. 0x8000 0 0 4 &mpc5200_pic 0 1 3
  110. >;
  111. ranges = <0x42000000 0 0x60000000 0x60000000 0 0x10000000
  112. 0x02000000 0 0x90000000 0x90000000 0 0x10000000
  113. 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
  114. };
  115. localbus {
  116. ranges = <0 0 0xff800000 0x00800000
  117. 1 0 0x80000000 0x00800000
  118. 3 0 0x80000000 0x00800000>;
  119. flash@0,0 {
  120. compatible = "cfi-flash";
  121. reg = <0 0 0x00800000>;
  122. bank-width = <4>;
  123. device-width = <2>;
  124. #size-cells = <1>;
  125. #address-cells = <1>;
  126. partition@0 {
  127. label = "DTS";
  128. reg = <0x0 0x00100000>;
  129. };
  130. partition@100000 {
  131. label = "Kernel";
  132. reg = <0x100000 0x00200000>;
  133. };
  134. partition@300000 {
  135. label = "RootFS";
  136. reg = <0x00300000 0x00200000>;
  137. };
  138. partition@500000 {
  139. label = "user";
  140. reg = <0x00500000 0x00200000>;
  141. };
  142. partition@700000 {
  143. label = "U-Boot";
  144. reg = <0x00700000 0x00040000>;
  145. };
  146. partition@740000 {
  147. label = "Env";
  148. reg = <0x00740000 0x00020000>;
  149. };
  150. partition@760000 {
  151. label = "red. Env";
  152. reg = <0x00760000 0x00020000>;
  153. };
  154. partition@780000 {
  155. label = "reserve";
  156. reg = <0x00780000 0x00080000>;
  157. };
  158. };
  159. simple100: gpio-controller-100@3,600100 {
  160. compatible = "manroland,mucmc52-aux-gpio";
  161. reg = <3 0x00600100 0x1>;
  162. gpio-controller;
  163. #gpio-cells = <2>;
  164. };
  165. simple104: gpio-controller-104@3,600104 {
  166. compatible = "manroland,mucmc52-aux-gpio";
  167. reg = <3 0x00600104 0x1>;
  168. gpio-controller;
  169. #gpio-cells = <2>;
  170. };
  171. simple200: gpio-controller-200@3,600200 {
  172. compatible = "manroland,mucmc52-aux-gpio";
  173. reg = <3 0x00600200 0x1>;
  174. gpio-controller;
  175. #gpio-cells = <2>;
  176. };
  177. simple201: gpio-controller-201@3,600201 {
  178. compatible = "manroland,mucmc52-aux-gpio";
  179. reg = <3 0x00600201 0x1>;
  180. gpio-controller;
  181. #gpio-cells = <2>;
  182. };
  183. simple202: gpio-controller-202@3,600202 {
  184. compatible = "manroland,mucmc52-aux-gpio";
  185. reg = <3 0x00600202 0x1>;
  186. gpio-controller;
  187. #gpio-cells = <2>;
  188. };
  189. simple203: gpio-controller-203@3,600203 {
  190. compatible = "manroland,mucmc52-aux-gpio";
  191. reg = <3 0x00600203 0x1>;
  192. gpio-controller;
  193. #gpio-cells = <2>;
  194. };
  195. simple204: gpio-controller-204@3,600204 {
  196. compatible = "manroland,mucmc52-aux-gpio";
  197. reg = <3 0x00600204 0x1>;
  198. gpio-controller;
  199. #gpio-cells = <2>;
  200. };
  201. simple206: gpio-controller-206@3,600206 {
  202. compatible = "manroland,mucmc52-aux-gpio";
  203. reg = <3 0x00600206 0x1>;
  204. gpio-controller;
  205. #gpio-cells = <2>;
  206. };
  207. simple207: gpio-controller-207@3,600207 {
  208. compatible = "manroland,mucmc52-aux-gpio";
  209. reg = <3 0x00600207 0x1>;
  210. gpio-controller;
  211. #gpio-cells = <2>;
  212. };
  213. simple20f: gpio-controller-20f@3,60020f {
  214. compatible = "manroland,mucmc52-aux-gpio";
  215. reg = <3 0x0060020f 0x1>;
  216. gpio-controller;
  217. #gpio-cells = <2>;
  218. };
  219. };
  220. };