pmic8058.c 22 KB

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  1. /* Copyright (c) 2009-2011, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. */
  13. /*
  14. * Qualcomm PMIC8058 driver
  15. *
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/slab.h>
  20. #include <linux/irq.h>
  21. #include <linux/msm_ssbi.h>
  22. #include <linux/mfd/core.h>
  23. #include <linux/mfd/pmic8058.h>
  24. #include <linux/mfd/pm8xxx/core.h>
  25. #include <linux/msm_adc.h>
  26. #include <linux/module.h>
  27. #define REG_MPP_BASE 0x50
  28. #define REG_IRQ_BASE 0x1BB
  29. /* PMIC8058 Revision */
  30. #define PM8058_REG_REV 0x002 /* PMIC4 revision */
  31. #define PM8058_VERSION_MASK 0xF0
  32. #define PM8058_REVISION_MASK 0x0F
  33. #define PM8058_VERSION_VALUE 0xE0
  34. /* PMIC 8058 Battery Alarm SSBI registers */
  35. #define REG_BATT_ALARM_THRESH 0x023
  36. #define REG_BATT_ALARM_CTRL1 0x024
  37. #define REG_BATT_ALARM_CTRL2 0x0AA
  38. #define REG_BATT_ALARM_PWM_CTRL 0x0A3
  39. #define REG_TEMP_ALRM_CTRL 0x1B
  40. #define REG_TEMP_ALRM_PWM 0x9B
  41. /* PON CNTL 4 register */
  42. #define SSBI_REG_ADDR_PON_CNTL_4 0x98
  43. #define PM8058_PON_RESET_EN_MASK 0x01
  44. /* PON CNTL 5 register */
  45. #define SSBI_REG_ADDR_PON_CNTL_5 0x7B
  46. #define PM8058_HARD_RESET_EN_MASK 0x08
  47. /* GP_TEST1 register */
  48. #define SSBI_REG_ADDR_GP_TEST_1 0x07A
  49. #define PM8058_RTC_BASE 0x1E8
  50. #define PM8058_OTHC_CNTR_BASE0 0xA0
  51. #define PM8058_OTHC_CNTR_BASE1 0x134
  52. #define PM8058_OTHC_CNTR_BASE2 0x137
  53. #define SINGLE_IRQ_RESOURCE(_name, _irq) \
  54. { \
  55. .name = _name, \
  56. .start = _irq, \
  57. .end = _irq, \
  58. .flags = IORESOURCE_IRQ, \
  59. }
  60. struct pm8058_chip {
  61. struct pm8058_platform_data pdata;
  62. struct device *dev;
  63. struct pm_irq_chip *irq_chip;
  64. struct mfd_cell *mfd_regulators, *mfd_xo_buffers;
  65. u8 revision;
  66. };
  67. static int pm8058_readb(const struct device *dev, u16 addr, u8 *val)
  68. {
  69. const struct pm8xxx_drvdata *pm8058_drvdata = dev_get_drvdata(dev);
  70. const struct pm8058_chip *pmic = pm8058_drvdata->pm_chip_data;
  71. return msm_ssbi_read(pmic->dev->parent, addr, val, 1);
  72. }
  73. static int pm8058_writeb(const struct device *dev, u16 addr, u8 val)
  74. {
  75. const struct pm8xxx_drvdata *pm8058_drvdata = dev_get_drvdata(dev);
  76. const struct pm8058_chip *pmic = pm8058_drvdata->pm_chip_data;
  77. return msm_ssbi_write(pmic->dev->parent, addr, &val, 1);
  78. }
  79. static int pm8058_read_buf(const struct device *dev, u16 addr, u8 *buf,
  80. int cnt)
  81. {
  82. const struct pm8xxx_drvdata *pm8058_drvdata = dev_get_drvdata(dev);
  83. const struct pm8058_chip *pmic = pm8058_drvdata->pm_chip_data;
  84. return msm_ssbi_read(pmic->dev->parent, addr, buf, cnt);
  85. }
  86. static int pm8058_write_buf(const struct device *dev, u16 addr, u8 *buf,
  87. int cnt)
  88. {
  89. const struct pm8xxx_drvdata *pm8058_drvdata = dev_get_drvdata(dev);
  90. const struct pm8058_chip *pmic = pm8058_drvdata->pm_chip_data;
  91. return msm_ssbi_write(pmic->dev->parent, addr, buf, cnt);
  92. }
  93. static int pm8058_read_irq_stat(const struct device *dev, int irq)
  94. {
  95. const struct pm8xxx_drvdata *pm8058_drvdata = dev_get_drvdata(dev);
  96. const struct pm8058_chip *pmic = pm8058_drvdata->pm_chip_data;
  97. return pm8xxx_get_irq_stat(pmic->irq_chip, irq);
  98. return 0;
  99. }
  100. static enum pm8xxx_version pm8058_get_version(const struct device *dev)
  101. {
  102. const struct pm8xxx_drvdata *pm8058_drvdata = dev_get_drvdata(dev);
  103. const struct pm8058_chip *pmic = pm8058_drvdata->pm_chip_data;
  104. enum pm8xxx_version version = -ENODEV;
  105. if ((pmic->revision & PM8058_VERSION_MASK) == PM8058_VERSION_VALUE)
  106. version = PM8XXX_VERSION_8058;
  107. return version;
  108. }
  109. static int pm8058_get_revision(const struct device *dev)
  110. {
  111. const struct pm8xxx_drvdata *pm8058_drvdata = dev_get_drvdata(dev);
  112. const struct pm8058_chip *pmic = pm8058_drvdata->pm_chip_data;
  113. return pmic->revision & PM8058_REVISION_MASK;
  114. }
  115. static struct pm8xxx_drvdata pm8058_drvdata = {
  116. .pmic_readb = pm8058_readb,
  117. .pmic_writeb = pm8058_writeb,
  118. .pmic_read_buf = pm8058_read_buf,
  119. .pmic_write_buf = pm8058_write_buf,
  120. .pmic_read_irq_stat = pm8058_read_irq_stat,
  121. .pmic_get_version = pm8058_get_version,
  122. .pmic_get_revision = pm8058_get_revision,
  123. };
  124. static const struct resource pm8058_charger_resources[] __devinitconst = {
  125. SINGLE_IRQ_RESOURCE("CHGVAL", PM8058_CHGVAL_IRQ),
  126. SINGLE_IRQ_RESOURCE("CHGINVAL", PM8058_CHGINVAL_IRQ),
  127. SINGLE_IRQ_RESOURCE("CHGILIM", PM8058_CHGILIM_IRQ),
  128. SINGLE_IRQ_RESOURCE("VCP", PM8058_VCP_IRQ),
  129. SINGLE_IRQ_RESOURCE("ATC_DONE", PM8058_ATC_DONE_IRQ),
  130. SINGLE_IRQ_RESOURCE("ATCFAIL", PM8058_ATCFAIL_IRQ),
  131. SINGLE_IRQ_RESOURCE("AUTO_CHGDONE", PM8058_AUTO_CHGDONE_IRQ),
  132. SINGLE_IRQ_RESOURCE("AUTO_CHGFAIL", PM8058_AUTO_CHGFAIL_IRQ),
  133. SINGLE_IRQ_RESOURCE("CHGSTATE", PM8058_CHGSTATE_IRQ),
  134. SINGLE_IRQ_RESOURCE("FASTCHG", PM8058_FASTCHG_IRQ),
  135. SINGLE_IRQ_RESOURCE("CHG_END", PM8058_CHG_END_IRQ),
  136. SINGLE_IRQ_RESOURCE("BATTTEMP", PM8058_BATTTEMP_IRQ),
  137. SINGLE_IRQ_RESOURCE("CHGHOT", PM8058_CHGHOT_IRQ),
  138. SINGLE_IRQ_RESOURCE("CHGTLIMIT", PM8058_CHGTLIMIT_IRQ),
  139. SINGLE_IRQ_RESOURCE("CHG_GONE", PM8058_CHG_GONE_IRQ),
  140. SINGLE_IRQ_RESOURCE("VCPMAJOR", PM8058_VCPMAJOR_IRQ),
  141. SINGLE_IRQ_RESOURCE("VBATDET", PM8058_VBATDET_IRQ),
  142. SINGLE_IRQ_RESOURCE("BATFET", PM8058_BATFET_IRQ),
  143. SINGLE_IRQ_RESOURCE("BATT_REPLACE", PM8058_BATT_REPLACE_IRQ),
  144. SINGLE_IRQ_RESOURCE("BATTCONNECT", PM8058_BATTCONNECT_IRQ),
  145. SINGLE_IRQ_RESOURCE("VBATDET_LOW", PM8058_VBATDET_LOW_IRQ),
  146. };
  147. static struct mfd_cell pm8058_charger_cell __devinitdata = {
  148. .name = "pm8058-charger",
  149. .id = -1,
  150. .resources = pm8058_charger_resources,
  151. .num_resources = ARRAY_SIZE(pm8058_charger_resources),
  152. };
  153. static const struct resource misc_cell_resources[] __devinitconst = {
  154. SINGLE_IRQ_RESOURCE("pm8xxx_osc_halt_irq", PM8058_OSCHALT_IRQ),
  155. };
  156. static struct mfd_cell misc_cell __devinitdata = {
  157. .name = PM8XXX_MISC_DEV_NAME,
  158. .id = -1,
  159. .resources = misc_cell_resources,
  160. .num_resources = ARRAY_SIZE(misc_cell_resources),
  161. };
  162. static struct mfd_cell pm8058_pwm_cell __devinitdata = {
  163. .name = "pm8058-pwm",
  164. .id = -1,
  165. };
  166. static struct resource xoadc_resources[] = {
  167. SINGLE_IRQ_RESOURCE(NULL, PM8058_ADC_IRQ),
  168. };
  169. static struct mfd_cell xoadc_cell __devinitdata = {
  170. .name = "pm8058-xoadc",
  171. .id = -1,
  172. .resources = xoadc_resources,
  173. .num_resources = ARRAY_SIZE(xoadc_resources),
  174. };
  175. static const struct resource thermal_alarm_cell_resources[] __devinitconst = {
  176. SINGLE_IRQ_RESOURCE("pm8058_tempstat_irq", PM8058_TEMPSTAT_IRQ),
  177. SINGLE_IRQ_RESOURCE("pm8058_overtemp_irq", PM8058_OVERTEMP_IRQ),
  178. };
  179. static struct pm8xxx_tm_core_data thermal_alarm_cdata = {
  180. .adc_channel = CHANNEL_ADC_DIE_TEMP,
  181. .adc_type = PM8XXX_TM_ADC_PM8058_ADC,
  182. .reg_addr_temp_alarm_ctrl = REG_TEMP_ALRM_CTRL,
  183. .reg_addr_temp_alarm_pwm = REG_TEMP_ALRM_PWM,
  184. .tm_name = "pm8058_tz",
  185. .irq_name_temp_stat = "pm8058_tempstat_irq",
  186. .irq_name_over_temp = "pm8058_overtemp_irq",
  187. };
  188. static struct mfd_cell thermal_alarm_cell __devinitdata = {
  189. .name = PM8XXX_TM_DEV_NAME,
  190. .id = -1,
  191. .resources = thermal_alarm_cell_resources,
  192. .num_resources = ARRAY_SIZE(thermal_alarm_cell_resources),
  193. .platform_data = &thermal_alarm_cdata,
  194. .pdata_size = sizeof(struct pm8xxx_tm_core_data),
  195. };
  196. static struct mfd_cell debugfs_cell __devinitdata = {
  197. .name = "pm8xxx-debug",
  198. .id = -1,
  199. .platform_data = "pm8058-dbg",
  200. .pdata_size = sizeof("pm8058-dbg"),
  201. };
  202. static const struct resource othc0_cell_resources[] __devinitconst = {
  203. {
  204. .name = "othc_base",
  205. .start = PM8058_OTHC_CNTR_BASE0,
  206. .end = PM8058_OTHC_CNTR_BASE0,
  207. .flags = IORESOURCE_IO,
  208. },
  209. };
  210. static const struct resource othc1_cell_resources[] __devinitconst = {
  211. SINGLE_IRQ_RESOURCE(NULL, PM8058_SW_1_IRQ),
  212. SINGLE_IRQ_RESOURCE(NULL, PM8058_IR_1_IRQ),
  213. {
  214. .name = "othc_base",
  215. .start = PM8058_OTHC_CNTR_BASE1,
  216. .end = PM8058_OTHC_CNTR_BASE1,
  217. .flags = IORESOURCE_IO,
  218. },
  219. };
  220. static const struct resource othc2_cell_resources[] __devinitconst = {
  221. {
  222. .name = "othc_base",
  223. .start = PM8058_OTHC_CNTR_BASE2,
  224. .end = PM8058_OTHC_CNTR_BASE2,
  225. .flags = IORESOURCE_IO,
  226. },
  227. };
  228. static const struct resource batt_alarm_cell_resources[] __devinitconst = {
  229. SINGLE_IRQ_RESOURCE("pm8058_batt_alarm_irq", PM8058_BATT_ALARM_IRQ),
  230. };
  231. static struct mfd_cell leds_cell __devinitdata = {
  232. .name = "pm8058-led",
  233. .id = -1,
  234. };
  235. static struct mfd_cell othc0_cell __devinitdata = {
  236. .name = "pm8058-othc",
  237. .id = 0,
  238. .resources = othc0_cell_resources,
  239. .num_resources = ARRAY_SIZE(othc0_cell_resources),
  240. };
  241. static struct mfd_cell othc1_cell __devinitdata = {
  242. .name = "pm8058-othc",
  243. .id = 1,
  244. .resources = othc1_cell_resources,
  245. .num_resources = ARRAY_SIZE(othc1_cell_resources),
  246. };
  247. static struct mfd_cell othc2_cell __devinitdata = {
  248. .name = "pm8058-othc",
  249. .id = 2,
  250. .resources = othc2_cell_resources,
  251. .num_resources = ARRAY_SIZE(othc2_cell_resources),
  252. };
  253. static struct pm8xxx_batt_alarm_core_data batt_alarm_cdata = {
  254. .irq_name = "pm8058_batt_alarm_irq",
  255. .reg_addr_threshold = REG_BATT_ALARM_THRESH,
  256. .reg_addr_ctrl1 = REG_BATT_ALARM_CTRL1,
  257. .reg_addr_ctrl2 = REG_BATT_ALARM_CTRL2,
  258. .reg_addr_pwm_ctrl = REG_BATT_ALARM_PWM_CTRL,
  259. };
  260. static struct mfd_cell batt_alarm_cell __devinitdata = {
  261. .name = PM8XXX_BATT_ALARM_DEV_NAME,
  262. .id = -1,
  263. .resources = batt_alarm_cell_resources,
  264. .num_resources = ARRAY_SIZE(batt_alarm_cell_resources),
  265. .platform_data = &batt_alarm_cdata,
  266. .pdata_size = sizeof(struct pm8xxx_batt_alarm_core_data),
  267. };
  268. static struct mfd_cell upl_cell __devinitdata = {
  269. .name = PM8XXX_UPL_DEV_NAME,
  270. .id = -1,
  271. };
  272. static struct mfd_cell nfc_cell __devinitdata = {
  273. .name = PM8XXX_NFC_DEV_NAME,
  274. .id = -1,
  275. };
  276. static const struct resource rtc_cell_resources[] __devinitconst = {
  277. [0] = SINGLE_IRQ_RESOURCE(NULL, PM8058_RTC_ALARM_IRQ),
  278. [1] = {
  279. .name = "pmic_rtc_base",
  280. .start = PM8058_RTC_BASE,
  281. .end = PM8058_RTC_BASE,
  282. .flags = IORESOURCE_IO,
  283. },
  284. };
  285. static struct mfd_cell rtc_cell __devinitdata = {
  286. .name = PM8XXX_RTC_DEV_NAME,
  287. .id = -1,
  288. .resources = rtc_cell_resources,
  289. .num_resources = ARRAY_SIZE(rtc_cell_resources),
  290. };
  291. static const struct resource resources_pwrkey[] __devinitconst = {
  292. SINGLE_IRQ_RESOURCE(NULL, PM8058_PWRKEY_REL_IRQ),
  293. SINGLE_IRQ_RESOURCE(NULL, PM8058_PWRKEY_PRESS_IRQ),
  294. };
  295. static struct mfd_cell vibrator_cell __devinitdata = {
  296. .name = PM8XXX_VIBRATOR_DEV_NAME,
  297. .id = -1,
  298. };
  299. static struct mfd_cell pwrkey_cell __devinitdata = {
  300. .name = PM8XXX_PWRKEY_DEV_NAME,
  301. .id = -1,
  302. .num_resources = ARRAY_SIZE(resources_pwrkey),
  303. .resources = resources_pwrkey,
  304. };
  305. static const struct resource resources_keypad[] = {
  306. SINGLE_IRQ_RESOURCE(NULL, PM8058_KEYPAD_IRQ),
  307. SINGLE_IRQ_RESOURCE(NULL, PM8058_KEYSTUCK_IRQ),
  308. };
  309. static struct mfd_cell keypad_cell __devinitdata = {
  310. .name = PM8XXX_KEYPAD_DEV_NAME,
  311. .id = -1,
  312. .num_resources = ARRAY_SIZE(resources_keypad),
  313. .resources = resources_keypad,
  314. };
  315. static const struct resource mpp_cell_resources[] __devinitconst = {
  316. {
  317. .start = PM8058_IRQ_BLOCK_BIT(PM8058_MPP_BLOCK_START, 0),
  318. .end = PM8058_IRQ_BLOCK_BIT(PM8058_MPP_BLOCK_START, 0)
  319. + PM8058_MPPS - 1,
  320. .flags = IORESOURCE_IRQ,
  321. },
  322. };
  323. static struct mfd_cell mpp_cell __devinitdata = {
  324. .name = PM8XXX_MPP_DEV_NAME,
  325. .id = 0,
  326. .resources = mpp_cell_resources,
  327. .num_resources = ARRAY_SIZE(mpp_cell_resources),
  328. };
  329. static const struct resource gpio_cell_resources[] __devinitconst = {
  330. [0] = {
  331. .start = PM8058_IRQ_BLOCK_BIT(PM8058_GPIO_BLOCK_START, 0),
  332. .end = PM8058_IRQ_BLOCK_BIT(PM8058_GPIO_BLOCK_START, 0)
  333. + PM8058_GPIOS - 1,
  334. .flags = IORESOURCE_IRQ,
  335. },
  336. };
  337. static struct mfd_cell gpio_cell __devinitdata = {
  338. .name = PM8XXX_GPIO_DEV_NAME,
  339. .id = -1,
  340. .resources = gpio_cell_resources,
  341. .num_resources = ARRAY_SIZE(gpio_cell_resources),
  342. };
  343. static int __devinit
  344. pm8058_add_subdevices(const struct pm8058_platform_data *pdata,
  345. struct pm8058_chip *pmic)
  346. {
  347. int rc = 0, irq_base = 0, i;
  348. struct pm_irq_chip *irq_chip;
  349. static struct mfd_cell *mfd_regulators, *mfd_xo_buffers;
  350. if (pdata->irq_pdata) {
  351. pdata->irq_pdata->irq_cdata.nirqs = PM8058_NR_IRQS;
  352. pdata->irq_pdata->irq_cdata.base_addr = REG_IRQ_BASE;
  353. irq_base = pdata->irq_pdata->irq_base;
  354. irq_chip = pm8xxx_irq_init(pmic->dev, pdata->irq_pdata);
  355. if (IS_ERR(irq_chip)) {
  356. pr_err("Failed to init interrupts ret=%ld\n",
  357. PTR_ERR(irq_chip));
  358. return PTR_ERR(irq_chip);
  359. }
  360. pmic->irq_chip = irq_chip;
  361. }
  362. if (pdata->gpio_pdata) {
  363. pdata->gpio_pdata->gpio_cdata.ngpios = PM8058_GPIOS;
  364. gpio_cell.platform_data = pdata->gpio_pdata;
  365. gpio_cell.pdata_size = sizeof(struct pm8xxx_gpio_platform_data);
  366. rc = mfd_add_devices(pmic->dev, 0, &gpio_cell, 1,
  367. NULL, irq_base);
  368. if (rc) {
  369. pr_err("Failed to add gpio subdevice ret=%d\n", rc);
  370. goto bail;
  371. }
  372. }
  373. if (pdata->mpp_pdata) {
  374. pdata->mpp_pdata->core_data.nmpps = PM8058_MPPS;
  375. pdata->mpp_pdata->core_data.base_addr = REG_MPP_BASE;
  376. mpp_cell.platform_data = pdata->mpp_pdata;
  377. mpp_cell.pdata_size = sizeof(struct pm8xxx_mpp_platform_data);
  378. rc = mfd_add_devices(pmic->dev, 0, &mpp_cell, 1, NULL,
  379. irq_base);
  380. if (rc) {
  381. pr_err("Failed to add mpp subdevice ret=%d\n", rc);
  382. goto bail;
  383. }
  384. }
  385. if (pdata->num_regulators > 0 && pdata->regulator_pdatas) {
  386. mfd_regulators = kzalloc(sizeof(struct mfd_cell)
  387. * (pdata->num_regulators), GFP_KERNEL);
  388. if (!mfd_regulators) {
  389. pr_err("Cannot allocate %d bytes for pm8058 regulator "
  390. "mfd cells\n", sizeof(struct mfd_cell)
  391. * (pdata->num_regulators));
  392. rc = -ENOMEM;
  393. goto bail;
  394. }
  395. for (i = 0; i < pdata->num_regulators; i++) {
  396. mfd_regulators[i].name = "pm8058-regulator";
  397. mfd_regulators[i].id = pdata->regulator_pdatas[i].id;
  398. mfd_regulators[i].platform_data =
  399. &(pdata->regulator_pdatas[i]);
  400. mfd_regulators[i].pdata_size =
  401. sizeof(struct pm8058_vreg_pdata);
  402. }
  403. rc = mfd_add_devices(pmic->dev, 0, mfd_regulators,
  404. pdata->num_regulators, NULL, irq_base);
  405. if (rc) {
  406. pr_err("Failed to add regulator subdevices ret=%d\n",
  407. rc);
  408. kfree(mfd_regulators);
  409. goto bail;
  410. }
  411. pmic->mfd_regulators = mfd_regulators;
  412. }
  413. if (pdata->num_xo_buffers > 0 && pdata->xo_buffer_pdata) {
  414. mfd_xo_buffers = kzalloc(sizeof(struct mfd_cell)
  415. * (pdata->num_xo_buffers), GFP_KERNEL);
  416. if (!mfd_xo_buffers) {
  417. pr_err("Cannot allocate %d bytes for pm8058 XO buffer "
  418. "mfd cells\n", sizeof(struct mfd_cell)
  419. * (pdata->num_xo_buffers));
  420. rc = -ENOMEM;
  421. goto bail;
  422. }
  423. for (i = 0; i < pdata->num_xo_buffers; i++) {
  424. mfd_xo_buffers[i].name = PM8058_XO_BUFFER_DEV_NAME;
  425. mfd_xo_buffers[i].id = pdata->xo_buffer_pdata[i].id;
  426. mfd_xo_buffers[i].platform_data =
  427. &(pdata->xo_buffer_pdata[i]);
  428. mfd_xo_buffers[i].pdata_size =
  429. sizeof(struct pm8058_xo_pdata);
  430. }
  431. rc = mfd_add_devices(pmic->dev, 0, mfd_xo_buffers,
  432. pdata->num_xo_buffers, NULL, irq_base);
  433. if (rc) {
  434. pr_err("Failed to add XO buffer subdevices ret=%d\n",
  435. rc);
  436. kfree(mfd_xo_buffers);
  437. goto bail;
  438. }
  439. pmic->mfd_xo_buffers = mfd_xo_buffers;
  440. }
  441. if (pdata->keypad_pdata) {
  442. keypad_cell.platform_data = pdata->keypad_pdata;
  443. keypad_cell.pdata_size =
  444. sizeof(struct pm8xxx_keypad_platform_data);
  445. rc = mfd_add_devices(pmic->dev, 0, &keypad_cell, 1, NULL,
  446. irq_base);
  447. if (rc) {
  448. pr_err("Failed to add keypad subdevice ret=%d\n", rc);
  449. goto bail;
  450. }
  451. }
  452. if (pdata->rtc_pdata) {
  453. rtc_cell.platform_data = pdata->rtc_pdata;
  454. rtc_cell.pdata_size = sizeof(struct pm8xxx_rtc_platform_data);
  455. rc = mfd_add_devices(pmic->dev, 0, &rtc_cell, 1, NULL,
  456. irq_base);
  457. if (rc) {
  458. pr_err("Failed to add rtc subdevice ret=%d\n", rc);
  459. goto bail;
  460. }
  461. }
  462. if (pdata->pwrkey_pdata) {
  463. pwrkey_cell.platform_data = pdata->pwrkey_pdata;
  464. pwrkey_cell.pdata_size =
  465. sizeof(struct pm8xxx_pwrkey_platform_data);
  466. rc = mfd_add_devices(pmic->dev, 0, &pwrkey_cell, 1, NULL,
  467. irq_base);
  468. if (rc) {
  469. pr_err("Failed to add pwrkey subdevice ret=%d\n", rc);
  470. goto bail;
  471. }
  472. }
  473. if (pdata->vibrator_pdata) {
  474. vibrator_cell.platform_data = pdata->vibrator_pdata;
  475. vibrator_cell.pdata_size =
  476. sizeof(struct pm8xxx_vibrator_platform_data);
  477. rc = mfd_add_devices(pmic->dev, 0, &vibrator_cell, 1, NULL,
  478. irq_base);
  479. if (rc) {
  480. pr_err("Failed to add vibrator subdevice ret=%d\n",
  481. rc);
  482. goto bail;
  483. }
  484. }
  485. if (pdata->leds_pdata) {
  486. leds_cell.platform_data = pdata->leds_pdata;
  487. leds_cell.pdata_size =
  488. sizeof(struct pmic8058_leds_platform_data);
  489. rc = mfd_add_devices(pmic->dev, 0, &leds_cell, 1, NULL,
  490. irq_base);
  491. if (rc) {
  492. pr_err("Failed to add leds subdevice ret=%d\n", rc);
  493. goto bail;
  494. }
  495. }
  496. if (pdata->xoadc_pdata) {
  497. xoadc_cell.platform_data = pdata->xoadc_pdata;
  498. xoadc_cell.pdata_size =
  499. sizeof(struct xoadc_platform_data);
  500. rc = mfd_add_devices(pmic->dev, 0, &xoadc_cell, 1, NULL,
  501. irq_base);
  502. if (rc) {
  503. pr_err("Failed to add leds subdevice ret=%d\n", rc);
  504. goto bail;
  505. }
  506. }
  507. if (pdata->othc0_pdata) {
  508. othc0_cell.platform_data = pdata->othc0_pdata;
  509. othc0_cell.pdata_size =
  510. sizeof(struct pmic8058_othc_config_pdata);
  511. rc = mfd_add_devices(pmic->dev, 0, &othc0_cell, 1, NULL, 0);
  512. if (rc) {
  513. pr_err("Failed to add othc0 subdevice ret=%d\n", rc);
  514. goto bail;
  515. }
  516. }
  517. if (pdata->othc1_pdata) {
  518. othc1_cell.platform_data = pdata->othc1_pdata;
  519. othc1_cell.pdata_size =
  520. sizeof(struct pmic8058_othc_config_pdata);
  521. rc = mfd_add_devices(pmic->dev, 0, &othc1_cell, 1, NULL,
  522. irq_base);
  523. if (rc) {
  524. pr_err("Failed to add othc1 subdevice ret=%d\n", rc);
  525. goto bail;
  526. }
  527. }
  528. if (pdata->othc2_pdata) {
  529. othc2_cell.platform_data = pdata->othc2_pdata;
  530. othc2_cell.pdata_size =
  531. sizeof(struct pmic8058_othc_config_pdata);
  532. rc = mfd_add_devices(pmic->dev, 0, &othc2_cell, 1, NULL, 0);
  533. if (rc) {
  534. pr_err("Failed to add othc2 subdevice ret=%d\n", rc);
  535. goto bail;
  536. }
  537. }
  538. if (pdata->pwm_pdata) {
  539. pm8058_pwm_cell.platform_data = pdata->pwm_pdata;
  540. pm8058_pwm_cell.pdata_size = sizeof(struct pm8058_pwm_pdata);
  541. rc = mfd_add_devices(pmic->dev, 0, &pm8058_pwm_cell, 1, NULL,
  542. irq_base);
  543. if (rc) {
  544. pr_err("Failed to add pwm subdevice ret=%d\n", rc);
  545. goto bail;
  546. }
  547. }
  548. if (pdata->misc_pdata) {
  549. misc_cell.platform_data = pdata->misc_pdata;
  550. misc_cell.pdata_size = sizeof(struct pm8xxx_misc_platform_data);
  551. rc = mfd_add_devices(pmic->dev, 0, &misc_cell, 1, NULL,
  552. irq_base);
  553. if (rc) {
  554. pr_err("Failed to add misc subdevice ret=%d\n", rc);
  555. goto bail;
  556. }
  557. }
  558. rc = mfd_add_devices(pmic->dev, 0, &thermal_alarm_cell, 1, NULL,
  559. irq_base);
  560. if (rc) {
  561. pr_err("Failed to add thermal alarm subdevice ret=%d\n",
  562. rc);
  563. goto bail;
  564. }
  565. rc = mfd_add_devices(pmic->dev, 0, &batt_alarm_cell, 1, NULL,
  566. irq_base);
  567. if (rc) {
  568. pr_err("Failed to add battery alarm subdevice ret=%d\n",
  569. rc);
  570. goto bail;
  571. }
  572. rc = mfd_add_devices(pmic->dev, 0, &upl_cell, 1, NULL, 0);
  573. if (rc) {
  574. pr_err("Failed to add upl subdevice ret=%d\n", rc);
  575. goto bail;
  576. }
  577. rc = mfd_add_devices(pmic->dev, 0, &nfc_cell, 1, NULL, 0);
  578. if (rc) {
  579. pr_err("Failed to add upl subdevice ret=%d\n", rc);
  580. goto bail;
  581. }
  582. if (pdata->charger_pdata) {
  583. pm8058_charger_cell.platform_data = pdata->charger_pdata;
  584. pm8058_charger_cell.pdata_size = sizeof(struct
  585. pmic8058_charger_data);
  586. rc = mfd_add_devices(pmic->dev, 0, &pm8058_charger_cell,
  587. 1, NULL, irq_base);
  588. if (rc) {
  589. pr_err("Failed to add charger subdevice ret=%d\n", rc);
  590. goto bail;
  591. }
  592. }
  593. rc = mfd_add_devices(pmic->dev, 0, &debugfs_cell, 1, NULL, irq_base);
  594. if (rc) {
  595. pr_err("Failed to add debugfs subdevice ret=%d\n", rc);
  596. goto bail;
  597. }
  598. return rc;
  599. bail:
  600. if (pmic->irq_chip) {
  601. pm8xxx_irq_exit(pmic->irq_chip);
  602. pmic->irq_chip = NULL;
  603. }
  604. return rc;
  605. }
  606. static int __devinit pm8058_probe(struct platform_device *pdev)
  607. {
  608. int rc;
  609. struct pm8058_platform_data *pdata = pdev->dev.platform_data;
  610. struct pm8058_chip *pmic;
  611. if (pdata == NULL) {
  612. pr_err("%s: No platform_data or IRQ.\n", __func__);
  613. return -ENODEV;
  614. }
  615. pmic = kzalloc(sizeof *pmic, GFP_KERNEL);
  616. if (pmic == NULL) {
  617. pr_err("%s: kzalloc() failed.\n", __func__);
  618. return -ENOMEM;
  619. }
  620. pmic->dev = &pdev->dev;
  621. pm8058_drvdata.pm_chip_data = pmic;
  622. platform_set_drvdata(pdev, &pm8058_drvdata);
  623. /* Read PMIC chip revision */
  624. rc = pm8058_readb(pmic->dev, PM8058_REG_REV, &pmic->revision);
  625. if (rc)
  626. pr_err("%s: Failed on pm8058_readb for revision: rc=%d.\n",
  627. __func__, rc);
  628. pr_info("%s: PMIC revision: %X\n", __func__, pmic->revision);
  629. (void) memcpy((void *)&pmic->pdata, (const void *)pdata,
  630. sizeof(pmic->pdata));
  631. rc = pm8058_add_subdevices(pdata, pmic);
  632. if (rc) {
  633. pr_err("Cannot add subdevices rc=%d\n", rc);
  634. goto err;
  635. }
  636. rc = pm8xxx_hard_reset_config(PM8XXX_SHUTDOWN_ON_HARD_RESET);
  637. if (rc < 0)
  638. pr_err("%s: failed to config shutdown on hard reset: %d\n",
  639. __func__, rc);
  640. return 0;
  641. err:
  642. mfd_remove_devices(pmic->dev);
  643. platform_set_drvdata(pdev, NULL);
  644. kfree(pmic);
  645. return rc;
  646. }
  647. static int __devexit pm8058_remove(struct platform_device *pdev)
  648. {
  649. struct pm8xxx_drvdata *drvdata;
  650. struct pm8058_chip *pmic = NULL;
  651. drvdata = platform_get_drvdata(pdev);
  652. if (drvdata)
  653. pmic = drvdata->pm_chip_data;
  654. if (pmic) {
  655. if (pmic->dev)
  656. mfd_remove_devices(pmic->dev);
  657. if (pmic->irq_chip)
  658. pm8xxx_irq_exit(pmic->irq_chip);
  659. kfree(pmic->mfd_regulators);
  660. kfree(pmic);
  661. }
  662. platform_set_drvdata(pdev, NULL);
  663. return 0;
  664. }
  665. static struct platform_driver pm8058_driver = {
  666. .probe = pm8058_probe,
  667. .remove = __devexit_p(pm8058_remove),
  668. .driver = {
  669. .name = "pm8058-core",
  670. .owner = THIS_MODULE,
  671. },
  672. };
  673. static int __init pm8058_init(void)
  674. {
  675. return platform_driver_register(&pm8058_driver);
  676. }
  677. postcore_initcall(pm8058_init);
  678. static void __exit pm8058_exit(void)
  679. {
  680. platform_driver_unregister(&pm8058_driver);
  681. }
  682. module_exit(pm8058_exit);
  683. MODULE_LICENSE("GPL v2");
  684. MODULE_DESCRIPTION("PMIC8058 core driver");
  685. MODULE_VERSION("1.0");
  686. MODULE_ALIAS("platform:pmic8058-core");