sn9c102_ov7630.c 19 KB

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  1. /***************************************************************************
  2. * Plug-in for OV7630 image sensor connected to the SN9C1xx PC Camera *
  3. * Controllers *
  4. * *
  5. * Copyright (C) 2006-2007 by Luca Risolia <luca.risolia@studio.unibo.it> *
  6. * *
  7. * This program is free software; you can redistribute it and/or modify *
  8. * it under the terms of the GNU General Public License as published by *
  9. * the Free Software Foundation; either version 2 of the License, or *
  10. * (at your option) any later version. *
  11. * *
  12. * This program is distributed in the hope that it will be useful, *
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  15. * GNU General Public License for more details. *
  16. * *
  17. * You should have received a copy of the GNU General Public License *
  18. * along with this program; if not, write to the Free Software *
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. *
  20. ***************************************************************************/
  21. #include "sn9c102_sensor.h"
  22. #include "sn9c102_devtable.h"
  23. static int ov7630_init(struct sn9c102_device* cam)
  24. {
  25. int err = 0;
  26. switch (sn9c102_get_bridge(cam)) {
  27. case BRIDGE_SN9C101:
  28. case BRIDGE_SN9C102:
  29. err = sn9c102_write_const_regs(cam, {0x00, 0x14}, {0x60, 0x17},
  30. {0x0f, 0x18}, {0x50, 0x19});
  31. err += sn9c102_i2c_write(cam, 0x12, 0x8d);
  32. err += sn9c102_i2c_write(cam, 0x12, 0x0d);
  33. err += sn9c102_i2c_write(cam, 0x11, 0x00);
  34. err += sn9c102_i2c_write(cam, 0x15, 0x35);
  35. err += sn9c102_i2c_write(cam, 0x16, 0x03);
  36. err += sn9c102_i2c_write(cam, 0x17, 0x1c);
  37. err += sn9c102_i2c_write(cam, 0x18, 0xbd);
  38. err += sn9c102_i2c_write(cam, 0x19, 0x06);
  39. err += sn9c102_i2c_write(cam, 0x1a, 0xf6);
  40. err += sn9c102_i2c_write(cam, 0x1b, 0x04);
  41. err += sn9c102_i2c_write(cam, 0x20, 0x44);
  42. err += sn9c102_i2c_write(cam, 0x23, 0xee);
  43. err += sn9c102_i2c_write(cam, 0x26, 0xa0);
  44. err += sn9c102_i2c_write(cam, 0x27, 0x9a);
  45. err += sn9c102_i2c_write(cam, 0x28, 0x20);
  46. err += sn9c102_i2c_write(cam, 0x29, 0x30);
  47. err += sn9c102_i2c_write(cam, 0x2f, 0x3d);
  48. err += sn9c102_i2c_write(cam, 0x30, 0x24);
  49. err += sn9c102_i2c_write(cam, 0x32, 0x86);
  50. err += sn9c102_i2c_write(cam, 0x60, 0xa9);
  51. err += sn9c102_i2c_write(cam, 0x61, 0x42);
  52. err += sn9c102_i2c_write(cam, 0x65, 0x00);
  53. err += sn9c102_i2c_write(cam, 0x69, 0x38);
  54. err += sn9c102_i2c_write(cam, 0x6f, 0x88);
  55. err += sn9c102_i2c_write(cam, 0x70, 0x0b);
  56. err += sn9c102_i2c_write(cam, 0x71, 0x00);
  57. err += sn9c102_i2c_write(cam, 0x74, 0x21);
  58. err += sn9c102_i2c_write(cam, 0x7d, 0xf7);
  59. break;
  60. case BRIDGE_SN9C103:
  61. err = sn9c102_write_const_regs(cam, {0x00, 0x02}, {0x00, 0x03},
  62. {0x1a, 0x04}, {0x20, 0x05},
  63. {0x20, 0x06}, {0x20, 0x07},
  64. {0x03, 0x10}, {0x0a, 0x14},
  65. {0x60, 0x17}, {0x0f, 0x18},
  66. {0x50, 0x19}, {0x1d, 0x1a},
  67. {0x10, 0x1b}, {0x02, 0x1c},
  68. {0x03, 0x1d}, {0x0f, 0x1e},
  69. {0x0c, 0x1f}, {0x00, 0x20},
  70. {0x10, 0x21}, {0x20, 0x22},
  71. {0x30, 0x23}, {0x40, 0x24},
  72. {0x50, 0x25}, {0x60, 0x26},
  73. {0x70, 0x27}, {0x80, 0x28},
  74. {0x90, 0x29}, {0xa0, 0x2a},
  75. {0xb0, 0x2b}, {0xc0, 0x2c},
  76. {0xd0, 0x2d}, {0xe0, 0x2e},
  77. {0xf0, 0x2f}, {0xff, 0x30});
  78. err += sn9c102_i2c_write(cam, 0x12, 0x8d);
  79. err += sn9c102_i2c_write(cam, 0x12, 0x0d);
  80. err += sn9c102_i2c_write(cam, 0x15, 0x34);
  81. err += sn9c102_i2c_write(cam, 0x11, 0x01);
  82. err += sn9c102_i2c_write(cam, 0x1b, 0x04);
  83. err += sn9c102_i2c_write(cam, 0x20, 0x44);
  84. err += sn9c102_i2c_write(cam, 0x23, 0xee);
  85. err += sn9c102_i2c_write(cam, 0x26, 0xa0);
  86. err += sn9c102_i2c_write(cam, 0x27, 0x9a);
  87. err += sn9c102_i2c_write(cam, 0x28, 0x20);
  88. err += sn9c102_i2c_write(cam, 0x29, 0x30);
  89. err += sn9c102_i2c_write(cam, 0x2f, 0x3d);
  90. err += sn9c102_i2c_write(cam, 0x30, 0x24);
  91. err += sn9c102_i2c_write(cam, 0x32, 0x86);
  92. err += sn9c102_i2c_write(cam, 0x60, 0xa9);
  93. err += sn9c102_i2c_write(cam, 0x61, 0x42);
  94. err += sn9c102_i2c_write(cam, 0x65, 0x00);
  95. err += sn9c102_i2c_write(cam, 0x69, 0x38);
  96. err += sn9c102_i2c_write(cam, 0x6f, 0x88);
  97. err += sn9c102_i2c_write(cam, 0x70, 0x0b);
  98. err += sn9c102_i2c_write(cam, 0x71, 0x00);
  99. err += sn9c102_i2c_write(cam, 0x74, 0x21);
  100. err += sn9c102_i2c_write(cam, 0x7d, 0xf7);
  101. break;
  102. case BRIDGE_SN9C105:
  103. case BRIDGE_SN9C120:
  104. err = sn9c102_write_const_regs(cam, {0x40, 0x02}, {0x00, 0x03},
  105. {0x1a, 0x04}, {0x03, 0x10},
  106. {0x0a, 0x14}, {0xe2, 0x17},
  107. {0x0b, 0x18}, {0x00, 0x19},
  108. {0x1d, 0x1a}, {0x10, 0x1b},
  109. {0x02, 0x1c}, {0x03, 0x1d},
  110. {0x0f, 0x1e}, {0x0c, 0x1f},
  111. {0x00, 0x20}, {0x24, 0x21},
  112. {0x3b, 0x22}, {0x47, 0x23},
  113. {0x60, 0x24}, {0x71, 0x25},
  114. {0x80, 0x26}, {0x8f, 0x27},
  115. {0x9d, 0x28}, {0xaa, 0x29},
  116. {0xb8, 0x2a}, {0xc4, 0x2b},
  117. {0xd1, 0x2c}, {0xdd, 0x2d},
  118. {0xe8, 0x2e}, {0xf4, 0x2f},
  119. {0xff, 0x30}, {0x00, 0x3f},
  120. {0xc7, 0x40}, {0x01, 0x41},
  121. {0x44, 0x42}, {0x00, 0x43},
  122. {0x44, 0x44}, {0x00, 0x45},
  123. {0x44, 0x46}, {0x00, 0x47},
  124. {0xc7, 0x48}, {0x01, 0x49},
  125. {0xc7, 0x4a}, {0x01, 0x4b},
  126. {0xc7, 0x4c}, {0x01, 0x4d},
  127. {0x44, 0x4e}, {0x00, 0x4f},
  128. {0x44, 0x50}, {0x00, 0x51},
  129. {0x44, 0x52}, {0x00, 0x53},
  130. {0xc7, 0x54}, {0x01, 0x55},
  131. {0xc7, 0x56}, {0x01, 0x57},
  132. {0xc7, 0x58}, {0x01, 0x59},
  133. {0x44, 0x5a}, {0x00, 0x5b},
  134. {0x44, 0x5c}, {0x00, 0x5d},
  135. {0x44, 0x5e}, {0x00, 0x5f},
  136. {0xc7, 0x60}, {0x01, 0x61},
  137. {0xc7, 0x62}, {0x01, 0x63},
  138. {0xc7, 0x64}, {0x01, 0x65},
  139. {0x44, 0x66}, {0x00, 0x67},
  140. {0x44, 0x68}, {0x00, 0x69},
  141. {0x44, 0x6a}, {0x00, 0x6b},
  142. {0xc7, 0x6c}, {0x01, 0x6d},
  143. {0xc7, 0x6e}, {0x01, 0x6f},
  144. {0xc7, 0x70}, {0x01, 0x71},
  145. {0x44, 0x72}, {0x00, 0x73},
  146. {0x44, 0x74}, {0x00, 0x75},
  147. {0x44, 0x76}, {0x00, 0x77},
  148. {0xc7, 0x78}, {0x01, 0x79},
  149. {0xc7, 0x7a}, {0x01, 0x7b},
  150. {0xc7, 0x7c}, {0x01, 0x7d},
  151. {0x44, 0x7e}, {0x00, 0x7f},
  152. {0x17, 0x84}, {0x00, 0x85},
  153. {0x2e, 0x86}, {0x00, 0x87},
  154. {0x09, 0x88}, {0x00, 0x89},
  155. {0xe8, 0x8a}, {0x0f, 0x8b},
  156. {0xda, 0x8c}, {0x0f, 0x8d},
  157. {0x40, 0x8e}, {0x00, 0x8f},
  158. {0x37, 0x90}, {0x00, 0x91},
  159. {0xcf, 0x92}, {0x0f, 0x93},
  160. {0xfa, 0x94}, {0x0f, 0x95},
  161. {0x00, 0x96}, {0x00, 0x97},
  162. {0x00, 0x98}, {0x66, 0x99},
  163. {0x00, 0x9a}, {0x40, 0x9b},
  164. {0x20, 0x9c}, {0x00, 0x9d},
  165. {0x00, 0x9e}, {0x00, 0x9f},
  166. {0x2d, 0xc0}, {0x2d, 0xc1},
  167. {0x3a, 0xc2}, {0x00, 0xc3},
  168. {0x04, 0xc4}, {0x3f, 0xc5},
  169. {0x00, 0xc6}, {0x00, 0xc7},
  170. {0x50, 0xc8}, {0x3c, 0xc9},
  171. {0x28, 0xca}, {0xd8, 0xcb},
  172. {0x14, 0xcc}, {0xec, 0xcd},
  173. {0x32, 0xce}, {0xdd, 0xcf},
  174. {0x32, 0xd0}, {0xdd, 0xd1},
  175. {0x6a, 0xd2}, {0x50, 0xd3},
  176. {0x60, 0xd4}, {0x00, 0xd5},
  177. {0x00, 0xd6});
  178. err += sn9c102_i2c_write(cam, 0x12, 0x80);
  179. err += sn9c102_i2c_write(cam, 0x12, 0x48);
  180. err += sn9c102_i2c_write(cam, 0x01, 0x80);
  181. err += sn9c102_i2c_write(cam, 0x02, 0x80);
  182. err += sn9c102_i2c_write(cam, 0x03, 0x80);
  183. err += sn9c102_i2c_write(cam, 0x04, 0x10);
  184. err += sn9c102_i2c_write(cam, 0x05, 0x20);
  185. err += sn9c102_i2c_write(cam, 0x06, 0x80);
  186. err += sn9c102_i2c_write(cam, 0x11, 0x00);
  187. err += sn9c102_i2c_write(cam, 0x0c, 0x20);
  188. err += sn9c102_i2c_write(cam, 0x0d, 0x20);
  189. err += sn9c102_i2c_write(cam, 0x15, 0x80);
  190. err += sn9c102_i2c_write(cam, 0x16, 0x03);
  191. err += sn9c102_i2c_write(cam, 0x17, 0x1b);
  192. err += sn9c102_i2c_write(cam, 0x18, 0xbd);
  193. err += sn9c102_i2c_write(cam, 0x19, 0x05);
  194. err += sn9c102_i2c_write(cam, 0x1a, 0xf6);
  195. err += sn9c102_i2c_write(cam, 0x1b, 0x04);
  196. err += sn9c102_i2c_write(cam, 0x21, 0x1b);
  197. err += sn9c102_i2c_write(cam, 0x22, 0x00);
  198. err += sn9c102_i2c_write(cam, 0x23, 0xde);
  199. err += sn9c102_i2c_write(cam, 0x24, 0x10);
  200. err += sn9c102_i2c_write(cam, 0x25, 0x8a);
  201. err += sn9c102_i2c_write(cam, 0x26, 0xa0);
  202. err += sn9c102_i2c_write(cam, 0x27, 0xca);
  203. err += sn9c102_i2c_write(cam, 0x28, 0xa2);
  204. err += sn9c102_i2c_write(cam, 0x29, 0x74);
  205. err += sn9c102_i2c_write(cam, 0x2a, 0x88);
  206. err += sn9c102_i2c_write(cam, 0x2b, 0x34);
  207. err += sn9c102_i2c_write(cam, 0x2c, 0x88);
  208. err += sn9c102_i2c_write(cam, 0x2e, 0x00);
  209. err += sn9c102_i2c_write(cam, 0x2f, 0x00);
  210. err += sn9c102_i2c_write(cam, 0x30, 0x00);
  211. err += sn9c102_i2c_write(cam, 0x32, 0xc2);
  212. err += sn9c102_i2c_write(cam, 0x33, 0x08);
  213. err += sn9c102_i2c_write(cam, 0x4c, 0x40);
  214. err += sn9c102_i2c_write(cam, 0x4d, 0xf3);
  215. err += sn9c102_i2c_write(cam, 0x60, 0x05);
  216. err += sn9c102_i2c_write(cam, 0x61, 0x40);
  217. err += sn9c102_i2c_write(cam, 0x62, 0x12);
  218. err += sn9c102_i2c_write(cam, 0x63, 0x57);
  219. err += sn9c102_i2c_write(cam, 0x64, 0x73);
  220. err += sn9c102_i2c_write(cam, 0x65, 0x00);
  221. err += sn9c102_i2c_write(cam, 0x66, 0x55);
  222. err += sn9c102_i2c_write(cam, 0x67, 0x01);
  223. err += sn9c102_i2c_write(cam, 0x68, 0xac);
  224. err += sn9c102_i2c_write(cam, 0x69, 0x38);
  225. err += sn9c102_i2c_write(cam, 0x6f, 0x1f);
  226. err += sn9c102_i2c_write(cam, 0x70, 0x01);
  227. err += sn9c102_i2c_write(cam, 0x71, 0x00);
  228. err += sn9c102_i2c_write(cam, 0x72, 0x10);
  229. err += sn9c102_i2c_write(cam, 0x73, 0x50);
  230. err += sn9c102_i2c_write(cam, 0x74, 0x20);
  231. err += sn9c102_i2c_write(cam, 0x76, 0x01);
  232. err += sn9c102_i2c_write(cam, 0x77, 0xf3);
  233. err += sn9c102_i2c_write(cam, 0x78, 0x90);
  234. err += sn9c102_i2c_write(cam, 0x79, 0x98);
  235. err += sn9c102_i2c_write(cam, 0x7a, 0x98);
  236. err += sn9c102_i2c_write(cam, 0x7b, 0x00);
  237. err += sn9c102_i2c_write(cam, 0x7c, 0x38);
  238. err += sn9c102_i2c_write(cam, 0x7d, 0xff);
  239. break;
  240. default:
  241. break;
  242. }
  243. return err;
  244. }
  245. static int ov7630_get_ctrl(struct sn9c102_device* cam,
  246. struct v4l2_control* ctrl)
  247. {
  248. enum sn9c102_bridge bridge = sn9c102_get_bridge(cam);
  249. int err = 0;
  250. switch (ctrl->id) {
  251. case V4L2_CID_EXPOSURE:
  252. if ((ctrl->value = sn9c102_i2c_read(cam, 0x10)) < 0)
  253. return -EIO;
  254. break;
  255. case V4L2_CID_RED_BALANCE:
  256. if (bridge == BRIDGE_SN9C105 || bridge == BRIDGE_SN9C120)
  257. ctrl->value = sn9c102_pread_reg(cam, 0x05);
  258. else
  259. ctrl->value = sn9c102_pread_reg(cam, 0x07);
  260. break;
  261. case V4L2_CID_BLUE_BALANCE:
  262. ctrl->value = sn9c102_pread_reg(cam, 0x06);
  263. break;
  264. case SN9C102_V4L2_CID_GREEN_BALANCE:
  265. if (bridge == BRIDGE_SN9C105 || bridge == BRIDGE_SN9C120)
  266. ctrl->value = sn9c102_pread_reg(cam, 0x07);
  267. else
  268. ctrl->value = sn9c102_pread_reg(cam, 0x05);
  269. break;
  270. break;
  271. case V4L2_CID_GAIN:
  272. if ((ctrl->value = sn9c102_i2c_read(cam, 0x00)) < 0)
  273. return -EIO;
  274. ctrl->value &= 0x3f;
  275. break;
  276. case V4L2_CID_DO_WHITE_BALANCE:
  277. if ((ctrl->value = sn9c102_i2c_read(cam, 0x0c)) < 0)
  278. return -EIO;
  279. ctrl->value &= 0x3f;
  280. break;
  281. case V4L2_CID_WHITENESS:
  282. if ((ctrl->value = sn9c102_i2c_read(cam, 0x0d)) < 0)
  283. return -EIO;
  284. ctrl->value &= 0x3f;
  285. break;
  286. case V4L2_CID_AUTOGAIN:
  287. if ((ctrl->value = sn9c102_i2c_read(cam, 0x13)) < 0)
  288. return -EIO;
  289. ctrl->value &= 0x01;
  290. break;
  291. case V4L2_CID_VFLIP:
  292. if ((ctrl->value = sn9c102_i2c_read(cam, 0x75)) < 0)
  293. return -EIO;
  294. ctrl->value = (ctrl->value & 0x80) ? 1 : 0;
  295. break;
  296. case SN9C102_V4L2_CID_GAMMA:
  297. if ((ctrl->value = sn9c102_i2c_read(cam, 0x14)) < 0)
  298. return -EIO;
  299. ctrl->value = (ctrl->value & 0x02) ? 1 : 0;
  300. break;
  301. case SN9C102_V4L2_CID_BAND_FILTER:
  302. if ((ctrl->value = sn9c102_i2c_read(cam, 0x2d)) < 0)
  303. return -EIO;
  304. ctrl->value = (ctrl->value & 0x02) ? 1 : 0;
  305. break;
  306. default:
  307. return -EINVAL;
  308. }
  309. return err ? -EIO : 0;
  310. }
  311. static int ov7630_set_ctrl(struct sn9c102_device* cam,
  312. const struct v4l2_control* ctrl)
  313. {
  314. enum sn9c102_bridge bridge = sn9c102_get_bridge(cam);
  315. int err = 0;
  316. switch (ctrl->id) {
  317. case V4L2_CID_EXPOSURE:
  318. err += sn9c102_i2c_write(cam, 0x10, ctrl->value);
  319. break;
  320. case V4L2_CID_RED_BALANCE:
  321. if (bridge == BRIDGE_SN9C105 || bridge == BRIDGE_SN9C120)
  322. err += sn9c102_write_reg(cam, ctrl->value, 0x05);
  323. else
  324. err += sn9c102_write_reg(cam, ctrl->value, 0x07);
  325. break;
  326. case V4L2_CID_BLUE_BALANCE:
  327. err += sn9c102_write_reg(cam, ctrl->value, 0x06);
  328. break;
  329. case SN9C102_V4L2_CID_GREEN_BALANCE:
  330. if (bridge == BRIDGE_SN9C105 || bridge == BRIDGE_SN9C120)
  331. err += sn9c102_write_reg(cam, ctrl->value, 0x07);
  332. else
  333. err += sn9c102_write_reg(cam, ctrl->value, 0x05);
  334. break;
  335. case V4L2_CID_GAIN:
  336. err += sn9c102_i2c_write(cam, 0x00, ctrl->value);
  337. break;
  338. case V4L2_CID_DO_WHITE_BALANCE:
  339. err += sn9c102_i2c_write(cam, 0x0c, ctrl->value);
  340. break;
  341. case V4L2_CID_WHITENESS:
  342. err += sn9c102_i2c_write(cam, 0x0d, ctrl->value);
  343. break;
  344. case V4L2_CID_AUTOGAIN:
  345. err += sn9c102_i2c_write(cam, 0x13, ctrl->value |
  346. (ctrl->value << 1));
  347. break;
  348. case V4L2_CID_VFLIP:
  349. err += sn9c102_i2c_write(cam, 0x75, 0x0e | (ctrl->value << 7));
  350. break;
  351. case SN9C102_V4L2_CID_GAMMA:
  352. err += sn9c102_i2c_write(cam, 0x14, ctrl->value << 2);
  353. break;
  354. case SN9C102_V4L2_CID_BAND_FILTER:
  355. err += sn9c102_i2c_write(cam, 0x2d, ctrl->value << 2);
  356. break;
  357. default:
  358. return -EINVAL;
  359. }
  360. return err ? -EIO : 0;
  361. }
  362. static int ov7630_set_crop(struct sn9c102_device* cam,
  363. const struct v4l2_rect* rect)
  364. {
  365. struct sn9c102_sensor* s = sn9c102_get_sensor(cam);
  366. int err = 0;
  367. u8 h_start = 0, v_start = (u8)(rect->top - s->cropcap.bounds.top) + 1;
  368. switch (sn9c102_get_bridge(cam)) {
  369. case BRIDGE_SN9C101:
  370. case BRIDGE_SN9C102:
  371. case BRIDGE_SN9C103:
  372. h_start = (u8)(rect->left - s->cropcap.bounds.left) + 1;
  373. break;
  374. case BRIDGE_SN9C105:
  375. case BRIDGE_SN9C120:
  376. h_start = (u8)(rect->left - s->cropcap.bounds.left) + 4;
  377. break;
  378. default:
  379. break;
  380. }
  381. err += sn9c102_write_reg(cam, h_start, 0x12);
  382. err += sn9c102_write_reg(cam, v_start, 0x13);
  383. return err;
  384. }
  385. static int ov7630_set_pix_format(struct sn9c102_device* cam,
  386. const struct v4l2_pix_format* pix)
  387. {
  388. int err = 0;
  389. switch (sn9c102_get_bridge(cam)) {
  390. case BRIDGE_SN9C101:
  391. case BRIDGE_SN9C102:
  392. case BRIDGE_SN9C103:
  393. if (pix->pixelformat == V4L2_PIX_FMT_SBGGR8)
  394. err += sn9c102_write_reg(cam, 0x50, 0x19);
  395. else
  396. err += sn9c102_write_reg(cam, 0x20, 0x19);
  397. break;
  398. case BRIDGE_SN9C105:
  399. case BRIDGE_SN9C120:
  400. if (pix->pixelformat == V4L2_PIX_FMT_SBGGR8) {
  401. err += sn9c102_write_reg(cam, 0xe5, 0x17);
  402. err += sn9c102_i2c_write(cam, 0x11, 0x04);
  403. } else {
  404. err += sn9c102_write_reg(cam, 0xe2, 0x17);
  405. err += sn9c102_i2c_write(cam, 0x11, 0x02);
  406. }
  407. break;
  408. default:
  409. break;
  410. }
  411. return err;
  412. }
  413. static const struct sn9c102_sensor ov7630 = {
  414. .name = "OV7630",
  415. .maintainer = "Luca Risolia <luca.risolia@studio.unibo.it>",
  416. .supported_bridge = BRIDGE_SN9C101 | BRIDGE_SN9C102 | BRIDGE_SN9C103 |
  417. BRIDGE_SN9C105 | BRIDGE_SN9C120,
  418. .sysfs_ops = SN9C102_I2C_READ | SN9C102_I2C_WRITE,
  419. .frequency = SN9C102_I2C_100KHZ,
  420. .interface = SN9C102_I2C_2WIRES,
  421. .i2c_slave_id = 0x21,
  422. .init = &ov7630_init,
  423. .qctrl = {
  424. {
  425. .id = V4L2_CID_GAIN,
  426. .type = V4L2_CTRL_TYPE_INTEGER,
  427. .name = "global gain",
  428. .minimum = 0x00,
  429. .maximum = 0x3f,
  430. .step = 0x01,
  431. .default_value = 0x14,
  432. .flags = 0,
  433. },
  434. {
  435. .id = V4L2_CID_EXPOSURE,
  436. .type = V4L2_CTRL_TYPE_INTEGER,
  437. .name = "exposure",
  438. .minimum = 0x00,
  439. .maximum = 0xff,
  440. .step = 0x01,
  441. .default_value = 0x60,
  442. .flags = 0,
  443. },
  444. {
  445. .id = V4L2_CID_WHITENESS,
  446. .type = V4L2_CTRL_TYPE_INTEGER,
  447. .name = "white balance background: red",
  448. .minimum = 0x00,
  449. .maximum = 0x3f,
  450. .step = 0x01,
  451. .default_value = 0x20,
  452. .flags = 0,
  453. },
  454. {
  455. .id = V4L2_CID_DO_WHITE_BALANCE,
  456. .type = V4L2_CTRL_TYPE_INTEGER,
  457. .name = "white balance background: blue",
  458. .minimum = 0x00,
  459. .maximum = 0x3f,
  460. .step = 0x01,
  461. .default_value = 0x20,
  462. .flags = 0,
  463. },
  464. {
  465. .id = V4L2_CID_RED_BALANCE,
  466. .type = V4L2_CTRL_TYPE_INTEGER,
  467. .name = "red balance",
  468. .minimum = 0x00,
  469. .maximum = 0x7f,
  470. .step = 0x01,
  471. .default_value = 0x20,
  472. .flags = 0,
  473. },
  474. {
  475. .id = V4L2_CID_BLUE_BALANCE,
  476. .type = V4L2_CTRL_TYPE_INTEGER,
  477. .name = "blue balance",
  478. .minimum = 0x00,
  479. .maximum = 0x7f,
  480. .step = 0x01,
  481. .default_value = 0x20,
  482. .flags = 0,
  483. },
  484. {
  485. .id = V4L2_CID_AUTOGAIN,
  486. .type = V4L2_CTRL_TYPE_BOOLEAN,
  487. .name = "auto adjust",
  488. .minimum = 0x00,
  489. .maximum = 0x01,
  490. .step = 0x01,
  491. .default_value = 0x00,
  492. .flags = 0,
  493. },
  494. {
  495. .id = V4L2_CID_VFLIP,
  496. .type = V4L2_CTRL_TYPE_BOOLEAN,
  497. .name = "vertical flip",
  498. .minimum = 0x00,
  499. .maximum = 0x01,
  500. .step = 0x01,
  501. .default_value = 0x01,
  502. .flags = 0,
  503. },
  504. {
  505. .id = SN9C102_V4L2_CID_GREEN_BALANCE,
  506. .type = V4L2_CTRL_TYPE_INTEGER,
  507. .name = "green balance",
  508. .minimum = 0x00,
  509. .maximum = 0x7f,
  510. .step = 0x01,
  511. .default_value = 0x20,
  512. .flags = 0,
  513. },
  514. {
  515. .id = SN9C102_V4L2_CID_BAND_FILTER,
  516. .type = V4L2_CTRL_TYPE_BOOLEAN,
  517. .name = "band filter",
  518. .minimum = 0x00,
  519. .maximum = 0x01,
  520. .step = 0x01,
  521. .default_value = 0x00,
  522. .flags = 0,
  523. },
  524. {
  525. .id = SN9C102_V4L2_CID_GAMMA,
  526. .type = V4L2_CTRL_TYPE_BOOLEAN,
  527. .name = "rgb gamma",
  528. .minimum = 0x00,
  529. .maximum = 0x01,
  530. .step = 0x01,
  531. .default_value = 0x00,
  532. .flags = 0,
  533. },
  534. },
  535. .get_ctrl = &ov7630_get_ctrl,
  536. .set_ctrl = &ov7630_set_ctrl,
  537. .cropcap = {
  538. .bounds = {
  539. .left = 0,
  540. .top = 0,
  541. .width = 640,
  542. .height = 480,
  543. },
  544. .defrect = {
  545. .left = 0,
  546. .top = 0,
  547. .width = 640,
  548. .height = 480,
  549. },
  550. },
  551. .set_crop = &ov7630_set_crop,
  552. .pix_format = {
  553. .width = 640,
  554. .height = 480,
  555. .pixelformat = V4L2_PIX_FMT_SN9C10X,
  556. .priv = 8,
  557. },
  558. .set_pix_format = &ov7630_set_pix_format
  559. };
  560. int sn9c102_probe_ov7630(struct sn9c102_device* cam)
  561. {
  562. int pid, ver, err = 0;
  563. switch (sn9c102_get_bridge(cam)) {
  564. case BRIDGE_SN9C101:
  565. case BRIDGE_SN9C102:
  566. err = sn9c102_write_const_regs(cam, {0x01, 0x01}, {0x00, 0x01},
  567. {0x28, 0x17});
  568. break;
  569. case BRIDGE_SN9C103: /* do _not_ change anything! */
  570. err = sn9c102_write_const_regs(cam, {0x09, 0x01}, {0x42, 0x01},
  571. {0x28, 0x17}, {0x44, 0x02});
  572. pid = sn9c102_i2c_try_read(cam, &ov7630, 0x0a);
  573. if (err || pid < 0) /* try a different initialization */
  574. err += sn9c102_write_const_regs(cam, {0x01, 0x01},
  575. {0x00, 0x01});
  576. break;
  577. case BRIDGE_SN9C105:
  578. case BRIDGE_SN9C120:
  579. err = sn9c102_write_const_regs(cam, {0x01, 0xf1}, {0x00, 0xf1},
  580. {0x29, 0x01}, {0x74, 0x02},
  581. {0x0e, 0x01}, {0x44, 0x01});
  582. break;
  583. default:
  584. break;
  585. }
  586. pid = sn9c102_i2c_try_read(cam, &ov7630, 0x0a);
  587. ver = sn9c102_i2c_try_read(cam, &ov7630, 0x0b);
  588. if (err || pid < 0 || ver < 0)
  589. return -EIO;
  590. if (pid != 0x76 || ver != 0x31)
  591. return -ENODEV;
  592. sn9c102_attach_sensor(cam, &ov7630);
  593. return 0;
  594. }