mcam-core.c 47 KB

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  1. /*
  2. * The Marvell camera core. This device appears in a number of settings,
  3. * so it needs platform-specific support outside of the core.
  4. *
  5. * Copyright 2011 Jonathan Corbet corbet@lwn.net
  6. */
  7. #include <linux/kernel.h>
  8. #include <linux/module.h>
  9. #include <linux/fs.h>
  10. #include <linux/mm.h>
  11. #include <linux/i2c.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/slab.h>
  15. #include <linux/device.h>
  16. #include <linux/wait.h>
  17. #include <linux/list.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/delay.h>
  20. #include <linux/vmalloc.h>
  21. #include <linux/io.h>
  22. #include <linux/videodev2.h>
  23. #include <media/v4l2-device.h>
  24. #include <media/v4l2-ioctl.h>
  25. #include <media/v4l2-chip-ident.h>
  26. #include <media/ov7670.h>
  27. #include <media/videobuf2-vmalloc.h>
  28. #include <media/videobuf2-dma-contig.h>
  29. #include <media/videobuf2-dma-sg.h>
  30. #include "mcam-core.h"
  31. /*
  32. * Basic frame stats - to be deleted shortly
  33. */
  34. static int frames;
  35. static int singles;
  36. static int delivered;
  37. #ifdef MCAM_MODE_VMALLOC
  38. /*
  39. * Internal DMA buffer management. Since the controller cannot do S/G I/O,
  40. * we must have physically contiguous buffers to bring frames into.
  41. * These parameters control how many buffers we use, whether we
  42. * allocate them at load time (better chance of success, but nails down
  43. * memory) or when somebody tries to use the camera (riskier), and,
  44. * for load-time allocation, how big they should be.
  45. *
  46. * The controller can cycle through three buffers. We could use
  47. * more by flipping pointers around, but it probably makes little
  48. * sense.
  49. */
  50. static bool alloc_bufs_at_read;
  51. module_param(alloc_bufs_at_read, bool, 0444);
  52. MODULE_PARM_DESC(alloc_bufs_at_read,
  53. "Non-zero value causes DMA buffers to be allocated when the "
  54. "video capture device is read, rather than at module load "
  55. "time. This saves memory, but decreases the chances of "
  56. "successfully getting those buffers. This parameter is "
  57. "only used in the vmalloc buffer mode");
  58. static int n_dma_bufs = 3;
  59. module_param(n_dma_bufs, uint, 0644);
  60. MODULE_PARM_DESC(n_dma_bufs,
  61. "The number of DMA buffers to allocate. Can be either two "
  62. "(saves memory, makes timing tighter) or three.");
  63. static int dma_buf_size = VGA_WIDTH * VGA_HEIGHT * 2; /* Worst case */
  64. module_param(dma_buf_size, uint, 0444);
  65. MODULE_PARM_DESC(dma_buf_size,
  66. "The size of the allocated DMA buffers. If actual operating "
  67. "parameters require larger buffers, an attempt to reallocate "
  68. "will be made.");
  69. #else /* MCAM_MODE_VMALLOC */
  70. static const bool alloc_bufs_at_read = 0;
  71. static const int n_dma_bufs = 3; /* Used by S/G_PARM */
  72. #endif /* MCAM_MODE_VMALLOC */
  73. static bool flip;
  74. module_param(flip, bool, 0444);
  75. MODULE_PARM_DESC(flip,
  76. "If set, the sensor will be instructed to flip the image "
  77. "vertically.");
  78. static int buffer_mode = -1;
  79. module_param(buffer_mode, int, 0444);
  80. MODULE_PARM_DESC(buffer_mode,
  81. "Set the buffer mode to be used; default is to go with what "
  82. "the platform driver asks for. Set to 0 for vmalloc, 1 for "
  83. "DMA contiguous.");
  84. /*
  85. * Status flags. Always manipulated with bit operations.
  86. */
  87. #define CF_BUF0_VALID 0 /* Buffers valid - first three */
  88. #define CF_BUF1_VALID 1
  89. #define CF_BUF2_VALID 2
  90. #define CF_DMA_ACTIVE 3 /* A frame is incoming */
  91. #define CF_CONFIG_NEEDED 4 /* Must configure hardware */
  92. #define CF_SINGLE_BUFFER 5 /* Running with a single buffer */
  93. #define CF_SG_RESTART 6 /* SG restart needed */
  94. #define sensor_call(cam, o, f, args...) \
  95. v4l2_subdev_call(cam->sensor, o, f, ##args)
  96. static struct mcam_format_struct {
  97. __u8 *desc;
  98. __u32 pixelformat;
  99. int bpp; /* Bytes per pixel */
  100. enum v4l2_mbus_pixelcode mbus_code;
  101. } mcam_formats[] = {
  102. {
  103. .desc = "YUYV 4:2:2",
  104. .pixelformat = V4L2_PIX_FMT_YUYV,
  105. .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
  106. .bpp = 2,
  107. },
  108. {
  109. .desc = "RGB 444",
  110. .pixelformat = V4L2_PIX_FMT_RGB444,
  111. .mbus_code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE,
  112. .bpp = 2,
  113. },
  114. {
  115. .desc = "RGB 565",
  116. .pixelformat = V4L2_PIX_FMT_RGB565,
  117. .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE,
  118. .bpp = 2,
  119. },
  120. {
  121. .desc = "Raw RGB Bayer",
  122. .pixelformat = V4L2_PIX_FMT_SBGGR8,
  123. .mbus_code = V4L2_MBUS_FMT_SBGGR8_1X8,
  124. .bpp = 1
  125. },
  126. };
  127. #define N_MCAM_FMTS ARRAY_SIZE(mcam_formats)
  128. static struct mcam_format_struct *mcam_find_format(u32 pixelformat)
  129. {
  130. unsigned i;
  131. for (i = 0; i < N_MCAM_FMTS; i++)
  132. if (mcam_formats[i].pixelformat == pixelformat)
  133. return mcam_formats + i;
  134. /* Not found? Then return the first format. */
  135. return mcam_formats;
  136. }
  137. /*
  138. * The default format we use until somebody says otherwise.
  139. */
  140. static const struct v4l2_pix_format mcam_def_pix_format = {
  141. .width = VGA_WIDTH,
  142. .height = VGA_HEIGHT,
  143. .pixelformat = V4L2_PIX_FMT_YUYV,
  144. .field = V4L2_FIELD_NONE,
  145. .bytesperline = VGA_WIDTH*2,
  146. .sizeimage = VGA_WIDTH*VGA_HEIGHT*2,
  147. };
  148. static const enum v4l2_mbus_pixelcode mcam_def_mbus_code =
  149. V4L2_MBUS_FMT_YUYV8_2X8;
  150. /*
  151. * The two-word DMA descriptor format used by the Armada 610 and like. There
  152. * Is a three-word format as well (set C1_DESC_3WORD) where the third
  153. * word is a pointer to the next descriptor, but we don't use it. Two-word
  154. * descriptors have to be contiguous in memory.
  155. */
  156. struct mcam_dma_desc {
  157. u32 dma_addr;
  158. u32 segment_len;
  159. };
  160. /*
  161. * Our buffer type for working with videobuf2. Note that the vb2
  162. * developers have decreed that struct vb2_buffer must be at the
  163. * beginning of this structure.
  164. */
  165. struct mcam_vb_buffer {
  166. struct vb2_buffer vb_buf;
  167. struct list_head queue;
  168. struct mcam_dma_desc *dma_desc; /* Descriptor virtual address */
  169. dma_addr_t dma_desc_pa; /* Descriptor physical address */
  170. int dma_desc_nent; /* Number of mapped descriptors */
  171. };
  172. static inline struct mcam_vb_buffer *vb_to_mvb(struct vb2_buffer *vb)
  173. {
  174. return container_of(vb, struct mcam_vb_buffer, vb_buf);
  175. }
  176. /*
  177. * Hand a completed buffer back to user space.
  178. */
  179. static void mcam_buffer_done(struct mcam_camera *cam, int frame,
  180. struct vb2_buffer *vbuf)
  181. {
  182. vbuf->v4l2_buf.bytesused = cam->pix_format.sizeimage;
  183. vbuf->v4l2_buf.sequence = cam->buf_seq[frame];
  184. vb2_set_plane_payload(vbuf, 0, cam->pix_format.sizeimage);
  185. vb2_buffer_done(vbuf, VB2_BUF_STATE_DONE);
  186. }
  187. /*
  188. * Debugging and related.
  189. */
  190. #define cam_err(cam, fmt, arg...) \
  191. dev_err((cam)->dev, fmt, ##arg);
  192. #define cam_warn(cam, fmt, arg...) \
  193. dev_warn((cam)->dev, fmt, ##arg);
  194. #define cam_dbg(cam, fmt, arg...) \
  195. dev_dbg((cam)->dev, fmt, ##arg);
  196. /*
  197. * Flag manipulation helpers
  198. */
  199. static void mcam_reset_buffers(struct mcam_camera *cam)
  200. {
  201. int i;
  202. cam->next_buf = -1;
  203. for (i = 0; i < cam->nbufs; i++)
  204. clear_bit(i, &cam->flags);
  205. }
  206. static inline int mcam_needs_config(struct mcam_camera *cam)
  207. {
  208. return test_bit(CF_CONFIG_NEEDED, &cam->flags);
  209. }
  210. static void mcam_set_config_needed(struct mcam_camera *cam, int needed)
  211. {
  212. if (needed)
  213. set_bit(CF_CONFIG_NEEDED, &cam->flags);
  214. else
  215. clear_bit(CF_CONFIG_NEEDED, &cam->flags);
  216. }
  217. /* ------------------------------------------------------------------- */
  218. /*
  219. * Make the controller start grabbing images. Everything must
  220. * be set up before doing this.
  221. */
  222. static void mcam_ctlr_start(struct mcam_camera *cam)
  223. {
  224. /* set_bit performs a read, so no other barrier should be
  225. needed here */
  226. mcam_reg_set_bit(cam, REG_CTRL0, C0_ENABLE);
  227. }
  228. static void mcam_ctlr_stop(struct mcam_camera *cam)
  229. {
  230. mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
  231. }
  232. /* ------------------------------------------------------------------- */
  233. #ifdef MCAM_MODE_VMALLOC
  234. /*
  235. * Code specific to the vmalloc buffer mode.
  236. */
  237. /*
  238. * Allocate in-kernel DMA buffers for vmalloc mode.
  239. */
  240. static int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime)
  241. {
  242. int i;
  243. mcam_set_config_needed(cam, 1);
  244. if (loadtime)
  245. cam->dma_buf_size = dma_buf_size;
  246. else
  247. cam->dma_buf_size = cam->pix_format.sizeimage;
  248. if (n_dma_bufs > 3)
  249. n_dma_bufs = 3;
  250. cam->nbufs = 0;
  251. for (i = 0; i < n_dma_bufs; i++) {
  252. cam->dma_bufs[i] = dma_alloc_coherent(cam->dev,
  253. cam->dma_buf_size, cam->dma_handles + i,
  254. GFP_KERNEL);
  255. if (cam->dma_bufs[i] == NULL) {
  256. cam_warn(cam, "Failed to allocate DMA buffer\n");
  257. break;
  258. }
  259. (cam->nbufs)++;
  260. }
  261. switch (cam->nbufs) {
  262. case 1:
  263. dma_free_coherent(cam->dev, cam->dma_buf_size,
  264. cam->dma_bufs[0], cam->dma_handles[0]);
  265. cam->nbufs = 0;
  266. case 0:
  267. cam_err(cam, "Insufficient DMA buffers, cannot operate\n");
  268. return -ENOMEM;
  269. case 2:
  270. if (n_dma_bufs > 2)
  271. cam_warn(cam, "Will limp along with only 2 buffers\n");
  272. break;
  273. }
  274. return 0;
  275. }
  276. static void mcam_free_dma_bufs(struct mcam_camera *cam)
  277. {
  278. int i;
  279. for (i = 0; i < cam->nbufs; i++) {
  280. dma_free_coherent(cam->dev, cam->dma_buf_size,
  281. cam->dma_bufs[i], cam->dma_handles[i]);
  282. cam->dma_bufs[i] = NULL;
  283. }
  284. cam->nbufs = 0;
  285. }
  286. /*
  287. * Set up DMA buffers when operating in vmalloc mode
  288. */
  289. static void mcam_ctlr_dma_vmalloc(struct mcam_camera *cam)
  290. {
  291. /*
  292. * Store the first two Y buffers (we aren't supporting
  293. * planar formats for now, so no UV bufs). Then either
  294. * set the third if it exists, or tell the controller
  295. * to just use two.
  296. */
  297. mcam_reg_write(cam, REG_Y0BAR, cam->dma_handles[0]);
  298. mcam_reg_write(cam, REG_Y1BAR, cam->dma_handles[1]);
  299. if (cam->nbufs > 2) {
  300. mcam_reg_write(cam, REG_Y2BAR, cam->dma_handles[2]);
  301. mcam_reg_clear_bit(cam, REG_CTRL1, C1_TWOBUFS);
  302. } else
  303. mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS);
  304. if (cam->chip_id == V4L2_IDENT_CAFE)
  305. mcam_reg_write(cam, REG_UBAR, 0); /* 32 bits only */
  306. }
  307. /*
  308. * Copy data out to user space in the vmalloc case
  309. */
  310. static void mcam_frame_tasklet(unsigned long data)
  311. {
  312. struct mcam_camera *cam = (struct mcam_camera *) data;
  313. int i;
  314. unsigned long flags;
  315. struct mcam_vb_buffer *buf;
  316. spin_lock_irqsave(&cam->dev_lock, flags);
  317. for (i = 0; i < cam->nbufs; i++) {
  318. int bufno = cam->next_buf;
  319. if (cam->state != S_STREAMING || bufno < 0)
  320. break; /* I/O got stopped */
  321. if (++(cam->next_buf) >= cam->nbufs)
  322. cam->next_buf = 0;
  323. if (!test_bit(bufno, &cam->flags))
  324. continue;
  325. if (list_empty(&cam->buffers)) {
  326. singles++;
  327. break; /* Leave it valid, hope for better later */
  328. }
  329. delivered++;
  330. clear_bit(bufno, &cam->flags);
  331. buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer,
  332. queue);
  333. list_del_init(&buf->queue);
  334. /*
  335. * Drop the lock during the big copy. This *should* be safe...
  336. */
  337. spin_unlock_irqrestore(&cam->dev_lock, flags);
  338. memcpy(vb2_plane_vaddr(&buf->vb_buf, 0), cam->dma_bufs[bufno],
  339. cam->pix_format.sizeimage);
  340. mcam_buffer_done(cam, bufno, &buf->vb_buf);
  341. spin_lock_irqsave(&cam->dev_lock, flags);
  342. }
  343. spin_unlock_irqrestore(&cam->dev_lock, flags);
  344. }
  345. /*
  346. * Make sure our allocated buffers are up to the task.
  347. */
  348. static int mcam_check_dma_buffers(struct mcam_camera *cam)
  349. {
  350. if (cam->nbufs > 0 && cam->dma_buf_size < cam->pix_format.sizeimage)
  351. mcam_free_dma_bufs(cam);
  352. if (cam->nbufs == 0)
  353. return mcam_alloc_dma_bufs(cam, 0);
  354. return 0;
  355. }
  356. static void mcam_vmalloc_done(struct mcam_camera *cam, int frame)
  357. {
  358. tasklet_schedule(&cam->s_tasklet);
  359. }
  360. #else /* MCAM_MODE_VMALLOC */
  361. static inline int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime)
  362. {
  363. return 0;
  364. }
  365. static inline void mcam_free_dma_bufs(struct mcam_camera *cam)
  366. {
  367. return;
  368. }
  369. static inline int mcam_check_dma_buffers(struct mcam_camera *cam)
  370. {
  371. return 0;
  372. }
  373. #endif /* MCAM_MODE_VMALLOC */
  374. #ifdef MCAM_MODE_DMA_CONTIG
  375. /* ---------------------------------------------------------------------- */
  376. /*
  377. * DMA-contiguous code.
  378. */
  379. /*
  380. * Set up a contiguous buffer for the given frame. Here also is where
  381. * the underrun strategy is set: if there is no buffer available, reuse
  382. * the buffer from the other BAR and set the CF_SINGLE_BUFFER flag to
  383. * keep the interrupt handler from giving that buffer back to user
  384. * space. In this way, we always have a buffer to DMA to and don't
  385. * have to try to play games stopping and restarting the controller.
  386. */
  387. static void mcam_set_contig_buffer(struct mcam_camera *cam, int frame)
  388. {
  389. struct mcam_vb_buffer *buf;
  390. /*
  391. * If there are no available buffers, go into single mode
  392. */
  393. if (list_empty(&cam->buffers)) {
  394. buf = cam->vb_bufs[frame ^ 0x1];
  395. cam->vb_bufs[frame] = buf;
  396. mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
  397. vb2_dma_contig_plane_dma_addr(&buf->vb_buf, 0));
  398. set_bit(CF_SINGLE_BUFFER, &cam->flags);
  399. singles++;
  400. return;
  401. }
  402. /*
  403. * OK, we have a buffer we can use.
  404. */
  405. buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue);
  406. list_del_init(&buf->queue);
  407. mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
  408. vb2_dma_contig_plane_dma_addr(&buf->vb_buf, 0));
  409. cam->vb_bufs[frame] = buf;
  410. clear_bit(CF_SINGLE_BUFFER, &cam->flags);
  411. }
  412. /*
  413. * Initial B_DMA_contig setup.
  414. */
  415. static void mcam_ctlr_dma_contig(struct mcam_camera *cam)
  416. {
  417. mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS);
  418. cam->nbufs = 2;
  419. mcam_set_contig_buffer(cam, 0);
  420. mcam_set_contig_buffer(cam, 1);
  421. }
  422. /*
  423. * Frame completion handling.
  424. */
  425. static void mcam_dma_contig_done(struct mcam_camera *cam, int frame)
  426. {
  427. struct mcam_vb_buffer *buf = cam->vb_bufs[frame];
  428. if (!test_bit(CF_SINGLE_BUFFER, &cam->flags)) {
  429. delivered++;
  430. mcam_buffer_done(cam, frame, &buf->vb_buf);
  431. }
  432. mcam_set_contig_buffer(cam, frame);
  433. }
  434. #endif /* MCAM_MODE_DMA_CONTIG */
  435. #ifdef MCAM_MODE_DMA_SG
  436. /* ---------------------------------------------------------------------- */
  437. /*
  438. * Scatter/gather-specific code.
  439. */
  440. /*
  441. * Set up the next buffer for S/G I/O; caller should be sure that
  442. * the controller is stopped and a buffer is available.
  443. */
  444. static void mcam_sg_next_buffer(struct mcam_camera *cam)
  445. {
  446. struct mcam_vb_buffer *buf;
  447. buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue);
  448. list_del_init(&buf->queue);
  449. /*
  450. * Very Bad Not Good Things happen if you don't clear
  451. * C1_DESC_ENA before making any descriptor changes.
  452. */
  453. mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_ENA);
  454. mcam_reg_write(cam, REG_DMA_DESC_Y, buf->dma_desc_pa);
  455. mcam_reg_write(cam, REG_DESC_LEN_Y,
  456. buf->dma_desc_nent*sizeof(struct mcam_dma_desc));
  457. mcam_reg_write(cam, REG_DESC_LEN_U, 0);
  458. mcam_reg_write(cam, REG_DESC_LEN_V, 0);
  459. mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA);
  460. cam->vb_bufs[0] = buf;
  461. }
  462. /*
  463. * Initial B_DMA_sg setup
  464. */
  465. static void mcam_ctlr_dma_sg(struct mcam_camera *cam)
  466. {
  467. /*
  468. * The list-empty condition can hit us at resume time
  469. * if the buffer list was empty when the system was suspended.
  470. */
  471. if (list_empty(&cam->buffers)) {
  472. set_bit(CF_SG_RESTART, &cam->flags);
  473. return;
  474. }
  475. mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_3WORD);
  476. mcam_sg_next_buffer(cam);
  477. cam->nbufs = 3;
  478. }
  479. /*
  480. * Frame completion with S/G is trickier. We can't muck with
  481. * a descriptor chain on the fly, since the controller buffers it
  482. * internally. So we have to actually stop and restart; Marvell
  483. * says this is the way to do it.
  484. *
  485. * Of course, stopping is easier said than done; experience shows
  486. * that the controller can start a frame *after* C0_ENABLE has been
  487. * cleared. So when running in S/G mode, the controller is "stopped"
  488. * on receipt of the start-of-frame interrupt. That means we can
  489. * safely change the DMA descriptor array here and restart things
  490. * (assuming there's another buffer waiting to go).
  491. */
  492. static void mcam_dma_sg_done(struct mcam_camera *cam, int frame)
  493. {
  494. struct mcam_vb_buffer *buf = cam->vb_bufs[0];
  495. /*
  496. * If we're no longer supposed to be streaming, don't do anything.
  497. */
  498. if (cam->state != S_STREAMING)
  499. return;
  500. /*
  501. * If we have another buffer available, put it in and
  502. * restart the engine.
  503. */
  504. if (!list_empty(&cam->buffers)) {
  505. mcam_sg_next_buffer(cam);
  506. mcam_ctlr_start(cam);
  507. /*
  508. * Otherwise set CF_SG_RESTART and the controller will
  509. * be restarted once another buffer shows up.
  510. */
  511. } else {
  512. set_bit(CF_SG_RESTART, &cam->flags);
  513. singles++;
  514. cam->vb_bufs[0] = NULL;
  515. }
  516. /*
  517. * Now we can give the completed frame back to user space.
  518. */
  519. delivered++;
  520. mcam_buffer_done(cam, frame, &buf->vb_buf);
  521. }
  522. /*
  523. * Scatter/gather mode requires stopping the controller between
  524. * frames so we can put in a new DMA descriptor array. If no new
  525. * buffer exists at frame completion, the controller is left stopped;
  526. * this function is charged with gettig things going again.
  527. */
  528. static void mcam_sg_restart(struct mcam_camera *cam)
  529. {
  530. mcam_ctlr_dma_sg(cam);
  531. mcam_ctlr_start(cam);
  532. clear_bit(CF_SG_RESTART, &cam->flags);
  533. }
  534. #else /* MCAM_MODE_DMA_SG */
  535. static inline void mcam_sg_restart(struct mcam_camera *cam)
  536. {
  537. return;
  538. }
  539. #endif /* MCAM_MODE_DMA_SG */
  540. /* ---------------------------------------------------------------------- */
  541. /*
  542. * Buffer-mode-independent controller code.
  543. */
  544. /*
  545. * Image format setup
  546. */
  547. static void mcam_ctlr_image(struct mcam_camera *cam)
  548. {
  549. int imgsz;
  550. struct v4l2_pix_format *fmt = &cam->pix_format;
  551. imgsz = ((fmt->height << IMGSZ_V_SHIFT) & IMGSZ_V_MASK) |
  552. (fmt->bytesperline & IMGSZ_H_MASK);
  553. mcam_reg_write(cam, REG_IMGSIZE, imgsz);
  554. mcam_reg_write(cam, REG_IMGOFFSET, 0);
  555. /* YPITCH just drops the last two bits */
  556. mcam_reg_write_mask(cam, REG_IMGPITCH, fmt->bytesperline,
  557. IMGP_YP_MASK);
  558. /*
  559. * Tell the controller about the image format we are using.
  560. */
  561. switch (cam->pix_format.pixelformat) {
  562. case V4L2_PIX_FMT_YUYV:
  563. mcam_reg_write_mask(cam, REG_CTRL0,
  564. C0_DF_YUV|C0_YUV_PACKED|C0_YUVE_YUYV,
  565. C0_DF_MASK);
  566. break;
  567. case V4L2_PIX_FMT_RGB444:
  568. mcam_reg_write_mask(cam, REG_CTRL0,
  569. C0_DF_RGB|C0_RGBF_444|C0_RGB4_XRGB,
  570. C0_DF_MASK);
  571. /* Alpha value? */
  572. break;
  573. case V4L2_PIX_FMT_RGB565:
  574. mcam_reg_write_mask(cam, REG_CTRL0,
  575. C0_DF_RGB|C0_RGBF_565|C0_RGB5_BGGR,
  576. C0_DF_MASK);
  577. break;
  578. default:
  579. cam_err(cam, "Unknown format %x\n", cam->pix_format.pixelformat);
  580. break;
  581. }
  582. /*
  583. * Make sure it knows we want to use hsync/vsync.
  584. */
  585. mcam_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC,
  586. C0_SIFM_MASK);
  587. }
  588. /*
  589. * Configure the controller for operation; caller holds the
  590. * device mutex.
  591. */
  592. static int mcam_ctlr_configure(struct mcam_camera *cam)
  593. {
  594. unsigned long flags;
  595. spin_lock_irqsave(&cam->dev_lock, flags);
  596. clear_bit(CF_SG_RESTART, &cam->flags);
  597. cam->dma_setup(cam);
  598. mcam_ctlr_image(cam);
  599. mcam_set_config_needed(cam, 0);
  600. spin_unlock_irqrestore(&cam->dev_lock, flags);
  601. return 0;
  602. }
  603. static void mcam_ctlr_irq_enable(struct mcam_camera *cam)
  604. {
  605. /*
  606. * Clear any pending interrupts, since we do not
  607. * expect to have I/O active prior to enabling.
  608. */
  609. mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS);
  610. mcam_reg_set_bit(cam, REG_IRQMASK, FRAMEIRQS);
  611. }
  612. static void mcam_ctlr_irq_disable(struct mcam_camera *cam)
  613. {
  614. mcam_reg_clear_bit(cam, REG_IRQMASK, FRAMEIRQS);
  615. }
  616. static void mcam_ctlr_init(struct mcam_camera *cam)
  617. {
  618. unsigned long flags;
  619. spin_lock_irqsave(&cam->dev_lock, flags);
  620. /*
  621. * Make sure it's not powered down.
  622. */
  623. mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN);
  624. /*
  625. * Turn off the enable bit. It sure should be off anyway,
  626. * but it's good to be sure.
  627. */
  628. mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
  629. /*
  630. * Clock the sensor appropriately. Controller clock should
  631. * be 48MHz, sensor "typical" value is half that.
  632. */
  633. mcam_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK);
  634. spin_unlock_irqrestore(&cam->dev_lock, flags);
  635. }
  636. /*
  637. * Stop the controller, and don't return until we're really sure that no
  638. * further DMA is going on.
  639. */
  640. static void mcam_ctlr_stop_dma(struct mcam_camera *cam)
  641. {
  642. unsigned long flags;
  643. /*
  644. * Theory: stop the camera controller (whether it is operating
  645. * or not). Delay briefly just in case we race with the SOF
  646. * interrupt, then wait until no DMA is active.
  647. */
  648. spin_lock_irqsave(&cam->dev_lock, flags);
  649. clear_bit(CF_SG_RESTART, &cam->flags);
  650. mcam_ctlr_stop(cam);
  651. cam->state = S_IDLE;
  652. spin_unlock_irqrestore(&cam->dev_lock, flags);
  653. /*
  654. * This is a brutally long sleep, but experience shows that
  655. * it can take the controller a while to get the message that
  656. * it needs to stop grabbing frames. In particular, we can
  657. * sometimes (on mmp) get a frame at the end WITHOUT the
  658. * start-of-frame indication.
  659. */
  660. msleep(150);
  661. if (test_bit(CF_DMA_ACTIVE, &cam->flags))
  662. cam_err(cam, "Timeout waiting for DMA to end\n");
  663. /* This would be bad news - what now? */
  664. spin_lock_irqsave(&cam->dev_lock, flags);
  665. mcam_ctlr_irq_disable(cam);
  666. spin_unlock_irqrestore(&cam->dev_lock, flags);
  667. }
  668. /*
  669. * Power up and down.
  670. */
  671. static void mcam_ctlr_power_up(struct mcam_camera *cam)
  672. {
  673. unsigned long flags;
  674. spin_lock_irqsave(&cam->dev_lock, flags);
  675. cam->plat_power_up(cam);
  676. mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN);
  677. spin_unlock_irqrestore(&cam->dev_lock, flags);
  678. msleep(5); /* Just to be sure */
  679. }
  680. static void mcam_ctlr_power_down(struct mcam_camera *cam)
  681. {
  682. unsigned long flags;
  683. spin_lock_irqsave(&cam->dev_lock, flags);
  684. /*
  685. * School of hard knocks department: be sure we do any register
  686. * twiddling on the controller *before* calling the platform
  687. * power down routine.
  688. */
  689. mcam_reg_set_bit(cam, REG_CTRL1, C1_PWRDWN);
  690. cam->plat_power_down(cam);
  691. spin_unlock_irqrestore(&cam->dev_lock, flags);
  692. }
  693. /* -------------------------------------------------------------------- */
  694. /*
  695. * Communications with the sensor.
  696. */
  697. static int __mcam_cam_reset(struct mcam_camera *cam)
  698. {
  699. return sensor_call(cam, core, reset, 0);
  700. }
  701. /*
  702. * We have found the sensor on the i2c. Let's try to have a
  703. * conversation.
  704. */
  705. static int mcam_cam_init(struct mcam_camera *cam)
  706. {
  707. struct v4l2_dbg_chip_ident chip;
  708. int ret;
  709. mutex_lock(&cam->s_mutex);
  710. if (cam->state != S_NOTREADY)
  711. cam_warn(cam, "Cam init with device in funky state %d",
  712. cam->state);
  713. ret = __mcam_cam_reset(cam);
  714. if (ret)
  715. goto out;
  716. chip.ident = V4L2_IDENT_NONE;
  717. chip.match.type = V4L2_CHIP_MATCH_I2C_ADDR;
  718. chip.match.addr = cam->sensor_addr;
  719. ret = sensor_call(cam, core, g_chip_ident, &chip);
  720. if (ret)
  721. goto out;
  722. cam->sensor_type = chip.ident;
  723. if (cam->sensor_type != V4L2_IDENT_OV7670) {
  724. cam_err(cam, "Unsupported sensor type 0x%x", cam->sensor_type);
  725. ret = -EINVAL;
  726. goto out;
  727. }
  728. /* Get/set parameters? */
  729. ret = 0;
  730. cam->state = S_IDLE;
  731. out:
  732. mcam_ctlr_power_down(cam);
  733. mutex_unlock(&cam->s_mutex);
  734. return ret;
  735. }
  736. /*
  737. * Configure the sensor to match the parameters we have. Caller should
  738. * hold s_mutex
  739. */
  740. static int mcam_cam_set_flip(struct mcam_camera *cam)
  741. {
  742. struct v4l2_control ctrl;
  743. memset(&ctrl, 0, sizeof(ctrl));
  744. ctrl.id = V4L2_CID_VFLIP;
  745. ctrl.value = flip;
  746. return sensor_call(cam, core, s_ctrl, &ctrl);
  747. }
  748. static int mcam_cam_configure(struct mcam_camera *cam)
  749. {
  750. struct v4l2_mbus_framefmt mbus_fmt;
  751. int ret;
  752. v4l2_fill_mbus_format(&mbus_fmt, &cam->pix_format, cam->mbus_code);
  753. ret = sensor_call(cam, core, init, 0);
  754. if (ret == 0)
  755. ret = sensor_call(cam, video, s_mbus_fmt, &mbus_fmt);
  756. /*
  757. * OV7670 does weird things if flip is set *before* format...
  758. */
  759. ret += mcam_cam_set_flip(cam);
  760. return ret;
  761. }
  762. /*
  763. * Get everything ready, and start grabbing frames.
  764. */
  765. static int mcam_read_setup(struct mcam_camera *cam)
  766. {
  767. int ret;
  768. unsigned long flags;
  769. /*
  770. * Configuration. If we still don't have DMA buffers,
  771. * make one last, desperate attempt.
  772. */
  773. if (cam->buffer_mode == B_vmalloc && cam->nbufs == 0 &&
  774. mcam_alloc_dma_bufs(cam, 0))
  775. return -ENOMEM;
  776. if (mcam_needs_config(cam)) {
  777. mcam_cam_configure(cam);
  778. ret = mcam_ctlr_configure(cam);
  779. if (ret)
  780. return ret;
  781. }
  782. /*
  783. * Turn it loose.
  784. */
  785. spin_lock_irqsave(&cam->dev_lock, flags);
  786. clear_bit(CF_DMA_ACTIVE, &cam->flags);
  787. mcam_reset_buffers(cam);
  788. mcam_ctlr_irq_enable(cam);
  789. cam->state = S_STREAMING;
  790. if (!test_bit(CF_SG_RESTART, &cam->flags))
  791. mcam_ctlr_start(cam);
  792. spin_unlock_irqrestore(&cam->dev_lock, flags);
  793. return 0;
  794. }
  795. /* ----------------------------------------------------------------------- */
  796. /*
  797. * Videobuf2 interface code.
  798. */
  799. static int mcam_vb_queue_setup(struct vb2_queue *vq,
  800. const struct v4l2_format *fmt, unsigned int *nbufs,
  801. unsigned int *num_planes, unsigned int sizes[],
  802. void *alloc_ctxs[])
  803. {
  804. struct mcam_camera *cam = vb2_get_drv_priv(vq);
  805. int minbufs = (cam->buffer_mode == B_DMA_contig) ? 3 : 2;
  806. sizes[0] = cam->pix_format.sizeimage;
  807. *num_planes = 1; /* Someday we have to support planar formats... */
  808. if (*nbufs < minbufs)
  809. *nbufs = minbufs;
  810. if (cam->buffer_mode == B_DMA_contig)
  811. alloc_ctxs[0] = cam->vb_alloc_ctx;
  812. return 0;
  813. }
  814. static void mcam_vb_buf_queue(struct vb2_buffer *vb)
  815. {
  816. struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
  817. struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
  818. unsigned long flags;
  819. int start;
  820. spin_lock_irqsave(&cam->dev_lock, flags);
  821. start = (cam->state == S_BUFWAIT) && !list_empty(&cam->buffers);
  822. list_add(&mvb->queue, &cam->buffers);
  823. if (cam->state == S_STREAMING && test_bit(CF_SG_RESTART, &cam->flags))
  824. mcam_sg_restart(cam);
  825. spin_unlock_irqrestore(&cam->dev_lock, flags);
  826. if (start)
  827. mcam_read_setup(cam);
  828. }
  829. /*
  830. * vb2 uses these to release the mutex when waiting in dqbuf. I'm
  831. * not actually sure we need to do this (I'm not sure that vb2_dqbuf() needs
  832. * to be called with the mutex held), but better safe than sorry.
  833. */
  834. static void mcam_vb_wait_prepare(struct vb2_queue *vq)
  835. {
  836. struct mcam_camera *cam = vb2_get_drv_priv(vq);
  837. mutex_unlock(&cam->s_mutex);
  838. }
  839. static void mcam_vb_wait_finish(struct vb2_queue *vq)
  840. {
  841. struct mcam_camera *cam = vb2_get_drv_priv(vq);
  842. mutex_lock(&cam->s_mutex);
  843. }
  844. /*
  845. * These need to be called with the mutex held from vb2
  846. */
  847. static int mcam_vb_start_streaming(struct vb2_queue *vq, unsigned int count)
  848. {
  849. struct mcam_camera *cam = vb2_get_drv_priv(vq);
  850. if (cam->state != S_IDLE) {
  851. INIT_LIST_HEAD(&cam->buffers);
  852. return -EINVAL;
  853. }
  854. cam->sequence = 0;
  855. /*
  856. * Videobuf2 sneakily hoards all the buffers and won't
  857. * give them to us until *after* streaming starts. But
  858. * we can't actually start streaming until we have a
  859. * destination. So go into a wait state and hope they
  860. * give us buffers soon.
  861. */
  862. if (cam->buffer_mode != B_vmalloc && list_empty(&cam->buffers)) {
  863. cam->state = S_BUFWAIT;
  864. return 0;
  865. }
  866. return mcam_read_setup(cam);
  867. }
  868. static int mcam_vb_stop_streaming(struct vb2_queue *vq)
  869. {
  870. struct mcam_camera *cam = vb2_get_drv_priv(vq);
  871. unsigned long flags;
  872. if (cam->state == S_BUFWAIT) {
  873. /* They never gave us buffers */
  874. cam->state = S_IDLE;
  875. return 0;
  876. }
  877. if (cam->state != S_STREAMING)
  878. return -EINVAL;
  879. mcam_ctlr_stop_dma(cam);
  880. /*
  881. * VB2 reclaims the buffers, so we need to forget
  882. * about them.
  883. */
  884. spin_lock_irqsave(&cam->dev_lock, flags);
  885. INIT_LIST_HEAD(&cam->buffers);
  886. spin_unlock_irqrestore(&cam->dev_lock, flags);
  887. return 0;
  888. }
  889. static const struct vb2_ops mcam_vb2_ops = {
  890. .queue_setup = mcam_vb_queue_setup,
  891. .buf_queue = mcam_vb_buf_queue,
  892. .start_streaming = mcam_vb_start_streaming,
  893. .stop_streaming = mcam_vb_stop_streaming,
  894. .wait_prepare = mcam_vb_wait_prepare,
  895. .wait_finish = mcam_vb_wait_finish,
  896. };
  897. #ifdef MCAM_MODE_DMA_SG
  898. /*
  899. * Scatter/gather mode uses all of the above functions plus a
  900. * few extras to deal with DMA mapping.
  901. */
  902. static int mcam_vb_sg_buf_init(struct vb2_buffer *vb)
  903. {
  904. struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
  905. struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
  906. int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1;
  907. mvb->dma_desc = dma_alloc_coherent(cam->dev,
  908. ndesc * sizeof(struct mcam_dma_desc),
  909. &mvb->dma_desc_pa, GFP_KERNEL);
  910. if (mvb->dma_desc == NULL) {
  911. cam_err(cam, "Unable to get DMA descriptor array\n");
  912. return -ENOMEM;
  913. }
  914. return 0;
  915. }
  916. static int mcam_vb_sg_buf_prepare(struct vb2_buffer *vb)
  917. {
  918. struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
  919. struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
  920. struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0);
  921. struct mcam_dma_desc *desc = mvb->dma_desc;
  922. struct scatterlist *sg;
  923. int i;
  924. mvb->dma_desc_nent = dma_map_sg(cam->dev, sgd->sglist, sgd->num_pages,
  925. DMA_FROM_DEVICE);
  926. if (mvb->dma_desc_nent <= 0)
  927. return -EIO; /* Not sure what's right here */
  928. for_each_sg(sgd->sglist, sg, mvb->dma_desc_nent, i) {
  929. desc->dma_addr = sg_dma_address(sg);
  930. desc->segment_len = sg_dma_len(sg);
  931. desc++;
  932. }
  933. return 0;
  934. }
  935. static int mcam_vb_sg_buf_finish(struct vb2_buffer *vb)
  936. {
  937. struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
  938. struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0);
  939. dma_unmap_sg(cam->dev, sgd->sglist, sgd->num_pages, DMA_FROM_DEVICE);
  940. return 0;
  941. }
  942. static void mcam_vb_sg_buf_cleanup(struct vb2_buffer *vb)
  943. {
  944. struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
  945. struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
  946. int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1;
  947. dma_free_coherent(cam->dev, ndesc * sizeof(struct mcam_dma_desc),
  948. mvb->dma_desc, mvb->dma_desc_pa);
  949. }
  950. static const struct vb2_ops mcam_vb2_sg_ops = {
  951. .queue_setup = mcam_vb_queue_setup,
  952. .buf_init = mcam_vb_sg_buf_init,
  953. .buf_prepare = mcam_vb_sg_buf_prepare,
  954. .buf_queue = mcam_vb_buf_queue,
  955. .buf_finish = mcam_vb_sg_buf_finish,
  956. .buf_cleanup = mcam_vb_sg_buf_cleanup,
  957. .start_streaming = mcam_vb_start_streaming,
  958. .stop_streaming = mcam_vb_stop_streaming,
  959. .wait_prepare = mcam_vb_wait_prepare,
  960. .wait_finish = mcam_vb_wait_finish,
  961. };
  962. #endif /* MCAM_MODE_DMA_SG */
  963. static int mcam_setup_vb2(struct mcam_camera *cam)
  964. {
  965. struct vb2_queue *vq = &cam->vb_queue;
  966. memset(vq, 0, sizeof(*vq));
  967. vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  968. vq->drv_priv = cam;
  969. INIT_LIST_HEAD(&cam->buffers);
  970. switch (cam->buffer_mode) {
  971. case B_DMA_contig:
  972. #ifdef MCAM_MODE_DMA_CONTIG
  973. vq->ops = &mcam_vb2_ops;
  974. vq->mem_ops = &vb2_dma_contig_memops;
  975. cam->vb_alloc_ctx = vb2_dma_contig_init_ctx(cam->dev);
  976. vq->io_modes = VB2_MMAP | VB2_USERPTR;
  977. cam->dma_setup = mcam_ctlr_dma_contig;
  978. cam->frame_complete = mcam_dma_contig_done;
  979. #endif
  980. break;
  981. case B_DMA_sg:
  982. #ifdef MCAM_MODE_DMA_SG
  983. vq->ops = &mcam_vb2_sg_ops;
  984. vq->mem_ops = &vb2_dma_sg_memops;
  985. vq->io_modes = VB2_MMAP | VB2_USERPTR;
  986. cam->dma_setup = mcam_ctlr_dma_sg;
  987. cam->frame_complete = mcam_dma_sg_done;
  988. #endif
  989. break;
  990. case B_vmalloc:
  991. #ifdef MCAM_MODE_VMALLOC
  992. tasklet_init(&cam->s_tasklet, mcam_frame_tasklet,
  993. (unsigned long) cam);
  994. vq->ops = &mcam_vb2_ops;
  995. vq->mem_ops = &vb2_vmalloc_memops;
  996. vq->buf_struct_size = sizeof(struct mcam_vb_buffer);
  997. vq->io_modes = VB2_MMAP;
  998. cam->dma_setup = mcam_ctlr_dma_vmalloc;
  999. cam->frame_complete = mcam_vmalloc_done;
  1000. #endif
  1001. break;
  1002. }
  1003. return vb2_queue_init(vq);
  1004. }
  1005. static void mcam_cleanup_vb2(struct mcam_camera *cam)
  1006. {
  1007. vb2_queue_release(&cam->vb_queue);
  1008. #ifdef MCAM_MODE_DMA_CONTIG
  1009. if (cam->buffer_mode == B_DMA_contig)
  1010. vb2_dma_contig_cleanup_ctx(cam->vb_alloc_ctx);
  1011. #endif
  1012. }
  1013. /* ---------------------------------------------------------------------- */
  1014. /*
  1015. * The long list of V4L2 ioctl() operations.
  1016. */
  1017. static int mcam_vidioc_streamon(struct file *filp, void *priv,
  1018. enum v4l2_buf_type type)
  1019. {
  1020. struct mcam_camera *cam = filp->private_data;
  1021. int ret;
  1022. mutex_lock(&cam->s_mutex);
  1023. ret = vb2_streamon(&cam->vb_queue, type);
  1024. mutex_unlock(&cam->s_mutex);
  1025. return ret;
  1026. }
  1027. static int mcam_vidioc_streamoff(struct file *filp, void *priv,
  1028. enum v4l2_buf_type type)
  1029. {
  1030. struct mcam_camera *cam = filp->private_data;
  1031. int ret;
  1032. mutex_lock(&cam->s_mutex);
  1033. ret = vb2_streamoff(&cam->vb_queue, type);
  1034. mutex_unlock(&cam->s_mutex);
  1035. return ret;
  1036. }
  1037. static int mcam_vidioc_reqbufs(struct file *filp, void *priv,
  1038. struct v4l2_requestbuffers *req)
  1039. {
  1040. struct mcam_camera *cam = filp->private_data;
  1041. int ret;
  1042. mutex_lock(&cam->s_mutex);
  1043. ret = vb2_reqbufs(&cam->vb_queue, req);
  1044. mutex_unlock(&cam->s_mutex);
  1045. return ret;
  1046. }
  1047. static int mcam_vidioc_querybuf(struct file *filp, void *priv,
  1048. struct v4l2_buffer *buf)
  1049. {
  1050. struct mcam_camera *cam = filp->private_data;
  1051. int ret;
  1052. mutex_lock(&cam->s_mutex);
  1053. ret = vb2_querybuf(&cam->vb_queue, buf);
  1054. mutex_unlock(&cam->s_mutex);
  1055. return ret;
  1056. }
  1057. static int mcam_vidioc_qbuf(struct file *filp, void *priv,
  1058. struct v4l2_buffer *buf)
  1059. {
  1060. struct mcam_camera *cam = filp->private_data;
  1061. int ret;
  1062. mutex_lock(&cam->s_mutex);
  1063. ret = vb2_qbuf(&cam->vb_queue, buf);
  1064. mutex_unlock(&cam->s_mutex);
  1065. return ret;
  1066. }
  1067. static int mcam_vidioc_dqbuf(struct file *filp, void *priv,
  1068. struct v4l2_buffer *buf)
  1069. {
  1070. struct mcam_camera *cam = filp->private_data;
  1071. int ret;
  1072. mutex_lock(&cam->s_mutex);
  1073. ret = vb2_dqbuf(&cam->vb_queue, buf, filp->f_flags & O_NONBLOCK);
  1074. mutex_unlock(&cam->s_mutex);
  1075. return ret;
  1076. }
  1077. static int mcam_vidioc_queryctrl(struct file *filp, void *priv,
  1078. struct v4l2_queryctrl *qc)
  1079. {
  1080. struct mcam_camera *cam = priv;
  1081. int ret;
  1082. mutex_lock(&cam->s_mutex);
  1083. ret = sensor_call(cam, core, queryctrl, qc);
  1084. mutex_unlock(&cam->s_mutex);
  1085. return ret;
  1086. }
  1087. static int mcam_vidioc_g_ctrl(struct file *filp, void *priv,
  1088. struct v4l2_control *ctrl)
  1089. {
  1090. struct mcam_camera *cam = priv;
  1091. int ret;
  1092. mutex_lock(&cam->s_mutex);
  1093. ret = sensor_call(cam, core, g_ctrl, ctrl);
  1094. mutex_unlock(&cam->s_mutex);
  1095. return ret;
  1096. }
  1097. static int mcam_vidioc_s_ctrl(struct file *filp, void *priv,
  1098. struct v4l2_control *ctrl)
  1099. {
  1100. struct mcam_camera *cam = priv;
  1101. int ret;
  1102. mutex_lock(&cam->s_mutex);
  1103. ret = sensor_call(cam, core, s_ctrl, ctrl);
  1104. mutex_unlock(&cam->s_mutex);
  1105. return ret;
  1106. }
  1107. static int mcam_vidioc_querycap(struct file *file, void *priv,
  1108. struct v4l2_capability *cap)
  1109. {
  1110. strcpy(cap->driver, "marvell_ccic");
  1111. strcpy(cap->card, "marvell_ccic");
  1112. cap->version = 1;
  1113. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE |
  1114. V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
  1115. return 0;
  1116. }
  1117. static int mcam_vidioc_enum_fmt_vid_cap(struct file *filp,
  1118. void *priv, struct v4l2_fmtdesc *fmt)
  1119. {
  1120. if (fmt->index >= N_MCAM_FMTS)
  1121. return -EINVAL;
  1122. strlcpy(fmt->description, mcam_formats[fmt->index].desc,
  1123. sizeof(fmt->description));
  1124. fmt->pixelformat = mcam_formats[fmt->index].pixelformat;
  1125. return 0;
  1126. }
  1127. static int mcam_vidioc_try_fmt_vid_cap(struct file *filp, void *priv,
  1128. struct v4l2_format *fmt)
  1129. {
  1130. struct mcam_camera *cam = priv;
  1131. struct mcam_format_struct *f;
  1132. struct v4l2_pix_format *pix = &fmt->fmt.pix;
  1133. struct v4l2_mbus_framefmt mbus_fmt;
  1134. int ret;
  1135. f = mcam_find_format(pix->pixelformat);
  1136. pix->pixelformat = f->pixelformat;
  1137. v4l2_fill_mbus_format(&mbus_fmt, pix, f->mbus_code);
  1138. mutex_lock(&cam->s_mutex);
  1139. ret = sensor_call(cam, video, try_mbus_fmt, &mbus_fmt);
  1140. mutex_unlock(&cam->s_mutex);
  1141. v4l2_fill_pix_format(pix, &mbus_fmt);
  1142. pix->bytesperline = pix->width * f->bpp;
  1143. pix->sizeimage = pix->height * pix->bytesperline;
  1144. return ret;
  1145. }
  1146. static int mcam_vidioc_s_fmt_vid_cap(struct file *filp, void *priv,
  1147. struct v4l2_format *fmt)
  1148. {
  1149. struct mcam_camera *cam = priv;
  1150. struct mcam_format_struct *f;
  1151. int ret;
  1152. /*
  1153. * Can't do anything if the device is not idle
  1154. * Also can't if there are streaming buffers in place.
  1155. */
  1156. if (cam->state != S_IDLE || cam->vb_queue.num_buffers > 0)
  1157. return -EBUSY;
  1158. f = mcam_find_format(fmt->fmt.pix.pixelformat);
  1159. /*
  1160. * See if the formatting works in principle.
  1161. */
  1162. ret = mcam_vidioc_try_fmt_vid_cap(filp, priv, fmt);
  1163. if (ret)
  1164. return ret;
  1165. /*
  1166. * Now we start to change things for real, so let's do it
  1167. * under lock.
  1168. */
  1169. mutex_lock(&cam->s_mutex);
  1170. cam->pix_format = fmt->fmt.pix;
  1171. cam->mbus_code = f->mbus_code;
  1172. /*
  1173. * Make sure we have appropriate DMA buffers.
  1174. */
  1175. if (cam->buffer_mode == B_vmalloc) {
  1176. ret = mcam_check_dma_buffers(cam);
  1177. if (ret)
  1178. goto out;
  1179. }
  1180. mcam_set_config_needed(cam, 1);
  1181. ret = 0;
  1182. out:
  1183. mutex_unlock(&cam->s_mutex);
  1184. return ret;
  1185. }
  1186. /*
  1187. * Return our stored notion of how the camera is/should be configured.
  1188. * The V4l2 spec wants us to be smarter, and actually get this from
  1189. * the camera (and not mess with it at open time). Someday.
  1190. */
  1191. static int mcam_vidioc_g_fmt_vid_cap(struct file *filp, void *priv,
  1192. struct v4l2_format *f)
  1193. {
  1194. struct mcam_camera *cam = priv;
  1195. f->fmt.pix = cam->pix_format;
  1196. return 0;
  1197. }
  1198. /*
  1199. * We only have one input - the sensor - so minimize the nonsense here.
  1200. */
  1201. static int mcam_vidioc_enum_input(struct file *filp, void *priv,
  1202. struct v4l2_input *input)
  1203. {
  1204. if (input->index != 0)
  1205. return -EINVAL;
  1206. input->type = V4L2_INPUT_TYPE_CAMERA;
  1207. input->std = V4L2_STD_ALL; /* Not sure what should go here */
  1208. strcpy(input->name, "Camera");
  1209. return 0;
  1210. }
  1211. static int mcam_vidioc_g_input(struct file *filp, void *priv, unsigned int *i)
  1212. {
  1213. *i = 0;
  1214. return 0;
  1215. }
  1216. static int mcam_vidioc_s_input(struct file *filp, void *priv, unsigned int i)
  1217. {
  1218. if (i != 0)
  1219. return -EINVAL;
  1220. return 0;
  1221. }
  1222. /* from vivi.c */
  1223. static int mcam_vidioc_s_std(struct file *filp, void *priv, v4l2_std_id *a)
  1224. {
  1225. return 0;
  1226. }
  1227. /*
  1228. * G/S_PARM. Most of this is done by the sensor, but we are
  1229. * the level which controls the number of read buffers.
  1230. */
  1231. static int mcam_vidioc_g_parm(struct file *filp, void *priv,
  1232. struct v4l2_streamparm *parms)
  1233. {
  1234. struct mcam_camera *cam = priv;
  1235. int ret;
  1236. mutex_lock(&cam->s_mutex);
  1237. ret = sensor_call(cam, video, g_parm, parms);
  1238. mutex_unlock(&cam->s_mutex);
  1239. parms->parm.capture.readbuffers = n_dma_bufs;
  1240. return ret;
  1241. }
  1242. static int mcam_vidioc_s_parm(struct file *filp, void *priv,
  1243. struct v4l2_streamparm *parms)
  1244. {
  1245. struct mcam_camera *cam = priv;
  1246. int ret;
  1247. mutex_lock(&cam->s_mutex);
  1248. ret = sensor_call(cam, video, s_parm, parms);
  1249. mutex_unlock(&cam->s_mutex);
  1250. parms->parm.capture.readbuffers = n_dma_bufs;
  1251. return ret;
  1252. }
  1253. static int mcam_vidioc_g_chip_ident(struct file *file, void *priv,
  1254. struct v4l2_dbg_chip_ident *chip)
  1255. {
  1256. struct mcam_camera *cam = priv;
  1257. chip->ident = V4L2_IDENT_NONE;
  1258. chip->revision = 0;
  1259. if (v4l2_chip_match_host(&chip->match)) {
  1260. chip->ident = cam->chip_id;
  1261. return 0;
  1262. }
  1263. return sensor_call(cam, core, g_chip_ident, chip);
  1264. }
  1265. static int mcam_vidioc_enum_framesizes(struct file *filp, void *priv,
  1266. struct v4l2_frmsizeenum *sizes)
  1267. {
  1268. struct mcam_camera *cam = priv;
  1269. int ret;
  1270. mutex_lock(&cam->s_mutex);
  1271. ret = sensor_call(cam, video, enum_framesizes, sizes);
  1272. mutex_unlock(&cam->s_mutex);
  1273. return ret;
  1274. }
  1275. static int mcam_vidioc_enum_frameintervals(struct file *filp, void *priv,
  1276. struct v4l2_frmivalenum *interval)
  1277. {
  1278. struct mcam_camera *cam = priv;
  1279. int ret;
  1280. mutex_lock(&cam->s_mutex);
  1281. ret = sensor_call(cam, video, enum_frameintervals, interval);
  1282. mutex_unlock(&cam->s_mutex);
  1283. return ret;
  1284. }
  1285. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1286. static int mcam_vidioc_g_register(struct file *file, void *priv,
  1287. struct v4l2_dbg_register *reg)
  1288. {
  1289. struct mcam_camera *cam = priv;
  1290. if (v4l2_chip_match_host(&reg->match)) {
  1291. reg->val = mcam_reg_read(cam, reg->reg);
  1292. reg->size = 4;
  1293. return 0;
  1294. }
  1295. return sensor_call(cam, core, g_register, reg);
  1296. }
  1297. static int mcam_vidioc_s_register(struct file *file, void *priv,
  1298. struct v4l2_dbg_register *reg)
  1299. {
  1300. struct mcam_camera *cam = priv;
  1301. if (v4l2_chip_match_host(&reg->match)) {
  1302. mcam_reg_write(cam, reg->reg, reg->val);
  1303. return 0;
  1304. }
  1305. return sensor_call(cam, core, s_register, reg);
  1306. }
  1307. #endif
  1308. static const struct v4l2_ioctl_ops mcam_v4l_ioctl_ops = {
  1309. .vidioc_querycap = mcam_vidioc_querycap,
  1310. .vidioc_enum_fmt_vid_cap = mcam_vidioc_enum_fmt_vid_cap,
  1311. .vidioc_try_fmt_vid_cap = mcam_vidioc_try_fmt_vid_cap,
  1312. .vidioc_s_fmt_vid_cap = mcam_vidioc_s_fmt_vid_cap,
  1313. .vidioc_g_fmt_vid_cap = mcam_vidioc_g_fmt_vid_cap,
  1314. .vidioc_enum_input = mcam_vidioc_enum_input,
  1315. .vidioc_g_input = mcam_vidioc_g_input,
  1316. .vidioc_s_input = mcam_vidioc_s_input,
  1317. .vidioc_s_std = mcam_vidioc_s_std,
  1318. .vidioc_reqbufs = mcam_vidioc_reqbufs,
  1319. .vidioc_querybuf = mcam_vidioc_querybuf,
  1320. .vidioc_qbuf = mcam_vidioc_qbuf,
  1321. .vidioc_dqbuf = mcam_vidioc_dqbuf,
  1322. .vidioc_streamon = mcam_vidioc_streamon,
  1323. .vidioc_streamoff = mcam_vidioc_streamoff,
  1324. .vidioc_queryctrl = mcam_vidioc_queryctrl,
  1325. .vidioc_g_ctrl = mcam_vidioc_g_ctrl,
  1326. .vidioc_s_ctrl = mcam_vidioc_s_ctrl,
  1327. .vidioc_g_parm = mcam_vidioc_g_parm,
  1328. .vidioc_s_parm = mcam_vidioc_s_parm,
  1329. .vidioc_enum_framesizes = mcam_vidioc_enum_framesizes,
  1330. .vidioc_enum_frameintervals = mcam_vidioc_enum_frameintervals,
  1331. .vidioc_g_chip_ident = mcam_vidioc_g_chip_ident,
  1332. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1333. .vidioc_g_register = mcam_vidioc_g_register,
  1334. .vidioc_s_register = mcam_vidioc_s_register,
  1335. #endif
  1336. };
  1337. /* ---------------------------------------------------------------------- */
  1338. /*
  1339. * Our various file operations.
  1340. */
  1341. static int mcam_v4l_open(struct file *filp)
  1342. {
  1343. struct mcam_camera *cam = video_drvdata(filp);
  1344. int ret = 0;
  1345. filp->private_data = cam;
  1346. frames = singles = delivered = 0;
  1347. mutex_lock(&cam->s_mutex);
  1348. if (cam->users == 0) {
  1349. ret = mcam_setup_vb2(cam);
  1350. if (ret)
  1351. goto out;
  1352. mcam_ctlr_power_up(cam);
  1353. __mcam_cam_reset(cam);
  1354. mcam_set_config_needed(cam, 1);
  1355. }
  1356. (cam->users)++;
  1357. out:
  1358. mutex_unlock(&cam->s_mutex);
  1359. return ret;
  1360. }
  1361. static int mcam_v4l_release(struct file *filp)
  1362. {
  1363. struct mcam_camera *cam = filp->private_data;
  1364. cam_dbg(cam, "Release, %d frames, %d singles, %d delivered\n", frames,
  1365. singles, delivered);
  1366. mutex_lock(&cam->s_mutex);
  1367. (cam->users)--;
  1368. if (cam->users == 0) {
  1369. mcam_ctlr_stop_dma(cam);
  1370. mcam_cleanup_vb2(cam);
  1371. mcam_ctlr_power_down(cam);
  1372. if (cam->buffer_mode == B_vmalloc && alloc_bufs_at_read)
  1373. mcam_free_dma_bufs(cam);
  1374. }
  1375. mutex_unlock(&cam->s_mutex);
  1376. return 0;
  1377. }
  1378. static ssize_t mcam_v4l_read(struct file *filp,
  1379. char __user *buffer, size_t len, loff_t *pos)
  1380. {
  1381. struct mcam_camera *cam = filp->private_data;
  1382. int ret;
  1383. mutex_lock(&cam->s_mutex);
  1384. ret = vb2_read(&cam->vb_queue, buffer, len, pos,
  1385. filp->f_flags & O_NONBLOCK);
  1386. mutex_unlock(&cam->s_mutex);
  1387. return ret;
  1388. }
  1389. static unsigned int mcam_v4l_poll(struct file *filp,
  1390. struct poll_table_struct *pt)
  1391. {
  1392. struct mcam_camera *cam = filp->private_data;
  1393. int ret;
  1394. mutex_lock(&cam->s_mutex);
  1395. ret = vb2_poll(&cam->vb_queue, filp, pt);
  1396. mutex_unlock(&cam->s_mutex);
  1397. return ret;
  1398. }
  1399. static int mcam_v4l_mmap(struct file *filp, struct vm_area_struct *vma)
  1400. {
  1401. struct mcam_camera *cam = filp->private_data;
  1402. int ret;
  1403. mutex_lock(&cam->s_mutex);
  1404. ret = vb2_mmap(&cam->vb_queue, vma);
  1405. mutex_unlock(&cam->s_mutex);
  1406. return ret;
  1407. }
  1408. static const struct v4l2_file_operations mcam_v4l_fops = {
  1409. .owner = THIS_MODULE,
  1410. .open = mcam_v4l_open,
  1411. .release = mcam_v4l_release,
  1412. .read = mcam_v4l_read,
  1413. .poll = mcam_v4l_poll,
  1414. .mmap = mcam_v4l_mmap,
  1415. .unlocked_ioctl = video_ioctl2,
  1416. };
  1417. /*
  1418. * This template device holds all of those v4l2 methods; we
  1419. * clone it for specific real devices.
  1420. */
  1421. static struct video_device mcam_v4l_template = {
  1422. .name = "mcam",
  1423. .tvnorms = V4L2_STD_NTSC_M,
  1424. .current_norm = V4L2_STD_NTSC_M, /* make mplayer happy */
  1425. .fops = &mcam_v4l_fops,
  1426. .ioctl_ops = &mcam_v4l_ioctl_ops,
  1427. .release = video_device_release_empty,
  1428. };
  1429. /* ---------------------------------------------------------------------- */
  1430. /*
  1431. * Interrupt handler stuff
  1432. */
  1433. static void mcam_frame_complete(struct mcam_camera *cam, int frame)
  1434. {
  1435. /*
  1436. * Basic frame housekeeping.
  1437. */
  1438. set_bit(frame, &cam->flags);
  1439. clear_bit(CF_DMA_ACTIVE, &cam->flags);
  1440. cam->next_buf = frame;
  1441. cam->buf_seq[frame] = ++(cam->sequence);
  1442. frames++;
  1443. /*
  1444. * "This should never happen"
  1445. */
  1446. if (cam->state != S_STREAMING)
  1447. return;
  1448. /*
  1449. * Process the frame and set up the next one.
  1450. */
  1451. cam->frame_complete(cam, frame);
  1452. }
  1453. /*
  1454. * The interrupt handler; this needs to be called from the
  1455. * platform irq handler with the lock held.
  1456. */
  1457. int mccic_irq(struct mcam_camera *cam, unsigned int irqs)
  1458. {
  1459. unsigned int frame, handled = 0;
  1460. mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); /* Clear'em all */
  1461. /*
  1462. * Handle any frame completions. There really should
  1463. * not be more than one of these, or we have fallen
  1464. * far behind.
  1465. *
  1466. * When running in S/G mode, the frame number lacks any
  1467. * real meaning - there's only one descriptor array - but
  1468. * the controller still picks a different one to signal
  1469. * each time.
  1470. */
  1471. for (frame = 0; frame < cam->nbufs; frame++)
  1472. if (irqs & (IRQ_EOF0 << frame)) {
  1473. mcam_frame_complete(cam, frame);
  1474. handled = 1;
  1475. if (cam->buffer_mode == B_DMA_sg)
  1476. break;
  1477. }
  1478. /*
  1479. * If a frame starts, note that we have DMA active. This
  1480. * code assumes that we won't get multiple frame interrupts
  1481. * at once; may want to rethink that.
  1482. */
  1483. if (irqs & (IRQ_SOF0 | IRQ_SOF1 | IRQ_SOF2)) {
  1484. set_bit(CF_DMA_ACTIVE, &cam->flags);
  1485. handled = 1;
  1486. if (cam->buffer_mode == B_DMA_sg)
  1487. mcam_ctlr_stop(cam);
  1488. }
  1489. return handled;
  1490. }
  1491. /* ---------------------------------------------------------------------- */
  1492. /*
  1493. * Registration and such.
  1494. */
  1495. static struct ov7670_config sensor_cfg = {
  1496. /*
  1497. * Exclude QCIF mode, because it only captures a tiny portion
  1498. * of the sensor FOV
  1499. */
  1500. .min_width = 320,
  1501. .min_height = 240,
  1502. };
  1503. int mccic_register(struct mcam_camera *cam)
  1504. {
  1505. struct i2c_board_info ov7670_info = {
  1506. .type = "ov7670",
  1507. .addr = 0x42 >> 1,
  1508. .platform_data = &sensor_cfg,
  1509. };
  1510. int ret;
  1511. /*
  1512. * Validate the requested buffer mode.
  1513. */
  1514. if (buffer_mode >= 0)
  1515. cam->buffer_mode = buffer_mode;
  1516. if (cam->buffer_mode == B_DMA_sg &&
  1517. cam->chip_id == V4L2_IDENT_CAFE) {
  1518. printk(KERN_ERR "marvell-cam: Cafe can't do S/G I/O, "
  1519. "attempting vmalloc mode instead\n");
  1520. cam->buffer_mode = B_vmalloc;
  1521. }
  1522. if (!mcam_buffer_mode_supported(cam->buffer_mode)) {
  1523. printk(KERN_ERR "marvell-cam: buffer mode %d unsupported\n",
  1524. cam->buffer_mode);
  1525. return -EINVAL;
  1526. }
  1527. /*
  1528. * Register with V4L
  1529. */
  1530. ret = v4l2_device_register(cam->dev, &cam->v4l2_dev);
  1531. if (ret)
  1532. return ret;
  1533. mutex_init(&cam->s_mutex);
  1534. cam->state = S_NOTREADY;
  1535. mcam_set_config_needed(cam, 1);
  1536. cam->pix_format = mcam_def_pix_format;
  1537. cam->mbus_code = mcam_def_mbus_code;
  1538. INIT_LIST_HEAD(&cam->buffers);
  1539. mcam_ctlr_init(cam);
  1540. /*
  1541. * Try to find the sensor.
  1542. */
  1543. sensor_cfg.clock_speed = cam->clock_speed;
  1544. sensor_cfg.use_smbus = cam->use_smbus;
  1545. cam->sensor_addr = ov7670_info.addr;
  1546. cam->sensor = v4l2_i2c_new_subdev_board(&cam->v4l2_dev,
  1547. cam->i2c_adapter, &ov7670_info, NULL);
  1548. if (cam->sensor == NULL) {
  1549. ret = -ENODEV;
  1550. goto out_unregister;
  1551. }
  1552. ret = mcam_cam_init(cam);
  1553. if (ret)
  1554. goto out_unregister;
  1555. /*
  1556. * Get the v4l2 setup done.
  1557. */
  1558. mutex_lock(&cam->s_mutex);
  1559. cam->vdev = mcam_v4l_template;
  1560. cam->vdev.debug = 0;
  1561. cam->vdev.v4l2_dev = &cam->v4l2_dev;
  1562. ret = video_register_device(&cam->vdev, VFL_TYPE_GRABBER, -1);
  1563. if (ret)
  1564. goto out;
  1565. video_set_drvdata(&cam->vdev, cam);
  1566. /*
  1567. * If so requested, try to get our DMA buffers now.
  1568. */
  1569. if (cam->buffer_mode == B_vmalloc && !alloc_bufs_at_read) {
  1570. if (mcam_alloc_dma_bufs(cam, 1))
  1571. cam_warn(cam, "Unable to alloc DMA buffers at load"
  1572. " will try again later.");
  1573. }
  1574. out:
  1575. mutex_unlock(&cam->s_mutex);
  1576. return ret;
  1577. out_unregister:
  1578. v4l2_device_unregister(&cam->v4l2_dev);
  1579. return ret;
  1580. }
  1581. void mccic_shutdown(struct mcam_camera *cam)
  1582. {
  1583. /*
  1584. * If we have no users (and we really, really should have no
  1585. * users) the device will already be powered down. Trying to
  1586. * take it down again will wedge the machine, which is frowned
  1587. * upon.
  1588. */
  1589. if (cam->users > 0) {
  1590. cam_warn(cam, "Removing a device with users!\n");
  1591. mcam_ctlr_power_down(cam);
  1592. }
  1593. vb2_queue_release(&cam->vb_queue);
  1594. if (cam->buffer_mode == B_vmalloc)
  1595. mcam_free_dma_bufs(cam);
  1596. video_unregister_device(&cam->vdev);
  1597. v4l2_device_unregister(&cam->v4l2_dev);
  1598. }
  1599. /*
  1600. * Power management
  1601. */
  1602. #ifdef CONFIG_PM
  1603. void mccic_suspend(struct mcam_camera *cam)
  1604. {
  1605. mutex_lock(&cam->s_mutex);
  1606. if (cam->users > 0) {
  1607. enum mcam_state cstate = cam->state;
  1608. mcam_ctlr_stop_dma(cam);
  1609. mcam_ctlr_power_down(cam);
  1610. cam->state = cstate;
  1611. }
  1612. mutex_unlock(&cam->s_mutex);
  1613. }
  1614. int mccic_resume(struct mcam_camera *cam)
  1615. {
  1616. int ret = 0;
  1617. mutex_lock(&cam->s_mutex);
  1618. if (cam->users > 0) {
  1619. mcam_ctlr_power_up(cam);
  1620. __mcam_cam_reset(cam);
  1621. } else {
  1622. mcam_ctlr_power_down(cam);
  1623. }
  1624. mutex_unlock(&cam->s_mutex);
  1625. set_bit(CF_CONFIG_NEEDED, &cam->flags);
  1626. if (cam->state == S_STREAMING) {
  1627. /*
  1628. * If there was a buffer in the DMA engine at suspend
  1629. * time, put it back on the queue or we'll forget about it.
  1630. */
  1631. if (cam->buffer_mode == B_DMA_sg && cam->vb_bufs[0])
  1632. list_add(&cam->vb_bufs[0]->queue, &cam->buffers);
  1633. ret = mcam_read_setup(cam);
  1634. }
  1635. return ret;
  1636. }
  1637. #endif /* CONFIG_PM */