setup.c 10 KB

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  1. /*
  2. * arch/xtensa/kernel/setup.c
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * Copyright (C) 1995 Linus Torvalds
  9. * Copyright (C) 2001 - 2005 Tensilica Inc.
  10. *
  11. * Chris Zankel <chris@zankel.net>
  12. * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
  13. * Kevin Chea
  14. * Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca>
  15. */
  16. #include <linux/errno.h>
  17. #include <linux/init.h>
  18. #include <linux/mm.h>
  19. #include <linux/proc_fs.h>
  20. #include <linux/screen_info.h>
  21. #include <linux/bootmem.h>
  22. #include <linux/kernel.h>
  23. #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
  24. # include <linux/console.h>
  25. #endif
  26. #ifdef CONFIG_RTC
  27. # include <linux/timex.h>
  28. #endif
  29. #ifdef CONFIG_PROC_FS
  30. # include <linux/seq_file.h>
  31. #endif
  32. #include <asm/bootparam.h>
  33. #include <asm/pgtable.h>
  34. #include <asm/processor.h>
  35. #include <asm/timex.h>
  36. #include <asm/platform.h>
  37. #include <asm/page.h>
  38. #include <asm/setup.h>
  39. #include <asm/param.h>
  40. #include <platform/hardware.h>
  41. #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
  42. struct screen_info screen_info = { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16};
  43. #endif
  44. #ifdef CONFIG_BLK_DEV_FD
  45. extern struct fd_ops no_fd_ops;
  46. struct fd_ops *fd_ops;
  47. #endif
  48. extern struct rtc_ops no_rtc_ops;
  49. struct rtc_ops *rtc_ops;
  50. #ifdef CONFIG_BLK_DEV_INITRD
  51. extern void *initrd_start;
  52. extern void *initrd_end;
  53. extern void *__initrd_start;
  54. extern void *__initrd_end;
  55. int initrd_is_mapped = 0;
  56. extern int initrd_below_start_ok;
  57. #endif
  58. unsigned char aux_device_present;
  59. extern unsigned long loops_per_jiffy;
  60. /* Command line specified as configuration option. */
  61. static char __initdata command_line[COMMAND_LINE_SIZE];
  62. #ifdef CONFIG_CMDLINE_BOOL
  63. static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
  64. #endif
  65. sysmem_info_t __initdata sysmem;
  66. #ifdef CONFIG_BLK_DEV_INITRD
  67. int initrd_is_mapped;
  68. #endif
  69. #ifdef CONFIG_MMU
  70. extern void init_mmu(void);
  71. #else
  72. static inline void init_mmu(void) { }
  73. #endif
  74. extern void zones_init(void);
  75. /*
  76. * Boot parameter parsing.
  77. *
  78. * The Xtensa port uses a list of variable-sized tags to pass data to
  79. * the kernel. The first tag must be a BP_TAG_FIRST tag for the list
  80. * to be recognised. The list is terminated with a zero-sized
  81. * BP_TAG_LAST tag.
  82. */
  83. typedef struct tagtable {
  84. u32 tag;
  85. int (*parse)(const bp_tag_t*);
  86. } tagtable_t;
  87. #define __tagtable(tag, fn) static tagtable_t __tagtable_##fn \
  88. __attribute__((unused, __section__(".taglist"))) = { tag, fn }
  89. /* parse current tag */
  90. static int __init parse_tag_mem(const bp_tag_t *tag)
  91. {
  92. meminfo_t *mi = (meminfo_t*)(tag->data);
  93. if (mi->type != MEMORY_TYPE_CONVENTIONAL)
  94. return -1;
  95. if (sysmem.nr_banks >= SYSMEM_BANKS_MAX) {
  96. printk(KERN_WARNING
  97. "Ignoring memory bank 0x%08lx size %ldKB\n",
  98. (unsigned long)mi->start,
  99. (unsigned long)mi->end - (unsigned long)mi->start);
  100. return -EINVAL;
  101. }
  102. sysmem.bank[sysmem.nr_banks].type = mi->type;
  103. sysmem.bank[sysmem.nr_banks].start = PAGE_ALIGN(mi->start);
  104. sysmem.bank[sysmem.nr_banks].end = mi->end & PAGE_SIZE;
  105. sysmem.nr_banks++;
  106. return 0;
  107. }
  108. __tagtable(BP_TAG_MEMORY, parse_tag_mem);
  109. #ifdef CONFIG_BLK_DEV_INITRD
  110. static int __init parse_tag_initrd(const bp_tag_t* tag)
  111. {
  112. meminfo_t* mi;
  113. mi = (meminfo_t*)(tag->data);
  114. initrd_start = (void*)(mi->start);
  115. initrd_end = (void*)(mi->end);
  116. return 0;
  117. }
  118. __tagtable(BP_TAG_INITRD, parse_tag_initrd);
  119. #endif /* CONFIG_BLK_DEV_INITRD */
  120. static int __init parse_tag_cmdline(const bp_tag_t* tag)
  121. {
  122. strncpy(command_line, (char*)(tag->data), COMMAND_LINE_SIZE);
  123. command_line[COMMAND_LINE_SIZE - 1] = '\0';
  124. return 0;
  125. }
  126. __tagtable(BP_TAG_COMMAND_LINE, parse_tag_cmdline);
  127. static int __init parse_bootparam(const bp_tag_t* tag)
  128. {
  129. extern tagtable_t __tagtable_begin, __tagtable_end;
  130. tagtable_t *t;
  131. /* Boot parameters must start with a BP_TAG_FIRST tag. */
  132. if (tag->id != BP_TAG_FIRST) {
  133. printk(KERN_WARNING "Invalid boot parameters!\n");
  134. return 0;
  135. }
  136. tag = (bp_tag_t*)((unsigned long)tag + sizeof(bp_tag_t) + tag->size);
  137. /* Parse all tags. */
  138. while (tag != NULL && tag->id != BP_TAG_LAST) {
  139. for (t = &__tagtable_begin; t < &__tagtable_end; t++) {
  140. if (tag->id == t->tag) {
  141. t->parse(tag);
  142. break;
  143. }
  144. }
  145. if (t == &__tagtable_end)
  146. printk(KERN_WARNING "Ignoring tag "
  147. "0x%08x\n", tag->id);
  148. tag = (bp_tag_t*)((unsigned long)(tag + 1) + tag->size);
  149. }
  150. return 0;
  151. }
  152. /*
  153. * Initialize architecture. (Early stage)
  154. */
  155. void __init init_arch(bp_tag_t *bp_start)
  156. {
  157. #ifdef CONFIG_BLK_DEV_INITRD
  158. initrd_start = &__initrd_start;
  159. initrd_end = &__initrd_end;
  160. #endif
  161. sysmem.nr_banks = 0;
  162. #ifdef CONFIG_CMDLINE_BOOL
  163. strcpy(command_line, default_command_line);
  164. #endif
  165. /* Parse boot parameters */
  166. if (bp_start)
  167. parse_bootparam(bp_start);
  168. if (sysmem.nr_banks == 0) {
  169. sysmem.nr_banks = 1;
  170. sysmem.bank[0].start = PLATFORM_DEFAULT_MEM_START;
  171. sysmem.bank[0].end = PLATFORM_DEFAULT_MEM_START
  172. + PLATFORM_DEFAULT_MEM_SIZE;
  173. }
  174. /* Early hook for platforms */
  175. platform_init(bp_start);
  176. /* Initialize MMU. */
  177. init_mmu();
  178. }
  179. /*
  180. * Initialize system. Setup memory and reserve regions.
  181. */
  182. extern char _end;
  183. extern char _stext;
  184. extern char _WindowVectors_text_start;
  185. extern char _WindowVectors_text_end;
  186. extern char _DebugInterruptVector_literal_start;
  187. extern char _DebugInterruptVector_text_end;
  188. extern char _KernelExceptionVector_literal_start;
  189. extern char _KernelExceptionVector_text_end;
  190. extern char _UserExceptionVector_literal_start;
  191. extern char _UserExceptionVector_text_end;
  192. extern char _DoubleExceptionVector_literal_start;
  193. extern char _DoubleExceptionVector_text_end;
  194. void __init setup_arch(char **cmdline_p)
  195. {
  196. extern int mem_reserve(unsigned long, unsigned long, int);
  197. extern void bootmem_init(void);
  198. memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
  199. boot_command_line[COMMAND_LINE_SIZE-1] = '\0';
  200. *cmdline_p = command_line;
  201. /* Reserve some memory regions */
  202. #ifdef CONFIG_BLK_DEV_INITRD
  203. if (initrd_start < initrd_end) {
  204. initrd_is_mapped = mem_reserve(__pa(initrd_start),
  205. __pa(initrd_end), 0);
  206. initrd_below_start_ok = 1;
  207. } else {
  208. initrd_start = 0;
  209. }
  210. #endif
  211. mem_reserve(__pa(&_stext),__pa(&_end), 1);
  212. mem_reserve(__pa(&_WindowVectors_text_start),
  213. __pa(&_WindowVectors_text_end), 0);
  214. mem_reserve(__pa(&_DebugInterruptVector_literal_start),
  215. __pa(&_DebugInterruptVector_text_end), 0);
  216. mem_reserve(__pa(&_KernelExceptionVector_literal_start),
  217. __pa(&_KernelExceptionVector_text_end), 0);
  218. mem_reserve(__pa(&_UserExceptionVector_literal_start),
  219. __pa(&_UserExceptionVector_text_end), 0);
  220. mem_reserve(__pa(&_DoubleExceptionVector_literal_start),
  221. __pa(&_DoubleExceptionVector_text_end), 0);
  222. bootmem_init();
  223. platform_setup(cmdline_p);
  224. paging_init();
  225. zones_init();
  226. #ifdef CONFIG_VT
  227. # if defined(CONFIG_VGA_CONSOLE)
  228. conswitchp = &vga_con;
  229. # elif defined(CONFIG_DUMMY_CONSOLE)
  230. conswitchp = &dummy_con;
  231. # endif
  232. #endif
  233. #ifdef CONFIG_PCI
  234. platform_pcibios_init();
  235. #endif
  236. }
  237. void machine_restart(char * cmd)
  238. {
  239. platform_restart();
  240. }
  241. void machine_halt(void)
  242. {
  243. platform_halt();
  244. while (1);
  245. }
  246. void machine_power_off(void)
  247. {
  248. platform_power_off();
  249. while (1);
  250. }
  251. #ifdef CONFIG_PROC_FS
  252. /*
  253. * Display some core information through /proc/cpuinfo.
  254. */
  255. static int
  256. c_show(struct seq_file *f, void *slot)
  257. {
  258. /* high-level stuff */
  259. seq_printf(f,"processor\t: 0\n"
  260. "vendor_id\t: Tensilica\n"
  261. "model\t\t: Xtensa " XCHAL_HW_VERSION_NAME "\n"
  262. "core ID\t\t: " XCHAL_CORE_ID "\n"
  263. "build ID\t: 0x%x\n"
  264. "byte order\t: %s\n"
  265. "cpu MHz\t\t: %lu.%02lu\n"
  266. "bogomips\t: %lu.%02lu\n",
  267. XCHAL_BUILD_UNIQUE_ID,
  268. XCHAL_HAVE_BE ? "big" : "little",
  269. CCOUNT_PER_JIFFY/(1000000/HZ),
  270. (CCOUNT_PER_JIFFY/(10000/HZ)) % 100,
  271. loops_per_jiffy/(500000/HZ),
  272. (loops_per_jiffy/(5000/HZ)) % 100);
  273. seq_printf(f,"flags\t\t: "
  274. #if XCHAL_HAVE_NMI
  275. "nmi "
  276. #endif
  277. #if XCHAL_HAVE_DEBUG
  278. "debug "
  279. # if XCHAL_HAVE_OCD
  280. "ocd "
  281. # endif
  282. #endif
  283. #if XCHAL_HAVE_DENSITY
  284. "density "
  285. #endif
  286. #if XCHAL_HAVE_BOOLEANS
  287. "boolean "
  288. #endif
  289. #if XCHAL_HAVE_LOOPS
  290. "loop "
  291. #endif
  292. #if XCHAL_HAVE_NSA
  293. "nsa "
  294. #endif
  295. #if XCHAL_HAVE_MINMAX
  296. "minmax "
  297. #endif
  298. #if XCHAL_HAVE_SEXT
  299. "sext "
  300. #endif
  301. #if XCHAL_HAVE_CLAMPS
  302. "clamps "
  303. #endif
  304. #if XCHAL_HAVE_MAC16
  305. "mac16 "
  306. #endif
  307. #if XCHAL_HAVE_MUL16
  308. "mul16 "
  309. #endif
  310. #if XCHAL_HAVE_MUL32
  311. "mul32 "
  312. #endif
  313. #if XCHAL_HAVE_MUL32_HIGH
  314. "mul32h "
  315. #endif
  316. #if XCHAL_HAVE_FP
  317. "fpu "
  318. #endif
  319. "\n");
  320. /* Registers. */
  321. seq_printf(f,"physical aregs\t: %d\n"
  322. "misc regs\t: %d\n"
  323. "ibreak\t\t: %d\n"
  324. "dbreak\t\t: %d\n",
  325. XCHAL_NUM_AREGS,
  326. XCHAL_NUM_MISC_REGS,
  327. XCHAL_NUM_IBREAK,
  328. XCHAL_NUM_DBREAK);
  329. /* Interrupt. */
  330. seq_printf(f,"num ints\t: %d\n"
  331. "ext ints\t: %d\n"
  332. "int levels\t: %d\n"
  333. "timers\t\t: %d\n"
  334. "debug level\t: %d\n",
  335. XCHAL_NUM_INTERRUPTS,
  336. XCHAL_NUM_EXTINTERRUPTS,
  337. XCHAL_NUM_INTLEVELS,
  338. XCHAL_NUM_TIMERS,
  339. XCHAL_DEBUGLEVEL);
  340. /* Cache */
  341. seq_printf(f,"icache line size: %d\n"
  342. "icache ways\t: %d\n"
  343. "icache size\t: %d\n"
  344. "icache flags\t: "
  345. #if XCHAL_ICACHE_LINE_LOCKABLE
  346. "lock"
  347. #endif
  348. "\n"
  349. "dcache line size: %d\n"
  350. "dcache ways\t: %d\n"
  351. "dcache size\t: %d\n"
  352. "dcache flags\t: "
  353. #if XCHAL_DCACHE_IS_WRITEBACK
  354. "writeback"
  355. #endif
  356. #if XCHAL_DCACHE_LINE_LOCKABLE
  357. "lock"
  358. #endif
  359. "\n",
  360. XCHAL_ICACHE_LINESIZE,
  361. XCHAL_ICACHE_WAYS,
  362. XCHAL_ICACHE_SIZE,
  363. XCHAL_DCACHE_LINESIZE,
  364. XCHAL_DCACHE_WAYS,
  365. XCHAL_DCACHE_SIZE);
  366. return 0;
  367. }
  368. /*
  369. * We show only CPU #0 info.
  370. */
  371. static void *
  372. c_start(struct seq_file *f, loff_t *pos)
  373. {
  374. return (void *) ((*pos == 0) ? (void *)1 : NULL);
  375. }
  376. static void *
  377. c_next(struct seq_file *f, void *v, loff_t *pos)
  378. {
  379. return NULL;
  380. }
  381. static void
  382. c_stop(struct seq_file *f, void *v)
  383. {
  384. }
  385. const struct seq_operations cpuinfo_op =
  386. {
  387. start: c_start,
  388. next: c_next,
  389. stop: c_stop,
  390. show: c_show
  391. };
  392. #endif /* CONFIG_PROC_FS */