irq_32.c 9.0 KB

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  1. /*
  2. * Interrupt request handling routines. On the
  3. * Sparc the IRQs are basically 'cast in stone'
  4. * and you are supposed to probe the prom's device
  5. * node trees to find out who's got which IRQ.
  6. *
  7. * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  8. * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
  9. * Copyright (C) 1995,2002 Pete A. Zaitcev (zaitcev@yahoo.com)
  10. * Copyright (C) 1996 Dave Redman (djhr@tadpole.co.uk)
  11. * Copyright (C) 1998-2000 Anton Blanchard (anton@samba.org)
  12. */
  13. #include <linux/kernel_stat.h>
  14. #include <linux/seq_file.h>
  15. #include <linux/export.h>
  16. #include <asm/cacheflush.h>
  17. #include <asm/cpudata.h>
  18. #include <asm/pcic.h>
  19. #include <asm/leon.h>
  20. #include "kernel.h"
  21. #include "irq.h"
  22. #ifdef CONFIG_SMP
  23. #define SMP_NOP2 "nop; nop;\n\t"
  24. #define SMP_NOP3 "nop; nop; nop;\n\t"
  25. #else
  26. #define SMP_NOP2
  27. #define SMP_NOP3
  28. #endif /* SMP */
  29. /* platform specific irq setup */
  30. struct sparc_irq_config sparc_irq_config;
  31. unsigned long arch_local_irq_save(void)
  32. {
  33. unsigned long retval;
  34. unsigned long tmp;
  35. __asm__ __volatile__(
  36. "rd %%psr, %0\n\t"
  37. SMP_NOP3 /* Sun4m + Cypress + SMP bug */
  38. "or %0, %2, %1\n\t"
  39. "wr %1, 0, %%psr\n\t"
  40. "nop; nop; nop\n"
  41. : "=&r" (retval), "=r" (tmp)
  42. : "i" (PSR_PIL)
  43. : "memory");
  44. return retval;
  45. }
  46. EXPORT_SYMBOL(arch_local_irq_save);
  47. void arch_local_irq_enable(void)
  48. {
  49. unsigned long tmp;
  50. __asm__ __volatile__(
  51. "rd %%psr, %0\n\t"
  52. SMP_NOP3 /* Sun4m + Cypress + SMP bug */
  53. "andn %0, %1, %0\n\t"
  54. "wr %0, 0, %%psr\n\t"
  55. "nop; nop; nop\n"
  56. : "=&r" (tmp)
  57. : "i" (PSR_PIL)
  58. : "memory");
  59. }
  60. EXPORT_SYMBOL(arch_local_irq_enable);
  61. void arch_local_irq_restore(unsigned long old_psr)
  62. {
  63. unsigned long tmp;
  64. __asm__ __volatile__(
  65. "rd %%psr, %0\n\t"
  66. "and %2, %1, %2\n\t"
  67. SMP_NOP2 /* Sun4m + Cypress + SMP bug */
  68. "andn %0, %1, %0\n\t"
  69. "wr %0, %2, %%psr\n\t"
  70. "nop; nop; nop\n"
  71. : "=&r" (tmp)
  72. : "i" (PSR_PIL), "r" (old_psr)
  73. : "memory");
  74. }
  75. EXPORT_SYMBOL(arch_local_irq_restore);
  76. /*
  77. * Dave Redman (djhr@tadpole.co.uk)
  78. *
  79. * IRQ numbers.. These are no longer restricted to 15..
  80. *
  81. * this is done to enable SBUS cards and onboard IO to be masked
  82. * correctly. using the interrupt level isn't good enough.
  83. *
  84. * For example:
  85. * A device interrupting at sbus level6 and the Floppy both come in
  86. * at IRQ11, but enabling and disabling them requires writing to
  87. * different bits in the SLAVIO/SEC.
  88. *
  89. * As a result of these changes sun4m machines could now support
  90. * directed CPU interrupts using the existing enable/disable irq code
  91. * with tweaks.
  92. *
  93. * Sun4d complicates things even further. IRQ numbers are arbitrary
  94. * 32-bit values in that case. Since this is similar to sparc64,
  95. * we adopt a virtual IRQ numbering scheme as is done there.
  96. * Virutal interrupt numbers are allocated by build_irq(). So NR_IRQS
  97. * just becomes a limit of how many interrupt sources we can handle in
  98. * a single system. Even fully loaded SS2000 machines top off at
  99. * about 32 interrupt sources or so, therefore a NR_IRQS value of 64
  100. * is more than enough.
  101. *
  102. * We keep a map of per-PIL enable interrupts. These get wired
  103. * up via the irq_chip->startup() method which gets invoked by
  104. * the generic IRQ layer during request_irq().
  105. */
  106. /* Table of allocated irqs. Unused entries has irq == 0 */
  107. static struct irq_bucket irq_table[NR_IRQS];
  108. /* Protect access to irq_table */
  109. static DEFINE_SPINLOCK(irq_table_lock);
  110. /* Map between the irq identifier used in hw to the irq_bucket. */
  111. struct irq_bucket *irq_map[SUN4D_MAX_IRQ];
  112. /* Protect access to irq_map */
  113. static DEFINE_SPINLOCK(irq_map_lock);
  114. /* Allocate a new irq from the irq_table */
  115. unsigned int irq_alloc(unsigned int real_irq, unsigned int pil)
  116. {
  117. unsigned long flags;
  118. unsigned int i;
  119. spin_lock_irqsave(&irq_table_lock, flags);
  120. for (i = 1; i < NR_IRQS; i++) {
  121. if (irq_table[i].real_irq == real_irq && irq_table[i].pil == pil)
  122. goto found;
  123. }
  124. for (i = 1; i < NR_IRQS; i++) {
  125. if (!irq_table[i].irq)
  126. break;
  127. }
  128. if (i < NR_IRQS) {
  129. irq_table[i].real_irq = real_irq;
  130. irq_table[i].irq = i;
  131. irq_table[i].pil = pil;
  132. } else {
  133. printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
  134. i = 0;
  135. }
  136. found:
  137. spin_unlock_irqrestore(&irq_table_lock, flags);
  138. return i;
  139. }
  140. /* Based on a single pil handler_irq may need to call several
  141. * interrupt handlers. Use irq_map as entry to irq_table,
  142. * and let each entry in irq_table point to the next entry.
  143. */
  144. void irq_link(unsigned int irq)
  145. {
  146. struct irq_bucket *p;
  147. unsigned long flags;
  148. unsigned int pil;
  149. BUG_ON(irq >= NR_IRQS);
  150. spin_lock_irqsave(&irq_map_lock, flags);
  151. p = &irq_table[irq];
  152. pil = p->pil;
  153. BUG_ON(pil > SUN4D_MAX_IRQ);
  154. p->next = irq_map[pil];
  155. irq_map[pil] = p;
  156. spin_unlock_irqrestore(&irq_map_lock, flags);
  157. }
  158. void irq_unlink(unsigned int irq)
  159. {
  160. struct irq_bucket *p, **pnext;
  161. unsigned long flags;
  162. BUG_ON(irq >= NR_IRQS);
  163. spin_lock_irqsave(&irq_map_lock, flags);
  164. p = &irq_table[irq];
  165. BUG_ON(p->pil > SUN4D_MAX_IRQ);
  166. pnext = &irq_map[p->pil];
  167. while (*pnext != p)
  168. pnext = &(*pnext)->next;
  169. *pnext = p->next;
  170. spin_unlock_irqrestore(&irq_map_lock, flags);
  171. }
  172. /* /proc/interrupts printing */
  173. int arch_show_interrupts(struct seq_file *p, int prec)
  174. {
  175. int j;
  176. #ifdef CONFIG_SMP
  177. seq_printf(p, "RES: ");
  178. for_each_online_cpu(j)
  179. seq_printf(p, "%10u ", cpu_data(j).irq_resched_count);
  180. seq_printf(p, " IPI rescheduling interrupts\n");
  181. seq_printf(p, "CAL: ");
  182. for_each_online_cpu(j)
  183. seq_printf(p, "%10u ", cpu_data(j).irq_call_count);
  184. seq_printf(p, " IPI function call interrupts\n");
  185. #endif
  186. seq_printf(p, "NMI: ");
  187. for_each_online_cpu(j)
  188. seq_printf(p, "%10u ", cpu_data(j).counter);
  189. seq_printf(p, " Non-maskable interrupts\n");
  190. return 0;
  191. }
  192. void handler_irq(unsigned int pil, struct pt_regs *regs)
  193. {
  194. struct pt_regs *old_regs;
  195. struct irq_bucket *p;
  196. BUG_ON(pil > 15);
  197. old_regs = set_irq_regs(regs);
  198. irq_enter();
  199. p = irq_map[pil];
  200. while (p) {
  201. struct irq_bucket *next = p->next;
  202. generic_handle_irq(p->irq);
  203. p = next;
  204. }
  205. irq_exit();
  206. set_irq_regs(old_regs);
  207. }
  208. #if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
  209. static unsigned int floppy_irq;
  210. int sparc_floppy_request_irq(unsigned int irq, irq_handler_t irq_handler)
  211. {
  212. unsigned int cpu_irq;
  213. int err;
  214. #if defined CONFIG_SMP && !defined CONFIG_SPARC_LEON
  215. struct tt_entry *trap_table;
  216. #endif
  217. err = request_irq(irq, irq_handler, 0, "floppy", NULL);
  218. if (err)
  219. return -1;
  220. /* Save for later use in floppy interrupt handler */
  221. floppy_irq = irq;
  222. cpu_irq = (irq & (NR_IRQS - 1));
  223. /* Dork with trap table if we get this far. */
  224. #define INSTANTIATE(table) \
  225. table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_one = SPARC_RD_PSR_L0; \
  226. table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_two = \
  227. SPARC_BRANCH((unsigned long) floppy_hardint, \
  228. (unsigned long) &table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_two);\
  229. table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_three = SPARC_RD_WIM_L3; \
  230. table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_four = SPARC_NOP;
  231. INSTANTIATE(sparc_ttable)
  232. #if defined CONFIG_SMP && !defined CONFIG_SPARC_LEON
  233. trap_table = &trapbase_cpu1;
  234. INSTANTIATE(trap_table)
  235. trap_table = &trapbase_cpu2;
  236. INSTANTIATE(trap_table)
  237. trap_table = &trapbase_cpu3;
  238. INSTANTIATE(trap_table)
  239. #endif
  240. #undef INSTANTIATE
  241. /*
  242. * XXX Correct thing whould be to flush only I- and D-cache lines
  243. * which contain the handler in question. But as of time of the
  244. * writing we have no CPU-neutral interface to fine-grained flushes.
  245. */
  246. flush_cache_all();
  247. return 0;
  248. }
  249. EXPORT_SYMBOL(sparc_floppy_request_irq);
  250. /*
  251. * These variables are used to access state from the assembler
  252. * interrupt handler, floppy_hardint, so we cannot put these in
  253. * the floppy driver image because that would not work in the
  254. * modular case.
  255. */
  256. volatile unsigned char *fdc_status;
  257. EXPORT_SYMBOL(fdc_status);
  258. char *pdma_vaddr;
  259. EXPORT_SYMBOL(pdma_vaddr);
  260. unsigned long pdma_size;
  261. EXPORT_SYMBOL(pdma_size);
  262. volatile int doing_pdma;
  263. EXPORT_SYMBOL(doing_pdma);
  264. char *pdma_base;
  265. EXPORT_SYMBOL(pdma_base);
  266. unsigned long pdma_areasize;
  267. EXPORT_SYMBOL(pdma_areasize);
  268. /* Use the generic irq support to call floppy_interrupt
  269. * which was setup using request_irq() in sparc_floppy_request_irq().
  270. * We only have one floppy interrupt so we do not need to check
  271. * for additional handlers being wired up by irq_link()
  272. */
  273. void sparc_floppy_irq(int irq, void *dev_id, struct pt_regs *regs)
  274. {
  275. struct pt_regs *old_regs;
  276. old_regs = set_irq_regs(regs);
  277. irq_enter();
  278. generic_handle_irq(floppy_irq);
  279. irq_exit();
  280. set_irq_regs(old_regs);
  281. }
  282. #endif
  283. /* djhr
  284. * This could probably be made indirect too and assigned in the CPU
  285. * bits of the code. That would be much nicer I think and would also
  286. * fit in with the idea of being able to tune your kernel for your machine
  287. * by removing unrequired machine and device support.
  288. *
  289. */
  290. void __init init_IRQ(void)
  291. {
  292. switch (sparc_cpu_model) {
  293. case sun4c:
  294. case sun4:
  295. sun4c_init_IRQ();
  296. break;
  297. case sun4m:
  298. pcic_probe();
  299. if (pcic_present())
  300. sun4m_pci_init_IRQ();
  301. else
  302. sun4m_init_IRQ();
  303. break;
  304. case sun4d:
  305. sun4d_init_IRQ();
  306. break;
  307. case sparc_leon:
  308. leon_init_IRQ();
  309. break;
  310. default:
  311. prom_printf("Cannot initialize IRQs on this Sun machine...");
  312. break;
  313. }
  314. btfixup();
  315. }