beat_htab.c 12 KB

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  1. /*
  2. * "Cell Reference Set" HTAB support.
  3. *
  4. * (C) Copyright 2006-2007 TOSHIBA CORPORATION
  5. *
  6. * This code is based on arch/powerpc/platforms/pseries/lpar.c:
  7. * Copyright (C) 2001 Todd Inglett, IBM Corporation
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License along
  20. * with this program; if not, write to the Free Software Foundation, Inc.,
  21. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  22. */
  23. #undef DEBUG_LOW
  24. #include <linux/kernel.h>
  25. #include <linux/spinlock.h>
  26. #include <asm/mmu.h>
  27. #include <asm/page.h>
  28. #include <asm/pgtable.h>
  29. #include <asm/machdep.h>
  30. #include <asm/udbg.h>
  31. #include "beat_wrapper.h"
  32. #ifdef DEBUG_LOW
  33. #define DBG_LOW(fmt...) do { udbg_printf(fmt); } while (0)
  34. #else
  35. #define DBG_LOW(fmt...) do { } while (0)
  36. #endif
  37. static DEFINE_RAW_SPINLOCK(beat_htab_lock);
  38. static inline unsigned int beat_read_mask(unsigned hpte_group)
  39. {
  40. unsigned long rmask = 0;
  41. u64 hpte_v[5];
  42. beat_read_htab_entries(0, hpte_group + 0, hpte_v);
  43. if (!(hpte_v[0] & HPTE_V_BOLTED))
  44. rmask |= 0x8000;
  45. if (!(hpte_v[1] & HPTE_V_BOLTED))
  46. rmask |= 0x4000;
  47. if (!(hpte_v[2] & HPTE_V_BOLTED))
  48. rmask |= 0x2000;
  49. if (!(hpte_v[3] & HPTE_V_BOLTED))
  50. rmask |= 0x1000;
  51. beat_read_htab_entries(0, hpte_group + 4, hpte_v);
  52. if (!(hpte_v[0] & HPTE_V_BOLTED))
  53. rmask |= 0x0800;
  54. if (!(hpte_v[1] & HPTE_V_BOLTED))
  55. rmask |= 0x0400;
  56. if (!(hpte_v[2] & HPTE_V_BOLTED))
  57. rmask |= 0x0200;
  58. if (!(hpte_v[3] & HPTE_V_BOLTED))
  59. rmask |= 0x0100;
  60. hpte_group = ~hpte_group & (htab_hash_mask * HPTES_PER_GROUP);
  61. beat_read_htab_entries(0, hpte_group + 0, hpte_v);
  62. if (!(hpte_v[0] & HPTE_V_BOLTED))
  63. rmask |= 0x80;
  64. if (!(hpte_v[1] & HPTE_V_BOLTED))
  65. rmask |= 0x40;
  66. if (!(hpte_v[2] & HPTE_V_BOLTED))
  67. rmask |= 0x20;
  68. if (!(hpte_v[3] & HPTE_V_BOLTED))
  69. rmask |= 0x10;
  70. beat_read_htab_entries(0, hpte_group + 4, hpte_v);
  71. if (!(hpte_v[0] & HPTE_V_BOLTED))
  72. rmask |= 0x08;
  73. if (!(hpte_v[1] & HPTE_V_BOLTED))
  74. rmask |= 0x04;
  75. if (!(hpte_v[2] & HPTE_V_BOLTED))
  76. rmask |= 0x02;
  77. if (!(hpte_v[3] & HPTE_V_BOLTED))
  78. rmask |= 0x01;
  79. return rmask;
  80. }
  81. static long beat_lpar_hpte_insert(unsigned long hpte_group,
  82. unsigned long va, unsigned long pa,
  83. unsigned long rflags, unsigned long vflags,
  84. int psize, int ssize)
  85. {
  86. unsigned long lpar_rc;
  87. u64 hpte_v, hpte_r, slot;
  88. if (vflags & HPTE_V_SECONDARY)
  89. return -1;
  90. if (!(vflags & HPTE_V_BOLTED))
  91. DBG_LOW("hpte_insert(group=%lx, va=%016lx, pa=%016lx, "
  92. "rflags=%lx, vflags=%lx, psize=%d)\n",
  93. hpte_group, va, pa, rflags, vflags, psize);
  94. hpte_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M) |
  95. vflags | HPTE_V_VALID;
  96. hpte_r = hpte_encode_r(pa, psize) | rflags;
  97. if (!(vflags & HPTE_V_BOLTED))
  98. DBG_LOW(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
  99. if (rflags & _PAGE_NO_CACHE)
  100. hpte_r &= ~_PAGE_COHERENT;
  101. raw_spin_lock(&beat_htab_lock);
  102. lpar_rc = beat_read_mask(hpte_group);
  103. if (lpar_rc == 0) {
  104. if (!(vflags & HPTE_V_BOLTED))
  105. DBG_LOW(" full\n");
  106. raw_spin_unlock(&beat_htab_lock);
  107. return -1;
  108. }
  109. lpar_rc = beat_insert_htab_entry(0, hpte_group, lpar_rc << 48,
  110. hpte_v, hpte_r, &slot);
  111. raw_spin_unlock(&beat_htab_lock);
  112. /*
  113. * Since we try and ioremap PHBs we don't own, the pte insert
  114. * will fail. However we must catch the failure in hash_page
  115. * or we will loop forever, so return -2 in this case.
  116. */
  117. if (unlikely(lpar_rc != 0)) {
  118. if (!(vflags & HPTE_V_BOLTED))
  119. DBG_LOW(" lpar err %lx\n", lpar_rc);
  120. return -2;
  121. }
  122. if (!(vflags & HPTE_V_BOLTED))
  123. DBG_LOW(" -> slot: %lx\n", slot);
  124. /* We have to pass down the secondary bucket bit here as well */
  125. return (slot ^ hpte_group) & 15;
  126. }
  127. static long beat_lpar_hpte_remove(unsigned long hpte_group)
  128. {
  129. DBG_LOW("hpte_remove(group=%lx)\n", hpte_group);
  130. return -1;
  131. }
  132. static unsigned long beat_lpar_hpte_getword0(unsigned long slot)
  133. {
  134. unsigned long dword0;
  135. unsigned long lpar_rc;
  136. u64 dword[5];
  137. lpar_rc = beat_read_htab_entries(0, slot & ~3UL, dword);
  138. dword0 = dword[slot&3];
  139. BUG_ON(lpar_rc != 0);
  140. return dword0;
  141. }
  142. static void beat_lpar_hptab_clear(void)
  143. {
  144. unsigned long size_bytes = 1UL << ppc64_pft_size;
  145. unsigned long hpte_count = size_bytes >> 4;
  146. int i;
  147. u64 dummy0, dummy1;
  148. /* TODO: Use bulk call */
  149. for (i = 0; i < hpte_count; i++)
  150. beat_write_htab_entry(0, i, 0, 0, -1UL, -1UL, &dummy0, &dummy1);
  151. }
  152. /*
  153. * NOTE: for updatepp ops we are fortunate that the linux "newpp" bits and
  154. * the low 3 bits of flags happen to line up. So no transform is needed.
  155. * We can probably optimize here and assume the high bits of newpp are
  156. * already zero. For now I am paranoid.
  157. */
  158. static long beat_lpar_hpte_updatepp(unsigned long slot,
  159. unsigned long newpp,
  160. unsigned long va,
  161. int psize, int ssize, int local)
  162. {
  163. unsigned long lpar_rc;
  164. u64 dummy0, dummy1;
  165. unsigned long want_v;
  166. want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M);
  167. DBG_LOW(" update: "
  168. "avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ",
  169. want_v & HPTE_V_AVPN, slot, psize, newpp);
  170. raw_spin_lock(&beat_htab_lock);
  171. dummy0 = beat_lpar_hpte_getword0(slot);
  172. if ((dummy0 & ~0x7FUL) != (want_v & ~0x7FUL)) {
  173. DBG_LOW("not found !\n");
  174. raw_spin_unlock(&beat_htab_lock);
  175. return -1;
  176. }
  177. lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, &dummy0,
  178. &dummy1);
  179. raw_spin_unlock(&beat_htab_lock);
  180. if (lpar_rc != 0 || dummy0 == 0) {
  181. DBG_LOW("not found !\n");
  182. return -1;
  183. }
  184. DBG_LOW("ok %lx %lx\n", dummy0, dummy1);
  185. BUG_ON(lpar_rc != 0);
  186. return 0;
  187. }
  188. static long beat_lpar_hpte_find(unsigned long va, int psize)
  189. {
  190. unsigned long hash;
  191. unsigned long i, j;
  192. long slot;
  193. unsigned long want_v, hpte_v;
  194. hash = hpt_hash(va, mmu_psize_defs[psize].shift, MMU_SEGSIZE_256M);
  195. want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M);
  196. for (j = 0; j < 2; j++) {
  197. slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
  198. for (i = 0; i < HPTES_PER_GROUP; i++) {
  199. hpte_v = beat_lpar_hpte_getword0(slot);
  200. if (HPTE_V_COMPARE(hpte_v, want_v)
  201. && (hpte_v & HPTE_V_VALID)
  202. && (!!(hpte_v & HPTE_V_SECONDARY) == j)) {
  203. /* HPTE matches */
  204. if (j)
  205. slot = -slot;
  206. return slot;
  207. }
  208. ++slot;
  209. }
  210. hash = ~hash;
  211. }
  212. return -1;
  213. }
  214. static void beat_lpar_hpte_updateboltedpp(unsigned long newpp,
  215. unsigned long ea,
  216. int psize, int ssize)
  217. {
  218. unsigned long lpar_rc, slot, vsid, va;
  219. u64 dummy0, dummy1;
  220. vsid = get_kernel_vsid(ea, MMU_SEGSIZE_256M);
  221. va = (vsid << 28) | (ea & 0x0fffffff);
  222. raw_spin_lock(&beat_htab_lock);
  223. slot = beat_lpar_hpte_find(va, psize);
  224. BUG_ON(slot == -1);
  225. lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7,
  226. &dummy0, &dummy1);
  227. raw_spin_unlock(&beat_htab_lock);
  228. BUG_ON(lpar_rc != 0);
  229. }
  230. static void beat_lpar_hpte_invalidate(unsigned long slot, unsigned long va,
  231. int psize, int ssize, int local)
  232. {
  233. unsigned long want_v;
  234. unsigned long lpar_rc;
  235. u64 dummy1, dummy2;
  236. unsigned long flags;
  237. DBG_LOW(" inval : slot=%lx, va=%016lx, psize: %d, local: %d\n",
  238. slot, va, psize, local);
  239. want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M);
  240. raw_spin_lock_irqsave(&beat_htab_lock, flags);
  241. dummy1 = beat_lpar_hpte_getword0(slot);
  242. if ((dummy1 & ~0x7FUL) != (want_v & ~0x7FUL)) {
  243. DBG_LOW("not found !\n");
  244. raw_spin_unlock_irqrestore(&beat_htab_lock, flags);
  245. return;
  246. }
  247. lpar_rc = beat_write_htab_entry(0, slot, 0, 0, HPTE_V_VALID, 0,
  248. &dummy1, &dummy2);
  249. raw_spin_unlock_irqrestore(&beat_htab_lock, flags);
  250. BUG_ON(lpar_rc != 0);
  251. }
  252. void __init hpte_init_beat(void)
  253. {
  254. ppc_md.hpte_invalidate = beat_lpar_hpte_invalidate;
  255. ppc_md.hpte_updatepp = beat_lpar_hpte_updatepp;
  256. ppc_md.hpte_updateboltedpp = beat_lpar_hpte_updateboltedpp;
  257. ppc_md.hpte_insert = beat_lpar_hpte_insert;
  258. ppc_md.hpte_remove = beat_lpar_hpte_remove;
  259. ppc_md.hpte_clear_all = beat_lpar_hptab_clear;
  260. }
  261. static long beat_lpar_hpte_insert_v3(unsigned long hpte_group,
  262. unsigned long va, unsigned long pa,
  263. unsigned long rflags, unsigned long vflags,
  264. int psize, int ssize)
  265. {
  266. unsigned long lpar_rc;
  267. u64 hpte_v, hpte_r, slot;
  268. if (vflags & HPTE_V_SECONDARY)
  269. return -1;
  270. if (!(vflags & HPTE_V_BOLTED))
  271. DBG_LOW("hpte_insert(group=%lx, va=%016lx, pa=%016lx, "
  272. "rflags=%lx, vflags=%lx, psize=%d)\n",
  273. hpte_group, va, pa, rflags, vflags, psize);
  274. hpte_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M) |
  275. vflags | HPTE_V_VALID;
  276. hpte_r = hpte_encode_r(pa, psize) | rflags;
  277. if (!(vflags & HPTE_V_BOLTED))
  278. DBG_LOW(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
  279. if (rflags & _PAGE_NO_CACHE)
  280. hpte_r &= ~_PAGE_COHERENT;
  281. /* insert into not-volted entry */
  282. lpar_rc = beat_insert_htab_entry3(0, hpte_group, hpte_v, hpte_r,
  283. HPTE_V_BOLTED, 0, &slot);
  284. /*
  285. * Since we try and ioremap PHBs we don't own, the pte insert
  286. * will fail. However we must catch the failure in hash_page
  287. * or we will loop forever, so return -2 in this case.
  288. */
  289. if (unlikely(lpar_rc != 0)) {
  290. if (!(vflags & HPTE_V_BOLTED))
  291. DBG_LOW(" lpar err %lx\n", lpar_rc);
  292. return -2;
  293. }
  294. if (!(vflags & HPTE_V_BOLTED))
  295. DBG_LOW(" -> slot: %lx\n", slot);
  296. /* We have to pass down the secondary bucket bit here as well */
  297. return (slot ^ hpte_group) & 15;
  298. }
  299. /*
  300. * NOTE: for updatepp ops we are fortunate that the linux "newpp" bits and
  301. * the low 3 bits of flags happen to line up. So no transform is needed.
  302. * We can probably optimize here and assume the high bits of newpp are
  303. * already zero. For now I am paranoid.
  304. */
  305. static long beat_lpar_hpte_updatepp_v3(unsigned long slot,
  306. unsigned long newpp,
  307. unsigned long va,
  308. int psize, int ssize, int local)
  309. {
  310. unsigned long lpar_rc;
  311. unsigned long want_v;
  312. unsigned long pss;
  313. want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M);
  314. pss = (psize == MMU_PAGE_4K) ? -1UL : mmu_psize_defs[psize].penc;
  315. DBG_LOW(" update: "
  316. "avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ",
  317. want_v & HPTE_V_AVPN, slot, psize, newpp);
  318. lpar_rc = beat_update_htab_permission3(0, slot, want_v, pss, 7, newpp);
  319. if (lpar_rc == 0xfffffff7) {
  320. DBG_LOW("not found !\n");
  321. return -1;
  322. }
  323. DBG_LOW("ok\n");
  324. BUG_ON(lpar_rc != 0);
  325. return 0;
  326. }
  327. static void beat_lpar_hpte_invalidate_v3(unsigned long slot, unsigned long va,
  328. int psize, int ssize, int local)
  329. {
  330. unsigned long want_v;
  331. unsigned long lpar_rc;
  332. unsigned long pss;
  333. DBG_LOW(" inval : slot=%lx, va=%016lx, psize: %d, local: %d\n",
  334. slot, va, psize, local);
  335. want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M);
  336. pss = (psize == MMU_PAGE_4K) ? -1UL : mmu_psize_defs[psize].penc;
  337. lpar_rc = beat_invalidate_htab_entry3(0, slot, want_v, pss);
  338. /* E_busy can be valid output: page may be already replaced */
  339. BUG_ON(lpar_rc != 0 && lpar_rc != 0xfffffff7);
  340. }
  341. static int64_t _beat_lpar_hptab_clear_v3(void)
  342. {
  343. return beat_clear_htab3(0);
  344. }
  345. static void beat_lpar_hptab_clear_v3(void)
  346. {
  347. _beat_lpar_hptab_clear_v3();
  348. }
  349. void __init hpte_init_beat_v3(void)
  350. {
  351. if (_beat_lpar_hptab_clear_v3() == 0) {
  352. ppc_md.hpte_invalidate = beat_lpar_hpte_invalidate_v3;
  353. ppc_md.hpte_updatepp = beat_lpar_hpte_updatepp_v3;
  354. ppc_md.hpte_updateboltedpp = beat_lpar_hpte_updateboltedpp;
  355. ppc_md.hpte_insert = beat_lpar_hpte_insert_v3;
  356. ppc_md.hpte_remove = beat_lpar_hpte_remove;
  357. ppc_md.hpte_clear_all = beat_lpar_hptab_clear_v3;
  358. } else {
  359. ppc_md.hpte_invalidate = beat_lpar_hpte_invalidate;
  360. ppc_md.hpte_updatepp = beat_lpar_hpte_updatepp;
  361. ppc_md.hpte_updateboltedpp = beat_lpar_hpte_updateboltedpp;
  362. ppc_md.hpte_insert = beat_lpar_hpte_insert;
  363. ppc_md.hpte_remove = beat_lpar_hpte_remove;
  364. ppc_md.hpte_clear_all = beat_lpar_hptab_clear;
  365. }
  366. }