fsl_booke_mmu.c 6.5 KB

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  1. /*
  2. * Modifications by Kumar Gala (galak@kernel.crashing.org) to support
  3. * E500 Book E processors.
  4. *
  5. * Copyright 2004,2010 Freescale Semiconductor, Inc.
  6. *
  7. * This file contains the routines for initializing the MMU
  8. * on the 4xx series of chips.
  9. * -- paulus
  10. *
  11. * Derived from arch/ppc/mm/init.c:
  12. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  13. *
  14. * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
  15. * and Cort Dougan (PReP) (cort@cs.nmt.edu)
  16. * Copyright (C) 1996 Paul Mackerras
  17. *
  18. * Derived from "arch/i386/mm/init.c"
  19. * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
  20. *
  21. * This program is free software; you can redistribute it and/or
  22. * modify it under the terms of the GNU General Public License
  23. * as published by the Free Software Foundation; either version
  24. * 2 of the License, or (at your option) any later version.
  25. *
  26. */
  27. #include <linux/signal.h>
  28. #include <linux/sched.h>
  29. #include <linux/kernel.h>
  30. #include <linux/errno.h>
  31. #include <linux/string.h>
  32. #include <linux/types.h>
  33. #include <linux/ptrace.h>
  34. #include <linux/mman.h>
  35. #include <linux/mm.h>
  36. #include <linux/swap.h>
  37. #include <linux/stddef.h>
  38. #include <linux/vmalloc.h>
  39. #include <linux/init.h>
  40. #include <linux/delay.h>
  41. #include <linux/highmem.h>
  42. #include <linux/memblock.h>
  43. #include <asm/pgalloc.h>
  44. #include <asm/prom.h>
  45. #include <asm/io.h>
  46. #include <asm/mmu_context.h>
  47. #include <asm/pgtable.h>
  48. #include <asm/mmu.h>
  49. #include <asm/uaccess.h>
  50. #include <asm/smp.h>
  51. #include <asm/machdep.h>
  52. #include <asm/setup.h>
  53. #include "mmu_decl.h"
  54. unsigned int tlbcam_index;
  55. #define NUM_TLBCAMS (64)
  56. struct tlbcam TLBCAM[NUM_TLBCAMS];
  57. struct tlbcamrange {
  58. unsigned long start;
  59. unsigned long limit;
  60. phys_addr_t phys;
  61. } tlbcam_addrs[NUM_TLBCAMS];
  62. extern unsigned int tlbcam_index;
  63. unsigned long tlbcam_sz(int idx)
  64. {
  65. return tlbcam_addrs[idx].limit - tlbcam_addrs[idx].start + 1;
  66. }
  67. /*
  68. * Return PA for this VA if it is mapped by a CAM, or 0
  69. */
  70. phys_addr_t v_mapped_by_tlbcam(unsigned long va)
  71. {
  72. int b;
  73. for (b = 0; b < tlbcam_index; ++b)
  74. if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
  75. return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
  76. return 0;
  77. }
  78. /*
  79. * Return VA for a given PA or 0 if not mapped
  80. */
  81. unsigned long p_mapped_by_tlbcam(phys_addr_t pa)
  82. {
  83. int b;
  84. for (b = 0; b < tlbcam_index; ++b)
  85. if (pa >= tlbcam_addrs[b].phys
  86. && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
  87. +tlbcam_addrs[b].phys)
  88. return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
  89. return 0;
  90. }
  91. /*
  92. * Set up a variable-size TLB entry (tlbcam). The parameters are not checked;
  93. * in particular size must be a power of 4 between 4k and the max supported by
  94. * an implementation; max may further be limited by what can be represented in
  95. * an unsigned long (for example, 32-bit implementations cannot support a 4GB
  96. * size).
  97. */
  98. static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
  99. unsigned long size, unsigned long flags, unsigned int pid)
  100. {
  101. unsigned int tsize;
  102. tsize = __ilog2(size) - 10;
  103. #ifdef CONFIG_SMP
  104. if ((flags & _PAGE_NO_CACHE) == 0)
  105. flags |= _PAGE_COHERENT;
  106. #endif
  107. TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
  108. TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
  109. TLBCAM[index].MAS2 = virt & PAGE_MASK;
  110. TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
  111. TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
  112. TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
  113. TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
  114. TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
  115. TLBCAM[index].MAS3 = (phys & MAS3_RPN) | MAS3_SX | MAS3_SR;
  116. TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
  117. if (mmu_has_feature(MMU_FTR_BIG_PHYS))
  118. TLBCAM[index].MAS7 = (u64)phys >> 32;
  119. /* Below is unlikely -- only for large user pages or similar */
  120. if (pte_user(flags)) {
  121. TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
  122. TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
  123. }
  124. tlbcam_addrs[index].start = virt;
  125. tlbcam_addrs[index].limit = virt + size - 1;
  126. tlbcam_addrs[index].phys = phys;
  127. loadcam_entry(index);
  128. }
  129. unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
  130. phys_addr_t phys)
  131. {
  132. unsigned int camsize = __ilog2(ram);
  133. unsigned int align = __ffs(virt | phys);
  134. unsigned long max_cam;
  135. if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1) {
  136. /* Convert (4^max) kB to (2^max) bytes */
  137. max_cam = ((mfspr(SPRN_TLB1CFG) >> 16) & 0xf) * 2 + 10;
  138. camsize &= ~1U;
  139. align &= ~1U;
  140. } else {
  141. /* Convert (2^max) kB to (2^max) bytes */
  142. max_cam = __ilog2(mfspr(SPRN_TLB1PS)) + 10;
  143. }
  144. if (camsize > align)
  145. camsize = align;
  146. if (camsize > max_cam)
  147. camsize = max_cam;
  148. return 1UL << camsize;
  149. }
  150. unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx)
  151. {
  152. int i;
  153. unsigned long virt = PAGE_OFFSET;
  154. phys_addr_t phys = memstart_addr;
  155. unsigned long amount_mapped = 0;
  156. /* Calculate CAM values */
  157. for (i = 0; ram && i < max_cam_idx; i++) {
  158. unsigned long cam_sz;
  159. cam_sz = calc_cam_sz(ram, virt, phys);
  160. settlbcam(i, virt, phys, cam_sz, PAGE_KERNEL_X, 0);
  161. ram -= cam_sz;
  162. amount_mapped += cam_sz;
  163. virt += cam_sz;
  164. phys += cam_sz;
  165. }
  166. tlbcam_index = i;
  167. return amount_mapped;
  168. }
  169. #ifdef CONFIG_PPC32
  170. #if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
  171. #error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
  172. #endif
  173. unsigned long __init mmu_mapin_ram(unsigned long top)
  174. {
  175. return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1;
  176. }
  177. /*
  178. * MMU_init_hw does the chip-specific initialization of the MMU hardware.
  179. */
  180. void __init MMU_init_hw(void)
  181. {
  182. flush_instruction_cache();
  183. }
  184. void __init adjust_total_lowmem(void)
  185. {
  186. unsigned long ram;
  187. int i;
  188. /* adjust lowmem size to __max_low_memory */
  189. ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);
  190. __max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM);
  191. pr_info("Memory CAM mapping: ");
  192. for (i = 0; i < tlbcam_index - 1; i++)
  193. pr_cont("%lu/", tlbcam_sz(i) >> 20);
  194. pr_cont("%lu Mb, residual: %dMb\n", tlbcam_sz(tlbcam_index - 1) >> 20,
  195. (unsigned int)((total_lowmem - __max_low_memory) >> 20));
  196. memblock_set_current_limit(memstart_addr + __max_low_memory);
  197. }
  198. void setup_initial_memory_limit(phys_addr_t first_memblock_base,
  199. phys_addr_t first_memblock_size)
  200. {
  201. phys_addr_t limit = first_memblock_base + first_memblock_size;
  202. /* 64M mapped initially according to head_fsl_booke.S */
  203. memblock_set_current_limit(min_t(u64, limit, 0x04000000));
  204. }
  205. #endif