setup.c 3.2 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
  7. */
  8. #include <linux/init.h>
  9. #include <linux/kernel.h>
  10. #include <linux/delay.h>
  11. #include <linux/bootmem.h>
  12. #include <linux/ioport.h>
  13. #include <linux/pm.h>
  14. #include <asm/bootinfo.h>
  15. #include <asm/time.h>
  16. #include <asm/reboot.h>
  17. #include <asm/cacheflush.h>
  18. #include <bcm63xx_board.h>
  19. #include <bcm63xx_cpu.h>
  20. #include <bcm63xx_regs.h>
  21. #include <bcm63xx_io.h>
  22. void bcm63xx_machine_halt(void)
  23. {
  24. printk(KERN_INFO "System halted\n");
  25. while (1)
  26. ;
  27. }
  28. static void bcm6348_a1_reboot(void)
  29. {
  30. u32 reg;
  31. /* soft reset all blocks */
  32. printk(KERN_INFO "soft-resetting all blocks ...\n");
  33. reg = bcm_perf_readl(PERF_SOFTRESET_REG);
  34. reg &= ~SOFTRESET_6348_ALL;
  35. bcm_perf_writel(reg, PERF_SOFTRESET_REG);
  36. mdelay(10);
  37. reg = bcm_perf_readl(PERF_SOFTRESET_REG);
  38. reg |= SOFTRESET_6348_ALL;
  39. bcm_perf_writel(reg, PERF_SOFTRESET_REG);
  40. mdelay(10);
  41. /* Jump to the power on address. */
  42. printk(KERN_INFO "jumping to reset vector.\n");
  43. /* set high vectors (base at 0xbfc00000 */
  44. set_c0_status(ST0_BEV | ST0_ERL);
  45. /* run uncached in kseg0 */
  46. change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
  47. __flush_cache_all();
  48. /* remove all wired TLB entries */
  49. write_c0_wired(0);
  50. __asm__ __volatile__(
  51. "jr\t%0"
  52. :
  53. : "r" (0xbfc00000));
  54. while (1)
  55. ;
  56. }
  57. void bcm63xx_machine_reboot(void)
  58. {
  59. u32 reg, perf_regs[2] = { 0, 0 };
  60. unsigned int i;
  61. /* mask and clear all external irq */
  62. switch (bcm63xx_get_cpu_id()) {
  63. case BCM6338_CPU_ID:
  64. perf_regs[0] = PERF_EXTIRQ_CFG_REG_6338;
  65. break;
  66. case BCM6348_CPU_ID:
  67. perf_regs[0] = PERF_EXTIRQ_CFG_REG_6348;
  68. break;
  69. case BCM6358_CPU_ID:
  70. perf_regs[0] = PERF_EXTIRQ_CFG_REG_6358;
  71. break;
  72. }
  73. for (i = 0; i < 2; i++) {
  74. reg = bcm_perf_readl(perf_regs[i]);
  75. if (BCMCPU_IS_6348()) {
  76. reg &= ~EXTIRQ_CFG_MASK_ALL_6348;
  77. reg |= EXTIRQ_CFG_CLEAR_ALL_6348;
  78. } else {
  79. reg &= ~EXTIRQ_CFG_MASK_ALL;
  80. reg |= EXTIRQ_CFG_CLEAR_ALL;
  81. }
  82. bcm_perf_writel(reg, perf_regs[i]);
  83. }
  84. if (BCMCPU_IS_6348() && (bcm63xx_get_cpu_rev() == 0xa1))
  85. bcm6348_a1_reboot();
  86. printk(KERN_INFO "triggering watchdog soft-reset...\n");
  87. reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG);
  88. reg |= SYS_PLL_SOFT_RESET;
  89. bcm_perf_writel(reg, PERF_SYS_PLL_CTL_REG);
  90. while (1)
  91. ;
  92. }
  93. static void __bcm63xx_machine_reboot(char *p)
  94. {
  95. bcm63xx_machine_reboot();
  96. }
  97. /*
  98. * return system type in /proc/cpuinfo
  99. */
  100. const char *get_system_type(void)
  101. {
  102. static char buf[128];
  103. snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%04X)",
  104. board_get_name(),
  105. bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev());
  106. return buf;
  107. }
  108. void __init plat_time_init(void)
  109. {
  110. mips_hpt_frequency = bcm63xx_get_cpu_freq() / 2;
  111. }
  112. void __init plat_mem_setup(void)
  113. {
  114. add_memory_region(0, bcm63xx_get_memory_size(), BOOT_MEM_RAM);
  115. _machine_halt = bcm63xx_machine_halt;
  116. _machine_restart = __bcm63xx_machine_reboot;
  117. pm_power_off = bcm63xx_machine_halt;
  118. set_io_port_base(0);
  119. ioport_resource.start = 0;
  120. ioport_resource.end = ~0;
  121. board_setup();
  122. }
  123. int __init bcm63xx_register_devices(void)
  124. {
  125. return board_register_devices();
  126. }
  127. device_initcall(bcm63xx_register_devices);