barrier.h 1.2 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * Tony Kou (tonyko@lineo.ca)
  4. *
  5. * Licensed under the GPL-2 or later
  6. */
  7. #ifndef _BLACKFIN_BARRIER_H
  8. #define _BLACKFIN_BARRIER_H
  9. #include <asm/cache.h>
  10. #define nop() __asm__ __volatile__ ("nop;\n\t" : : )
  11. /*
  12. * Force strict CPU ordering.
  13. */
  14. #ifdef CONFIG_SMP
  15. #ifdef __ARCH_SYNC_CORE_DCACHE
  16. /* Force Core data cache coherence */
  17. # define mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
  18. # define rmb() do { barrier(); smp_check_barrier(); } while (0)
  19. # define wmb() do { barrier(); smp_mark_barrier(); } while (0)
  20. # define read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0)
  21. #else
  22. # define mb() barrier()
  23. # define rmb() barrier()
  24. # define wmb() barrier()
  25. # define read_barrier_depends() do { } while (0)
  26. #endif
  27. #else /* !CONFIG_SMP */
  28. #define mb() barrier()
  29. #define rmb() barrier()
  30. #define wmb() barrier()
  31. #define read_barrier_depends() do { } while (0)
  32. #endif /* !CONFIG_SMP */
  33. #define smp_mb() mb()
  34. #define smp_rmb() rmb()
  35. #define smp_wmb() wmb()
  36. #define set_mb(var, value) do { var = value; mb(); } while (0)
  37. #define smp_read_barrier_depends() read_barrier_depends()
  38. #endif /* _BLACKFIN_BARRIER_H */