nm256.c 45 KB

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  1. /*
  2. * Driver for NeoMagic 256AV and 256ZX chipsets.
  3. * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de>
  4. *
  5. * Based on nm256_audio.c OSS driver in linux kernel.
  6. * The original author of OSS nm256 driver wishes to remain anonymous,
  7. * so I just put my acknoledgment to him/her here.
  8. * The original author's web page is found at
  9. * http://www.uglx.org/sony.html
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <asm/io.h>
  27. #include <linux/delay.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/init.h>
  30. #include <linux/pci.h>
  31. #include <linux/slab.h>
  32. #include <linux/module.h>
  33. #include <linux/mutex.h>
  34. #include <sound/core.h>
  35. #include <sound/info.h>
  36. #include <sound/control.h>
  37. #include <sound/pcm.h>
  38. #include <sound/ac97_codec.h>
  39. #include <sound/initval.h>
  40. #define CARD_NAME "NeoMagic 256AV/ZX"
  41. #define DRIVER_NAME "NM256"
  42. MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
  43. MODULE_DESCRIPTION("NeoMagic NM256AV/ZX");
  44. MODULE_LICENSE("GPL");
  45. MODULE_SUPPORTED_DEVICE("{{NeoMagic,NM256AV},"
  46. "{NeoMagic,NM256ZX}}");
  47. /*
  48. * some compile conditions.
  49. */
  50. static int index = SNDRV_DEFAULT_IDX1; /* Index */
  51. static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
  52. static int playback_bufsize = 16;
  53. static int capture_bufsize = 16;
  54. static bool force_ac97; /* disabled as default */
  55. static int buffer_top; /* not specified */
  56. static bool use_cache; /* disabled */
  57. static bool vaio_hack; /* disabled */
  58. static bool reset_workaround;
  59. static bool reset_workaround_2;
  60. module_param(index, int, 0444);
  61. MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
  62. module_param(id, charp, 0444);
  63. MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
  64. module_param(playback_bufsize, int, 0444);
  65. MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard.");
  66. module_param(capture_bufsize, int, 0444);
  67. MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard.");
  68. module_param(force_ac97, bool, 0444);
  69. MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard.");
  70. module_param(buffer_top, int, 0444);
  71. MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard.");
  72. module_param(use_cache, bool, 0444);
  73. MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access.");
  74. module_param(vaio_hack, bool, 0444);
  75. MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks.");
  76. module_param(reset_workaround, bool, 0444);
  77. MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops.");
  78. module_param(reset_workaround_2, bool, 0444);
  79. MODULE_PARM_DESC(reset_workaround_2, "Enable extended AC97 RESET workaround for some other laptops.");
  80. /* just for backward compatibility */
  81. static bool enable;
  82. module_param(enable, bool, 0444);
  83. /*
  84. * hw definitions
  85. */
  86. /* The BIOS signature. */
  87. #define NM_SIGNATURE 0x4e4d0000
  88. /* Signature mask. */
  89. #define NM_SIG_MASK 0xffff0000
  90. /* Size of the second memory area. */
  91. #define NM_PORT2_SIZE 4096
  92. /* The base offset of the mixer in the second memory area. */
  93. #define NM_MIXER_OFFSET 0x600
  94. /* The maximum size of a coefficient entry. */
  95. #define NM_MAX_PLAYBACK_COEF_SIZE 0x5000
  96. #define NM_MAX_RECORD_COEF_SIZE 0x1260
  97. /* The interrupt register. */
  98. #define NM_INT_REG 0xa04
  99. /* And its bits. */
  100. #define NM_PLAYBACK_INT 0x40
  101. #define NM_RECORD_INT 0x100
  102. #define NM_MISC_INT_1 0x4000
  103. #define NM_MISC_INT_2 0x1
  104. #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1)
  105. /* The AV's "mixer ready" status bit and location. */
  106. #define NM_MIXER_STATUS_OFFSET 0xa04
  107. #define NM_MIXER_READY_MASK 0x0800
  108. #define NM_MIXER_PRESENCE 0xa06
  109. #define NM_PRESENCE_MASK 0x0050
  110. #define NM_PRESENCE_VALUE 0x0040
  111. /*
  112. * For the ZX. It uses the same interrupt register, but it holds 32
  113. * bits instead of 16.
  114. */
  115. #define NM2_PLAYBACK_INT 0x10000
  116. #define NM2_RECORD_INT 0x80000
  117. #define NM2_MISC_INT_1 0x8
  118. #define NM2_MISC_INT_2 0x2
  119. #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X))
  120. /* The ZX's "mixer ready" status bit and location. */
  121. #define NM2_MIXER_STATUS_OFFSET 0xa06
  122. #define NM2_MIXER_READY_MASK 0x0800
  123. /* The playback registers start from here. */
  124. #define NM_PLAYBACK_REG_OFFSET 0x0
  125. /* The record registers start from here. */
  126. #define NM_RECORD_REG_OFFSET 0x200
  127. /* The rate register is located 2 bytes from the start of the register area. */
  128. #define NM_RATE_REG_OFFSET 2
  129. /* Mono/stereo flag, number of bits on playback, and rate mask. */
  130. #define NM_RATE_STEREO 1
  131. #define NM_RATE_BITS_16 2
  132. #define NM_RATE_MASK 0xf0
  133. /* Playback enable register. */
  134. #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
  135. #define NM_PLAYBACK_ENABLE_FLAG 1
  136. #define NM_PLAYBACK_ONESHOT 2
  137. #define NM_PLAYBACK_FREERUN 4
  138. /* Mutes the audio output. */
  139. #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
  140. #define NM_AUDIO_MUTE_LEFT 0x8000
  141. #define NM_AUDIO_MUTE_RIGHT 0x0080
  142. /* Recording enable register. */
  143. #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
  144. #define NM_RECORD_ENABLE_FLAG 1
  145. #define NM_RECORD_FREERUN 2
  146. /* coefficient buffer pointer */
  147. #define NM_COEFF_START_OFFSET 0x1c
  148. #define NM_COEFF_END_OFFSET 0x20
  149. /* DMA buffer offsets */
  150. #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
  151. #define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10)
  152. #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
  153. #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
  154. #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
  155. #define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14)
  156. #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
  157. #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
  158. struct nm256_stream {
  159. struct nm256 *chip;
  160. struct snd_pcm_substream *substream;
  161. int running;
  162. int suspended;
  163. u32 buf; /* offset from chip->buffer */
  164. int bufsize; /* buffer size in bytes */
  165. void __iomem *bufptr; /* mapped pointer */
  166. unsigned long bufptr_addr; /* physical address of the mapped pointer */
  167. int dma_size; /* buffer size of the substream in bytes */
  168. int period_size; /* period size in bytes */
  169. int periods; /* # of periods */
  170. int shift; /* bit shifts */
  171. int cur_period; /* current period # */
  172. };
  173. struct nm256 {
  174. struct snd_card *card;
  175. void __iomem *cport; /* control port */
  176. struct resource *res_cport; /* its resource */
  177. unsigned long cport_addr; /* physical address */
  178. void __iomem *buffer; /* buffer */
  179. struct resource *res_buffer; /* its resource */
  180. unsigned long buffer_addr; /* buffer phyiscal address */
  181. u32 buffer_start; /* start offset from pci resource 0 */
  182. u32 buffer_end; /* end offset */
  183. u32 buffer_size; /* total buffer size */
  184. u32 all_coeff_buf; /* coefficient buffer */
  185. u32 coeff_buf[2]; /* coefficient buffer for each stream */
  186. unsigned int coeffs_current: 1; /* coeff. table is loaded? */
  187. unsigned int use_cache: 1; /* use one big coef. table */
  188. unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */
  189. unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */
  190. unsigned int in_resume: 1;
  191. int mixer_base; /* register offset of ac97 mixer */
  192. int mixer_status_offset; /* offset of mixer status reg. */
  193. int mixer_status_mask; /* bit mask to test the mixer status */
  194. int irq;
  195. int irq_acks;
  196. irq_handler_t interrupt;
  197. int badintrcount; /* counter to check bogus interrupts */
  198. struct mutex irq_mutex;
  199. struct nm256_stream streams[2];
  200. struct snd_ac97 *ac97;
  201. unsigned short *ac97_regs; /* register caches, only for valid regs */
  202. struct snd_pcm *pcm;
  203. struct pci_dev *pci;
  204. spinlock_t reg_lock;
  205. };
  206. /*
  207. * include coefficient table
  208. */
  209. #include "nm256_coef.c"
  210. /*
  211. * PCI ids
  212. */
  213. static DEFINE_PCI_DEVICE_TABLE(snd_nm256_ids) = {
  214. {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO), 0},
  215. {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO), 0},
  216. {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO), 0},
  217. {0,},
  218. };
  219. MODULE_DEVICE_TABLE(pci, snd_nm256_ids);
  220. /*
  221. * lowlvel stuffs
  222. */
  223. static inline u8
  224. snd_nm256_readb(struct nm256 *chip, int offset)
  225. {
  226. return readb(chip->cport + offset);
  227. }
  228. static inline u16
  229. snd_nm256_readw(struct nm256 *chip, int offset)
  230. {
  231. return readw(chip->cport + offset);
  232. }
  233. static inline u32
  234. snd_nm256_readl(struct nm256 *chip, int offset)
  235. {
  236. return readl(chip->cport + offset);
  237. }
  238. static inline void
  239. snd_nm256_writeb(struct nm256 *chip, int offset, u8 val)
  240. {
  241. writeb(val, chip->cport + offset);
  242. }
  243. static inline void
  244. snd_nm256_writew(struct nm256 *chip, int offset, u16 val)
  245. {
  246. writew(val, chip->cport + offset);
  247. }
  248. static inline void
  249. snd_nm256_writel(struct nm256 *chip, int offset, u32 val)
  250. {
  251. writel(val, chip->cport + offset);
  252. }
  253. static inline void
  254. snd_nm256_write_buffer(struct nm256 *chip, void *src, int offset, int size)
  255. {
  256. offset -= chip->buffer_start;
  257. #ifdef CONFIG_SND_DEBUG
  258. if (offset < 0 || offset >= chip->buffer_size) {
  259. snd_printk(KERN_ERR "write_buffer invalid offset = %d size = %d\n",
  260. offset, size);
  261. return;
  262. }
  263. #endif
  264. memcpy_toio(chip->buffer + offset, src, size);
  265. }
  266. /*
  267. * coefficient handlers -- what a magic!
  268. */
  269. static u16
  270. snd_nm256_get_start_offset(int which)
  271. {
  272. u16 offset = 0;
  273. while (which-- > 0)
  274. offset += coefficient_sizes[which];
  275. return offset;
  276. }
  277. static void
  278. snd_nm256_load_one_coefficient(struct nm256 *chip, int stream, u32 port, int which)
  279. {
  280. u32 coeff_buf = chip->coeff_buf[stream];
  281. u16 offset = snd_nm256_get_start_offset(which);
  282. u16 size = coefficient_sizes[which];
  283. snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size);
  284. snd_nm256_writel(chip, port, coeff_buf);
  285. /* ??? Record seems to behave differently than playback. */
  286. if (stream == SNDRV_PCM_STREAM_PLAYBACK)
  287. size--;
  288. snd_nm256_writel(chip, port + 4, coeff_buf + size);
  289. }
  290. static void
  291. snd_nm256_load_coefficient(struct nm256 *chip, int stream, int number)
  292. {
  293. /* The enable register for the specified engine. */
  294. u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ?
  295. NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG);
  296. u32 addr = NM_COEFF_START_OFFSET;
  297. addr += (stream == SNDRV_PCM_STREAM_CAPTURE ?
  298. NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET);
  299. if (snd_nm256_readb(chip, poffset) & 1) {
  300. snd_printd("NM256: Engine was enabled while loading coefficients!\n");
  301. return;
  302. }
  303. /* The recording engine uses coefficient values 8-15. */
  304. number &= 7;
  305. if (stream == SNDRV_PCM_STREAM_CAPTURE)
  306. number += 8;
  307. if (! chip->use_cache) {
  308. snd_nm256_load_one_coefficient(chip, stream, addr, number);
  309. return;
  310. }
  311. if (! chip->coeffs_current) {
  312. snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf,
  313. NM_TOTAL_COEFF_COUNT * 4);
  314. chip->coeffs_current = 1;
  315. } else {
  316. u32 base = chip->all_coeff_buf;
  317. u32 offset = snd_nm256_get_start_offset(number);
  318. u32 end_offset = offset + coefficient_sizes[number];
  319. snd_nm256_writel(chip, addr, base + offset);
  320. if (stream == SNDRV_PCM_STREAM_PLAYBACK)
  321. end_offset--;
  322. snd_nm256_writel(chip, addr + 4, base + end_offset);
  323. }
  324. }
  325. /* The actual rates supported by the card. */
  326. static unsigned int samplerates[8] = {
  327. 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,
  328. };
  329. static struct snd_pcm_hw_constraint_list constraints_rates = {
  330. .count = ARRAY_SIZE(samplerates),
  331. .list = samplerates,
  332. .mask = 0,
  333. };
  334. /*
  335. * return the index of the target rate
  336. */
  337. static int
  338. snd_nm256_fixed_rate(unsigned int rate)
  339. {
  340. unsigned int i;
  341. for (i = 0; i < ARRAY_SIZE(samplerates); i++) {
  342. if (rate == samplerates[i])
  343. return i;
  344. }
  345. snd_BUG();
  346. return 0;
  347. }
  348. /*
  349. * set sample rate and format
  350. */
  351. static void
  352. snd_nm256_set_format(struct nm256 *chip, struct nm256_stream *s,
  353. struct snd_pcm_substream *substream)
  354. {
  355. struct snd_pcm_runtime *runtime = substream->runtime;
  356. int rate_index = snd_nm256_fixed_rate(runtime->rate);
  357. unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK;
  358. s->shift = 0;
  359. if (snd_pcm_format_width(runtime->format) == 16) {
  360. ratebits |= NM_RATE_BITS_16;
  361. s->shift++;
  362. }
  363. if (runtime->channels > 1) {
  364. ratebits |= NM_RATE_STEREO;
  365. s->shift++;
  366. }
  367. runtime->rate = samplerates[rate_index];
  368. switch (substream->stream) {
  369. case SNDRV_PCM_STREAM_PLAYBACK:
  370. snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */
  371. snd_nm256_writeb(chip,
  372. NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET,
  373. ratebits);
  374. break;
  375. case SNDRV_PCM_STREAM_CAPTURE:
  376. snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */
  377. snd_nm256_writeb(chip,
  378. NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET,
  379. ratebits);
  380. break;
  381. }
  382. }
  383. /* acquire interrupt */
  384. static int snd_nm256_acquire_irq(struct nm256 *chip)
  385. {
  386. mutex_lock(&chip->irq_mutex);
  387. if (chip->irq < 0) {
  388. if (request_irq(chip->pci->irq, chip->interrupt, IRQF_SHARED,
  389. KBUILD_MODNAME, chip)) {
  390. snd_printk(KERN_ERR "unable to grab IRQ %d\n", chip->pci->irq);
  391. mutex_unlock(&chip->irq_mutex);
  392. return -EBUSY;
  393. }
  394. chip->irq = chip->pci->irq;
  395. }
  396. chip->irq_acks++;
  397. mutex_unlock(&chip->irq_mutex);
  398. return 0;
  399. }
  400. /* release interrupt */
  401. static void snd_nm256_release_irq(struct nm256 *chip)
  402. {
  403. mutex_lock(&chip->irq_mutex);
  404. if (chip->irq_acks > 0)
  405. chip->irq_acks--;
  406. if (chip->irq_acks == 0 && chip->irq >= 0) {
  407. free_irq(chip->irq, chip);
  408. chip->irq = -1;
  409. }
  410. mutex_unlock(&chip->irq_mutex);
  411. }
  412. /*
  413. * start / stop
  414. */
  415. /* update the watermark (current period) */
  416. static void snd_nm256_pcm_mark(struct nm256 *chip, struct nm256_stream *s, int reg)
  417. {
  418. s->cur_period++;
  419. s->cur_period %= s->periods;
  420. snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size);
  421. }
  422. #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK)
  423. #define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK)
  424. static void
  425. snd_nm256_playback_start(struct nm256 *chip, struct nm256_stream *s,
  426. struct snd_pcm_substream *substream)
  427. {
  428. /* program buffer pointers */
  429. snd_nm256_writel(chip, NM_PBUFFER_START, s->buf);
  430. snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift));
  431. snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf);
  432. snd_nm256_playback_mark(chip, s);
  433. /* Enable playback engine and interrupts. */
  434. snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG,
  435. NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN);
  436. /* Enable both channels. */
  437. snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0);
  438. }
  439. static void
  440. snd_nm256_capture_start(struct nm256 *chip, struct nm256_stream *s,
  441. struct snd_pcm_substream *substream)
  442. {
  443. /* program buffer pointers */
  444. snd_nm256_writel(chip, NM_RBUFFER_START, s->buf);
  445. snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size);
  446. snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf);
  447. snd_nm256_capture_mark(chip, s);
  448. /* Enable playback engine and interrupts. */
  449. snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG,
  450. NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN);
  451. }
  452. /* Stop the play engine. */
  453. static void
  454. snd_nm256_playback_stop(struct nm256 *chip)
  455. {
  456. /* Shut off sound from both channels. */
  457. snd_nm256_writew(chip, NM_AUDIO_MUTE_REG,
  458. NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT);
  459. /* Disable play engine. */
  460. snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0);
  461. }
  462. static void
  463. snd_nm256_capture_stop(struct nm256 *chip)
  464. {
  465. /* Disable recording engine. */
  466. snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0);
  467. }
  468. static int
  469. snd_nm256_playback_trigger(struct snd_pcm_substream *substream, int cmd)
  470. {
  471. struct nm256 *chip = snd_pcm_substream_chip(substream);
  472. struct nm256_stream *s = substream->runtime->private_data;
  473. int err = 0;
  474. if (snd_BUG_ON(!s))
  475. return -ENXIO;
  476. spin_lock(&chip->reg_lock);
  477. switch (cmd) {
  478. case SNDRV_PCM_TRIGGER_RESUME:
  479. s->suspended = 0;
  480. /* fallthru */
  481. case SNDRV_PCM_TRIGGER_START:
  482. if (! s->running) {
  483. snd_nm256_playback_start(chip, s, substream);
  484. s->running = 1;
  485. }
  486. break;
  487. case SNDRV_PCM_TRIGGER_SUSPEND:
  488. s->suspended = 1;
  489. /* fallthru */
  490. case SNDRV_PCM_TRIGGER_STOP:
  491. if (s->running) {
  492. snd_nm256_playback_stop(chip);
  493. s->running = 0;
  494. }
  495. break;
  496. default:
  497. err = -EINVAL;
  498. break;
  499. }
  500. spin_unlock(&chip->reg_lock);
  501. return err;
  502. }
  503. static int
  504. snd_nm256_capture_trigger(struct snd_pcm_substream *substream, int cmd)
  505. {
  506. struct nm256 *chip = snd_pcm_substream_chip(substream);
  507. struct nm256_stream *s = substream->runtime->private_data;
  508. int err = 0;
  509. if (snd_BUG_ON(!s))
  510. return -ENXIO;
  511. spin_lock(&chip->reg_lock);
  512. switch (cmd) {
  513. case SNDRV_PCM_TRIGGER_START:
  514. case SNDRV_PCM_TRIGGER_RESUME:
  515. if (! s->running) {
  516. snd_nm256_capture_start(chip, s, substream);
  517. s->running = 1;
  518. }
  519. break;
  520. case SNDRV_PCM_TRIGGER_STOP:
  521. case SNDRV_PCM_TRIGGER_SUSPEND:
  522. if (s->running) {
  523. snd_nm256_capture_stop(chip);
  524. s->running = 0;
  525. }
  526. break;
  527. default:
  528. err = -EINVAL;
  529. break;
  530. }
  531. spin_unlock(&chip->reg_lock);
  532. return err;
  533. }
  534. /*
  535. * prepare playback/capture channel
  536. */
  537. static int snd_nm256_pcm_prepare(struct snd_pcm_substream *substream)
  538. {
  539. struct nm256 *chip = snd_pcm_substream_chip(substream);
  540. struct snd_pcm_runtime *runtime = substream->runtime;
  541. struct nm256_stream *s = runtime->private_data;
  542. if (snd_BUG_ON(!s))
  543. return -ENXIO;
  544. s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size);
  545. s->period_size = frames_to_bytes(runtime, substream->runtime->period_size);
  546. s->periods = substream->runtime->periods;
  547. s->cur_period = 0;
  548. spin_lock_irq(&chip->reg_lock);
  549. s->running = 0;
  550. snd_nm256_set_format(chip, s, substream);
  551. spin_unlock_irq(&chip->reg_lock);
  552. return 0;
  553. }
  554. /*
  555. * get the current pointer
  556. */
  557. static snd_pcm_uframes_t
  558. snd_nm256_playback_pointer(struct snd_pcm_substream *substream)
  559. {
  560. struct nm256 *chip = snd_pcm_substream_chip(substream);
  561. struct nm256_stream *s = substream->runtime->private_data;
  562. unsigned long curp;
  563. if (snd_BUG_ON(!s))
  564. return 0;
  565. curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf;
  566. curp %= s->dma_size;
  567. return bytes_to_frames(substream->runtime, curp);
  568. }
  569. static snd_pcm_uframes_t
  570. snd_nm256_capture_pointer(struct snd_pcm_substream *substream)
  571. {
  572. struct nm256 *chip = snd_pcm_substream_chip(substream);
  573. struct nm256_stream *s = substream->runtime->private_data;
  574. unsigned long curp;
  575. if (snd_BUG_ON(!s))
  576. return 0;
  577. curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf;
  578. curp %= s->dma_size;
  579. return bytes_to_frames(substream->runtime, curp);
  580. }
  581. /* Remapped I/O space can be accessible as pointer on i386 */
  582. /* This might be changed in the future */
  583. #ifndef __i386__
  584. /*
  585. * silence / copy for playback
  586. */
  587. static int
  588. snd_nm256_playback_silence(struct snd_pcm_substream *substream,
  589. int channel, /* not used (interleaved data) */
  590. snd_pcm_uframes_t pos,
  591. snd_pcm_uframes_t count)
  592. {
  593. struct snd_pcm_runtime *runtime = substream->runtime;
  594. struct nm256_stream *s = runtime->private_data;
  595. count = frames_to_bytes(runtime, count);
  596. pos = frames_to_bytes(runtime, pos);
  597. memset_io(s->bufptr + pos, 0, count);
  598. return 0;
  599. }
  600. static int
  601. snd_nm256_playback_copy(struct snd_pcm_substream *substream,
  602. int channel, /* not used (interleaved data) */
  603. snd_pcm_uframes_t pos,
  604. void __user *src,
  605. snd_pcm_uframes_t count)
  606. {
  607. struct snd_pcm_runtime *runtime = substream->runtime;
  608. struct nm256_stream *s = runtime->private_data;
  609. count = frames_to_bytes(runtime, count);
  610. pos = frames_to_bytes(runtime, pos);
  611. if (copy_from_user_toio(s->bufptr + pos, src, count))
  612. return -EFAULT;
  613. return 0;
  614. }
  615. /*
  616. * copy to user
  617. */
  618. static int
  619. snd_nm256_capture_copy(struct snd_pcm_substream *substream,
  620. int channel, /* not used (interleaved data) */
  621. snd_pcm_uframes_t pos,
  622. void __user *dst,
  623. snd_pcm_uframes_t count)
  624. {
  625. struct snd_pcm_runtime *runtime = substream->runtime;
  626. struct nm256_stream *s = runtime->private_data;
  627. count = frames_to_bytes(runtime, count);
  628. pos = frames_to_bytes(runtime, pos);
  629. if (copy_to_user_fromio(dst, s->bufptr + pos, count))
  630. return -EFAULT;
  631. return 0;
  632. }
  633. #endif /* !__i386__ */
  634. /*
  635. * update playback/capture watermarks
  636. */
  637. /* spinlock held! */
  638. static void
  639. snd_nm256_playback_update(struct nm256 *chip)
  640. {
  641. struct nm256_stream *s;
  642. s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK];
  643. if (s->running && s->substream) {
  644. spin_unlock(&chip->reg_lock);
  645. snd_pcm_period_elapsed(s->substream);
  646. spin_lock(&chip->reg_lock);
  647. snd_nm256_playback_mark(chip, s);
  648. }
  649. }
  650. /* spinlock held! */
  651. static void
  652. snd_nm256_capture_update(struct nm256 *chip)
  653. {
  654. struct nm256_stream *s;
  655. s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE];
  656. if (s->running && s->substream) {
  657. spin_unlock(&chip->reg_lock);
  658. snd_pcm_period_elapsed(s->substream);
  659. spin_lock(&chip->reg_lock);
  660. snd_nm256_capture_mark(chip, s);
  661. }
  662. }
  663. /*
  664. * hardware info
  665. */
  666. static struct snd_pcm_hardware snd_nm256_playback =
  667. {
  668. .info = SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID |
  669. SNDRV_PCM_INFO_INTERLEAVED |
  670. /*SNDRV_PCM_INFO_PAUSE |*/
  671. SNDRV_PCM_INFO_RESUME,
  672. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  673. .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
  674. .rate_min = 8000,
  675. .rate_max = 48000,
  676. .channels_min = 1,
  677. .channels_max = 2,
  678. .periods_min = 2,
  679. .periods_max = 1024,
  680. .buffer_bytes_max = 128 * 1024,
  681. .period_bytes_min = 256,
  682. .period_bytes_max = 128 * 1024,
  683. };
  684. static struct snd_pcm_hardware snd_nm256_capture =
  685. {
  686. .info = SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID |
  687. SNDRV_PCM_INFO_INTERLEAVED |
  688. /*SNDRV_PCM_INFO_PAUSE |*/
  689. SNDRV_PCM_INFO_RESUME,
  690. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  691. .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
  692. .rate_min = 8000,
  693. .rate_max = 48000,
  694. .channels_min = 1,
  695. .channels_max = 2,
  696. .periods_min = 2,
  697. .periods_max = 1024,
  698. .buffer_bytes_max = 128 * 1024,
  699. .period_bytes_min = 256,
  700. .period_bytes_max = 128 * 1024,
  701. };
  702. /* set dma transfer size */
  703. static int snd_nm256_pcm_hw_params(struct snd_pcm_substream *substream,
  704. struct snd_pcm_hw_params *hw_params)
  705. {
  706. /* area and addr are already set and unchanged */
  707. substream->runtime->dma_bytes = params_buffer_bytes(hw_params);
  708. return 0;
  709. }
  710. /*
  711. * open
  712. */
  713. static void snd_nm256_setup_stream(struct nm256 *chip, struct nm256_stream *s,
  714. struct snd_pcm_substream *substream,
  715. struct snd_pcm_hardware *hw_ptr)
  716. {
  717. struct snd_pcm_runtime *runtime = substream->runtime;
  718. s->running = 0;
  719. runtime->hw = *hw_ptr;
  720. runtime->hw.buffer_bytes_max = s->bufsize;
  721. runtime->hw.period_bytes_max = s->bufsize / 2;
  722. runtime->dma_area = (void __force *) s->bufptr;
  723. runtime->dma_addr = s->bufptr_addr;
  724. runtime->dma_bytes = s->bufsize;
  725. runtime->private_data = s;
  726. s->substream = substream;
  727. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  728. &constraints_rates);
  729. }
  730. static int
  731. snd_nm256_playback_open(struct snd_pcm_substream *substream)
  732. {
  733. struct nm256 *chip = snd_pcm_substream_chip(substream);
  734. if (snd_nm256_acquire_irq(chip) < 0)
  735. return -EBUSY;
  736. snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK],
  737. substream, &snd_nm256_playback);
  738. return 0;
  739. }
  740. static int
  741. snd_nm256_capture_open(struct snd_pcm_substream *substream)
  742. {
  743. struct nm256 *chip = snd_pcm_substream_chip(substream);
  744. if (snd_nm256_acquire_irq(chip) < 0)
  745. return -EBUSY;
  746. snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE],
  747. substream, &snd_nm256_capture);
  748. return 0;
  749. }
  750. /*
  751. * close - we don't have to do special..
  752. */
  753. static int
  754. snd_nm256_playback_close(struct snd_pcm_substream *substream)
  755. {
  756. struct nm256 *chip = snd_pcm_substream_chip(substream);
  757. snd_nm256_release_irq(chip);
  758. return 0;
  759. }
  760. static int
  761. snd_nm256_capture_close(struct snd_pcm_substream *substream)
  762. {
  763. struct nm256 *chip = snd_pcm_substream_chip(substream);
  764. snd_nm256_release_irq(chip);
  765. return 0;
  766. }
  767. /*
  768. * create a pcm instance
  769. */
  770. static struct snd_pcm_ops snd_nm256_playback_ops = {
  771. .open = snd_nm256_playback_open,
  772. .close = snd_nm256_playback_close,
  773. .ioctl = snd_pcm_lib_ioctl,
  774. .hw_params = snd_nm256_pcm_hw_params,
  775. .prepare = snd_nm256_pcm_prepare,
  776. .trigger = snd_nm256_playback_trigger,
  777. .pointer = snd_nm256_playback_pointer,
  778. #ifndef __i386__
  779. .copy = snd_nm256_playback_copy,
  780. .silence = snd_nm256_playback_silence,
  781. #endif
  782. .mmap = snd_pcm_lib_mmap_iomem,
  783. };
  784. static struct snd_pcm_ops snd_nm256_capture_ops = {
  785. .open = snd_nm256_capture_open,
  786. .close = snd_nm256_capture_close,
  787. .ioctl = snd_pcm_lib_ioctl,
  788. .hw_params = snd_nm256_pcm_hw_params,
  789. .prepare = snd_nm256_pcm_prepare,
  790. .trigger = snd_nm256_capture_trigger,
  791. .pointer = snd_nm256_capture_pointer,
  792. #ifndef __i386__
  793. .copy = snd_nm256_capture_copy,
  794. #endif
  795. .mmap = snd_pcm_lib_mmap_iomem,
  796. };
  797. static int __devinit
  798. snd_nm256_pcm(struct nm256 *chip, int device)
  799. {
  800. struct snd_pcm *pcm;
  801. int i, err;
  802. for (i = 0; i < 2; i++) {
  803. struct nm256_stream *s = &chip->streams[i];
  804. s->bufptr = chip->buffer + (s->buf - chip->buffer_start);
  805. s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start);
  806. }
  807. err = snd_pcm_new(chip->card, chip->card->driver, device,
  808. 1, 1, &pcm);
  809. if (err < 0)
  810. return err;
  811. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops);
  812. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops);
  813. pcm->private_data = chip;
  814. pcm->info_flags = 0;
  815. chip->pcm = pcm;
  816. return 0;
  817. }
  818. /*
  819. * Initialize the hardware.
  820. */
  821. static void
  822. snd_nm256_init_chip(struct nm256 *chip)
  823. {
  824. /* Reset everything. */
  825. snd_nm256_writeb(chip, 0x0, 0x11);
  826. snd_nm256_writew(chip, 0x214, 0);
  827. /* stop sounds.. */
  828. //snd_nm256_playback_stop(chip);
  829. //snd_nm256_capture_stop(chip);
  830. }
  831. static irqreturn_t
  832. snd_nm256_intr_check(struct nm256 *chip)
  833. {
  834. if (chip->badintrcount++ > 1000) {
  835. /*
  836. * I'm not sure if the best thing is to stop the card from
  837. * playing or just release the interrupt (after all, we're in
  838. * a bad situation, so doing fancy stuff may not be such a good
  839. * idea).
  840. *
  841. * I worry about the card engine continuing to play noise
  842. * over and over, however--that could become a very
  843. * obnoxious problem. And we know that when this usually
  844. * happens things are fairly safe, it just means the user's
  845. * inserted a PCMCIA card and someone's spamming us with IRQ 9s.
  846. */
  847. if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
  848. snd_nm256_playback_stop(chip);
  849. if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
  850. snd_nm256_capture_stop(chip);
  851. chip->badintrcount = 0;
  852. return IRQ_HANDLED;
  853. }
  854. return IRQ_NONE;
  855. }
  856. /*
  857. * Handle a potential interrupt for the device referred to by DEV_ID.
  858. *
  859. * I don't like the cut-n-paste job here either between the two routines,
  860. * but there are sufficient differences between the two interrupt handlers
  861. * that parameterizing it isn't all that great either. (Could use a macro,
  862. * I suppose...yucky bleah.)
  863. */
  864. static irqreturn_t
  865. snd_nm256_interrupt(int irq, void *dev_id)
  866. {
  867. struct nm256 *chip = dev_id;
  868. u16 status;
  869. u8 cbyte;
  870. status = snd_nm256_readw(chip, NM_INT_REG);
  871. /* Not ours. */
  872. if (status == 0)
  873. return snd_nm256_intr_check(chip);
  874. chip->badintrcount = 0;
  875. /* Rather boring; check for individual interrupts and process them. */
  876. spin_lock(&chip->reg_lock);
  877. if (status & NM_PLAYBACK_INT) {
  878. status &= ~NM_PLAYBACK_INT;
  879. NM_ACK_INT(chip, NM_PLAYBACK_INT);
  880. snd_nm256_playback_update(chip);
  881. }
  882. if (status & NM_RECORD_INT) {
  883. status &= ~NM_RECORD_INT;
  884. NM_ACK_INT(chip, NM_RECORD_INT);
  885. snd_nm256_capture_update(chip);
  886. }
  887. if (status & NM_MISC_INT_1) {
  888. status &= ~NM_MISC_INT_1;
  889. NM_ACK_INT(chip, NM_MISC_INT_1);
  890. snd_printd("NM256: Got misc interrupt #1\n");
  891. snd_nm256_writew(chip, NM_INT_REG, 0x8000);
  892. cbyte = snd_nm256_readb(chip, 0x400);
  893. snd_nm256_writeb(chip, 0x400, cbyte | 2);
  894. }
  895. if (status & NM_MISC_INT_2) {
  896. status &= ~NM_MISC_INT_2;
  897. NM_ACK_INT(chip, NM_MISC_INT_2);
  898. snd_printd("NM256: Got misc interrupt #2\n");
  899. cbyte = snd_nm256_readb(chip, 0x400);
  900. snd_nm256_writeb(chip, 0x400, cbyte & ~2);
  901. }
  902. /* Unknown interrupt. */
  903. if (status) {
  904. snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
  905. status);
  906. /* Pray. */
  907. NM_ACK_INT(chip, status);
  908. }
  909. spin_unlock(&chip->reg_lock);
  910. return IRQ_HANDLED;
  911. }
  912. /*
  913. * Handle a potential interrupt for the device referred to by DEV_ID.
  914. * This handler is for the 256ZX, and is very similar to the non-ZX
  915. * routine.
  916. */
  917. static irqreturn_t
  918. snd_nm256_interrupt_zx(int irq, void *dev_id)
  919. {
  920. struct nm256 *chip = dev_id;
  921. u32 status;
  922. u8 cbyte;
  923. status = snd_nm256_readl(chip, NM_INT_REG);
  924. /* Not ours. */
  925. if (status == 0)
  926. return snd_nm256_intr_check(chip);
  927. chip->badintrcount = 0;
  928. /* Rather boring; check for individual interrupts and process them. */
  929. spin_lock(&chip->reg_lock);
  930. if (status & NM2_PLAYBACK_INT) {
  931. status &= ~NM2_PLAYBACK_INT;
  932. NM2_ACK_INT(chip, NM2_PLAYBACK_INT);
  933. snd_nm256_playback_update(chip);
  934. }
  935. if (status & NM2_RECORD_INT) {
  936. status &= ~NM2_RECORD_INT;
  937. NM2_ACK_INT(chip, NM2_RECORD_INT);
  938. snd_nm256_capture_update(chip);
  939. }
  940. if (status & NM2_MISC_INT_1) {
  941. status &= ~NM2_MISC_INT_1;
  942. NM2_ACK_INT(chip, NM2_MISC_INT_1);
  943. snd_printd("NM256: Got misc interrupt #1\n");
  944. cbyte = snd_nm256_readb(chip, 0x400);
  945. snd_nm256_writeb(chip, 0x400, cbyte | 2);
  946. }
  947. if (status & NM2_MISC_INT_2) {
  948. status &= ~NM2_MISC_INT_2;
  949. NM2_ACK_INT(chip, NM2_MISC_INT_2);
  950. snd_printd("NM256: Got misc interrupt #2\n");
  951. cbyte = snd_nm256_readb(chip, 0x400);
  952. snd_nm256_writeb(chip, 0x400, cbyte & ~2);
  953. }
  954. /* Unknown interrupt. */
  955. if (status) {
  956. snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
  957. status);
  958. /* Pray. */
  959. NM2_ACK_INT(chip, status);
  960. }
  961. spin_unlock(&chip->reg_lock);
  962. return IRQ_HANDLED;
  963. }
  964. /*
  965. * AC97 interface
  966. */
  967. /*
  968. * Waits for the mixer to become ready to be written; returns a zero value
  969. * if it timed out.
  970. */
  971. static int
  972. snd_nm256_ac97_ready(struct nm256 *chip)
  973. {
  974. int timeout = 10;
  975. u32 testaddr;
  976. u16 testb;
  977. testaddr = chip->mixer_status_offset;
  978. testb = chip->mixer_status_mask;
  979. /*
  980. * Loop around waiting for the mixer to become ready.
  981. */
  982. while (timeout-- > 0) {
  983. if ((snd_nm256_readw(chip, testaddr) & testb) == 0)
  984. return 1;
  985. udelay(100);
  986. }
  987. return 0;
  988. }
  989. /*
  990. * Initial register values to be written to the AC97 mixer.
  991. * While most of these are identical to the reset values, we do this
  992. * so that we have most of the register contents cached--this avoids
  993. * reading from the mixer directly (which seems to be problematic,
  994. * probably due to ignorance).
  995. */
  996. struct initialValues {
  997. unsigned short reg;
  998. unsigned short value;
  999. };
  1000. static struct initialValues nm256_ac97_init_val[] =
  1001. {
  1002. { AC97_MASTER, 0x8000 },
  1003. { AC97_HEADPHONE, 0x8000 },
  1004. { AC97_MASTER_MONO, 0x8000 },
  1005. { AC97_PC_BEEP, 0x8000 },
  1006. { AC97_PHONE, 0x8008 },
  1007. { AC97_MIC, 0x8000 },
  1008. { AC97_LINE, 0x8808 },
  1009. { AC97_CD, 0x8808 },
  1010. { AC97_VIDEO, 0x8808 },
  1011. { AC97_AUX, 0x8808 },
  1012. { AC97_PCM, 0x8808 },
  1013. { AC97_REC_SEL, 0x0000 },
  1014. { AC97_REC_GAIN, 0x0B0B },
  1015. { AC97_GENERAL_PURPOSE, 0x0000 },
  1016. { AC97_3D_CONTROL, 0x8000 },
  1017. { AC97_VENDOR_ID1, 0x8384 },
  1018. { AC97_VENDOR_ID2, 0x7609 },
  1019. };
  1020. static int nm256_ac97_idx(unsigned short reg)
  1021. {
  1022. int i;
  1023. for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++)
  1024. if (nm256_ac97_init_val[i].reg == reg)
  1025. return i;
  1026. return -1;
  1027. }
  1028. /*
  1029. * some nm256 easily crash when reading from mixer registers
  1030. * thus we're treating it as a write-only mixer and cache the
  1031. * written values
  1032. */
  1033. static unsigned short
  1034. snd_nm256_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  1035. {
  1036. struct nm256 *chip = ac97->private_data;
  1037. int idx = nm256_ac97_idx(reg);
  1038. if (idx < 0)
  1039. return 0;
  1040. return chip->ac97_regs[idx];
  1041. }
  1042. /*
  1043. */
  1044. static void
  1045. snd_nm256_ac97_write(struct snd_ac97 *ac97,
  1046. unsigned short reg, unsigned short val)
  1047. {
  1048. struct nm256 *chip = ac97->private_data;
  1049. int tries = 2;
  1050. int idx = nm256_ac97_idx(reg);
  1051. u32 base;
  1052. if (idx < 0)
  1053. return;
  1054. base = chip->mixer_base;
  1055. snd_nm256_ac97_ready(chip);
  1056. /* Wait for the write to take, too. */
  1057. while (tries-- > 0) {
  1058. snd_nm256_writew(chip, base + reg, val);
  1059. msleep(1); /* a little delay here seems better.. */
  1060. if (snd_nm256_ac97_ready(chip)) {
  1061. /* successful write: set cache */
  1062. chip->ac97_regs[idx] = val;
  1063. return;
  1064. }
  1065. }
  1066. snd_printd("nm256: ac97 codec not ready..\n");
  1067. }
  1068. /* static resolution table */
  1069. static struct snd_ac97_res_table nm256_res_table[] = {
  1070. { AC97_MASTER, 0x1f1f },
  1071. { AC97_HEADPHONE, 0x1f1f },
  1072. { AC97_MASTER_MONO, 0x001f },
  1073. { AC97_PC_BEEP, 0x001f },
  1074. { AC97_PHONE, 0x001f },
  1075. { AC97_MIC, 0x001f },
  1076. { AC97_LINE, 0x1f1f },
  1077. { AC97_CD, 0x1f1f },
  1078. { AC97_VIDEO, 0x1f1f },
  1079. { AC97_AUX, 0x1f1f },
  1080. { AC97_PCM, 0x1f1f },
  1081. { AC97_REC_GAIN, 0x0f0f },
  1082. { } /* terminator */
  1083. };
  1084. /* initialize the ac97 into a known state */
  1085. static void
  1086. snd_nm256_ac97_reset(struct snd_ac97 *ac97)
  1087. {
  1088. struct nm256 *chip = ac97->private_data;
  1089. /* Reset the mixer. 'Tis magic! */
  1090. snd_nm256_writeb(chip, 0x6c0, 1);
  1091. if (! chip->reset_workaround) {
  1092. /* Dell latitude LS will lock up by this */
  1093. snd_nm256_writeb(chip, 0x6cc, 0x87);
  1094. }
  1095. if (! chip->reset_workaround_2) {
  1096. /* Dell latitude CSx will lock up by this */
  1097. snd_nm256_writeb(chip, 0x6cc, 0x80);
  1098. snd_nm256_writeb(chip, 0x6cc, 0x0);
  1099. }
  1100. if (! chip->in_resume) {
  1101. int i;
  1102. for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) {
  1103. /* preload the cache, so as to avoid even a single
  1104. * read of the mixer regs
  1105. */
  1106. snd_nm256_ac97_write(ac97, nm256_ac97_init_val[i].reg,
  1107. nm256_ac97_init_val[i].value);
  1108. }
  1109. }
  1110. }
  1111. /* create an ac97 mixer interface */
  1112. static int __devinit
  1113. snd_nm256_mixer(struct nm256 *chip)
  1114. {
  1115. struct snd_ac97_bus *pbus;
  1116. struct snd_ac97_template ac97;
  1117. int err;
  1118. static struct snd_ac97_bus_ops ops = {
  1119. .reset = snd_nm256_ac97_reset,
  1120. .write = snd_nm256_ac97_write,
  1121. .read = snd_nm256_ac97_read,
  1122. };
  1123. chip->ac97_regs = kcalloc(ARRAY_SIZE(nm256_ac97_init_val),
  1124. sizeof(short), GFP_KERNEL);
  1125. if (! chip->ac97_regs)
  1126. return -ENOMEM;
  1127. if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
  1128. return err;
  1129. memset(&ac97, 0, sizeof(ac97));
  1130. ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */
  1131. ac97.private_data = chip;
  1132. ac97.res_table = nm256_res_table;
  1133. pbus->no_vra = 1;
  1134. err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
  1135. if (err < 0)
  1136. return err;
  1137. if (! (chip->ac97->id & (0xf0000000))) {
  1138. /* looks like an invalid id */
  1139. sprintf(chip->card->mixername, "%s AC97", chip->card->driver);
  1140. }
  1141. return 0;
  1142. }
  1143. /*
  1144. * See if the signature left by the NM256 BIOS is intact; if so, we use
  1145. * the associated address as the end of our audio buffer in the video
  1146. * RAM.
  1147. */
  1148. static int __devinit
  1149. snd_nm256_peek_for_sig(struct nm256 *chip)
  1150. {
  1151. /* The signature is located 1K below the end of video RAM. */
  1152. void __iomem *temp;
  1153. /* Default buffer end is 5120 bytes below the top of RAM. */
  1154. unsigned long pointer_found = chip->buffer_end - 0x1400;
  1155. u32 sig;
  1156. temp = ioremap_nocache(chip->buffer_addr + chip->buffer_end - 0x400, 16);
  1157. if (temp == NULL) {
  1158. snd_printk(KERN_ERR "Unable to scan for card signature in video RAM\n");
  1159. return -EBUSY;
  1160. }
  1161. sig = readl(temp);
  1162. if ((sig & NM_SIG_MASK) == NM_SIGNATURE) {
  1163. u32 pointer = readl(temp + 4);
  1164. /*
  1165. * If it's obviously invalid, don't use it
  1166. */
  1167. if (pointer == 0xffffffff ||
  1168. pointer < chip->buffer_size ||
  1169. pointer > chip->buffer_end) {
  1170. snd_printk(KERN_ERR "invalid signature found: 0x%x\n", pointer);
  1171. iounmap(temp);
  1172. return -ENODEV;
  1173. } else {
  1174. pointer_found = pointer;
  1175. printk(KERN_INFO "nm256: found card signature in video RAM: 0x%x\n",
  1176. pointer);
  1177. }
  1178. }
  1179. iounmap(temp);
  1180. chip->buffer_end = pointer_found;
  1181. return 0;
  1182. }
  1183. #ifdef CONFIG_PM
  1184. /*
  1185. * APM event handler, so the card is properly reinitialized after a power
  1186. * event.
  1187. */
  1188. static int nm256_suspend(struct pci_dev *pci, pm_message_t state)
  1189. {
  1190. struct snd_card *card = pci_get_drvdata(pci);
  1191. struct nm256 *chip = card->private_data;
  1192. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  1193. snd_pcm_suspend_all(chip->pcm);
  1194. snd_ac97_suspend(chip->ac97);
  1195. chip->coeffs_current = 0;
  1196. pci_disable_device(pci);
  1197. pci_save_state(pci);
  1198. pci_set_power_state(pci, pci_choose_state(pci, state));
  1199. return 0;
  1200. }
  1201. static int nm256_resume(struct pci_dev *pci)
  1202. {
  1203. struct snd_card *card = pci_get_drvdata(pci);
  1204. struct nm256 *chip = card->private_data;
  1205. int i;
  1206. /* Perform a full reset on the hardware */
  1207. chip->in_resume = 1;
  1208. pci_set_power_state(pci, PCI_D0);
  1209. pci_restore_state(pci);
  1210. if (pci_enable_device(pci) < 0) {
  1211. printk(KERN_ERR "nm256: pci_enable_device failed, "
  1212. "disabling device\n");
  1213. snd_card_disconnect(card);
  1214. return -EIO;
  1215. }
  1216. pci_set_master(pci);
  1217. snd_nm256_init_chip(chip);
  1218. /* restore ac97 */
  1219. snd_ac97_resume(chip->ac97);
  1220. for (i = 0; i < 2; i++) {
  1221. struct nm256_stream *s = &chip->streams[i];
  1222. if (s->substream && s->suspended) {
  1223. spin_lock_irq(&chip->reg_lock);
  1224. snd_nm256_set_format(chip, s, s->substream);
  1225. spin_unlock_irq(&chip->reg_lock);
  1226. }
  1227. }
  1228. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  1229. chip->in_resume = 0;
  1230. return 0;
  1231. }
  1232. #endif /* CONFIG_PM */
  1233. static int snd_nm256_free(struct nm256 *chip)
  1234. {
  1235. if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
  1236. snd_nm256_playback_stop(chip);
  1237. if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
  1238. snd_nm256_capture_stop(chip);
  1239. if (chip->irq >= 0)
  1240. free_irq(chip->irq, chip);
  1241. if (chip->cport)
  1242. iounmap(chip->cport);
  1243. if (chip->buffer)
  1244. iounmap(chip->buffer);
  1245. release_and_free_resource(chip->res_cport);
  1246. release_and_free_resource(chip->res_buffer);
  1247. pci_disable_device(chip->pci);
  1248. kfree(chip->ac97_regs);
  1249. kfree(chip);
  1250. return 0;
  1251. }
  1252. static int snd_nm256_dev_free(struct snd_device *device)
  1253. {
  1254. struct nm256 *chip = device->device_data;
  1255. return snd_nm256_free(chip);
  1256. }
  1257. static int __devinit
  1258. snd_nm256_create(struct snd_card *card, struct pci_dev *pci,
  1259. struct nm256 **chip_ret)
  1260. {
  1261. struct nm256 *chip;
  1262. int err, pval;
  1263. static struct snd_device_ops ops = {
  1264. .dev_free = snd_nm256_dev_free,
  1265. };
  1266. u32 addr;
  1267. *chip_ret = NULL;
  1268. if ((err = pci_enable_device(pci)) < 0)
  1269. return err;
  1270. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  1271. if (chip == NULL) {
  1272. pci_disable_device(pci);
  1273. return -ENOMEM;
  1274. }
  1275. chip->card = card;
  1276. chip->pci = pci;
  1277. chip->use_cache = use_cache;
  1278. spin_lock_init(&chip->reg_lock);
  1279. chip->irq = -1;
  1280. mutex_init(&chip->irq_mutex);
  1281. /* store buffer sizes in bytes */
  1282. chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024;
  1283. chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024;
  1284. /*
  1285. * The NM256 has two memory ports. The first port is nothing
  1286. * more than a chunk of video RAM, which is used as the I/O ring
  1287. * buffer. The second port has the actual juicy stuff (like the
  1288. * mixer and the playback engine control registers).
  1289. */
  1290. chip->buffer_addr = pci_resource_start(pci, 0);
  1291. chip->cport_addr = pci_resource_start(pci, 1);
  1292. /* Init the memory port info. */
  1293. /* remap control port (#2) */
  1294. chip->res_cport = request_mem_region(chip->cport_addr, NM_PORT2_SIZE,
  1295. card->driver);
  1296. if (chip->res_cport == NULL) {
  1297. snd_printk(KERN_ERR "memory region 0x%lx (size 0x%x) busy\n",
  1298. chip->cport_addr, NM_PORT2_SIZE);
  1299. err = -EBUSY;
  1300. goto __error;
  1301. }
  1302. chip->cport = ioremap_nocache(chip->cport_addr, NM_PORT2_SIZE);
  1303. if (chip->cport == NULL) {
  1304. snd_printk(KERN_ERR "unable to map control port %lx\n", chip->cport_addr);
  1305. err = -ENOMEM;
  1306. goto __error;
  1307. }
  1308. if (!strcmp(card->driver, "NM256AV")) {
  1309. /* Ok, try to see if this is a non-AC97 version of the hardware. */
  1310. pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE);
  1311. if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) {
  1312. if (! force_ac97) {
  1313. printk(KERN_ERR "nm256: no ac97 is found!\n");
  1314. printk(KERN_ERR " force the driver to load by "
  1315. "passing in the module parameter\n");
  1316. printk(KERN_ERR " force_ac97=1\n");
  1317. printk(KERN_ERR " or try sb16, opl3sa2, or "
  1318. "cs423x drivers instead.\n");
  1319. err = -ENXIO;
  1320. goto __error;
  1321. }
  1322. }
  1323. chip->buffer_end = 2560 * 1024;
  1324. chip->interrupt = snd_nm256_interrupt;
  1325. chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET;
  1326. chip->mixer_status_mask = NM_MIXER_READY_MASK;
  1327. } else {
  1328. /* Not sure if there is any relevant detect for the ZX or not. */
  1329. if (snd_nm256_readb(chip, 0xa0b) != 0)
  1330. chip->buffer_end = 6144 * 1024;
  1331. else
  1332. chip->buffer_end = 4096 * 1024;
  1333. chip->interrupt = snd_nm256_interrupt_zx;
  1334. chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET;
  1335. chip->mixer_status_mask = NM2_MIXER_READY_MASK;
  1336. }
  1337. chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize +
  1338. chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
  1339. if (chip->use_cache)
  1340. chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4;
  1341. else
  1342. chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE;
  1343. if (buffer_top >= chip->buffer_size && buffer_top < chip->buffer_end)
  1344. chip->buffer_end = buffer_top;
  1345. else {
  1346. /* get buffer end pointer from signature */
  1347. if ((err = snd_nm256_peek_for_sig(chip)) < 0)
  1348. goto __error;
  1349. }
  1350. chip->buffer_start = chip->buffer_end - chip->buffer_size;
  1351. chip->buffer_addr += chip->buffer_start;
  1352. printk(KERN_INFO "nm256: Mapping port 1 from 0x%x - 0x%x\n",
  1353. chip->buffer_start, chip->buffer_end);
  1354. chip->res_buffer = request_mem_region(chip->buffer_addr,
  1355. chip->buffer_size,
  1356. card->driver);
  1357. if (chip->res_buffer == NULL) {
  1358. snd_printk(KERN_ERR "nm256: buffer 0x%lx (size 0x%x) busy\n",
  1359. chip->buffer_addr, chip->buffer_size);
  1360. err = -EBUSY;
  1361. goto __error;
  1362. }
  1363. chip->buffer = ioremap_nocache(chip->buffer_addr, chip->buffer_size);
  1364. if (chip->buffer == NULL) {
  1365. err = -ENOMEM;
  1366. snd_printk(KERN_ERR "unable to map ring buffer at %lx\n", chip->buffer_addr);
  1367. goto __error;
  1368. }
  1369. /* set offsets */
  1370. addr = chip->buffer_start;
  1371. chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr;
  1372. addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize;
  1373. chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr;
  1374. addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
  1375. if (chip->use_cache) {
  1376. chip->all_coeff_buf = addr;
  1377. } else {
  1378. chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr;
  1379. addr += NM_MAX_PLAYBACK_COEF_SIZE;
  1380. chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr;
  1381. }
  1382. /* Fixed setting. */
  1383. chip->mixer_base = NM_MIXER_OFFSET;
  1384. chip->coeffs_current = 0;
  1385. snd_nm256_init_chip(chip);
  1386. // pci_set_master(pci); /* needed? */
  1387. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0)
  1388. goto __error;
  1389. snd_card_set_dev(card, &pci->dev);
  1390. *chip_ret = chip;
  1391. return 0;
  1392. __error:
  1393. snd_nm256_free(chip);
  1394. return err;
  1395. }
  1396. enum { NM_BLACKLISTED, NM_RESET_WORKAROUND, NM_RESET_WORKAROUND_2 };
  1397. static struct snd_pci_quirk nm256_quirks[] __devinitdata = {
  1398. /* HP omnibook 4150 has cs4232 codec internally */
  1399. SND_PCI_QUIRK(0x103c, 0x0007, "HP omnibook 4150", NM_BLACKLISTED),
  1400. /* Reset workarounds to avoid lock-ups */
  1401. SND_PCI_QUIRK(0x104d, 0x8041, "Sony PCG-F305", NM_RESET_WORKAROUND),
  1402. SND_PCI_QUIRK(0x1028, 0x0080, "Dell Latitude LS", NM_RESET_WORKAROUND),
  1403. SND_PCI_QUIRK(0x1028, 0x0091, "Dell Latitude CSx", NM_RESET_WORKAROUND_2),
  1404. { } /* terminator */
  1405. };
  1406. static int __devinit snd_nm256_probe(struct pci_dev *pci,
  1407. const struct pci_device_id *pci_id)
  1408. {
  1409. struct snd_card *card;
  1410. struct nm256 *chip;
  1411. int err;
  1412. const struct snd_pci_quirk *q;
  1413. q = snd_pci_quirk_lookup(pci, nm256_quirks);
  1414. if (q) {
  1415. snd_printdd(KERN_INFO "nm256: Enabled quirk for %s.\n", q->name);
  1416. switch (q->value) {
  1417. case NM_BLACKLISTED:
  1418. printk(KERN_INFO "nm256: The device is blacklisted. "
  1419. "Loading stopped\n");
  1420. return -ENODEV;
  1421. case NM_RESET_WORKAROUND_2:
  1422. reset_workaround_2 = 1;
  1423. /* Fall-through */
  1424. case NM_RESET_WORKAROUND:
  1425. reset_workaround = 1;
  1426. break;
  1427. }
  1428. }
  1429. err = snd_card_create(index, id, THIS_MODULE, 0, &card);
  1430. if (err < 0)
  1431. return err;
  1432. switch (pci->device) {
  1433. case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO:
  1434. strcpy(card->driver, "NM256AV");
  1435. break;
  1436. case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO:
  1437. strcpy(card->driver, "NM256ZX");
  1438. break;
  1439. case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO:
  1440. strcpy(card->driver, "NM256XL+");
  1441. break;
  1442. default:
  1443. snd_printk(KERN_ERR "invalid device id 0x%x\n", pci->device);
  1444. snd_card_free(card);
  1445. return -EINVAL;
  1446. }
  1447. if (vaio_hack)
  1448. buffer_top = 0x25a800; /* this avoids conflicts with XFree86 server */
  1449. if (playback_bufsize < 4)
  1450. playback_bufsize = 4;
  1451. if (playback_bufsize > 128)
  1452. playback_bufsize = 128;
  1453. if (capture_bufsize < 4)
  1454. capture_bufsize = 4;
  1455. if (capture_bufsize > 128)
  1456. capture_bufsize = 128;
  1457. if ((err = snd_nm256_create(card, pci, &chip)) < 0) {
  1458. snd_card_free(card);
  1459. return err;
  1460. }
  1461. card->private_data = chip;
  1462. if (reset_workaround) {
  1463. snd_printdd(KERN_INFO "nm256: reset_workaround activated\n");
  1464. chip->reset_workaround = 1;
  1465. }
  1466. if (reset_workaround_2) {
  1467. snd_printdd(KERN_INFO "nm256: reset_workaround_2 activated\n");
  1468. chip->reset_workaround_2 = 1;
  1469. }
  1470. if ((err = snd_nm256_pcm(chip, 0)) < 0 ||
  1471. (err = snd_nm256_mixer(chip)) < 0) {
  1472. snd_card_free(card);
  1473. return err;
  1474. }
  1475. sprintf(card->shortname, "NeoMagic %s", card->driver);
  1476. sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d",
  1477. card->shortname,
  1478. chip->buffer_addr, chip->cport_addr, chip->irq);
  1479. if ((err = snd_card_register(card)) < 0) {
  1480. snd_card_free(card);
  1481. return err;
  1482. }
  1483. pci_set_drvdata(pci, card);
  1484. return 0;
  1485. }
  1486. static void __devexit snd_nm256_remove(struct pci_dev *pci)
  1487. {
  1488. snd_card_free(pci_get_drvdata(pci));
  1489. pci_set_drvdata(pci, NULL);
  1490. }
  1491. static struct pci_driver driver = {
  1492. .name = KBUILD_MODNAME,
  1493. .id_table = snd_nm256_ids,
  1494. .probe = snd_nm256_probe,
  1495. .remove = __devexit_p(snd_nm256_remove),
  1496. #ifdef CONFIG_PM
  1497. .suspend = nm256_suspend,
  1498. .resume = nm256_resume,
  1499. #endif
  1500. };
  1501. static int __init alsa_card_nm256_init(void)
  1502. {
  1503. return pci_register_driver(&driver);
  1504. }
  1505. static void __exit alsa_card_nm256_exit(void)
  1506. {
  1507. pci_unregister_driver(&driver);
  1508. }
  1509. module_init(alsa_card_nm256_init)
  1510. module_exit(alsa_card_nm256_exit)