max63xx_wdt.c 6.3 KB

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  1. /*
  2. * drivers/char/watchdog/max63xx_wdt.c
  3. *
  4. * Driver for max63{69,70,71,72,73,74} watchdog timers
  5. *
  6. * Copyright (C) 2009 Marc Zyngier <maz@misterjones.org>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. *
  12. * This driver assumes the watchdog pins are memory mapped (as it is
  13. * the case for the Arcom Zeus). Should it be connected over GPIOs or
  14. * another interface, some abstraction will have to be introduced.
  15. */
  16. #include <linux/module.h>
  17. #include <linux/moduleparam.h>
  18. #include <linux/types.h>
  19. #include <linux/kernel.h>
  20. #include <linux/miscdevice.h>
  21. #include <linux/watchdog.h>
  22. #include <linux/init.h>
  23. #include <linux/bitops.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/io.h>
  27. #include <linux/slab.h>
  28. #define DEFAULT_HEARTBEAT 60
  29. #define MAX_HEARTBEAT 60
  30. static unsigned int heartbeat = DEFAULT_HEARTBEAT;
  31. static bool nowayout = WATCHDOG_NOWAYOUT;
  32. /*
  33. * Memory mapping: a single byte, 3 first lower bits to select bit 3
  34. * to ping the watchdog.
  35. */
  36. #define MAX6369_WDSET (7 << 0)
  37. #define MAX6369_WDI (1 << 3)
  38. static DEFINE_SPINLOCK(io_lock);
  39. static int nodelay;
  40. static void __iomem *wdt_base;
  41. /*
  42. * The timeout values used are actually the absolute minimum the chip
  43. * offers. Typical values on my board are slightly over twice as long
  44. * (10s setting ends up with a 25s timeout), and can be up to 3 times
  45. * the nominal setting (according to the datasheet). So please take
  46. * these values with a grain of salt. Same goes for the initial delay
  47. * "feature". Only max6373/74 have a few settings without this initial
  48. * delay (selected with the "nodelay" parameter).
  49. *
  50. * I also decided to remove from the tables any timeout smaller than a
  51. * second, as it looked completly overkill...
  52. */
  53. /* Timeouts in second */
  54. struct max63xx_timeout {
  55. u8 wdset;
  56. u8 tdelay;
  57. u8 twd;
  58. };
  59. static struct max63xx_timeout max6369_table[] = {
  60. { 5, 1, 1 },
  61. { 6, 10, 10 },
  62. { 7, 60, 60 },
  63. { },
  64. };
  65. static struct max63xx_timeout max6371_table[] = {
  66. { 6, 60, 3 },
  67. { 7, 60, 60 },
  68. { },
  69. };
  70. static struct max63xx_timeout max6373_table[] = {
  71. { 2, 60, 1 },
  72. { 5, 0, 1 },
  73. { 1, 3, 3 },
  74. { 7, 60, 10 },
  75. { 6, 0, 10 },
  76. { },
  77. };
  78. static struct max63xx_timeout *current_timeout;
  79. static struct max63xx_timeout *
  80. max63xx_select_timeout(struct max63xx_timeout *table, int value)
  81. {
  82. while (table->twd) {
  83. if (value <= table->twd) {
  84. if (nodelay && table->tdelay == 0)
  85. return table;
  86. if (!nodelay)
  87. return table;
  88. }
  89. table++;
  90. }
  91. return NULL;
  92. }
  93. static int max63xx_wdt_ping(struct watchdog_device *wdd)
  94. {
  95. u8 val;
  96. spin_lock(&io_lock);
  97. val = __raw_readb(wdt_base);
  98. __raw_writeb(val | MAX6369_WDI, wdt_base);
  99. __raw_writeb(val & ~MAX6369_WDI, wdt_base);
  100. spin_unlock(&io_lock);
  101. return 0;
  102. }
  103. static int max63xx_wdt_start(struct watchdog_device *wdd)
  104. {
  105. struct max63xx_timeout *entry = watchdog_get_drvdata(wdd);
  106. u8 val;
  107. spin_lock(&io_lock);
  108. val = __raw_readb(wdt_base);
  109. val &= ~MAX6369_WDSET;
  110. val |= entry->wdset;
  111. __raw_writeb(val, wdt_base);
  112. spin_unlock(&io_lock);
  113. /* check for a edge triggered startup */
  114. if (entry->tdelay == 0)
  115. max63xx_wdt_ping(wdd);
  116. return 0;
  117. }
  118. static int max63xx_wdt_stop(struct watchdog_device *wdd)
  119. {
  120. u8 val;
  121. spin_lock(&io_lock);
  122. val = __raw_readb(wdt_base);
  123. val &= ~MAX6369_WDSET;
  124. val |= 3;
  125. __raw_writeb(val, wdt_base);
  126. spin_unlock(&io_lock);
  127. return 0;
  128. }
  129. static const struct watchdog_info max63xx_wdt_info = {
  130. .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
  131. .identity = "max63xx Watchdog",
  132. };
  133. static const struct watchdog_ops max63xx_wdt_ops = {
  134. .owner = THIS_MODULE,
  135. .start = max63xx_wdt_start,
  136. .stop = max63xx_wdt_stop,
  137. .ping = max63xx_wdt_ping,
  138. };
  139. static struct watchdog_device max63xx_wdt_dev = {
  140. .info = &max63xx_wdt_info,
  141. .ops = &max63xx_wdt_ops,
  142. };
  143. static int __devinit max63xx_wdt_probe(struct platform_device *pdev)
  144. {
  145. struct resource *wdt_mem;
  146. struct max63xx_timeout *table;
  147. table = (struct max63xx_timeout *)pdev->id_entry->driver_data;
  148. if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
  149. heartbeat = DEFAULT_HEARTBEAT;
  150. dev_info(&pdev->dev, "requesting %ds heartbeat\n", heartbeat);
  151. current_timeout = max63xx_select_timeout(table, heartbeat);
  152. if (!current_timeout) {
  153. dev_err(&pdev->dev, "unable to satisfy heartbeat request\n");
  154. return -EINVAL;
  155. }
  156. dev_info(&pdev->dev, "using %ds heartbeat with %ds initial delay\n",
  157. current_timeout->twd, current_timeout->tdelay);
  158. heartbeat = current_timeout->twd;
  159. wdt_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  160. wdt_base = devm_request_and_ioremap(&pdev->dev, wdt_mem);
  161. if (!wdt_base)
  162. return -ENOMEM;
  163. max63xx_wdt_dev.timeout = heartbeat;
  164. watchdog_set_nowayout(&max63xx_wdt_dev, nowayout);
  165. watchdog_set_drvdata(&max63xx_wdt_dev, current_timeout);
  166. return watchdog_register_device(&max63xx_wdt_dev);
  167. }
  168. static int __devexit max63xx_wdt_remove(struct platform_device *pdev)
  169. {
  170. watchdog_unregister_device(&max63xx_wdt_dev);
  171. return 0;
  172. }
  173. static struct platform_device_id max63xx_id_table[] = {
  174. { "max6369_wdt", (kernel_ulong_t)max6369_table, },
  175. { "max6370_wdt", (kernel_ulong_t)max6369_table, },
  176. { "max6371_wdt", (kernel_ulong_t)max6371_table, },
  177. { "max6372_wdt", (kernel_ulong_t)max6371_table, },
  178. { "max6373_wdt", (kernel_ulong_t)max6373_table, },
  179. { "max6374_wdt", (kernel_ulong_t)max6373_table, },
  180. { },
  181. };
  182. MODULE_DEVICE_TABLE(platform, max63xx_id_table);
  183. static struct platform_driver max63xx_wdt_driver = {
  184. .probe = max63xx_wdt_probe,
  185. .remove = __devexit_p(max63xx_wdt_remove),
  186. .id_table = max63xx_id_table,
  187. .driver = {
  188. .name = "max63xx_wdt",
  189. .owner = THIS_MODULE,
  190. },
  191. };
  192. module_platform_driver(max63xx_wdt_driver);
  193. MODULE_AUTHOR("Marc Zyngier <maz@misterjones.org>");
  194. MODULE_DESCRIPTION("max63xx Watchdog Driver");
  195. module_param(heartbeat, int, 0);
  196. MODULE_PARM_DESC(heartbeat,
  197. "Watchdog heartbeat period in seconds from 1 to "
  198. __MODULE_STRING(MAX_HEARTBEAT) ", default "
  199. __MODULE_STRING(DEFAULT_HEARTBEAT));
  200. module_param(nowayout, bool, 0);
  201. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  202. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  203. module_param(nodelay, int, 0);
  204. MODULE_PARM_DESC(nodelay,
  205. "Force selection of a timeout setting without initial delay "
  206. "(max6373/74 only, default=0)");
  207. MODULE_LICENSE("GPL");
  208. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);