spi-ti-ssp.c 9.2 KB

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  1. /*
  2. * Sequencer Serial Port (SSP) based SPI master driver
  3. *
  4. * Copyright (C) 2010 Texas Instruments Inc
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/err.h>
  22. #include <linux/completion.h>
  23. #include <linux/delay.h>
  24. #include <linux/module.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/spi/spi.h>
  27. #include <linux/mfd/ti_ssp.h>
  28. #define MODE_BITS (SPI_CPHA | SPI_CPOL | SPI_CS_HIGH)
  29. struct ti_ssp_spi {
  30. struct spi_master *master;
  31. struct device *dev;
  32. spinlock_t lock;
  33. struct list_head msg_queue;
  34. struct completion complete;
  35. bool shutdown;
  36. struct workqueue_struct *workqueue;
  37. struct work_struct work;
  38. u8 mode, bpw;
  39. int cs_active;
  40. u32 pc_en, pc_dis, pc_wr, pc_rd;
  41. void (*select)(int cs);
  42. };
  43. static u32 ti_ssp_spi_rx(struct ti_ssp_spi *hw)
  44. {
  45. u32 ret;
  46. ti_ssp_run(hw->dev, hw->pc_rd, 0, &ret);
  47. return ret;
  48. }
  49. static void ti_ssp_spi_tx(struct ti_ssp_spi *hw, u32 data)
  50. {
  51. ti_ssp_run(hw->dev, hw->pc_wr, data << (32 - hw->bpw), NULL);
  52. }
  53. static int ti_ssp_spi_txrx(struct ti_ssp_spi *hw, struct spi_message *msg,
  54. struct spi_transfer *t)
  55. {
  56. int count;
  57. if (hw->bpw <= 8) {
  58. u8 *rx = t->rx_buf;
  59. const u8 *tx = t->tx_buf;
  60. for (count = 0; count < t->len; count += 1) {
  61. if (t->tx_buf)
  62. ti_ssp_spi_tx(hw, *tx++);
  63. if (t->rx_buf)
  64. *rx++ = ti_ssp_spi_rx(hw);
  65. }
  66. } else if (hw->bpw <= 16) {
  67. u16 *rx = t->rx_buf;
  68. const u16 *tx = t->tx_buf;
  69. for (count = 0; count < t->len; count += 2) {
  70. if (t->tx_buf)
  71. ti_ssp_spi_tx(hw, *tx++);
  72. if (t->rx_buf)
  73. *rx++ = ti_ssp_spi_rx(hw);
  74. }
  75. } else {
  76. u32 *rx = t->rx_buf;
  77. const u32 *tx = t->tx_buf;
  78. for (count = 0; count < t->len; count += 4) {
  79. if (t->tx_buf)
  80. ti_ssp_spi_tx(hw, *tx++);
  81. if (t->rx_buf)
  82. *rx++ = ti_ssp_spi_rx(hw);
  83. }
  84. }
  85. msg->actual_length += count; /* bytes transferred */
  86. dev_dbg(&msg->spi->dev, "xfer %s%s, %d bytes, %d bpw, count %d%s\n",
  87. t->tx_buf ? "tx" : "", t->rx_buf ? "rx" : "", t->len,
  88. hw->bpw, count, (count < t->len) ? " (under)" : "");
  89. return (count < t->len) ? -EIO : 0; /* left over data */
  90. }
  91. static void ti_ssp_spi_chip_select(struct ti_ssp_spi *hw, int cs_active)
  92. {
  93. cs_active = !!cs_active;
  94. if (cs_active == hw->cs_active)
  95. return;
  96. ti_ssp_run(hw->dev, cs_active ? hw->pc_en : hw->pc_dis, 0, NULL);
  97. hw->cs_active = cs_active;
  98. }
  99. #define __SHIFT_OUT(bits) (SSP_OPCODE_SHIFT | SSP_OUT_MODE | \
  100. cs_en | clk | SSP_COUNT((bits) * 2 - 1))
  101. #define __SHIFT_IN(bits) (SSP_OPCODE_SHIFT | SSP_IN_MODE | \
  102. cs_en | clk | SSP_COUNT((bits) * 2 - 1))
  103. static int ti_ssp_spi_setup_transfer(struct ti_ssp_spi *hw, u8 bpw, u8 mode)
  104. {
  105. int error, idx = 0;
  106. u32 seqram[16];
  107. u32 cs_en, cs_dis, clk;
  108. u32 topbits, botbits;
  109. mode &= MODE_BITS;
  110. if (mode == hw->mode && bpw == hw->bpw)
  111. return 0;
  112. cs_en = (mode & SPI_CS_HIGH) ? SSP_CS_HIGH : SSP_CS_LOW;
  113. cs_dis = (mode & SPI_CS_HIGH) ? SSP_CS_LOW : SSP_CS_HIGH;
  114. clk = (mode & SPI_CPOL) ? SSP_CLK_HIGH : SSP_CLK_LOW;
  115. /* Construct instructions */
  116. /* Disable Chip Select */
  117. hw->pc_dis = idx;
  118. seqram[idx++] = SSP_OPCODE_DIRECT | SSP_OUT_MODE | cs_dis | clk;
  119. seqram[idx++] = SSP_OPCODE_STOP | SSP_OUT_MODE | cs_dis | clk;
  120. /* Enable Chip Select */
  121. hw->pc_en = idx;
  122. seqram[idx++] = SSP_OPCODE_DIRECT | SSP_OUT_MODE | cs_en | clk;
  123. seqram[idx++] = SSP_OPCODE_STOP | SSP_OUT_MODE | cs_en | clk;
  124. /* Reads and writes need to be split for bpw > 16 */
  125. topbits = (bpw > 16) ? 16 : bpw;
  126. botbits = bpw - topbits;
  127. /* Write */
  128. hw->pc_wr = idx;
  129. seqram[idx++] = __SHIFT_OUT(topbits) | SSP_ADDR_REG;
  130. if (botbits)
  131. seqram[idx++] = __SHIFT_OUT(botbits) | SSP_DATA_REG;
  132. seqram[idx++] = SSP_OPCODE_STOP | SSP_OUT_MODE | cs_en | clk;
  133. /* Read */
  134. hw->pc_rd = idx;
  135. if (botbits)
  136. seqram[idx++] = __SHIFT_IN(botbits) | SSP_ADDR_REG;
  137. seqram[idx++] = __SHIFT_IN(topbits) | SSP_DATA_REG;
  138. seqram[idx++] = SSP_OPCODE_STOP | SSP_OUT_MODE | cs_en | clk;
  139. error = ti_ssp_load(hw->dev, 0, seqram, idx);
  140. if (error < 0)
  141. return error;
  142. error = ti_ssp_set_mode(hw->dev, ((mode & SPI_CPHA) ?
  143. 0 : SSP_EARLY_DIN));
  144. if (error < 0)
  145. return error;
  146. hw->bpw = bpw;
  147. hw->mode = mode;
  148. return error;
  149. }
  150. static void ti_ssp_spi_work(struct work_struct *work)
  151. {
  152. struct ti_ssp_spi *hw = container_of(work, struct ti_ssp_spi, work);
  153. spin_lock(&hw->lock);
  154. while (!list_empty(&hw->msg_queue)) {
  155. struct spi_message *m;
  156. struct spi_device *spi;
  157. struct spi_transfer *t = NULL;
  158. int status = 0;
  159. m = container_of(hw->msg_queue.next, struct spi_message,
  160. queue);
  161. list_del_init(&m->queue);
  162. spin_unlock(&hw->lock);
  163. spi = m->spi;
  164. if (hw->select)
  165. hw->select(spi->chip_select);
  166. list_for_each_entry(t, &m->transfers, transfer_list) {
  167. int bpw = spi->bits_per_word;
  168. int xfer_status;
  169. if (t->bits_per_word)
  170. bpw = t->bits_per_word;
  171. if (ti_ssp_spi_setup_transfer(hw, bpw, spi->mode) < 0)
  172. break;
  173. ti_ssp_spi_chip_select(hw, 1);
  174. xfer_status = ti_ssp_spi_txrx(hw, m, t);
  175. if (xfer_status < 0)
  176. status = xfer_status;
  177. if (t->delay_usecs)
  178. udelay(t->delay_usecs);
  179. if (t->cs_change)
  180. ti_ssp_spi_chip_select(hw, 0);
  181. }
  182. ti_ssp_spi_chip_select(hw, 0);
  183. m->status = status;
  184. m->complete(m->context);
  185. spin_lock(&hw->lock);
  186. }
  187. if (hw->shutdown)
  188. complete(&hw->complete);
  189. spin_unlock(&hw->lock);
  190. }
  191. static int ti_ssp_spi_setup(struct spi_device *spi)
  192. {
  193. if (spi->bits_per_word > 32)
  194. return -EINVAL;
  195. return 0;
  196. }
  197. static int ti_ssp_spi_transfer(struct spi_device *spi, struct spi_message *m)
  198. {
  199. struct ti_ssp_spi *hw;
  200. struct spi_transfer *t;
  201. int error = 0;
  202. m->actual_length = 0;
  203. m->status = -EINPROGRESS;
  204. hw = spi_master_get_devdata(spi->master);
  205. if (list_empty(&m->transfers) || !m->complete)
  206. return -EINVAL;
  207. list_for_each_entry(t, &m->transfers, transfer_list) {
  208. if (t->len && !(t->rx_buf || t->tx_buf)) {
  209. dev_err(&spi->dev, "invalid xfer, no buffer\n");
  210. return -EINVAL;
  211. }
  212. if (t->len && t->rx_buf && t->tx_buf) {
  213. dev_err(&spi->dev, "invalid xfer, full duplex\n");
  214. return -EINVAL;
  215. }
  216. if (t->bits_per_word > 32) {
  217. dev_err(&spi->dev, "invalid xfer width %d\n",
  218. t->bits_per_word);
  219. return -EINVAL;
  220. }
  221. }
  222. spin_lock(&hw->lock);
  223. if (hw->shutdown) {
  224. error = -ESHUTDOWN;
  225. goto error_unlock;
  226. }
  227. list_add_tail(&m->queue, &hw->msg_queue);
  228. queue_work(hw->workqueue, &hw->work);
  229. error_unlock:
  230. spin_unlock(&hw->lock);
  231. return error;
  232. }
  233. static int __devinit ti_ssp_spi_probe(struct platform_device *pdev)
  234. {
  235. const struct ti_ssp_spi_data *pdata;
  236. struct ti_ssp_spi *hw;
  237. struct spi_master *master;
  238. struct device *dev = &pdev->dev;
  239. int error = 0;
  240. pdata = dev->platform_data;
  241. if (!pdata) {
  242. dev_err(dev, "platform data not found\n");
  243. return -EINVAL;
  244. }
  245. master = spi_alloc_master(dev, sizeof(struct ti_ssp_spi));
  246. if (!master) {
  247. dev_err(dev, "cannot allocate SPI master\n");
  248. return -ENOMEM;
  249. }
  250. hw = spi_master_get_devdata(master);
  251. platform_set_drvdata(pdev, hw);
  252. hw->master = master;
  253. hw->dev = dev;
  254. hw->select = pdata->select;
  255. spin_lock_init(&hw->lock);
  256. init_completion(&hw->complete);
  257. INIT_LIST_HEAD(&hw->msg_queue);
  258. INIT_WORK(&hw->work, ti_ssp_spi_work);
  259. hw->workqueue = create_singlethread_workqueue(dev_name(dev));
  260. if (!hw->workqueue) {
  261. error = -ENOMEM;
  262. dev_err(dev, "work queue creation failed\n");
  263. goto error_wq;
  264. }
  265. error = ti_ssp_set_iosel(hw->dev, pdata->iosel);
  266. if (error < 0) {
  267. dev_err(dev, "io setup failed\n");
  268. goto error_iosel;
  269. }
  270. master->bus_num = pdev->id;
  271. master->num_chipselect = pdata->num_cs;
  272. master->mode_bits = MODE_BITS;
  273. master->flags = SPI_MASTER_HALF_DUPLEX;
  274. master->setup = ti_ssp_spi_setup;
  275. master->transfer = ti_ssp_spi_transfer;
  276. error = spi_register_master(master);
  277. if (error) {
  278. dev_err(dev, "master registration failed\n");
  279. goto error_reg;
  280. }
  281. return 0;
  282. error_reg:
  283. error_iosel:
  284. destroy_workqueue(hw->workqueue);
  285. error_wq:
  286. spi_master_put(master);
  287. return error;
  288. }
  289. static int __devexit ti_ssp_spi_remove(struct platform_device *pdev)
  290. {
  291. struct ti_ssp_spi *hw = platform_get_drvdata(pdev);
  292. int error;
  293. hw->shutdown = 1;
  294. while (!list_empty(&hw->msg_queue)) {
  295. error = wait_for_completion_interruptible(&hw->complete);
  296. if (error < 0) {
  297. hw->shutdown = 0;
  298. return error;
  299. }
  300. }
  301. destroy_workqueue(hw->workqueue);
  302. spi_unregister_master(hw->master);
  303. return 0;
  304. }
  305. static struct platform_driver ti_ssp_spi_driver = {
  306. .probe = ti_ssp_spi_probe,
  307. .remove = __devexit_p(ti_ssp_spi_remove),
  308. .driver = {
  309. .name = "ti-ssp-spi",
  310. .owner = THIS_MODULE,
  311. },
  312. };
  313. module_platform_driver(ti_ssp_spi_driver);
  314. MODULE_DESCRIPTION("SSP SPI Master");
  315. MODULE_AUTHOR("Cyril Chemparathy");
  316. MODULE_LICENSE("GPL");
  317. MODULE_ALIAS("platform:ti-ssp-spi");