nfc-nci.c 48 KB

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  1. /* Copyright (c) 2013, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/fs.h>
  15. #include <linux/reboot.h>
  16. #include <linux/slab.h>
  17. #include <linux/i2c.h>
  18. #include <linux/irq.h>
  19. #include <linux/delay.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/gpio.h>
  22. #include <linux/spinlock.h>
  23. #include <linux/poll.h>
  24. #include <linux/of_gpio.h>
  25. #include <linux/clk.h>
  26. #include <linux/of_device.h>
  27. #include <linux/regulator/consumer.h>
  28. #include "nfc-nci.h"
  29. #include <mach/gpiomux.h>
  30. #include <linux/pm_runtime.h>
  31. struct qca199x_platform_data {
  32. unsigned int irq_gpio;
  33. unsigned int irq_gpio_clk_req;
  34. unsigned int clk_req_irq_num;
  35. unsigned int dis_gpio;
  36. unsigned int clkreq_gpio;
  37. unsigned int reg;
  38. const char *clk_src_name;
  39. unsigned int clk_src_gpio;
  40. };
  41. static struct of_device_id msm_match_table[] = {
  42. {.compatible = "qcom,nfc-nci"},
  43. {}
  44. };
  45. MODULE_DEVICE_TABLE(of, msm_match_table);
  46. #define MAX_BUFFER_SIZE (780)
  47. #define PACKET_MAX_LENGTH (258)
  48. /* Read data */
  49. #define PACKET_HEADER_SIZE_NCI (4)
  50. #define PACKET_TYPE_NCI (16)
  51. #define MAX_PACKET_SIZE (PACKET_HEADER_SIZE_NCI + 255)
  52. #define MAX_QCA_REG (116)
  53. /* will timeout in approx. 100ms as 10us steps */
  54. #define NFC_RF_CLK_FREQ (19200000)
  55. #define NTF_TIMEOUT (25)
  56. #define CORE_RESET_RSP_GID (0x60)
  57. #define CORE_RESET_OID (0x00)
  58. #define CORE_RST_NTF_LENGTH (0x02)
  59. #define WAKE_TIMEOUT (1000)
  60. #define WAKE_REG (0x10)
  61. #define EFUSE_REG (0xA0)
  62. #define WAKEUP_SRC_TIMEOUT (2000)
  63. static void clk_req_update(struct work_struct *work);
  64. struct qca199x_dev {
  65. wait_queue_head_t read_wq;
  66. struct mutex read_mutex;
  67. struct i2c_client *client;
  68. struct miscdevice qca199x_device;
  69. /* NFC_IRQ new NCI data available */
  70. unsigned int irq_gpio;
  71. /* CLK_REQ IRQ to signal the state has changed */
  72. unsigned int irq_gpio_clk_req;
  73. /* Actual IRQ no. assigned to CLK_REQ */
  74. unsigned int clk_req_irq_num;
  75. unsigned int dis_gpio;
  76. unsigned int clkreq_gpio;
  77. /* NFC_IRQ state */
  78. bool irq_enabled;
  79. bool sent_first_nci_write;
  80. spinlock_t irq_enabled_lock;
  81. unsigned int count_irq;
  82. /* CLK_REQ IRQ state */
  83. bool irq_enabled_clk_req;
  84. spinlock_t irq_enabled_lock_clk_req;
  85. unsigned int count_irq_clk_req;
  86. enum nfcc_state state;
  87. /* CLK control */
  88. unsigned int clk_src_gpio;
  89. const char *clk_src_name;
  90. struct clk *s_clk;
  91. unsigned int core_reset_ntf;
  92. bool clk_run;
  93. struct work_struct msm_clock_controll_work;
  94. struct workqueue_struct *my_wq;
  95. };
  96. static int nfcc_reboot(struct notifier_block *notifier, unsigned long val,
  97. void *v);
  98. static int nfc_i2c_write(struct i2c_client *client, u8 *buf, int len);
  99. static int nfcc_hw_check(struct i2c_client *client, unsigned short curr_addr);
  100. static int nfcc_initialise(struct i2c_client *client, unsigned short curr_addr,
  101. struct qca199x_dev *qca199x_dev);
  102. static int qca199x_clock_select(struct qca199x_dev *qca199x_dev);
  103. static int qca199x_clock_deselect(struct qca199x_dev *qca199x_dev);
  104. /*
  105. * To allow filtering of nfc logging from user. This is set via
  106. * IOCTL NFC_KERNEL_LOGGING_MODE.
  107. */
  108. static int logging_level;
  109. /*
  110. * FTM-RAW-I2C RD/WR MODE
  111. */
  112. static struct devicemode device_mode;
  113. static int ftm_raw_write_mode;
  114. static int ftm_werr_code;
  115. unsigned int disable_ctrl;
  116. bool region2_sent;
  117. static void qca199x_init_stat(struct qca199x_dev *qca199x_dev)
  118. {
  119. qca199x_dev->count_irq = 0;
  120. }
  121. static void qca199x_disable_irq(struct qca199x_dev *qca199x_dev)
  122. {
  123. unsigned long flags;
  124. spin_lock_irqsave(&qca199x_dev->irq_enabled_lock, flags);
  125. if (qca199x_dev->irq_enabled) {
  126. disable_irq_nosync(qca199x_dev->client->irq);
  127. qca199x_dev->irq_enabled = false;
  128. }
  129. spin_unlock_irqrestore(&qca199x_dev->irq_enabled_lock, flags);
  130. }
  131. static void qca199x_enable_irq(struct qca199x_dev *qca199x_dev)
  132. {
  133. unsigned long flags;
  134. spin_lock_irqsave(&qca199x_dev->irq_enabled_lock, flags);
  135. if (!qca199x_dev->irq_enabled) {
  136. qca199x_dev->irq_enabled = true;
  137. enable_irq(qca199x_dev->client->irq);
  138. }
  139. spin_unlock_irqrestore(&qca199x_dev->irq_enabled_lock, flags);
  140. }
  141. static irqreturn_t qca199x_dev_irq_handler(int irq, void *dev_id)
  142. {
  143. struct qca199x_dev *qca199x_dev = dev_id;
  144. unsigned long flags;
  145. if (device_may_wakeup(&qca199x_dev->client->dev) &&
  146. (qca199x_dev->client->dev.power.is_suspended == true)) {
  147. dev_dbg(&qca199x_dev->client->dev,
  148. "%s: NFC:Processor in suspend state device_may_wakeup\n",
  149. __func__);
  150. /*
  151. * Keep system awake long enough to allow userspace
  152. * to process the packet.
  153. */
  154. pm_wakeup_event(&qca199x_dev->client->dev, WAKEUP_SRC_TIMEOUT);
  155. } else {
  156. dev_dbg(&qca199x_dev->client->dev,
  157. "%s: NFC:Processor not in suspend state\n", __func__);
  158. }
  159. spin_lock_irqsave(&qca199x_dev->irq_enabled_lock, flags);
  160. qca199x_dev->count_irq++;
  161. spin_unlock_irqrestore(&qca199x_dev->irq_enabled_lock, flags);
  162. wake_up(&qca199x_dev->read_wq);
  163. return IRQ_HANDLED;
  164. }
  165. static unsigned int nfc_poll(struct file *filp, poll_table *wait)
  166. {
  167. struct qca199x_dev *qca199x_dev = filp->private_data;
  168. unsigned int mask = 0;
  169. unsigned long flags;
  170. poll_wait(filp, &qca199x_dev->read_wq, wait);
  171. spin_lock_irqsave(&qca199x_dev->irq_enabled_lock, flags);
  172. if (qca199x_dev->count_irq > 0) {
  173. qca199x_dev->count_irq--;
  174. mask |= POLLIN | POLLRDNORM;
  175. }
  176. spin_unlock_irqrestore(&qca199x_dev->irq_enabled_lock, flags);
  177. return mask;
  178. }
  179. /* Handlers for CLK_REQ */
  180. static void qca199x_disable_irq_clk_req(struct qca199x_dev *qca199x_dev)
  181. {
  182. unsigned long flags;
  183. spin_lock_irqsave(&qca199x_dev->irq_enabled_lock_clk_req, flags);
  184. if (qca199x_dev->irq_enabled_clk_req) {
  185. disable_irq_nosync(qca199x_dev->clk_req_irq_num);
  186. qca199x_dev->irq_enabled_clk_req = false;
  187. }
  188. spin_unlock_irqrestore(&qca199x_dev->irq_enabled_lock_clk_req, flags);
  189. }
  190. static void qca199x_enable_irq_clk_req(struct qca199x_dev *qca199x_dev)
  191. {
  192. unsigned long flags;
  193. spin_lock_irqsave(&qca199x_dev->irq_enabled_lock_clk_req, flags);
  194. if (!qca199x_dev->irq_enabled_clk_req) {
  195. qca199x_dev->irq_enabled_clk_req = true;
  196. enable_irq(qca199x_dev->clk_req_irq_num);
  197. }
  198. spin_unlock_irqrestore(&qca199x_dev->irq_enabled_lock_clk_req, flags);
  199. }
  200. static irqreturn_t qca199x_dev_irq_handler_clk_req(int irq, void *dev_id)
  201. {
  202. struct qca199x_dev *qca199x_dev = dev_id;
  203. unsigned long flags;
  204. spin_lock_irqsave(&qca199x_dev->irq_enabled_lock_clk_req, flags);
  205. qca199x_dev->count_irq_clk_req++;
  206. spin_unlock_irqrestore(&qca199x_dev->irq_enabled_lock_clk_req, flags);
  207. queue_work(qca199x_dev->my_wq, &qca199x_dev->msm_clock_controll_work);
  208. return IRQ_HANDLED;
  209. }
  210. static struct gpiomux_setting nfc_clk_on = {
  211. .func = GPIOMUX_FUNC_2,
  212. .drv = GPIOMUX_DRV_2MA,
  213. .pull = GPIOMUX_PULL_NONE,
  214. };
  215. static struct gpiomux_setting nfc_clk_on_suspend = {
  216. .func = GPIOMUX_FUNC_2,
  217. .drv = GPIOMUX_DRV_2MA,
  218. .pull = GPIOMUX_PULL_DOWN,
  219. };
  220. static struct gpiomux_setting nfc_clk_off = {
  221. .func = GPIOMUX_FUNC_GPIO,
  222. .drv = GPIOMUX_DRV_2MA,
  223. .pull = GPIOMUX_PULL_DOWN,
  224. };
  225. static void clk_req_update(struct work_struct *work)
  226. {
  227. struct i2c_client *client;
  228. struct qca199x_dev *qca199x_dev;
  229. int gpio_clk_req_level = 0;
  230. qca199x_dev = container_of(work, struct qca199x_dev,
  231. msm_clock_controll_work);
  232. client = qca199x_dev->client;
  233. /* Read status level of CLK_REQ from NFC Controller, QCA199_x */
  234. gpio_clk_req_level = gpio_get_value(qca199x_dev->irq_gpio_clk_req);
  235. if (gpio_clk_req_level == 1) {
  236. if (qca199x_dev->clk_run == false) {
  237. msm_gpiomux_write(qca199x_dev->clk_src_gpio,
  238. GPIOMUX_ACTIVE, &nfc_clk_on, NULL);
  239. msm_gpiomux_write(qca199x_dev->clk_src_gpio,
  240. GPIOMUX_SUSPENDED, &nfc_clk_on_suspend, NULL);
  241. qca199x_dev->clk_run = true;
  242. }
  243. } else{
  244. if (qca199x_dev->clk_run == true) {
  245. msm_gpiomux_write(qca199x_dev->clk_src_gpio,
  246. GPIOMUX_ACTIVE, &nfc_clk_off, NULL);
  247. msm_gpiomux_write(qca199x_dev->clk_src_gpio,
  248. GPIOMUX_SUSPENDED, &nfc_clk_off, NULL);
  249. qca199x_dev->clk_run = false;
  250. }
  251. }
  252. }
  253. /*
  254. * ONLY for FTM-RAW-I2C Mode
  255. * Required to instigate a read, which comes from DT layer. This means we need
  256. * to spoof an interrupt and send a wake up event.
  257. */
  258. void ftm_raw_trigger_read(struct qca199x_dev *qca199x_dev)
  259. {
  260. unsigned long flags;
  261. spin_lock_irqsave(&qca199x_dev->irq_enabled_lock, flags);
  262. qca199x_dev->count_irq++;
  263. spin_unlock_irqrestore(&qca199x_dev->irq_enabled_lock, flags);
  264. wake_up(&qca199x_dev->read_wq);
  265. }
  266. static ssize_t nfc_read(struct file *filp, char __user *buf,
  267. size_t count, loff_t *offset)
  268. {
  269. struct qca199x_dev *qca199x_dev = filp->private_data;
  270. unsigned char tmp[MAX_BUFFER_SIZE], rd_byte;
  271. unsigned char len[PAYLOAD_HEADER_LENGTH];
  272. int total, length, ret;
  273. int ftm_rerr_code;
  274. enum ehandler_mode dmode;
  275. total = 0;
  276. length = 0;
  277. if (count > MAX_BUFFER_SIZE)
  278. count = MAX_BUFFER_SIZE;
  279. mutex_lock(&qca199x_dev->read_mutex);
  280. memset(tmp, 0, sizeof(tmp));
  281. memset(len, 0, sizeof(len));
  282. dmode = device_mode.handle_flavour;
  283. /* FTM-RAW-I2C RD/WR MODE - Special Case */
  284. if ((dmode == UNSOLICITED_FTM_RAW_MODE) ||
  285. (dmode == SOLICITED_FTM_RAW_MODE)) {
  286. /* READ */
  287. if ((ftm_raw_write_mode == 0) && (ftm_werr_code == 0)) {
  288. ftm_rerr_code = i2c_master_recv(qca199x_dev->client,
  289. &rd_byte, sizeof(rd_byte));
  290. if (ftm_rerr_code != sizeof(rd_byte)) {
  291. total = -EMSGSIZE;
  292. goto err;
  293. }
  294. if (ftm_rerr_code == 0x1)
  295. ftm_rerr_code = 0;
  296. tmp[0] = (unsigned char)ftm_rerr_code;
  297. tmp[1] = rd_byte;
  298. total = 2;
  299. ret = copy_to_user(buf, tmp, total);
  300. }
  301. /* WRITE */
  302. else if ((ftm_raw_write_mode == 1) || (ftm_werr_code != 0)) {
  303. tmp[0] = (unsigned char)ftm_werr_code;
  304. total = 1;
  305. ret = copy_to_user(buf, tmp, total);
  306. } else {
  307. /* Invalid case */
  308. total = 0;
  309. ret = copy_to_user(buf, tmp, total);
  310. }
  311. mutex_unlock(&qca199x_dev->read_mutex);
  312. goto done;
  313. }
  314. /* NORMAL NCI Behaviour */
  315. /* Read the header */
  316. ret = i2c_master_recv(qca199x_dev->client, len, PAYLOAD_HEADER_LENGTH);
  317. /*
  318. * We ignore all packets of length PAYLOAD_HEADER_LENGTH
  319. * or less (i.e <=3). In this case return a total length
  320. * of ZERO. So ALL PACKETS MUST HAVE A PAYLOAD.
  321. * If ret < 0 then this is an error code.
  322. */
  323. if (ret != PAYLOAD_HEADER_LENGTH) {
  324. if (ret < 0)
  325. total = ret;
  326. else
  327. total = 0;
  328. goto err;
  329. }
  330. length = len[PAYLOAD_HEADER_LENGTH - 1];
  331. if (length == 0) {
  332. ret = 0;
  333. total = ret;
  334. goto err;
  335. }
  336. /** make sure full packet fits in the buffer **/
  337. if ((length > 0) && ((length + PAYLOAD_HEADER_LENGTH) <= count)) {
  338. /* Read the packet */
  339. ret = i2c_master_recv(qca199x_dev->client, tmp, (length +
  340. PAYLOAD_HEADER_LENGTH));
  341. total = ret;
  342. if (ret < 0)
  343. goto err;
  344. }
  345. dev_dbg(&qca199x_dev->client->dev, "%s : NfcNciRx %x %x %x\n",
  346. __func__, tmp[0], tmp[1], tmp[2]);
  347. if (total > 0) {
  348. if ((total > count) || copy_to_user(buf, tmp, total)) {
  349. dev_err(&qca199x_dev->client->dev,
  350. "%s: failed to copy to user space, total = %d\n",
  351. __func__, total);
  352. total = -EFAULT;
  353. }
  354. }
  355. err:
  356. mutex_unlock(&qca199x_dev->read_mutex);
  357. done:
  358. return total;
  359. }
  360. /*
  361. * Local routine to read from nfcc buffer. This is called to clear any
  362. * pending receive messages in the nfcc's read buffer, which may be there
  363. * following a POR. In this way, the upper layers (Device Transport) will
  364. * associate the next rsp/ntf nci message with the next nci command to the
  365. * nfcc. Otherwise, the DT may interpret a ntf from the nfcc as being from
  366. * the nci core reset command when in fact it was already present in the
  367. * nfcc read buffer following a POR.
  368. */
  369. int nfcc_read_buff_svc(struct qca199x_dev *qca199x_dev)
  370. {
  371. unsigned char tmp[PACKET_MAX_LENGTH];
  372. unsigned char len[PAYLOAD_HEADER_LENGTH];
  373. int total, length, ret;
  374. total = 0;
  375. length = 0;
  376. mutex_lock(&qca199x_dev->read_mutex);
  377. memset(tmp, 0, sizeof(tmp));
  378. memset(len, 0, sizeof(len));
  379. /* Read the header */
  380. ret = i2c_master_recv(qca199x_dev->client, len, PAYLOAD_HEADER_LENGTH);
  381. if (ret < PAYLOAD_HEADER_LENGTH) {
  382. total = ret;
  383. goto leave;
  384. }
  385. length = len[PAYLOAD_HEADER_LENGTH - 1];
  386. if (length == 0) {
  387. ret = PAYLOAD_HEADER_LENGTH;
  388. total = ret;
  389. goto leave;
  390. }
  391. /** make sure full packet fits in the buffer **/
  392. if ((length > 0) && ((length + PAYLOAD_HEADER_LENGTH) <= PACKET_MAX_LENGTH)) {
  393. /* Read the packet */
  394. ret = i2c_master_recv(qca199x_dev->client, tmp, (length +
  395. PAYLOAD_HEADER_LENGTH));
  396. total = ret;
  397. if (ret != (length + PAYLOAD_HEADER_LENGTH))
  398. goto leave;
  399. }
  400. dev_dbg(&qca199x_dev->client->dev, "%s : NfcNciRx %x %x %x\n",
  401. __func__, tmp[0], tmp[1], tmp[2]);
  402. leave:
  403. mutex_unlock(&qca199x_dev->read_mutex);
  404. return total;
  405. }
  406. static ssize_t nfc_write(struct file *filp, const char __user *buf,
  407. size_t count, loff_t *offset)
  408. {
  409. struct qca199x_dev *qca199x_dev = filp->private_data;
  410. char tmp[MAX_BUFFER_SIZE];
  411. int ret = 0;
  412. enum ehandler_mode dmode;
  413. int nfcc_buffer = 0;
  414. if (count > MAX_BUFFER_SIZE) {
  415. dev_err(&qca199x_dev->client->dev, "%s: out of memory\n",
  416. __func__);
  417. return -ENOMEM;
  418. }
  419. if (copy_from_user(tmp, buf, count)) {
  420. dev_err(&qca199x_dev->client->dev,
  421. "%s: failed to copy from user space\n", __func__);
  422. return -EFAULT;
  423. }
  424. /*
  425. * A catch for when the DT is sending the initial NCI write
  426. * following a hardware POR. In this case we should clear any
  427. * pending messages in nfcc buffer and open the interrupt gate
  428. * for new messages coming from the nfcc.
  429. */
  430. if ((qca199x_dev->sent_first_nci_write == false) &&
  431. (qca199x_dev->irq_enabled == false)) {
  432. /* check rsp/ntf from nfcc read-side buffer */
  433. nfcc_buffer = nfcc_read_buff_svc(qca199x_dev);
  434. /* There has been an error while reading from nfcc */
  435. if (nfcc_buffer < 0) {
  436. dev_err(&qca199x_dev->client->dev,
  437. "%s: error while servicing nfcc read buffer\n"
  438. , __func__);
  439. }
  440. qca199x_dev->sent_first_nci_write = true;
  441. qca199x_enable_irq(qca199x_dev);
  442. }
  443. mutex_lock(&qca199x_dev->read_mutex);
  444. dmode = device_mode.handle_flavour;
  445. /* FTM-DIRECT-I2C RD/WR MODE */
  446. /* This is a special FTM-i2c mode case, where tester is not using NCI */
  447. if ((dmode == UNSOLICITED_FTM_RAW_MODE) ||
  448. (dmode == SOLICITED_FTM_RAW_MODE)) {
  449. /* Read From Register */
  450. if (count == 1) {
  451. ftm_raw_write_mode = 0;
  452. ret = i2c_master_send(qca199x_dev->client, tmp, count);
  453. if (ret == count)
  454. ftm_werr_code = 0;
  455. else
  456. ftm_werr_code = ret;
  457. ftm_raw_trigger_read(qca199x_dev);
  458. }
  459. /* Write to Register */
  460. if (count == 2) {
  461. ftm_raw_write_mode = 1;
  462. ret = i2c_master_send(qca199x_dev->client, tmp, count);
  463. if (ret == count)
  464. ftm_werr_code = 0;
  465. else
  466. ftm_werr_code = ret;
  467. ftm_raw_trigger_read(qca199x_dev);
  468. }
  469. } else {
  470. /* NORMAL NCI behaviour - NB :
  471. We can be in FTM mode here also */
  472. ret = i2c_master_send(qca199x_dev->client, tmp, count);
  473. }
  474. if (ret != count) {
  475. dev_err(&qca199x_dev->client->dev,
  476. "%s: failed to write %d\n", __func__, ret);
  477. ret = -EIO;
  478. }
  479. mutex_unlock(&qca199x_dev->read_mutex);
  480. /* If we detect a Region2 command prior to power-down */
  481. if ((tmp[0] == 0x2F) && (tmp[1] == 0x01) && (tmp[2] == 0x02) &&
  482. (tmp[3] == 0x08) && (tmp[4] == 0x00)) {
  483. region2_sent = true;
  484. }
  485. dev_dbg(&qca199x_dev->client->dev, "%s : NfcNciTx %x %x %x\n",
  486. __func__, tmp[0], tmp[1], tmp[2]);
  487. return ret;
  488. }
  489. static int nfc_open(struct inode *inode, struct file *filp)
  490. {
  491. int ret = 0;
  492. struct qca199x_dev *qca199x_dev = container_of(filp->private_data,
  493. struct qca199x_dev,
  494. qca199x_device);
  495. filp->private_data = qca199x_dev;
  496. qca199x_init_stat(qca199x_dev);
  497. /* Enable interrupts from NFCC NFC_INT new NCI data available */
  498. qca199x_enable_irq(qca199x_dev);
  499. if ((!strcmp(qca199x_dev->clk_src_name, "GPCLK")) ||
  500. (!strcmp(qca199x_dev->clk_src_name, "GPCLK2"))) {
  501. /* Enable interrupts from NFCC CLK_REQ */
  502. qca199x_enable_irq_clk_req(qca199x_dev);
  503. }
  504. dev_dbg(&qca199x_dev->client->dev,
  505. "%s: %d,%d\n", __func__, imajor(inode), iminor(inode));
  506. return ret;
  507. }
  508. /*
  509. * Wake/Sleep Mode
  510. */
  511. int nfcc_wake(int level, struct file *filp)
  512. {
  513. int r = 0;
  514. int time_taken = 0;
  515. unsigned char raw_nci_sleep[] = {0x2F, 0x03, 0x00};
  516. unsigned char raw_nci_wake[] = {0x10, 0x0F};
  517. /* Change slave address to 0xE */
  518. unsigned short slave_addr = 0xE;
  519. unsigned short curr_addr;
  520. unsigned char wake_status = WAKE_REG;
  521. struct qca199x_dev *qca199x_dev = filp->private_data;
  522. dev_dbg(&qca199x_dev->client->dev, "%s: info: %p\n",
  523. __func__, qca199x_dev);
  524. curr_addr = qca199x_dev->client->addr;
  525. if (level == NFCC_SLEEP) {
  526. /*
  527. * Normal NCI write
  528. */
  529. r = i2c_master_send(qca199x_dev->client, &raw_nci_sleep[0],
  530. sizeof(raw_nci_sleep));
  531. if (r != sizeof(raw_nci_sleep))
  532. return -EMSGSIZE;
  533. qca199x_dev->state = NFCC_STATE_NORMAL_SLEEP;
  534. } else {
  535. qca199x_dev->client->addr = slave_addr;
  536. r = nfc_i2c_write(qca199x_dev->client, &raw_nci_wake[0],
  537. sizeof(raw_nci_wake));
  538. if (r != sizeof(raw_nci_wake)) {
  539. r = -EMSGSIZE;
  540. dev_err(&qca199x_dev->client->dev,
  541. "%s: nci wake write failed. Check hardware\n",
  542. __func__);
  543. goto leave;
  544. }
  545. do {
  546. wake_status = WAKE_REG;
  547. r = nfc_i2c_write(qca199x_dev->client, &wake_status,
  548. sizeof(wake_status));
  549. if (r != sizeof(wake_status)) {
  550. r = -EMSGSIZE;
  551. dev_err(&qca199x_dev->client->dev,
  552. "%s: wake status write fail.Check hardware\n",
  553. __func__);
  554. goto leave;
  555. }
  556. /*
  557. * I2C line is low after ~10 usec
  558. */
  559. usleep_range(10, 15);
  560. r = i2c_master_recv(qca199x_dev->client, &wake_status,
  561. sizeof(wake_status));
  562. if (r != sizeof(wake_status)) {
  563. r = -EMSGSIZE;
  564. dev_err(&qca199x_dev->client->dev,
  565. "%s: wake status read fail.Check hardware\n",
  566. __func__);
  567. goto leave;
  568. }
  569. time_taken++;
  570. /*
  571. * Each NFCC wakeup cycle
  572. * takes about 0.5 ms
  573. */
  574. if ((wake_status & NCI_WAKE) != 0)
  575. /* NFCC wakeup time is between 0.5 and .52 ms */
  576. usleep_range(500, 550);
  577. } while ((wake_status & NCI_WAKE)
  578. && (time_taken < WAKE_TIMEOUT));
  579. if (time_taken >= WAKE_TIMEOUT) {
  580. dev_err(&qca199x_dev->client->dev,
  581. "%s: timed out to get wakeup bit\n", __func__);
  582. r = -EIO;
  583. goto leave;
  584. }
  585. r = 0;
  586. qca199x_dev->state = NFCC_STATE_NORMAL_WAKE;
  587. }
  588. leave:
  589. /* Restore original NFCC slave I2C address */
  590. qca199x_dev->client->addr = curr_addr;
  591. return r;
  592. }
  593. /*
  594. * Inside nfc_ioctl_power_states
  595. *
  596. * @brief ioctl functions
  597. *
  598. *
  599. * Device control
  600. * remove control via ioctl
  601. * (arg = 0): NFC_DISABLE GPIO = 0
  602. * (arg = 1): NFC_DISABLE GPIO = 1
  603. * NOT USED (arg = 2): FW_DL GPIO = 0
  604. * NOT USED (arg = 3): FW_DL GPIO = 1
  605. * (arg = 4): NFCC_WAKE = 1
  606. * (arg = 5): NFCC_WAKE = 0
  607. *
  608. *
  609. */
  610. int nfc_ioctl_power_states(struct file *filp, unsigned int cmd,
  611. unsigned long arg)
  612. {
  613. int r = 0;
  614. struct qca199x_dev *qca199x_dev = filp->private_data;
  615. if (arg == 0) {
  616. r = qca199x_clock_select(qca199x_dev);
  617. if (r < 0)
  618. goto err_req;
  619. dev_dbg(&qca199x_dev->client->dev, "gpio_set_value disable: %s: info: %p\n",
  620. __func__, qca199x_dev);
  621. gpio_set_value(qca199x_dev->dis_gpio, 0);
  622. usleep_range(1000, 1100);
  623. } else if (arg == 1) {
  624. /*
  625. * We are attempting a hardware reset so let us disable
  626. * interrupts to avoid spurious notifications to upper
  627. * layers.
  628. */
  629. qca199x_disable_irq(qca199x_dev);
  630. /* Deselection of clock */
  631. r = qca199x_clock_deselect(qca199x_dev);
  632. if (r < 0)
  633. goto err_req;
  634. /*
  635. * Also, set flag for initial NCI write following resetas
  636. * may wish to do some house keeping. Ensure no pending
  637. * messages in NFCC buffers which may be wrongly
  638. * construed as response to initial message
  639. */
  640. qca199x_dev->sent_first_nci_write = false;
  641. dev_dbg(&qca199x_dev->client->dev, "gpio_set_value enable: %s: info: %p\n",
  642. __func__, qca199x_dev);
  643. gpio_set_value(qca199x_dev->dis_gpio, 1);
  644. /* NFCC needs at least 100 ms to power cycle*/
  645. msleep(100);
  646. } else if (arg == 2) {
  647. mutex_lock(&qca199x_dev->read_mutex);
  648. dev_dbg(&qca199x_dev->client->dev, "before nfcc_initialise: %s: info: %p\n",
  649. __func__, qca199x_dev);
  650. r = nfcc_initialise(qca199x_dev->client, 0xE, qca199x_dev);
  651. dev_dbg(&qca199x_dev->client->dev, "after nfcc_initialise: %s: info: %p\n",
  652. __func__, qca199x_dev);
  653. /* Also reset first NCI write */
  654. qca199x_dev->sent_first_nci_write = false;
  655. mutex_unlock(&qca199x_dev->read_mutex);
  656. if (r) {
  657. dev_err(&qca199x_dev->client->dev,
  658. "nfc_ioctl_power_states: request nfcc initialise failed\n");
  659. goto err_req;
  660. }
  661. } else if (arg == 3) {
  662. msleep(20);
  663. } else if (arg == 4) {
  664. mutex_lock(&qca199x_dev->read_mutex);
  665. r = nfcc_wake(NFCC_WAKE, filp);
  666. dev_dbg(&qca199x_dev->client->dev, "nfcc wake: %s: info: %p\n",
  667. __func__, qca199x_dev);
  668. mutex_unlock(&qca199x_dev->read_mutex);
  669. } else if (arg == 5) {
  670. r = nfcc_wake(NFCC_SLEEP, filp);
  671. } else {
  672. r = -ENOIOCTLCMD;
  673. }
  674. err_req:
  675. return r;
  676. }
  677. /*
  678. * Inside nfc_ioctl_nfcc_mode
  679. *
  680. * @brief nfc_ioctl_nfcc_mode
  681. *
  682. * (arg = 0) ; NORMAL_MODE - Standard mode, unsolicited read behaviour
  683. * (arg = 1) ; SOLICITED_MODE - As above but reads are solicited from User Land
  684. * (arg = 2) ; UNSOLICITED_FTM_RAW MODE - NORMAL_MODE but messages from FTM and
  685. * not NCI Host.
  686. * (arg = 2) ; SOLICITED_FTM_RAW_MODE - As SOLICITED_MODE but messages from FTM
  687. * and not NCI Host.
  688. *
  689. *
  690. *
  691. */
  692. int nfc_ioctl_nfcc_mode(struct file *filp, unsigned int cmd, unsigned long arg)
  693. {
  694. int retval = 0;
  695. static unsigned short nci_addr;
  696. struct qca199x_dev *qca199x_dev = filp->private_data;
  697. struct qca199x_platform_data *platform_data;
  698. platform_data = qca199x_dev->client->dev.platform_data;
  699. if (arg == 0) {
  700. device_mode.handle_flavour = UNSOLICITED_MODE;
  701. qca199x_dev->client->addr = NCI_I2C_SLAVE;
  702. /* enable interrupts again */
  703. qca199x_enable_irq(qca199x_dev);
  704. } else if (arg == 1) {
  705. device_mode.handle_flavour = SOLICITED_MODE;
  706. qca199x_dev->client->addr = qca199x_dev->client->addr;
  707. /* enable interrupts again */
  708. qca199x_enable_irq(qca199x_dev);
  709. } else if (arg == 2) {
  710. device_mode.handle_flavour = UNSOLICITED_FTM_RAW_MODE;
  711. nci_addr = qca199x_dev->client->addr;
  712. /* replace with new client slave address*/
  713. qca199x_dev->client->addr = 0xE;
  714. /* We also need to disable interrupts */
  715. qca199x_disable_irq(qca199x_dev);
  716. } else if (arg == 3) {
  717. device_mode.handle_flavour = SOLICITED_FTM_RAW_MODE;
  718. nci_addr = qca199x_dev->client->addr;
  719. /* replace with new client slave address*/
  720. qca199x_dev->client->addr = 0xE;
  721. /* We also need to disable interrupts */
  722. qca199x_disable_irq(qca199x_dev);
  723. } else {
  724. device_mode.handle_flavour = UNSOLICITED_MODE;
  725. qca199x_dev->client->addr = NCI_I2C_SLAVE;
  726. }
  727. return retval;
  728. }
  729. /*
  730. * Inside nfc_ioctl_nfcc_efuse
  731. *
  732. * @brief nfc_ioctl_nfcc_efuse
  733. *
  734. *
  735. */
  736. int nfc_ioctl_nfcc_efuse(struct file *filp, unsigned int cmd,
  737. unsigned long arg)
  738. {
  739. int r = 0;
  740. unsigned short slave_addr = 0xE;
  741. unsigned short curr_addr;
  742. unsigned char efuse_addr = EFUSE_REG;
  743. unsigned char efuse_value = 0xFF;
  744. struct qca199x_dev *qca199x_dev = filp->private_data;
  745. curr_addr = qca199x_dev->client->addr;
  746. qca199x_dev->client->addr = slave_addr;
  747. r = nfc_i2c_write(qca199x_dev->client,
  748. &efuse_addr, 1);
  749. if (r < 0) {
  750. /* Restore original NFCC slave I2C address */
  751. qca199x_dev->client->addr = curr_addr;
  752. dev_err(&qca199x_dev->client->dev,
  753. "ERROR_WRITE_FAIL : i2c write fail\n");
  754. return -EIO;
  755. }
  756. /*
  757. * NFCC chip needs to be at least
  758. * 10usec high before make it low
  759. */
  760. usleep_range(10, 15);
  761. r = i2c_master_recv(qca199x_dev->client, &efuse_value,
  762. sizeof(efuse_value));
  763. if (r < 0) {
  764. /* Restore original NFCC slave I2C address */
  765. qca199x_dev->client->addr = curr_addr;
  766. dev_err(&qca199x_dev->client->dev,
  767. "ERROR_I2C_RCV_FAIL : i2c recv fail\n");
  768. return -EIO;
  769. }
  770. dev_dbg(&qca199x_dev->client->dev, "%s : EFUSE_VALUE %02x\n",
  771. __func__, efuse_value);
  772. /* Restore original NFCC slave I2C address */
  773. qca199x_dev->client->addr = curr_addr;
  774. return efuse_value;
  775. }
  776. /*
  777. * Inside nfc_ioctl_nfcc_version
  778. *
  779. * @brief nfc_ioctl_nfcc_version
  780. *
  781. *
  782. */
  783. int nfc_ioctl_nfcc_version(struct file *filp, unsigned int cmd,
  784. unsigned long arg)
  785. {
  786. int r = 0;
  787. unsigned short slave_addr = 0xE;
  788. unsigned short curr_addr;
  789. unsigned char raw_chip_version_addr = 0x00;
  790. unsigned char raw_chip_rev_id_addr = 0x9C;
  791. unsigned char raw_chip_version = 0xFF;
  792. struct qca199x_dev *qca199x_dev = filp->private_data;
  793. struct qca199x_platform_data *platform_data;
  794. platform_data = qca199x_dev->client->dev.platform_data;
  795. /*
  796. * Always wake up chip when reading 0x9C, otherwise this
  797. * register is not updated
  798. */
  799. r = nfcc_wake(NFCC_WAKE, filp);
  800. curr_addr = qca199x_dev->client->addr;
  801. qca199x_dev->client->addr = slave_addr;
  802. if (r) {
  803. dev_err(&qca199x_dev->client->dev,
  804. "%s: nfcc wake failed: %d\n", __func__, r);
  805. r = -EIO;
  806. goto leave;
  807. }
  808. if (arg == 0) {
  809. r = nfc_i2c_write(qca199x_dev->client,
  810. &raw_chip_version_addr, sizeof(raw_chip_version_addr));
  811. if (r != sizeof(raw_chip_version_addr)) {
  812. r = -EMSGSIZE;
  813. goto err;
  814. }
  815. } else if (arg == 1) {
  816. r = nfc_i2c_write(qca199x_dev->client,
  817. &raw_chip_rev_id_addr, sizeof(raw_chip_rev_id_addr));
  818. if (r != sizeof(raw_chip_version_addr)) {
  819. r = -EMSGSIZE;
  820. goto err;
  821. }
  822. } else {
  823. r = -EINVAL;
  824. goto err;
  825. }
  826. if (r < 0) {
  827. r = -EIO;
  828. goto err;
  829. }
  830. /*
  831. * I2C line is low after ~10 usec
  832. */
  833. usleep_range(10, 15);
  834. r = i2c_master_recv(qca199x_dev->client, &raw_chip_version,
  835. sizeof(raw_chip_version));
  836. if (r != sizeof(raw_chip_version)) {
  837. r = -EMSGSIZE;
  838. goto err;
  839. }
  840. goto leave;
  841. err:
  842. dev_err(&qca199x_dev->client->dev,
  843. "%s: i2c access failed\n", __func__);
  844. leave:
  845. /* Restore original NFCC slave I2C address */
  846. qca199x_dev->client->addr = curr_addr;
  847. return raw_chip_version;
  848. }
  849. /*
  850. * Inside nfc_ioctl_kernel_logging
  851. *
  852. * @brief nfc_ioctl_kernel_logging
  853. *
  854. * (arg = 0) ; NO_LOGGING
  855. * (arg = 1) ; COMMS_LOGGING - BASIC LOGGING - Mainly just comms over I2C
  856. * (arg = 2) ; FULL_LOGGING - ENABLE ALL - DBG messages for handlers etc.
  857. * ; ! Be aware as amount of logging could impact behaviour !
  858. *
  859. *
  860. */
  861. int nfc_ioctl_kernel_logging(unsigned long arg, struct file *filp)
  862. {
  863. int retval = 0;
  864. struct qca199x_dev *qca199x_dev = container_of(filp->private_data,
  865. struct qca199x_dev,
  866. qca199x_device);
  867. if (arg == 0) {
  868. dev_dbg(&qca199x_dev->client->dev,
  869. "%s : level = NO_LOGGING\n", __func__);
  870. logging_level = 0;
  871. } else if (arg == 1) {
  872. dev_dbg(&qca199x_dev->client->dev,
  873. "%s: level = COMMS_LOGGING only\n", __func__);
  874. logging_level = 1;
  875. } else if (arg == 2) {
  876. dev_dbg(&qca199x_dev->client->dev,
  877. "%s: level = FULL_LOGGING\n", __func__);
  878. logging_level = 2;
  879. }
  880. return retval;
  881. }
  882. /*
  883. * Inside nfc_ioctl_core_reset_ntf
  884. *
  885. * @brief nfc_ioctl_core_reset_ntf
  886. *
  887. * Allows callers to determine if a CORE_RESET_NTF has arrived
  888. *
  889. * Returns the value of variable core_reset_ntf
  890. *
  891. */
  892. int nfc_ioctl_core_reset_ntf(struct file *filp, unsigned int cmd,
  893. unsigned long arg)
  894. {
  895. struct qca199x_dev *qca199x_dev = filp->private_data;
  896. dev_dbg(&qca199x_dev->client->dev,
  897. "%s: returning = %d\n",
  898. __func__,
  899. qca199x_dev->core_reset_ntf);
  900. return qca199x_dev->core_reset_ntf;
  901. }
  902. static long nfc_ioctl(struct file *pfile, unsigned int cmd,
  903. unsigned long arg)
  904. {
  905. int r = 0;
  906. struct qca199x_dev *qca199x_dev = pfile->private_data;
  907. switch (cmd) {
  908. case NFC_SET_PWR:
  909. r = nfc_ioctl_power_states(pfile, cmd, arg);
  910. break;
  911. case NFCC_MODE:
  912. r = nfc_ioctl_nfcc_mode(pfile, cmd, arg);
  913. break;
  914. case NFCC_VERSION:
  915. r = nfc_ioctl_nfcc_version(pfile, cmd, arg);
  916. break;
  917. case NFC_KERNEL_LOGGING_MODE:
  918. nfc_ioctl_kernel_logging(arg, pfile);
  919. break;
  920. case SET_RX_BLOCK:
  921. break;
  922. case SET_EMULATOR_TEST_POINT:
  923. break;
  924. case NFCC_INITIAL_CORE_RESET_NTF:
  925. r = nfc_ioctl_core_reset_ntf(pfile, cmd, arg);
  926. break;
  927. case NFC_GET_EFUSE:
  928. r = nfc_ioctl_nfcc_efuse(pfile, cmd, arg);
  929. if (r < 0) {
  930. r = 0xFF;
  931. dev_err(&qca199x_dev->client->dev,
  932. "nfc_ioctl : FAILED TO READ EFUSE TYPE\n");
  933. }
  934. break;
  935. default:
  936. r = -ENOIOCTLCMD;
  937. }
  938. return r;
  939. }
  940. static const struct file_operations nfc_dev_fops = {
  941. .owner = THIS_MODULE,
  942. .llseek = no_llseek,
  943. .poll = nfc_poll,
  944. .read = nfc_read,
  945. .write = nfc_write,
  946. .open = nfc_open,
  947. .unlocked_ioctl = nfc_ioctl
  948. };
  949. void dumpqca1990(struct i2c_client *client)
  950. {
  951. int r = 0;
  952. int i = 0;
  953. unsigned char raw_reg_rd = {0x0};
  954. unsigned short temp_addr;
  955. temp_addr = client->addr;
  956. client->addr = 0x0E;
  957. for (i = 0; i < MAX_QCA_REG; i++) {
  958. raw_reg_rd = i;
  959. if (((i >= 0x0) && (i < 0x4)) || ((i > 0x7) && (i < 0xA)) ||
  960. ((i > 0xF) && (i < 0x12)) || ((i > 0x39) && (i < 0x4d)) ||
  961. ((i > 0x69) && (i < 0x74)) || (i == 0x18) || (i == 0x30) ||
  962. (i == 0x58)) {
  963. r = nfc_i2c_write(client, &raw_reg_rd,
  964. sizeof(raw_reg_rd));
  965. if (r != sizeof(raw_reg_rd))
  966. break;
  967. msleep(20);
  968. r = i2c_master_recv(client, &raw_reg_rd,
  969. sizeof(raw_reg_rd));
  970. if (r != sizeof(raw_reg_rd))
  971. break;
  972. }
  973. }
  974. client->addr = temp_addr;
  975. }
  976. static int nfc_i2c_write(struct i2c_client *client, u8 *buf, int len)
  977. {
  978. int r;
  979. r = i2c_master_send(client, buf, len);
  980. dev_dbg(&client->dev, "%s: send: %d\n", __func__, r);
  981. if (r == -EREMOTEIO) { /* Retry, chip was in standby */
  982. usleep_range(6000, 10000);
  983. r = i2c_master_send(client, buf, len);
  984. dev_dbg(&client->dev, "%s: send attempt 2: %d\n", __func__, r);
  985. }
  986. if (r != len)
  987. return -EREMOTEIO;
  988. return r;
  989. }
  990. /* Check for availability of qca199x_ NFC controller hardware */
  991. static int nfcc_hw_check(struct i2c_client *client, unsigned short curr_addr)
  992. {
  993. int r = 0;
  994. unsigned char buf = 0;
  995. client->addr = curr_addr;
  996. /* Set-up Addr 0. No data written */
  997. r = i2c_master_send(client, &buf, sizeof(buf));
  998. if (r < 0)
  999. goto err_presence_check;
  1000. buf = 0;
  1001. /* Read back from Addr 0 */
  1002. r = i2c_master_recv(client, &buf, sizeof(buf));
  1003. if (r < 0)
  1004. goto err_presence_check;
  1005. r = 0;
  1006. goto leave;
  1007. err_presence_check:
  1008. r = -ENXIO;
  1009. dev_err(&client->dev,
  1010. "%s: - no NFCC available\n", __func__);
  1011. leave:
  1012. return r;
  1013. }
  1014. /* Initialise qca199x_ NFC controller hardware */
  1015. static int nfcc_initialise(struct i2c_client *client, unsigned short curr_addr,
  1016. struct qca199x_dev *qca199x_dev)
  1017. {
  1018. int r = 0;
  1019. unsigned char raw_1P8_CONTROL_011[] = {0x11, XTAL_CLOCK};
  1020. unsigned char raw_1P8_CONTROL_010[] = {0x10, PWR_EN};
  1021. unsigned char raw_1P8_X0_0B0[] = {0xB0, (FREQ_SEL)};
  1022. unsigned char raw_slave1[] = {0x09, NCI_I2C_SLAVE};
  1023. unsigned char raw_slave2[] = {0x8, 0x10};
  1024. unsigned char raw_s73[] = {0x73, 0x02};
  1025. unsigned char raw_slave1_rd = {0x0};
  1026. unsigned char raw_1P8_PAD_CFG_CLK_REQ[] = {0xA5, 0x1};
  1027. unsigned char raw_1P8_PAD_CFG_PWR_REQ[] = {0xA7, 0x1};
  1028. unsigned char buf = 0;
  1029. bool core_reset_completed = false;
  1030. unsigned char rsp[6];
  1031. int time_taken = 0;
  1032. int ret = 0;
  1033. client->addr = curr_addr;
  1034. qca199x_dev->core_reset_ntf = DEFAULT_INITIAL_CORE_RESET_NTF;
  1035. r = i2c_master_send(client, &buf, sizeof(buf));
  1036. if (r < 0)
  1037. goto err_init;
  1038. /*
  1039. * I2C line is low after ~10 usec
  1040. */
  1041. usleep_range(10, 15);
  1042. buf = 0;
  1043. r = i2c_master_recv(client, &buf, sizeof(buf));
  1044. if (r < 0)
  1045. goto err_init;
  1046. RAW(s73, 0x02);
  1047. r = nfc_i2c_write(client, &raw_s73[0], sizeof(raw_s73));
  1048. if (r < 0)
  1049. goto err_init;
  1050. usleep_range(1000, 1100);
  1051. RAW(1P8_CONTROL_011, XTAL_CLOCK | 0x01);
  1052. r = nfc_i2c_write(client, &raw_1P8_CONTROL_011[0],
  1053. sizeof(raw_1P8_CONTROL_011));
  1054. if (r < 0)
  1055. goto err_init;
  1056. usleep_range(1000, 1100); /* 1 ms wait */
  1057. RAW(1P8_CONTROL_010, (0x8));
  1058. r = nfc_i2c_write(client, &raw_1P8_CONTROL_010[0],
  1059. sizeof(raw_1P8_CONTROL_010));
  1060. if (r < 0)
  1061. goto err_init;
  1062. usleep_range(10000, 11000); /* 10 ms wait */
  1063. RAW(1P8_CONTROL_010, (0xC));
  1064. r = nfc_i2c_write(client, &raw_1P8_CONTROL_010[0],
  1065. sizeof(raw_1P8_CONTROL_010));
  1066. if (r < 0)
  1067. goto err_init;
  1068. usleep_range(100, 110); /* 100 us wait */
  1069. RAW(1P8_X0_0B0, (FREQ_SEL_19));
  1070. r = nfc_i2c_write(client, &raw_1P8_X0_0B0[0],
  1071. sizeof(raw_1P8_X0_0B0));
  1072. if (r < 0)
  1073. goto err_init;
  1074. usleep_range(1000, 1100); /* 1 ms wait */
  1075. /* PWR_EN = 1 */
  1076. RAW(1P8_CONTROL_010, (0xd));
  1077. r = nfc_i2c_write(client, &raw_1P8_CONTROL_010[0],
  1078. sizeof(raw_1P8_CONTROL_010));
  1079. if (r < 0)
  1080. goto err_init;
  1081. msleep(20); /* 20ms wait */
  1082. /* LS_EN = 1 */
  1083. RAW(1P8_CONTROL_010, 0xF);
  1084. r = nfc_i2c_write(client, &raw_1P8_CONTROL_010[0],
  1085. sizeof(raw_1P8_CONTROL_010));
  1086. if (r < 0)
  1087. goto err_init;
  1088. msleep(20); /* 20ms wait */
  1089. /* Enable the PMIC clock */
  1090. RAW(1P8_PAD_CFG_CLK_REQ, (0x1));
  1091. r = nfc_i2c_write(client, &raw_1P8_PAD_CFG_CLK_REQ[0],
  1092. sizeof(raw_1P8_PAD_CFG_CLK_REQ));
  1093. if (r < 0)
  1094. goto err_init;
  1095. usleep_range(1000, 1100); /* 1 ms wait */
  1096. RAW(1P8_PAD_CFG_PWR_REQ, (0x1));
  1097. r = nfc_i2c_write(client, &raw_1P8_PAD_CFG_PWR_REQ[0],
  1098. sizeof(raw_1P8_PAD_CFG_PWR_REQ));
  1099. if (r < 0)
  1100. goto err_init;
  1101. usleep_range(1000, 1100); /* 1 ms wait */
  1102. RAW(slave2, 0x10);
  1103. r = nfc_i2c_write(client, &raw_slave2[0], sizeof(raw_slave2));
  1104. if (r < 0)
  1105. goto err_init;
  1106. usleep_range(1000, 1100); /* 1 ms wait */
  1107. RAW(slave1, NCI_I2C_SLAVE);
  1108. r = nfc_i2c_write(client, &raw_slave1[0], sizeof(raw_slave1));
  1109. if (r < 0)
  1110. goto err_init;
  1111. usleep_range(1000, 1100); /* 1 ms wait */
  1112. /* QCA199x NFCC CPU should now boot... */
  1113. r = i2c_master_recv(client, &raw_slave1_rd, sizeof(raw_slave1_rd));
  1114. if (r < 0)
  1115. goto err_init;
  1116. /* Talk on NCI slave address NCI_I2C_SLAVE 0x2C*/
  1117. client->addr = NCI_I2C_SLAVE;
  1118. /*
  1119. * Start with small delay and then we will poll until we
  1120. * get a core reset notification - This is time for chip
  1121. * & NFCC controller to come-up.
  1122. */
  1123. usleep_range(15000, 16500); /* 15 ms */
  1124. do {
  1125. ret = i2c_master_recv(client, rsp, sizeof(rsp));
  1126. if (ret < 0)
  1127. goto err_init;
  1128. /* Found core reset notification */
  1129. if ((rsp[0] == CORE_RESET_RSP_GID) &&
  1130. (rsp[1] == CORE_RESET_OID) &&
  1131. (rsp[2] == CORE_RST_NTF_LENGTH)) {
  1132. dev_dbg(&client->dev,
  1133. "NFC core reset recvd: %s: info: %p\n",
  1134. __func__, client);
  1135. core_reset_completed = true;
  1136. } else {
  1137. usleep_range(2000, 2200); /* 2 ms wait before retry */
  1138. }
  1139. time_taken++;
  1140. } while (!core_reset_completed && (time_taken < NTF_TIMEOUT));
  1141. if (time_taken >= NTF_TIMEOUT) {
  1142. qca199x_dev->core_reset_ntf = TIMEDOUT_INITIAL_CORE_RESET_NTF;
  1143. goto err_init;
  1144. }
  1145. qca199x_dev->core_reset_ntf = ARRIVED_INITIAL_CORE_RESET_NTF;
  1146. r = 0;
  1147. return r;
  1148. err_init:
  1149. r = 1;
  1150. dev_err(&client->dev,
  1151. "%s: failed. Check Hardware\n", __func__);
  1152. return r;
  1153. }
  1154. /*
  1155. Routine to Select clocks
  1156. */
  1157. static int qca199x_clock_select(struct qca199x_dev *qca199x_dev)
  1158. {
  1159. int r = 0;
  1160. if (!strcmp(qca199x_dev->clk_src_name, "BBCLK2")) {
  1161. qca199x_dev->s_clk =
  1162. clk_get(&qca199x_dev->client->dev, "ref_clk");
  1163. if (qca199x_dev->s_clk == NULL)
  1164. goto err_invalid_dis_gpio;
  1165. } else if (!strcmp(qca199x_dev->clk_src_name, "RFCLK3")) {
  1166. qca199x_dev->s_clk =
  1167. clk_get(&qca199x_dev->client->dev, "ref_clk_rf");
  1168. if (qca199x_dev->s_clk == NULL)
  1169. goto err_invalid_dis_gpio;
  1170. } else if (!strcmp(qca199x_dev->clk_src_name, "GPCLK")) {
  1171. if (gpio_is_valid(qca199x_dev->clk_src_gpio)) {
  1172. qca199x_dev->s_clk =
  1173. clk_get(&qca199x_dev->client->dev,
  1174. "core_clk");
  1175. if (qca199x_dev->s_clk == NULL)
  1176. goto err_invalid_dis_gpio;
  1177. } else {
  1178. goto err_invalid_dis_gpio;
  1179. }
  1180. } else if (!strcmp(qca199x_dev->clk_src_name, "GPCLK2")) {
  1181. if (gpio_is_valid(qca199x_dev->clk_src_gpio)) {
  1182. qca199x_dev->s_clk =
  1183. clk_get(&qca199x_dev->client->dev,
  1184. "core_clk_pvt");
  1185. if (qca199x_dev->s_clk == NULL)
  1186. goto err_invalid_dis_gpio;
  1187. } else {
  1188. goto err_invalid_dis_gpio;
  1189. }
  1190. } else {
  1191. qca199x_dev->s_clk = NULL;
  1192. goto err_invalid_dis_gpio;
  1193. }
  1194. if (qca199x_dev->clk_run == false) {
  1195. /* Set clock rate */
  1196. if ((!strcmp(qca199x_dev->clk_src_name, "GPCLK")) ||
  1197. (!strcmp(qca199x_dev->clk_src_name, "GPCLK2"))) {
  1198. r = clk_set_rate(qca199x_dev->s_clk, NFC_RF_CLK_FREQ);
  1199. if (r)
  1200. goto err_invalid_clk;
  1201. }
  1202. r = clk_prepare_enable(qca199x_dev->s_clk);
  1203. if (r)
  1204. goto err_invalid_clk;
  1205. qca199x_dev->clk_run = true;
  1206. }
  1207. r = 0;
  1208. return r;
  1209. err_invalid_clk:
  1210. r = -1;
  1211. return r;
  1212. err_invalid_dis_gpio:
  1213. r = -2;
  1214. return r;
  1215. }
  1216. /*
  1217. Routine to De-Select clocks
  1218. */
  1219. static int qca199x_clock_deselect(struct qca199x_dev *qca199x_dev)
  1220. {
  1221. int r = -1;
  1222. if (qca199x_dev->s_clk != NULL) {
  1223. if (qca199x_dev->clk_run == true) {
  1224. clk_disable_unprepare(qca199x_dev->s_clk);
  1225. qca199x_dev->clk_run = false;
  1226. }
  1227. return 0;
  1228. }
  1229. return r;
  1230. }
  1231. static int nfc_parse_dt(struct device *dev, struct qca199x_platform_data *pdata)
  1232. {
  1233. int r = 0;
  1234. struct device_node *np = dev->of_node;
  1235. r = of_property_read_u32(np, "reg", &pdata->reg);
  1236. if (r)
  1237. return -EINVAL;
  1238. pdata->dis_gpio = of_get_named_gpio(np, "qcom,dis-gpio", 0);
  1239. if ((!gpio_is_valid(pdata->dis_gpio)))
  1240. return -EINVAL;
  1241. disable_ctrl = pdata->dis_gpio;
  1242. pdata->irq_gpio = of_get_named_gpio(np, "qcom,irq-gpio", 0);
  1243. if ((!gpio_is_valid(pdata->irq_gpio)))
  1244. return -EINVAL;
  1245. r = of_property_read_string(np, "qcom,clk-src", &pdata->clk_src_name);
  1246. if (strcmp(pdata->clk_src_name, "GPCLK2")) {
  1247. pdata->clkreq_gpio = of_get_named_gpio(np, "qcom,clk-gpio", 0);
  1248. }
  1249. if ((!strcmp(pdata->clk_src_name, "GPCLK")) ||
  1250. (!strcmp(pdata->clk_src_name, "GPCLK2"))) {
  1251. pdata->clk_src_gpio = of_get_named_gpio(np,
  1252. "qcom,clk-src-gpio", 0);
  1253. if ((!gpio_is_valid(pdata->clk_src_gpio)))
  1254. return -EINVAL;
  1255. pdata->irq_gpio_clk_req = of_get_named_gpio(np,
  1256. "qcom,clk-req-gpio", 0);
  1257. if ((!gpio_is_valid(pdata->irq_gpio_clk_req)))
  1258. return -EINVAL;
  1259. }
  1260. if (r)
  1261. return -EINVAL;
  1262. return r;
  1263. }
  1264. static int qca199x_probe(struct i2c_client *client,
  1265. const struct i2c_device_id *id)
  1266. {
  1267. int r = 0;
  1268. int irqn = 0;
  1269. struct qca199x_platform_data *platform_data;
  1270. struct qca199x_dev *qca199x_dev;
  1271. if (client->dev.of_node) {
  1272. platform_data = devm_kzalloc(&client->dev,
  1273. sizeof(struct qca199x_platform_data), GFP_KERNEL);
  1274. if (!platform_data) {
  1275. dev_err(&client->dev,
  1276. "%s: Failed to allocate memory\n", __func__);
  1277. return -ENOMEM;
  1278. }
  1279. r = nfc_parse_dt(&client->dev, platform_data);
  1280. if (r)
  1281. return r;
  1282. } else {
  1283. platform_data = client->dev.platform_data;
  1284. }
  1285. if (!platform_data)
  1286. return -EINVAL;
  1287. dev_dbg(&client->dev,
  1288. "%s, inside nfc-nci flags = %x\n",
  1289. __func__, client->flags);
  1290. if (platform_data == NULL) {
  1291. dev_err(&client->dev, "%s: failed\n", __func__);
  1292. return -ENODEV;
  1293. }
  1294. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
  1295. dev_err(&client->dev, "%s: need I2C_FUNC_I2C\n", __func__);
  1296. return -ENODEV;
  1297. }
  1298. qca199x_dev = kzalloc(sizeof(*qca199x_dev), GFP_KERNEL);
  1299. if (qca199x_dev == NULL) {
  1300. dev_err(&client->dev,
  1301. "%s: failed to allocate memory for module data\n", __func__);
  1302. return -ENOMEM;
  1303. }
  1304. qca199x_dev->client = client;
  1305. /*
  1306. * To be efficient we need to test whether nfcc hardware is physically
  1307. * present before attempting further hardware initialisation.
  1308. * For this we need to be sure the device is in ULPM state by
  1309. * setting disable line low early on.
  1310. *
  1311. */
  1312. if (gpio_is_valid(platform_data->dis_gpio)) {
  1313. r = gpio_request(platform_data->dis_gpio, "nfc_reset_gpio");
  1314. if (r) {
  1315. dev_err(&client->dev,
  1316. "%s: unable to request gpio [%d]\n",
  1317. __func__,
  1318. platform_data->dis_gpio);
  1319. goto err_free_dev;
  1320. }
  1321. r = gpio_direction_output(platform_data->dis_gpio, 1);
  1322. if (r) {
  1323. dev_err(&client->dev,
  1324. "%s: unable to set direction for gpio [%d]\n",
  1325. __func__,
  1326. platform_data->dis_gpio);
  1327. goto err_dis_gpio;
  1328. }
  1329. } else {
  1330. dev_err(&client->dev, "%s: dis gpio not provided\n", __func__);
  1331. goto err_free_dev;
  1332. }
  1333. /* Guarantee that the NFCC starts in a clean state. */
  1334. gpio_set_value(platform_data->dis_gpio, 1);/* HPD */
  1335. usleep_range(200, 220);
  1336. gpio_set_value(platform_data->dis_gpio, 0);/* ULPM */
  1337. usleep_range(200, 220);
  1338. r = nfcc_hw_check(client, platform_data->reg);
  1339. if (r) {
  1340. /* We don't think there is hardware but just in case HPD */
  1341. gpio_set_value(platform_data->dis_gpio, 1);
  1342. goto err_dis_gpio;
  1343. }
  1344. if (gpio_is_valid(platform_data->irq_gpio)) {
  1345. r = gpio_request(platform_data->irq_gpio, "nfc_irq_gpio");
  1346. if (r) {
  1347. dev_err(&client->dev, "%s: unable to request gpio [%d]\n",
  1348. __func__,
  1349. platform_data->irq_gpio);
  1350. goto err_dis_gpio;
  1351. }
  1352. r = gpio_direction_input(platform_data->irq_gpio);
  1353. if (r) {
  1354. dev_err(&client->dev,
  1355. "%s: unable to set direction for gpio [%d]\n",
  1356. __func__,
  1357. platform_data->irq_gpio);
  1358. goto err_irq;
  1359. }
  1360. irqn = gpio_to_irq(platform_data->irq_gpio);
  1361. if (irqn < 0) {
  1362. r = irqn;
  1363. goto err_irq;
  1364. }
  1365. client->irq = irqn;
  1366. } else {
  1367. dev_err(&client->dev, "%s: irq gpio not provided\n", __func__);
  1368. goto err_dis_gpio;
  1369. }
  1370. /* Interrupt from NFCC CLK_REQ to handle REF_CLK
  1371. o/p gating/selection */
  1372. if ((!strcmp(platform_data->clk_src_name, "GPCLK")) ||
  1373. (!strcmp(platform_data->clk_src_name, "GPCLK2"))) {
  1374. if (gpio_is_valid(platform_data->irq_gpio_clk_req)) {
  1375. r = gpio_request(platform_data->irq_gpio_clk_req,
  1376. "nfc_irq_gpio_clk_en");
  1377. if (r) {
  1378. dev_err(&client->dev,
  1379. "%s: unable to request CLK_EN gpio [%d]\n",
  1380. __func__,
  1381. platform_data->irq_gpio_clk_req);
  1382. goto err_irq;
  1383. }
  1384. r = gpio_direction_input(
  1385. platform_data->irq_gpio_clk_req);
  1386. if (r) {
  1387. dev_err(&client->dev,
  1388. "%s: cannot set direction CLK_EN gpio [%d]\n",
  1389. __func__, platform_data->irq_gpio_clk_req);
  1390. goto err_irq_clk;
  1391. }
  1392. gpio_to_irq(0);
  1393. irqn = gpio_to_irq(platform_data->irq_gpio_clk_req);
  1394. if (irqn < 0) {
  1395. r = irqn;
  1396. goto err_irq_clk;
  1397. }
  1398. platform_data->clk_req_irq_num = irqn;
  1399. } else {
  1400. dev_err(&client->dev,
  1401. "%s: irq CLK_EN gpio not provided\n", __func__);
  1402. goto err_irq;
  1403. }
  1404. }
  1405. /* Get the clock source name and gpio from from Device Tree */
  1406. qca199x_dev->clk_src_name = platform_data->clk_src_name;
  1407. qca199x_dev->clk_src_gpio = platform_data->clk_src_gpio;
  1408. qca199x_dev->clk_run = false;
  1409. r = qca199x_clock_select(qca199x_dev);
  1410. if (r != 0) {
  1411. if (r == -1)
  1412. goto err_clk;
  1413. else
  1414. goto err_irq_clk;
  1415. }
  1416. if (strcmp(platform_data->clk_src_name, "GPCLK2")) {
  1417. if (gpio_is_valid(platform_data->clkreq_gpio)) {
  1418. r = gpio_request(platform_data->clkreq_gpio,
  1419. "nfc_clkreq_gpio");
  1420. if (r) {
  1421. dev_err(&client->dev,
  1422. "%s: unable to request gpio [%d]\n",
  1423. __func__, platform_data->clkreq_gpio);
  1424. goto err_clkreq_gpio;
  1425. }
  1426. r = gpio_direction_input(platform_data->clkreq_gpio);
  1427. if (r) {
  1428. dev_err(&client->dev,
  1429. "%s: cannot set direction for gpio [%d]\n",
  1430. __func__, platform_data->clkreq_gpio);
  1431. goto err_clkreq_gpio;
  1432. }
  1433. } else {
  1434. dev_err(&client->dev,
  1435. "%s: clkreq gpio not provided\n", __func__);
  1436. goto err_clk;
  1437. }
  1438. qca199x_dev->clkreq_gpio = platform_data->clkreq_gpio;
  1439. }
  1440. qca199x_dev->dis_gpio = platform_data->dis_gpio;
  1441. qca199x_dev->irq_gpio = platform_data->irq_gpio;
  1442. if ((!strcmp(platform_data->clk_src_name, "GPCLK")) ||
  1443. (!strcmp(platform_data->clk_src_name, "GPCLK2"))) {
  1444. qca199x_dev->irq_gpio_clk_req =
  1445. platform_data->irq_gpio_clk_req;
  1446. qca199x_dev->clk_req_irq_num =
  1447. platform_data->clk_req_irq_num;
  1448. }
  1449. /* init mutex and queues */
  1450. init_waitqueue_head(&qca199x_dev->read_wq);
  1451. mutex_init(&qca199x_dev->read_mutex);
  1452. spin_lock_init(&qca199x_dev->irq_enabled_lock);
  1453. spin_lock_init(&qca199x_dev->irq_enabled_lock_clk_req);
  1454. qca199x_dev->qca199x_device.minor = MISC_DYNAMIC_MINOR;
  1455. qca199x_dev->qca199x_device.name = "nfc-nci";
  1456. qca199x_dev->qca199x_device.fops = &nfc_dev_fops;
  1457. r = misc_register(&qca199x_dev->qca199x_device);
  1458. if (r) {
  1459. dev_err(&client->dev, "%s: misc_register failed\n", __func__);
  1460. goto err_misc_register;
  1461. }
  1462. /*
  1463. * Reboot the NFCC now that all resources are ready
  1464. *
  1465. * The NFCC takes time to transition between power states.
  1466. * We wait 20uS for the NFCC to shutdown. (HPD)
  1467. * We wait 100uS for the NFCC to boot into ULPM.
  1468. */
  1469. gpio_set_value(platform_data->dis_gpio, 1);/* HPD */
  1470. msleep(20);
  1471. gpio_set_value(platform_data->dis_gpio, 0);/* ULPM */
  1472. msleep(100);
  1473. /* Here we perform a second presence check. */
  1474. r = nfcc_hw_check(client, platform_data->reg);
  1475. if (r) {
  1476. /* We don't think there is hardware but just in case HPD */
  1477. gpio_set_value(platform_data->dis_gpio, 1);
  1478. goto err_nfcc_not_present;
  1479. }
  1480. logging_level = 0;
  1481. /*
  1482. * request irq. The irq is set whenever the chip has data available
  1483. * for reading. It is cleared when all data has been read.
  1484. */
  1485. device_mode.handle_flavour = UNSOLICITED_MODE;
  1486. /* NFC_INT IRQ */
  1487. qca199x_dev->irq_enabled = true;
  1488. r = request_irq(client->irq, qca199x_dev_irq_handler,
  1489. IRQF_TRIGGER_RISING, client->name, qca199x_dev);
  1490. if (r) {
  1491. dev_err(&client->dev, "%s: request_irq failed\n", __func__);
  1492. goto err_request_irq_failed;
  1493. }
  1494. qca199x_disable_irq(qca199x_dev);
  1495. /* CLK_REQ IRQ */
  1496. if ((!strcmp(platform_data->clk_src_name, "GPCLK")) ||
  1497. (!strcmp(platform_data->clk_src_name, "GPCLK2"))) {
  1498. r = request_irq(qca199x_dev->clk_req_irq_num,
  1499. qca199x_dev_irq_handler_clk_req,
  1500. (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING),
  1501. client->name, qca199x_dev);
  1502. if (r) {
  1503. dev_err(&client->dev,
  1504. "%s: request_irq failed. irq no = %d\n, main irq = %d",
  1505. __func__,
  1506. qca199x_dev->clk_req_irq_num, client->irq);
  1507. goto err_request_irq_failed;
  1508. }
  1509. qca199x_dev->irq_enabled_clk_req = true;
  1510. qca199x_disable_irq_clk_req(qca199x_dev);
  1511. qca199x_dev->my_wq =
  1512. create_singlethread_workqueue("qca1990x_CLK_REQ_queue");
  1513. if (!qca199x_dev->my_wq)
  1514. goto err_create_workq;
  1515. INIT_WORK(&qca199x_dev->msm_clock_controll_work,
  1516. clk_req_update);
  1517. }
  1518. device_init_wakeup(&client->dev, true);
  1519. device_set_wakeup_capable(&client->dev, true);
  1520. i2c_set_clientdata(client, qca199x_dev);
  1521. gpio_set_value(platform_data->dis_gpio, 1);
  1522. /* To keep track if region2 command has been sent to controller */
  1523. region2_sent = false;
  1524. dev_dbg(&client->dev,
  1525. "%s: probing qca1990 exited successfully\n",
  1526. __func__);
  1527. return 0;
  1528. err_create_workq:
  1529. dev_err(&client->dev,
  1530. "%s: work_queue creation failure\n",
  1531. __func__);
  1532. free_irq(client->irq, qca199x_dev);
  1533. err_nfcc_not_present:
  1534. err_request_irq_failed:
  1535. misc_deregister(&qca199x_dev->qca199x_device);
  1536. err_misc_register:
  1537. mutex_destroy(&qca199x_dev->read_mutex);
  1538. err_clkreq_gpio:
  1539. if (strcmp(platform_data->clk_src_name, "GPCLK2"))
  1540. gpio_free(platform_data->clkreq_gpio);
  1541. err_clk:
  1542. qca199x_clock_deselect(qca199x_dev);
  1543. err_irq_clk:
  1544. if ((!strcmp(platform_data->clk_src_name, "GPCLK")) ||
  1545. (!strcmp(platform_data->clk_src_name, "GPCLK2"))) {
  1546. r = gpio_direction_input(platform_data->irq_gpio_clk_req);
  1547. if (r)
  1548. dev_err(&client->dev,
  1549. "%s: Unable to set direction\n", __func__);
  1550. gpio_free(platform_data->irq_gpio_clk_req);
  1551. }
  1552. err_irq:
  1553. gpio_free(platform_data->irq_gpio);
  1554. err_dis_gpio:
  1555. gpio_free(platform_data->dis_gpio);
  1556. err_free_dev:
  1557. kfree(qca199x_dev);
  1558. return r;
  1559. }
  1560. static int qca199x_remove(struct i2c_client *client)
  1561. {
  1562. struct qca199x_dev *qca199x_dev;
  1563. qca199x_dev = i2c_get_clientdata(client);
  1564. free_irq(client->irq, qca199x_dev);
  1565. misc_deregister(&qca199x_dev->qca199x_device);
  1566. mutex_destroy(&qca199x_dev->read_mutex);
  1567. gpio_free(qca199x_dev->irq_gpio);
  1568. if ((!strcmp(qca199x_dev->clk_src_name, "GPCLK")) ||
  1569. (!strcmp(qca199x_dev->clk_src_name, "GPCLK2"))) {
  1570. gpio_free(qca199x_dev->irq_gpio_clk_req);
  1571. }
  1572. gpio_free(qca199x_dev->dis_gpio);
  1573. if (strcmp(qca199x_dev->clk_src_name, "GPCLK2"))
  1574. gpio_free(qca199x_dev->clkreq_gpio);
  1575. kfree(qca199x_dev);
  1576. return 0;
  1577. }
  1578. static int qca199x_suspend(struct device *device)
  1579. {
  1580. struct i2c_client *client = to_i2c_client(device);
  1581. if (device_may_wakeup(&client->dev))
  1582. enable_irq_wake(client->irq);
  1583. return 0;
  1584. }
  1585. static int qca199x_resume(struct device *device)
  1586. {
  1587. struct i2c_client *client = to_i2c_client(device);
  1588. if (device_may_wakeup(&client->dev))
  1589. disable_irq_wake(client->irq);
  1590. return 0;
  1591. }
  1592. static const struct i2c_device_id qca199x_id[] = {
  1593. {"qca199x-i2c", 0},
  1594. {}
  1595. };
  1596. static const struct dev_pm_ops nfc_pm_ops = {
  1597. SET_SYSTEM_SLEEP_PM_OPS(qca199x_suspend, qca199x_resume)
  1598. };
  1599. static struct i2c_driver qca199x = {
  1600. .id_table = qca199x_id,
  1601. .probe = qca199x_probe,
  1602. .remove = qca199x_remove,
  1603. .driver = {
  1604. .owner = THIS_MODULE,
  1605. .name = "nfc-nci",
  1606. .of_match_table = msm_match_table,
  1607. .pm = &nfc_pm_ops,
  1608. },
  1609. };
  1610. static int nfcc_reboot(struct notifier_block *notifier, unsigned long val,
  1611. void *v)
  1612. {
  1613. /*
  1614. * Set DISABLE=1 *ONLY* if the NFC service has been disabled.
  1615. * This will put NFCC into HPD(Hard Power Down) state for power
  1616. * saving when powering down(Low Batt. or Power off handset)
  1617. * If user requires NFC and CE mode when powered down(PD) the
  1618. * middleware puts NFCC into region2 prior to PD. In this case
  1619. * we DO NOT HPD chip as this will trash Region2 and CE support
  1620. * when handset is PD.
  1621. */
  1622. if (region2_sent == false) {
  1623. /* HPD the NFCC */
  1624. gpio_set_value(disable_ctrl, 1);
  1625. }
  1626. return NOTIFY_OK;
  1627. }
  1628. static struct notifier_block nfcc_notifier = {
  1629. .notifier_call = nfcc_reboot,
  1630. .next = NULL,
  1631. .priority = 0
  1632. };
  1633. /*
  1634. * module load/unload record keeping
  1635. */
  1636. static int __init qca199x_dev_init(void)
  1637. {
  1638. int ret;
  1639. ret = register_reboot_notifier(&nfcc_notifier);
  1640. if (ret) {
  1641. pr_err("cannot register reboot notifier (err=%d)\n", ret);
  1642. return ret;
  1643. }
  1644. return i2c_add_driver(&qca199x);
  1645. }
  1646. module_init(qca199x_dev_init);
  1647. static void __exit qca199x_dev_exit(void)
  1648. {
  1649. unregister_reboot_notifier(&nfcc_notifier);
  1650. i2c_del_driver(&qca199x);
  1651. }
  1652. module_exit(qca199x_dev_exit);
  1653. MODULE_DESCRIPTION("NFC QCA199x");
  1654. MODULE_LICENSE("GPL v2");