isdbt_port_mtv222.h 12 KB

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  1. /*
  2. *
  3. * drivers/media/tdmb/isdbt_port_mtv222.h
  4. *
  5. * isdbt driver
  6. *
  7. * Copyright (C) (2014, Samsung Electronics)
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation version 2.
  12. *
  13. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  14. * kind, whether express or implied; without even the implied warranty
  15. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. */
  19. #ifndef __ISDBT_PORT_MTV222_H__
  20. #define __ISDBT_PORT_MTV222_H__
  21. #include <linux/ioctl.h>
  22. #include "isdbt.h"
  23. #include "raontv.h"
  24. #include "raontv_internal.h"
  25. #define ISDBT_IOC_MAGIC 'R'
  26. /*
  27. */
  28. #define DMB_DEBUG_MSG_ENABLE
  29. #if defined(RTV_IF_SPI)
  30. /* Select debug options */
  31. #define DEBUG_INTERRUPT
  32. //#define DEBUG_TSP_BUF
  33. #endif
  34. #define DMBERR(fmt, args...) \
  35. printk(KERN_ERR "MTV222: %s(): " fmt, __func__, ## args)
  36. #ifdef DMB_DEBUG_MSG_ENABLE
  37. #define DMBMSG(fmt, args...) \
  38. printk(KERN_INFO "MTV222: %s(): " fmt, __func__, ## args)
  39. #else
  40. #define DMBMSG(x...) do {} while (0)
  41. #endif
  42. /*############################################################################
  43. # File dump Configuration
  44. * TS dump filename: /data/local/isdbt_ts_FREQ.ts
  45. ############################################################################*/
  46. //#define _MTV_KERNEL_FILE_DUMP_ENABLE
  47. #ifdef _MTV_KERNEL_FILE_DUMP_ENABLE
  48. extern struct file *mtv_ts_filp;
  49. #endif
  50. #if defined(CONFIG_MTV_SPI)
  51. #define MAX_NUM_TSB_SEG 30
  52. /* TS Buffer Descriptor information. */
  53. struct TSB_DESC_INFO {
  54. /* Flag of operation enabled or not. */
  55. volatile int op_enabled; /* 0: disabled, 1: enabled */
  56. /* TSP buffer index which updated when read operation by App. */
  57. volatile int read_idx;
  58. /* TSP buffer index which update when write operation by Kernel. */
  59. volatile int write_idx;
  60. /* Mapping base address of TS buffer segments.
  61. The number of allocating elements was configured by application. */
  62. unsigned long seg_base[MAX_NUM_TSB_SEG];
  63. };
  64. /* TS Buffer control block. */
  65. struct TSB_CB_INFO {
  66. /* Index of available tsp segment to be write. */
  67. int avail_seg_idx;
  68. /* Index of available tsp buffer to be write. */
  69. int avail_write_tspb_idx;
  70. /* Index of tsp segment to be enqueued. */
  71. int enqueue_seg_idx;
  72. /* Number of buffering TSPs per segment configured by App. */
  73. int num_tsp_per_seg;
  74. /* Number of buffering TSPs in the kernel shared memory
  75. configured by App. */
  76. int num_total_tsp;
  77. /* Number of shared memory segments. */
  78. int num_total_seg;
  79. unsigned int desc_size;
  80. unsigned int seg_size;
  81. /* The pointer to the address of TSB descriptor
  82. which shared informations to be allocated. */
  83. struct TSB_DESC_INFO *tsbd;
  84. bool seg_bufs_allocated;
  85. bool mmap_completed;
  86. /* The pointer to the address of TS buffer segments to be allocated. */
  87. unsigned char *seg_buf[MAX_NUM_TSB_SEG];
  88. };
  89. #endif /* #if defined(CONFIG_MTV_SPI) */
  90. /* ISDBT drvier Control Block */
  91. struct MTV222_CB {
  92. int pwr_en_pin_no; /* Pin number of POWER-EN */
  93. #if defined(RTV_IF_TSIF_0) || defined(RTV_IF_TSIF_1) || defined(RTV_IF_SPI_SLAVE)
  94. #ifdef CONFIG_MTV_CAMIF
  95. struct TSB_CB_INFO tsb_cb;
  96. unsigned int intr_size; /* Interrupt size */
  97. unsigned int cfged_tsp_chunk_size; /* Configured TSP chunk size */
  98. #endif /* CONFIG_MTV_CAMIF */
  99. #endif
  100. #if defined(RTV_IF_SPI) || defined(RTV_IF_SPI_TSIFx)
  101. #ifndef RTV_IF_SPI_TSIFx
  102. int irq_pin_no; /* IRQ number */
  103. struct TSB_CB_INFO tsb_cb;
  104. unsigned int intr_size; /* Interrupt size */
  105. unsigned int cfged_tsp_chunk_size; /* Configured TSP chunk size */
  106. #endif /* #ifndef RTV_IF_SPI_TSIFx */
  107. #endif
  108. E_RTV_COUNTRY_BAND_TYPE country_band_type;
  109. struct mutex ioctl_lock;
  110. volatile bool is_power_on;
  111. unsigned int freq_khz;
  112. volatile bool tsout_enabled;
  113. enum E_RTV_SERVICE_TYPE cfged_svc; /* Configured service type */
  114. #ifdef DEBUG_INTERRUPT
  115. unsigned long invalid_intr_cnt;
  116. unsigned long level_intr_cnt;
  117. unsigned long ovf_intr_cnt;
  118. unsigned long udf_intr_cnt;
  119. #endif
  120. #ifdef DEBUG_TSP_BUF
  121. unsigned int max_alloc_seg_cnt;
  122. unsigned int max_enqueued_seg_cnt;
  123. unsigned int max_enqueued_tsp_cnt;
  124. unsigned long alloc_tspb_err_cnt;
  125. #endif
  126. };
  127. extern struct MTV222_CB *mtv222_cb_ptr;
  128. /* The size of TSB descriptor for mmap */
  129. #define MAX_TSB_DESC_SIZE PAGE_ALIGN(sizeof(struct TSB_DESC_INFO))
  130. /* The size of TSB segment for mmap */
  131. #define MAX_TSB_SEG_SIZE PAGE_ALIGN(188 * 16)
  132. #define TOTAL_TSB_MAPPING_SIZE\
  133. (MAX_TSB_DESC_SIZE + MAX_NUM_TSB_SEG*MAX_TSB_SEG_SIZE)
  134. static inline int mtv_ts_dump_kfile_write(char *buf, size_t len)
  135. {
  136. #ifdef _MTV_KERNEL_FILE_DUMP_ENABLE
  137. mm_segment_t oldfs;
  138. struct file *filp;
  139. int ret = 0;
  140. if (mtv_ts_filp != NULL) {
  141. filp = mtv_ts_filp;
  142. oldfs = get_fs();
  143. set_fs(KERNEL_DS);
  144. ret = filp->f_op->write(filp, buf, len, &filp->f_pos);
  145. set_fs(oldfs);
  146. if (!ret)
  147. DMBERR("File write error (%d)\n", ret);
  148. }
  149. return ret;
  150. #else
  151. return 0;
  152. #endif
  153. }
  154. static inline void mtv_ts_dump_kfile_close(void)
  155. {
  156. #ifdef _MTV_KERNEL_FILE_DUMP_ENABLE
  157. if (mtv_ts_filp != NULL) {
  158. filp_close(mtv_ts_filp, NULL);
  159. mtv_ts_filp = NULL;
  160. }
  161. #endif
  162. }
  163. static inline int mtv_ts_dump_kfile_open(unsigned int channel)
  164. {
  165. #ifdef _MTV_KERNEL_FILE_DUMP_ENABLE
  166. char fname[32];
  167. struct file *filp = NULL;
  168. if (mtv_ts_filp == NULL) {
  169. sprintf(fname, "/data/local/isdbt_ts_%u.ts", channel);
  170. filp = filp_open(fname, O_RDWR|O_CREAT|O_TRUNC, S_IRUSR);
  171. if (IS_ERR(filp)) {
  172. filp = NULL;
  173. DMBERR("File open error: %s!\n", fname);
  174. return PTR_ERR(filp);
  175. }
  176. mtv_ts_filp = filp;
  177. DMBMSG("Kernel dump file opened(%s)\n", fname);
  178. } else {
  179. DMBERR("Already TS file opened! Should closed!\n");
  180. return -1;
  181. }
  182. #endif
  183. return 0;
  184. }
  185. #ifdef DEBUG_TSP_BUF
  186. static INLINE void reset_debug_tspb_stat(void)
  187. {
  188. mtv222_cb_ptr->max_alloc_seg_cnt = 0;
  189. mtv222_cb_ptr->max_enqueued_seg_cnt = 0;
  190. mtv222_cb_ptr->max_enqueued_tsp_cnt = 0;
  191. mtv222_cb_ptr->alloc_tspb_err_cnt = 0;
  192. }
  193. #define RESET_DEBUG_TSPB_STAT reset_debug_tspb_stat()
  194. #else
  195. #define RESET_DEBUG_TSPB_STAT do {} while (0)
  196. #endif /* #ifdef DEBUG_TSP_BUF*/
  197. #ifdef DEBUG_INTERRUPT
  198. static inline void reset_debug_interrupt_stat(void)
  199. {
  200. mtv222_cb_ptr->invalid_intr_cnt = 0;
  201. mtv222_cb_ptr->level_intr_cnt = 0;
  202. mtv222_cb_ptr->ovf_intr_cnt = 0;
  203. mtv222_cb_ptr->udf_intr_cnt = 0;
  204. }
  205. #define RESET_DEBUG_INTR_STAT reset_debug_interrupt_stat()
  206. #define DMB_LEVEL_INTR_INC mtv222_cb_ptr->level_intr_cnt++;
  207. #define DMB_INV_INTR_INC mtv222_cb_ptr->invalid_intr_cnt++;
  208. #define DMB_OVF_INTR_INC mtv222_cb_ptr->ovf_intr_cnt++;
  209. #define DMB_UNF_INTR_INC mtv222_cb_ptr->udf_intr_cnt++;
  210. #else
  211. #define RESET_DEBUG_INTR_STAT do {} while (0)
  212. #define DMB_LEVEL_INTR_INC do {} while (0)
  213. #define DMB_INV_INTR_INC do {} while (0)
  214. #define DMB_OVF_INTR_INC do {} while (0)
  215. #define DMB_UNF_INTR_INC do {} while (0)
  216. #endif /* #ifdef DEBUG_INTERRUPT*/
  217. #if defined(DEBUG_TSP_BUF) && defined(DEBUG_INTERRUPT)
  218. #define SHOW_ISDBT_DEBUG_STAT \
  219. do { \
  220. DMBMSG("ovf(%ld), unf(%ld), inv(%ld), level(%ld),\n\
  221. \t max_alloc_seg(%u), max_enqueued_seg(%u),\n\
  222. \t max_enqueued_tsp(%u), alloc_err(%ld)\n",\
  223. mtv222_cb_ptr->ovf_intr_cnt, mtv222_cb_ptr->udf_intr_cnt,\
  224. mtv222_cb_ptr->invalid_intr_cnt, mtv222_cb_ptr->level_intr_cnt,\
  225. mtv222_cb_ptr->max_alloc_seg_cnt,\
  226. mtv222_cb_ptr->max_enqueued_seg_cnt,\
  227. mtv222_cb_ptr->max_enqueued_tsp_cnt,\
  228. mtv222_cb_ptr->alloc_tspb_err_cnt);\
  229. } while (0)
  230. #elif !defined(DEBUG_TSP_BUF) && defined(DEBUG_INTERRUPT)
  231. #define SHOW_ISDBT_DEBUG_STAT \
  232. do { \
  233. DMBMSG("ovf(%ld), unf(%ld), inv(%ld), level(%ld)\n",\
  234. mtv222_cb_ptr->ovf_intr_cnt, mtv222_cb_ptr->udf_intr_cnt,\
  235. mtv222_cb_ptr->invalid_intr_cnt, mtv222_cb_ptr->level_intr_cnt);\
  236. } while (0)
  237. #elif defined(DEBUG_TSP_BUF) && !defined(DEBUG_INTERRUPT)
  238. #define SHOW_ISDBT_DEBUG_STAT \
  239. do { \
  240. DMBMSG("max_alloc_seg(%u), max_enqueued_seg(%u) max_enqueued_tsp(%u), alloc_err(%ld)\n",\
  241. mtv222_cb_ptr->max_alloc_seg_cnt,\
  242. mtv222_cb_ptr->max_enqueued_seg_cnt,\
  243. mtv222_cb_ptr->max_enqueued_tsp_cnt,\
  244. mtv222_cb_ptr->alloc_tspb_err_cnt);\
  245. } while (0)
  246. #elif !defined(DEBUG_TSP_BUF) && !defined(DEBUG_INTERRUPT)
  247. #define SHOW_ISDBT_DEBUG_STAT do {} while (0)
  248. #endif
  249. /*============================================================================
  250. * Test IO control commands(0~10)
  251. *==========================================================================*/
  252. #define IOCTL_TEST_MTV_POWER_ON _IO(ISDBT_IOC_MAGIC, 0)
  253. #define IOCTL_TEST_MTV_POWER_OFF _IO(ISDBT_IOC_MAGIC, 1)
  254. #define MAX_NUM_MTV_REG_READ_BUF (16 * 188)
  255. typedef struct {
  256. unsigned int page; /* page value */
  257. unsigned int addr; /* input */
  258. unsigned int write_data;
  259. unsigned long param1;
  260. unsigned int read_cnt;
  261. unsigned char read_data[MAX_NUM_MTV_REG_READ_BUF]; /* output */
  262. } IOCTL_REG_ACCESS_INFO;
  263. #define IOCTL_TEST_REG_SINGLE_READ _IOWR(ISDBT_IOC_MAGIC, 3, IOCTL_REG_ACCESS_INFO)
  264. #define IOCTL_TEST_REG_BURST_READ _IOWR(ISDBT_IOC_MAGIC, 4, IOCTL_REG_ACCESS_INFO)
  265. #define IOCTL_TEST_REG_WRITE _IOW(ISDBT_IOC_MAGIC, 5, IOCTL_REG_ACCESS_INFO)
  266. #define IOCTL_TEST_REG_SPI_MEM_READ _IOWR(ISDBT_IOC_MAGIC, 6, IOCTL_REG_ACCESS_INFO)
  267. #define IOCTL_TEST_REG_ONLY_SPI_MEM_READ _IOWR(ISDBT_IOC_MAGIC, 7, IOCTL_REG_ACCESS_INFO)
  268. typedef struct {
  269. unsigned int pin; /* input */
  270. unsigned int value; /* input for write. output for read. */
  271. } IOCTL_GPIO_ACCESS_INFO;
  272. #define IOCTL_TEST_GPIO_SET _IOW(ISDBT_IOC_MAGIC, 6, IOCTL_GPIO_ACCESS_INFO)
  273. #define IOCTL_TEST_GPIO_GET _IOWR(ISDBT_IOC_MAGIC, 7, IOCTL_GPIO_ACCESS_INFO)
  274. /*============================================================================
  275. * TDMB IO control commands(10 ~ 29)
  276. *===========================================================================*/
  277. typedef struct {
  278. int country_band_type; // for MTV222
  279. int bandwidth; // enum E_RTV_BANDWIDTH_TYPE
  280. unsigned int spi_intr_size[7]; // input
  281. int tuner_err_code; // ouput
  282. } IOCTL_ISDBT_POWER_ON_INFO;
  283. typedef struct {
  284. unsigned int freq_khz; // input
  285. unsigned int subch_id; // input
  286. int svc_type; // input: enum E_RTV_SERVICE_TYPE
  287. int bandwidth; // input: enum E_RTV_BANDWIDTH_TYPE
  288. int tuner_err_code; // ouput
  289. } IOCTL_ISDBT_SCAN_INFO;
  290. typedef struct {
  291. unsigned int freq_khz; // input
  292. unsigned int subch_id; // input
  293. int svc_type; // input: enum E_RTV_SERVICE_TYPE
  294. int bandwidth; // input: enum E_RTV_BANDWIDTH_TYPE
  295. int tuner_err_code; // ouput
  296. } IOCTL_ISDBT_SET_CH_INFO;
  297. typedef struct {
  298. unsigned int lock_mask;
  299. unsigned int ant_level;
  300. unsigned int ber; // output
  301. unsigned int cnr; // output
  302. unsigned int per; // output
  303. int rssi; // output
  304. } IOCTL_ISDBT_SIGNAL_INFO;
  305. typedef struct {
  306. unsigned int lock_mask;
  307. int rssi;
  308. unsigned int ber_layer_A;
  309. unsigned int ber_layer_B;
  310. unsigned int per_layer_A;
  311. unsigned int per_layer_B;
  312. unsigned int cnr_layer_A;
  313. unsigned int cnr_layer_B;
  314. unsigned int ant_level_layer_A;
  315. unsigned int ant_level_layer_B;
  316. } IOCTL_ISDBT_SIGNAL_QUAL_INFO;
  317. #define IOCTL_ISDBT_POWER_ON _IOWR(ISDBT_IOC_MAGIC, 10, IOCTL_ISDBT_POWER_ON_INFO)
  318. #define IOCTL_ISDBT_POWER_OFF _IO(ISDBT_IOC_MAGIC, 11)
  319. #define IOCTL_ISDBT_SCAN_CHANNEL _IOWR(ISDBT_IOC_MAGIC,12, IOCTL_ISDBT_SCAN_INFO)
  320. #define IOCTL_ISDBT_SET_CHANNEL _IOWR(ISDBT_IOC_MAGIC,13, IOCTL_ISDBT_SET_CH_INFO)
  321. #define IOCTL_ISDBT_START_TS _IO(ISDBT_IOC_MAGIC, 14)
  322. #define IOCTL_ISDBT_STOP_TS _IO(ISDBT_IOC_MAGIC, 15)
  323. #define IOCTL_ISDBT_GET_LOCK_STATUS _IOR(ISDBT_IOC_MAGIC,16, unsigned int)
  324. #define IOCTL_ISDBT_GET_SIGNAL_INFO _IOR(ISDBT_IOC_MAGIC,17, IOCTL_ISDBT_SIGNAL_INFO)
  325. #define IOCTL_ISDBT_SUSPEND _IO(ISDBT_IOC_MAGIC, 18)
  326. #define IOCTL_ISDBT_RESUME _IO(ISDBT_IOC_MAGIC, 19)
  327. typedef struct {
  328. unsigned int ber_layer_A;
  329. unsigned int ber_layer_B;
  330. unsigned int per_layer_A;
  331. unsigned int per_layer_B;
  332. } IOCTL_ISDBT_BER_PER_INFO;
  333. #define IOCTL_ISDBT_GET_BER_PER_INFO _IOR(ISDBT_IOC_MAGIC, 20, IOCTL_ISDBT_BER_PER_INFO)
  334. #define IOCTL_ISDBT_GET_RSSI _IOR(ISDBT_IOC_MAGIC, 21, int)
  335. #define IOCTL_ISDBT_GET_CNR _IOR(ISDBT_IOC_MAGIC, 22, int)
  336. #define IOCTL_ISDBT_GET_SIGNAL_QUAL_INFO _IOR(ISDBT_IOC_MAGIC, 23, IOCTL_ISDBT_SIGNAL_QUAL_INFO)
  337. #endif /* __ISDBT_PORT_MTV222_H__*/