hp_sdc_rtc.c 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728
  1. /*
  2. * HP i8042 SDC + MSM-58321 BBRTC driver.
  3. *
  4. * Copyright (c) 2001 Brian S. Julin
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without
  8. * modification, are permitted provided that the following conditions
  9. * are met:
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions, and the following disclaimer,
  12. * without modification.
  13. * 2. The name of the author may not be used to endorse or promote products
  14. * derived from this software without specific prior written permission.
  15. *
  16. * Alternatively, this software may be distributed under the terms of the
  17. * GNU General Public License ("GPL").
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  20. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22. * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  23. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  24. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  25. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  26. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  27. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  28. *
  29. * References:
  30. * System Device Controller Microprocessor Firmware Theory of Operation
  31. * for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2
  32. * efirtc.c by Stephane Eranian/Hewlett Packard
  33. *
  34. */
  35. #include <linux/hp_sdc.h>
  36. #include <linux/errno.h>
  37. #include <linux/types.h>
  38. #include <linux/init.h>
  39. #include <linux/module.h>
  40. #include <linux/time.h>
  41. #include <linux/miscdevice.h>
  42. #include <linux/proc_fs.h>
  43. #include <linux/poll.h>
  44. #include <linux/rtc.h>
  45. #include <linux/mutex.h>
  46. #include <linux/semaphore.h>
  47. MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>");
  48. MODULE_DESCRIPTION("HP i8042 SDC + MSM-58321 RTC Driver");
  49. MODULE_LICENSE("Dual BSD/GPL");
  50. #define RTC_VERSION "1.10d"
  51. static DEFINE_MUTEX(hp_sdc_rtc_mutex);
  52. static unsigned long epoch = 2000;
  53. static struct semaphore i8042tregs;
  54. static hp_sdc_irqhook hp_sdc_rtc_isr;
  55. static struct fasync_struct *hp_sdc_rtc_async_queue;
  56. static DECLARE_WAIT_QUEUE_HEAD(hp_sdc_rtc_wait);
  57. static ssize_t hp_sdc_rtc_read(struct file *file, char __user *buf,
  58. size_t count, loff_t *ppos);
  59. static long hp_sdc_rtc_unlocked_ioctl(struct file *file,
  60. unsigned int cmd, unsigned long arg);
  61. static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait);
  62. static int hp_sdc_rtc_open(struct inode *inode, struct file *file);
  63. static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on);
  64. static int hp_sdc_rtc_read_proc(char *page, char **start, off_t off,
  65. int count, int *eof, void *data);
  66. static void hp_sdc_rtc_isr (int irq, void *dev_id,
  67. uint8_t status, uint8_t data)
  68. {
  69. return;
  70. }
  71. static int hp_sdc_rtc_do_read_bbrtc (struct rtc_time *rtctm)
  72. {
  73. struct semaphore tsem;
  74. hp_sdc_transaction t;
  75. uint8_t tseq[91];
  76. int i;
  77. i = 0;
  78. while (i < 91) {
  79. tseq[i++] = HP_SDC_ACT_DATAREG |
  80. HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN;
  81. tseq[i++] = 0x01; /* write i8042[0x70] */
  82. tseq[i] = i / 7; /* BBRTC reg address */
  83. i++;
  84. tseq[i++] = HP_SDC_CMD_DO_RTCR; /* Trigger command */
  85. tseq[i++] = 2; /* expect 1 stat/dat pair back. */
  86. i++; i++; /* buffer for stat/dat pair */
  87. }
  88. tseq[84] |= HP_SDC_ACT_SEMAPHORE;
  89. t.endidx = 91;
  90. t.seq = tseq;
  91. t.act.semaphore = &tsem;
  92. sema_init(&tsem, 0);
  93. if (hp_sdc_enqueue_transaction(&t)) return -1;
  94. down_interruptible(&tsem); /* Put ourselves to sleep for results. */
  95. /* Check for nonpresence of BBRTC */
  96. if (!((tseq[83] | tseq[90] | tseq[69] | tseq[76] |
  97. tseq[55] | tseq[62] | tseq[34] | tseq[41] |
  98. tseq[20] | tseq[27] | tseq[6] | tseq[13]) & 0x0f))
  99. return -1;
  100. memset(rtctm, 0, sizeof(struct rtc_time));
  101. rtctm->tm_year = (tseq[83] & 0x0f) + (tseq[90] & 0x0f) * 10;
  102. rtctm->tm_mon = (tseq[69] & 0x0f) + (tseq[76] & 0x0f) * 10;
  103. rtctm->tm_mday = (tseq[55] & 0x0f) + (tseq[62] & 0x0f) * 10;
  104. rtctm->tm_wday = (tseq[48] & 0x0f);
  105. rtctm->tm_hour = (tseq[34] & 0x0f) + (tseq[41] & 0x0f) * 10;
  106. rtctm->tm_min = (tseq[20] & 0x0f) + (tseq[27] & 0x0f) * 10;
  107. rtctm->tm_sec = (tseq[6] & 0x0f) + (tseq[13] & 0x0f) * 10;
  108. return 0;
  109. }
  110. static int hp_sdc_rtc_read_bbrtc (struct rtc_time *rtctm)
  111. {
  112. struct rtc_time tm, tm_last;
  113. int i = 0;
  114. /* MSM-58321 has no read latch, so must read twice and compare. */
  115. if (hp_sdc_rtc_do_read_bbrtc(&tm_last)) return -1;
  116. if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1;
  117. while (memcmp(&tm, &tm_last, sizeof(struct rtc_time))) {
  118. if (i++ > 4) return -1;
  119. memcpy(&tm_last, &tm, sizeof(struct rtc_time));
  120. if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1;
  121. }
  122. memcpy(rtctm, &tm, sizeof(struct rtc_time));
  123. return 0;
  124. }
  125. static int64_t hp_sdc_rtc_read_i8042timer (uint8_t loadcmd, int numreg)
  126. {
  127. hp_sdc_transaction t;
  128. uint8_t tseq[26] = {
  129. HP_SDC_ACT_PRECMD | HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
  130. 0,
  131. HP_SDC_CMD_READ_T1, 2, 0, 0,
  132. HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
  133. HP_SDC_CMD_READ_T2, 2, 0, 0,
  134. HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
  135. HP_SDC_CMD_READ_T3, 2, 0, 0,
  136. HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
  137. HP_SDC_CMD_READ_T4, 2, 0, 0,
  138. HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN,
  139. HP_SDC_CMD_READ_T5, 2, 0, 0
  140. };
  141. t.endidx = numreg * 5;
  142. tseq[1] = loadcmd;
  143. tseq[t.endidx - 4] |= HP_SDC_ACT_SEMAPHORE; /* numreg assumed > 1 */
  144. t.seq = tseq;
  145. t.act.semaphore = &i8042tregs;
  146. down_interruptible(&i8042tregs); /* Sleep if output regs in use. */
  147. if (hp_sdc_enqueue_transaction(&t)) return -1;
  148. down_interruptible(&i8042tregs); /* Sleep until results come back. */
  149. up(&i8042tregs);
  150. return (tseq[5] |
  151. ((uint64_t)(tseq[10]) << 8) | ((uint64_t)(tseq[15]) << 16) |
  152. ((uint64_t)(tseq[20]) << 24) | ((uint64_t)(tseq[25]) << 32));
  153. }
  154. /* Read the i8042 real-time clock */
  155. static inline int hp_sdc_rtc_read_rt(struct timeval *res) {
  156. int64_t raw;
  157. uint32_t tenms;
  158. unsigned int days;
  159. raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_RT, 5);
  160. if (raw < 0) return -1;
  161. tenms = (uint32_t)raw & 0xffffff;
  162. days = (unsigned int)(raw >> 24) & 0xffff;
  163. res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
  164. res->tv_sec = (time_t)(tenms / 100) + days * 86400;
  165. return 0;
  166. }
  167. /* Read the i8042 fast handshake timer */
  168. static inline int hp_sdc_rtc_read_fhs(struct timeval *res) {
  169. int64_t raw;
  170. unsigned int tenms;
  171. raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_FHS, 2);
  172. if (raw < 0) return -1;
  173. tenms = (unsigned int)raw & 0xffff;
  174. res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
  175. res->tv_sec = (time_t)(tenms / 100);
  176. return 0;
  177. }
  178. /* Read the i8042 match timer (a.k.a. alarm) */
  179. static inline int hp_sdc_rtc_read_mt(struct timeval *res) {
  180. int64_t raw;
  181. uint32_t tenms;
  182. raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_MT, 3);
  183. if (raw < 0) return -1;
  184. tenms = (uint32_t)raw & 0xffffff;
  185. res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
  186. res->tv_sec = (time_t)(tenms / 100);
  187. return 0;
  188. }
  189. /* Read the i8042 delay timer */
  190. static inline int hp_sdc_rtc_read_dt(struct timeval *res) {
  191. int64_t raw;
  192. uint32_t tenms;
  193. raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_DT, 3);
  194. if (raw < 0) return -1;
  195. tenms = (uint32_t)raw & 0xffffff;
  196. res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
  197. res->tv_sec = (time_t)(tenms / 100);
  198. return 0;
  199. }
  200. /* Read the i8042 cycle timer (a.k.a. periodic) */
  201. static inline int hp_sdc_rtc_read_ct(struct timeval *res) {
  202. int64_t raw;
  203. uint32_t tenms;
  204. raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_CT, 3);
  205. if (raw < 0) return -1;
  206. tenms = (uint32_t)raw & 0xffffff;
  207. res->tv_usec = (suseconds_t)(tenms % 100) * 10000;
  208. res->tv_sec = (time_t)(tenms / 100);
  209. return 0;
  210. }
  211. /* Set the i8042 real-time clock */
  212. static int hp_sdc_rtc_set_rt (struct timeval *setto)
  213. {
  214. uint32_t tenms;
  215. unsigned int days;
  216. hp_sdc_transaction t;
  217. uint8_t tseq[11] = {
  218. HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
  219. HP_SDC_CMD_SET_RTMS, 3, 0, 0, 0,
  220. HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
  221. HP_SDC_CMD_SET_RTD, 2, 0, 0
  222. };
  223. t.endidx = 10;
  224. if (0xffff < setto->tv_sec / 86400) return -1;
  225. days = setto->tv_sec / 86400;
  226. if (0xffff < setto->tv_usec / 1000000 / 86400) return -1;
  227. days += ((setto->tv_sec % 86400) + setto->tv_usec / 1000000) / 86400;
  228. if (days > 0xffff) return -1;
  229. if (0xffffff < setto->tv_sec) return -1;
  230. tenms = setto->tv_sec * 100;
  231. if (0xffffff < setto->tv_usec / 10000) return -1;
  232. tenms += setto->tv_usec / 10000;
  233. if (tenms > 0xffffff) return -1;
  234. tseq[3] = (uint8_t)(tenms & 0xff);
  235. tseq[4] = (uint8_t)((tenms >> 8) & 0xff);
  236. tseq[5] = (uint8_t)((tenms >> 16) & 0xff);
  237. tseq[9] = (uint8_t)(days & 0xff);
  238. tseq[10] = (uint8_t)((days >> 8) & 0xff);
  239. t.seq = tseq;
  240. if (hp_sdc_enqueue_transaction(&t)) return -1;
  241. return 0;
  242. }
  243. /* Set the i8042 fast handshake timer */
  244. static int hp_sdc_rtc_set_fhs (struct timeval *setto)
  245. {
  246. uint32_t tenms;
  247. hp_sdc_transaction t;
  248. uint8_t tseq[5] = {
  249. HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
  250. HP_SDC_CMD_SET_FHS, 2, 0, 0
  251. };
  252. t.endidx = 4;
  253. if (0xffff < setto->tv_sec) return -1;
  254. tenms = setto->tv_sec * 100;
  255. if (0xffff < setto->tv_usec / 10000) return -1;
  256. tenms += setto->tv_usec / 10000;
  257. if (tenms > 0xffff) return -1;
  258. tseq[3] = (uint8_t)(tenms & 0xff);
  259. tseq[4] = (uint8_t)((tenms >> 8) & 0xff);
  260. t.seq = tseq;
  261. if (hp_sdc_enqueue_transaction(&t)) return -1;
  262. return 0;
  263. }
  264. /* Set the i8042 match timer (a.k.a. alarm) */
  265. #define hp_sdc_rtc_set_mt (setto) \
  266. hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_MT)
  267. /* Set the i8042 delay timer */
  268. #define hp_sdc_rtc_set_dt (setto) \
  269. hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_DT)
  270. /* Set the i8042 cycle timer (a.k.a. periodic) */
  271. #define hp_sdc_rtc_set_ct (setto) \
  272. hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_CT)
  273. /* Set one of the i8042 3-byte wide timers */
  274. static int hp_sdc_rtc_set_i8042timer (struct timeval *setto, uint8_t setcmd)
  275. {
  276. uint32_t tenms;
  277. hp_sdc_transaction t;
  278. uint8_t tseq[6] = {
  279. HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT,
  280. 0, 3, 0, 0, 0
  281. };
  282. t.endidx = 6;
  283. if (0xffffff < setto->tv_sec) return -1;
  284. tenms = setto->tv_sec * 100;
  285. if (0xffffff < setto->tv_usec / 10000) return -1;
  286. tenms += setto->tv_usec / 10000;
  287. if (tenms > 0xffffff) return -1;
  288. tseq[1] = setcmd;
  289. tseq[3] = (uint8_t)(tenms & 0xff);
  290. tseq[4] = (uint8_t)((tenms >> 8) & 0xff);
  291. tseq[5] = (uint8_t)((tenms >> 16) & 0xff);
  292. t.seq = tseq;
  293. if (hp_sdc_enqueue_transaction(&t)) {
  294. return -1;
  295. }
  296. return 0;
  297. }
  298. static ssize_t hp_sdc_rtc_read(struct file *file, char __user *buf,
  299. size_t count, loff_t *ppos) {
  300. ssize_t retval;
  301. if (count < sizeof(unsigned long))
  302. return -EINVAL;
  303. retval = put_user(68, (unsigned long __user *)buf);
  304. return retval;
  305. }
  306. static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait)
  307. {
  308. unsigned long l;
  309. l = 0;
  310. if (l != 0)
  311. return POLLIN | POLLRDNORM;
  312. return 0;
  313. }
  314. static int hp_sdc_rtc_open(struct inode *inode, struct file *file)
  315. {
  316. return 0;
  317. }
  318. static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on)
  319. {
  320. return fasync_helper (fd, filp, on, &hp_sdc_rtc_async_queue);
  321. }
  322. static int hp_sdc_rtc_proc_output (char *buf)
  323. {
  324. #define YN(bit) ("no")
  325. #define NY(bit) ("yes")
  326. char *p;
  327. struct rtc_time tm;
  328. struct timeval tv;
  329. memset(&tm, 0, sizeof(struct rtc_time));
  330. p = buf;
  331. if (hp_sdc_rtc_read_bbrtc(&tm)) {
  332. p += sprintf(p, "BBRTC\t\t: READ FAILED!\n");
  333. } else {
  334. p += sprintf(p,
  335. "rtc_time\t: %02d:%02d:%02d\n"
  336. "rtc_date\t: %04d-%02d-%02d\n"
  337. "rtc_epoch\t: %04lu\n",
  338. tm.tm_hour, tm.tm_min, tm.tm_sec,
  339. tm.tm_year + 1900, tm.tm_mon + 1,
  340. tm.tm_mday, epoch);
  341. }
  342. if (hp_sdc_rtc_read_rt(&tv)) {
  343. p += sprintf(p, "i8042 rtc\t: READ FAILED!\n");
  344. } else {
  345. p += sprintf(p, "i8042 rtc\t: %ld.%02d seconds\n",
  346. tv.tv_sec, (int)tv.tv_usec/1000);
  347. }
  348. if (hp_sdc_rtc_read_fhs(&tv)) {
  349. p += sprintf(p, "handshake\t: READ FAILED!\n");
  350. } else {
  351. p += sprintf(p, "handshake\t: %ld.%02d seconds\n",
  352. tv.tv_sec, (int)tv.tv_usec/1000);
  353. }
  354. if (hp_sdc_rtc_read_mt(&tv)) {
  355. p += sprintf(p, "alarm\t\t: READ FAILED!\n");
  356. } else {
  357. p += sprintf(p, "alarm\t\t: %ld.%02d seconds\n",
  358. tv.tv_sec, (int)tv.tv_usec/1000);
  359. }
  360. if (hp_sdc_rtc_read_dt(&tv)) {
  361. p += sprintf(p, "delay\t\t: READ FAILED!\n");
  362. } else {
  363. p += sprintf(p, "delay\t\t: %ld.%02d seconds\n",
  364. tv.tv_sec, (int)tv.tv_usec/1000);
  365. }
  366. if (hp_sdc_rtc_read_ct(&tv)) {
  367. p += sprintf(p, "periodic\t: READ FAILED!\n");
  368. } else {
  369. p += sprintf(p, "periodic\t: %ld.%02d seconds\n",
  370. tv.tv_sec, (int)tv.tv_usec/1000);
  371. }
  372. p += sprintf(p,
  373. "DST_enable\t: %s\n"
  374. "BCD\t\t: %s\n"
  375. "24hr\t\t: %s\n"
  376. "square_wave\t: %s\n"
  377. "alarm_IRQ\t: %s\n"
  378. "update_IRQ\t: %s\n"
  379. "periodic_IRQ\t: %s\n"
  380. "periodic_freq\t: %ld\n"
  381. "batt_status\t: %s\n",
  382. YN(RTC_DST_EN),
  383. NY(RTC_DM_BINARY),
  384. YN(RTC_24H),
  385. YN(RTC_SQWE),
  386. YN(RTC_AIE),
  387. YN(RTC_UIE),
  388. YN(RTC_PIE),
  389. 1UL,
  390. 1 ? "okay" : "dead");
  391. return p - buf;
  392. #undef YN
  393. #undef NY
  394. }
  395. static int hp_sdc_rtc_read_proc(char *page, char **start, off_t off,
  396. int count, int *eof, void *data)
  397. {
  398. int len = hp_sdc_rtc_proc_output (page);
  399. if (len <= off+count) *eof = 1;
  400. *start = page + off;
  401. len -= off;
  402. if (len>count) len = count;
  403. if (len<0) len = 0;
  404. return len;
  405. }
  406. static int hp_sdc_rtc_ioctl(struct file *file,
  407. unsigned int cmd, unsigned long arg)
  408. {
  409. #if 1
  410. return -EINVAL;
  411. #else
  412. struct rtc_time wtime;
  413. struct timeval ttime;
  414. int use_wtime = 0;
  415. /* This needs major work. */
  416. switch (cmd) {
  417. case RTC_AIE_OFF: /* Mask alarm int. enab. bit */
  418. case RTC_AIE_ON: /* Allow alarm interrupts. */
  419. case RTC_PIE_OFF: /* Mask periodic int. enab. bit */
  420. case RTC_PIE_ON: /* Allow periodic ints */
  421. case RTC_UIE_ON: /* Allow ints for RTC updates. */
  422. case RTC_UIE_OFF: /* Allow ints for RTC updates. */
  423. {
  424. /* We cannot mask individual user timers and we
  425. cannot tell them apart when they occur, so it
  426. would be disingenuous to succeed these IOCTLs */
  427. return -EINVAL;
  428. }
  429. case RTC_ALM_READ: /* Read the present alarm time */
  430. {
  431. if (hp_sdc_rtc_read_mt(&ttime)) return -EFAULT;
  432. if (hp_sdc_rtc_read_bbrtc(&wtime)) return -EFAULT;
  433. wtime.tm_hour = ttime.tv_sec / 3600; ttime.tv_sec %= 3600;
  434. wtime.tm_min = ttime.tv_sec / 60; ttime.tv_sec %= 60;
  435. wtime.tm_sec = ttime.tv_sec;
  436. break;
  437. }
  438. case RTC_IRQP_READ: /* Read the periodic IRQ rate. */
  439. {
  440. return put_user(hp_sdc_rtc_freq, (unsigned long *)arg);
  441. }
  442. case RTC_IRQP_SET: /* Set periodic IRQ rate. */
  443. {
  444. /*
  445. * The max we can do is 100Hz.
  446. */
  447. if ((arg < 1) || (arg > 100)) return -EINVAL;
  448. ttime.tv_sec = 0;
  449. ttime.tv_usec = 1000000 / arg;
  450. if (hp_sdc_rtc_set_ct(&ttime)) return -EFAULT;
  451. hp_sdc_rtc_freq = arg;
  452. return 0;
  453. }
  454. case RTC_ALM_SET: /* Store a time into the alarm */
  455. {
  456. /*
  457. * This expects a struct hp_sdc_rtc_time. Writing 0xff means
  458. * "don't care" or "match all" for PC timers. The HP SDC
  459. * does not support that perk, but it could be emulated fairly
  460. * easily. Only the tm_hour, tm_min and tm_sec are used.
  461. * We could do it with 10ms accuracy with the HP SDC, if the
  462. * rtc interface left us a way to do that.
  463. */
  464. struct hp_sdc_rtc_time alm_tm;
  465. if (copy_from_user(&alm_tm, (struct hp_sdc_rtc_time*)arg,
  466. sizeof(struct hp_sdc_rtc_time)))
  467. return -EFAULT;
  468. if (alm_tm.tm_hour > 23) return -EINVAL;
  469. if (alm_tm.tm_min > 59) return -EINVAL;
  470. if (alm_tm.tm_sec > 59) return -EINVAL;
  471. ttime.sec = alm_tm.tm_hour * 3600 +
  472. alm_tm.tm_min * 60 + alm_tm.tm_sec;
  473. ttime.usec = 0;
  474. if (hp_sdc_rtc_set_mt(&ttime)) return -EFAULT;
  475. return 0;
  476. }
  477. case RTC_RD_TIME: /* Read the time/date from RTC */
  478. {
  479. if (hp_sdc_rtc_read_bbrtc(&wtime)) return -EFAULT;
  480. break;
  481. }
  482. case RTC_SET_TIME: /* Set the RTC */
  483. {
  484. struct rtc_time hp_sdc_rtc_tm;
  485. unsigned char mon, day, hrs, min, sec, leap_yr;
  486. unsigned int yrs;
  487. if (!capable(CAP_SYS_TIME))
  488. return -EACCES;
  489. if (copy_from_user(&hp_sdc_rtc_tm, (struct rtc_time *)arg,
  490. sizeof(struct rtc_time)))
  491. return -EFAULT;
  492. yrs = hp_sdc_rtc_tm.tm_year + 1900;
  493. mon = hp_sdc_rtc_tm.tm_mon + 1; /* tm_mon starts at zero */
  494. day = hp_sdc_rtc_tm.tm_mday;
  495. hrs = hp_sdc_rtc_tm.tm_hour;
  496. min = hp_sdc_rtc_tm.tm_min;
  497. sec = hp_sdc_rtc_tm.tm_sec;
  498. if (yrs < 1970)
  499. return -EINVAL;
  500. leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400));
  501. if ((mon > 12) || (day == 0))
  502. return -EINVAL;
  503. if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr)))
  504. return -EINVAL;
  505. if ((hrs >= 24) || (min >= 60) || (sec >= 60))
  506. return -EINVAL;
  507. if ((yrs -= eH) > 255) /* They are unsigned */
  508. return -EINVAL;
  509. return 0;
  510. }
  511. case RTC_EPOCH_READ: /* Read the epoch. */
  512. {
  513. return put_user (epoch, (unsigned long *)arg);
  514. }
  515. case RTC_EPOCH_SET: /* Set the epoch. */
  516. {
  517. /*
  518. * There were no RTC clocks before 1900.
  519. */
  520. if (arg < 1900)
  521. return -EINVAL;
  522. if (!capable(CAP_SYS_TIME))
  523. return -EACCES;
  524. epoch = arg;
  525. return 0;
  526. }
  527. default:
  528. return -EINVAL;
  529. }
  530. return copy_to_user((void *)arg, &wtime, sizeof wtime) ? -EFAULT : 0;
  531. #endif
  532. }
  533. static long hp_sdc_rtc_unlocked_ioctl(struct file *file,
  534. unsigned int cmd, unsigned long arg)
  535. {
  536. int ret;
  537. mutex_lock(&hp_sdc_rtc_mutex);
  538. ret = hp_sdc_rtc_ioctl(file, cmd, arg);
  539. mutex_unlock(&hp_sdc_rtc_mutex);
  540. return ret;
  541. }
  542. static const struct file_operations hp_sdc_rtc_fops = {
  543. .owner = THIS_MODULE,
  544. .llseek = no_llseek,
  545. .read = hp_sdc_rtc_read,
  546. .poll = hp_sdc_rtc_poll,
  547. .unlocked_ioctl = hp_sdc_rtc_unlocked_ioctl,
  548. .open = hp_sdc_rtc_open,
  549. .fasync = hp_sdc_rtc_fasync,
  550. };
  551. static struct miscdevice hp_sdc_rtc_dev = {
  552. .minor = RTC_MINOR,
  553. .name = "rtc_HIL",
  554. .fops = &hp_sdc_rtc_fops
  555. };
  556. static int __init hp_sdc_rtc_init(void)
  557. {
  558. int ret;
  559. #ifdef __mc68000__
  560. if (!MACH_IS_HP300)
  561. return -ENODEV;
  562. #endif
  563. sema_init(&i8042tregs, 1);
  564. if ((ret = hp_sdc_request_timer_irq(&hp_sdc_rtc_isr)))
  565. return ret;
  566. if (misc_register(&hp_sdc_rtc_dev) != 0)
  567. printk(KERN_INFO "Could not register misc. dev for i8042 rtc\n");
  568. create_proc_read_entry ("driver/rtc", 0, NULL,
  569. hp_sdc_rtc_read_proc, NULL);
  570. printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support loaded "
  571. "(RTC v " RTC_VERSION ")\n");
  572. return 0;
  573. }
  574. static void __exit hp_sdc_rtc_exit(void)
  575. {
  576. remove_proc_entry ("driver/rtc", NULL);
  577. misc_deregister(&hp_sdc_rtc_dev);
  578. hp_sdc_release_timer_irq(hp_sdc_rtc_isr);
  579. printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support unloaded\n");
  580. }
  581. module_init(hp_sdc_rtc_init);
  582. module_exit(hp_sdc_rtc_exit);