r600_audio.c 8.0 KB

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  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Christian König.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Christian König
  25. */
  26. #include "drmP.h"
  27. #include "radeon.h"
  28. #include "radeon_reg.h"
  29. #include "radeon_asic.h"
  30. #include "atom.h"
  31. #define AUDIO_TIMER_INTERVALL 100 /* 1/10 sekund should be enough */
  32. /*
  33. * check if the chipset is supported
  34. */
  35. static int r600_audio_chipset_supported(struct radeon_device *rdev)
  36. {
  37. return (rdev->family >= CHIP_R600 && !ASIC_IS_DCE5(rdev))
  38. || rdev->family == CHIP_RS600
  39. || rdev->family == CHIP_RS690
  40. || rdev->family == CHIP_RS740;
  41. }
  42. /*
  43. * current number of channels
  44. */
  45. int r600_audio_channels(struct radeon_device *rdev)
  46. {
  47. return (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0x7) + 1;
  48. }
  49. /*
  50. * current bits per sample
  51. */
  52. int r600_audio_bits_per_sample(struct radeon_device *rdev)
  53. {
  54. uint32_t value = (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0xF0) >> 4;
  55. switch (value) {
  56. case 0x0: return 8;
  57. case 0x1: return 16;
  58. case 0x2: return 20;
  59. case 0x3: return 24;
  60. case 0x4: return 32;
  61. }
  62. dev_err(rdev->dev, "Unknown bits per sample 0x%x using 16 instead\n",
  63. (int)value);
  64. return 16;
  65. }
  66. /*
  67. * current sampling rate in HZ
  68. */
  69. int r600_audio_rate(struct radeon_device *rdev)
  70. {
  71. uint32_t value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL);
  72. uint32_t result;
  73. if (value & 0x4000)
  74. result = 44100;
  75. else
  76. result = 48000;
  77. result *= ((value >> 11) & 0x7) + 1;
  78. result /= ((value >> 8) & 0x7) + 1;
  79. return result;
  80. }
  81. /*
  82. * iec 60958 status bits
  83. */
  84. uint8_t r600_audio_status_bits(struct radeon_device *rdev)
  85. {
  86. return RREG32(R600_AUDIO_STATUS_BITS) & 0xff;
  87. }
  88. /*
  89. * iec 60958 category code
  90. */
  91. uint8_t r600_audio_category_code(struct radeon_device *rdev)
  92. {
  93. return (RREG32(R600_AUDIO_STATUS_BITS) >> 8) & 0xff;
  94. }
  95. /*
  96. * schedule next audio update event
  97. */
  98. void r600_audio_schedule_polling(struct radeon_device *rdev)
  99. {
  100. mod_timer(&rdev->audio_timer,
  101. jiffies + msecs_to_jiffies(AUDIO_TIMER_INTERVALL));
  102. }
  103. /*
  104. * update all hdmi interfaces with current audio parameters
  105. */
  106. static void r600_audio_update_hdmi(unsigned long param)
  107. {
  108. struct radeon_device *rdev = (struct radeon_device *)param;
  109. struct drm_device *dev = rdev->ddev;
  110. int channels = r600_audio_channels(rdev);
  111. int rate = r600_audio_rate(rdev);
  112. int bps = r600_audio_bits_per_sample(rdev);
  113. uint8_t status_bits = r600_audio_status_bits(rdev);
  114. uint8_t category_code = r600_audio_category_code(rdev);
  115. struct drm_encoder *encoder;
  116. int changes = 0, still_going = 0;
  117. changes |= channels != rdev->audio_channels;
  118. changes |= rate != rdev->audio_rate;
  119. changes |= bps != rdev->audio_bits_per_sample;
  120. changes |= status_bits != rdev->audio_status_bits;
  121. changes |= category_code != rdev->audio_category_code;
  122. if (changes) {
  123. rdev->audio_channels = channels;
  124. rdev->audio_rate = rate;
  125. rdev->audio_bits_per_sample = bps;
  126. rdev->audio_status_bits = status_bits;
  127. rdev->audio_category_code = category_code;
  128. }
  129. list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
  130. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  131. still_going |= radeon_encoder->audio_polling_active;
  132. if (changes || r600_hdmi_buffer_status_changed(encoder))
  133. r600_hdmi_update_audio_settings(encoder);
  134. }
  135. if (still_going)
  136. r600_audio_schedule_polling(rdev);
  137. }
  138. /*
  139. * turn on/off audio engine
  140. */
  141. static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable)
  142. {
  143. u32 value = 0;
  144. DRM_INFO("%s audio support\n", enable ? "Enabling" : "Disabling");
  145. if (ASIC_IS_DCE4(rdev)) {
  146. if (enable) {
  147. value |= 0x81000000; /* Required to enable audio */
  148. value |= 0x0e1000f0; /* fglrx sets that too */
  149. }
  150. WREG32(EVERGREEN_AUDIO_ENABLE, value);
  151. } else {
  152. WREG32_P(R600_AUDIO_ENABLE,
  153. enable ? 0x81000000 : 0x0, ~0x81000000);
  154. }
  155. rdev->audio_enabled = enable;
  156. }
  157. /*
  158. * initialize the audio vars and register the update timer
  159. */
  160. int r600_audio_init(struct radeon_device *rdev)
  161. {
  162. if (!radeon_audio || !r600_audio_chipset_supported(rdev))
  163. return 0;
  164. r600_audio_engine_enable(rdev, true);
  165. rdev->audio_channels = -1;
  166. rdev->audio_rate = -1;
  167. rdev->audio_bits_per_sample = -1;
  168. rdev->audio_status_bits = 0;
  169. rdev->audio_category_code = 0;
  170. setup_timer(
  171. &rdev->audio_timer,
  172. r600_audio_update_hdmi,
  173. (unsigned long)rdev);
  174. return 0;
  175. }
  176. /*
  177. * enable the polling timer, to check for status changes
  178. */
  179. void r600_audio_enable_polling(struct drm_encoder *encoder)
  180. {
  181. struct drm_device *dev = encoder->dev;
  182. struct radeon_device *rdev = dev->dev_private;
  183. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  184. DRM_DEBUG("r600_audio_enable_polling: %d\n",
  185. radeon_encoder->audio_polling_active);
  186. if (radeon_encoder->audio_polling_active)
  187. return;
  188. radeon_encoder->audio_polling_active = 1;
  189. if (rdev->audio_enabled)
  190. mod_timer(&rdev->audio_timer, jiffies + 1);
  191. }
  192. /*
  193. * disable the polling timer, so we get no more status updates
  194. */
  195. void r600_audio_disable_polling(struct drm_encoder *encoder)
  196. {
  197. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  198. DRM_DEBUG("r600_audio_disable_polling: %d\n",
  199. radeon_encoder->audio_polling_active);
  200. radeon_encoder->audio_polling_active = 0;
  201. }
  202. /*
  203. * atach the audio codec to the clock source of the encoder
  204. */
  205. void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
  206. {
  207. struct drm_device *dev = encoder->dev;
  208. struct radeon_device *rdev = dev->dev_private;
  209. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  210. struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
  211. struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
  212. int base_rate = 48000;
  213. switch (radeon_encoder->encoder_id) {
  214. case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
  215. case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
  216. WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
  217. break;
  218. case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
  219. case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
  220. case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
  221. case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
  222. WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
  223. break;
  224. default:
  225. dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n",
  226. radeon_encoder->encoder_id);
  227. return;
  228. }
  229. if (ASIC_IS_DCE4(rdev)) {
  230. /* TODO: other PLLs? */
  231. WREG32(EVERGREEN_AUDIO_PLL1_MUL, base_rate * 10);
  232. WREG32(EVERGREEN_AUDIO_PLL1_DIV, clock * 10);
  233. WREG32(EVERGREEN_AUDIO_PLL1_UNK, 0x00000071);
  234. /* Select DTO source */
  235. WREG32(0x5ac, radeon_crtc->crtc_id);
  236. } else {
  237. switch (dig->dig_encoder) {
  238. case 0:
  239. WREG32(R600_AUDIO_PLL1_MUL, base_rate * 50);
  240. WREG32(R600_AUDIO_PLL1_DIV, clock * 100);
  241. WREG32(R600_AUDIO_CLK_SRCSEL, 0);
  242. break;
  243. case 1:
  244. WREG32(R600_AUDIO_PLL2_MUL, base_rate * 50);
  245. WREG32(R600_AUDIO_PLL2_DIV, clock * 100);
  246. WREG32(R600_AUDIO_CLK_SRCSEL, 1);
  247. break;
  248. default:
  249. dev_err(rdev->dev,
  250. "Unsupported DIG on encoder 0x%02X\n",
  251. radeon_encoder->encoder_id);
  252. return;
  253. }
  254. }
  255. }
  256. /*
  257. * release the audio timer
  258. * TODO: How to do this correctly on SMP systems?
  259. */
  260. void r600_audio_fini(struct radeon_device *rdev)
  261. {
  262. if (!rdev->audio_enabled)
  263. return;
  264. del_timer(&rdev->audio_timer);
  265. r600_audio_engine_enable(rdev, false);
  266. }