intel_lvds.c 32 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include "drmP.h"
  34. #include "drm.h"
  35. #include "drm_crtc.h"
  36. #include "drm_edid.h"
  37. #include "intel_drv.h"
  38. #include "i915_drm.h"
  39. #include "i915_drv.h"
  40. #include <linux/acpi.h>
  41. /* Private structure for the integrated LVDS support */
  42. struct intel_lvds {
  43. struct intel_encoder base;
  44. struct edid *edid;
  45. int fitting_mode;
  46. u32 pfit_control;
  47. u32 pfit_pgm_ratios;
  48. bool pfit_dirty;
  49. struct drm_display_mode *fixed_mode;
  50. };
  51. static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
  52. {
  53. return container_of(encoder, struct intel_lvds, base.base);
  54. }
  55. static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
  56. {
  57. return container_of(intel_attached_encoder(connector),
  58. struct intel_lvds, base);
  59. }
  60. /**
  61. * Sets the power state for the panel.
  62. */
  63. static void intel_lvds_enable(struct intel_lvds *intel_lvds)
  64. {
  65. struct drm_device *dev = intel_lvds->base.base.dev;
  66. struct drm_i915_private *dev_priv = dev->dev_private;
  67. u32 ctl_reg, lvds_reg, stat_reg;
  68. if (HAS_PCH_SPLIT(dev)) {
  69. ctl_reg = PCH_PP_CONTROL;
  70. lvds_reg = PCH_LVDS;
  71. stat_reg = PCH_PP_STATUS;
  72. } else {
  73. ctl_reg = PP_CONTROL;
  74. lvds_reg = LVDS;
  75. stat_reg = PP_STATUS;
  76. }
  77. I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  78. if (intel_lvds->pfit_dirty) {
  79. /*
  80. * Enable automatic panel scaling so that non-native modes
  81. * fill the screen. The panel fitter should only be
  82. * adjusted whilst the pipe is disabled, according to
  83. * register description and PRM.
  84. */
  85. DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  86. intel_lvds->pfit_control,
  87. intel_lvds->pfit_pgm_ratios);
  88. I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
  89. I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
  90. intel_lvds->pfit_dirty = false;
  91. }
  92. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  93. POSTING_READ(lvds_reg);
  94. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  95. DRM_ERROR("timed out waiting for panel to power on\n");
  96. intel_panel_enable_backlight(dev);
  97. }
  98. static void intel_lvds_disable(struct intel_lvds *intel_lvds)
  99. {
  100. struct drm_device *dev = intel_lvds->base.base.dev;
  101. struct drm_i915_private *dev_priv = dev->dev_private;
  102. u32 ctl_reg, lvds_reg, stat_reg;
  103. if (HAS_PCH_SPLIT(dev)) {
  104. ctl_reg = PCH_PP_CONTROL;
  105. lvds_reg = PCH_LVDS;
  106. stat_reg = PCH_PP_STATUS;
  107. } else {
  108. ctl_reg = PP_CONTROL;
  109. lvds_reg = LVDS;
  110. stat_reg = PP_STATUS;
  111. }
  112. intel_panel_disable_backlight(dev);
  113. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  114. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  115. DRM_ERROR("timed out waiting for panel to power off\n");
  116. if (intel_lvds->pfit_control) {
  117. I915_WRITE(PFIT_CONTROL, 0);
  118. intel_lvds->pfit_dirty = true;
  119. }
  120. I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
  121. POSTING_READ(lvds_reg);
  122. }
  123. static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
  124. {
  125. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  126. if (mode == DRM_MODE_DPMS_ON)
  127. intel_lvds_enable(intel_lvds);
  128. else
  129. intel_lvds_disable(intel_lvds);
  130. /* XXX: We never power down the LVDS pairs. */
  131. }
  132. static int intel_lvds_mode_valid(struct drm_connector *connector,
  133. struct drm_display_mode *mode)
  134. {
  135. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  136. struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
  137. if (mode->hdisplay > fixed_mode->hdisplay)
  138. return MODE_PANEL;
  139. if (mode->vdisplay > fixed_mode->vdisplay)
  140. return MODE_PANEL;
  141. return MODE_OK;
  142. }
  143. static void
  144. centre_horizontally(struct drm_display_mode *mode,
  145. int width)
  146. {
  147. u32 border, sync_pos, blank_width, sync_width;
  148. /* keep the hsync and hblank widths constant */
  149. sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  150. blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  151. sync_pos = (blank_width - sync_width + 1) / 2;
  152. border = (mode->hdisplay - width + 1) / 2;
  153. border += border & 1; /* make the border even */
  154. mode->crtc_hdisplay = width;
  155. mode->crtc_hblank_start = width + border;
  156. mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  157. mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  158. mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  159. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  160. }
  161. static void
  162. centre_vertically(struct drm_display_mode *mode,
  163. int height)
  164. {
  165. u32 border, sync_pos, blank_width, sync_width;
  166. /* keep the vsync and vblank widths constant */
  167. sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  168. blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  169. sync_pos = (blank_width - sync_width + 1) / 2;
  170. border = (mode->vdisplay - height + 1) / 2;
  171. mode->crtc_vdisplay = height;
  172. mode->crtc_vblank_start = height + border;
  173. mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  174. mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  175. mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  176. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  177. }
  178. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  179. {
  180. /*
  181. * Floating point operation is not supported. So the FACTOR
  182. * is defined, which can avoid the floating point computation
  183. * when calculating the panel ratio.
  184. */
  185. #define ACCURACY 12
  186. #define FACTOR (1 << ACCURACY)
  187. u32 ratio = source * FACTOR / target;
  188. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  189. }
  190. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  191. struct drm_display_mode *mode,
  192. struct drm_display_mode *adjusted_mode)
  193. {
  194. struct drm_device *dev = encoder->dev;
  195. struct drm_i915_private *dev_priv = dev->dev_private;
  196. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  197. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  198. struct drm_encoder *tmp_encoder;
  199. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  200. int pipe;
  201. /* Should never happen!! */
  202. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  203. DRM_ERROR("Can't support LVDS on pipe A\n");
  204. return false;
  205. }
  206. /* Should never happen!! */
  207. list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
  208. if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
  209. DRM_ERROR("Can't enable LVDS and another "
  210. "encoder on the same pipe\n");
  211. return false;
  212. }
  213. }
  214. /*
  215. * We have timings from the BIOS for the panel, put them in
  216. * to the adjusted mode. The CRTC will be set up for this mode,
  217. * with the panel scaling set up to source from the H/VDisplay
  218. * of the original mode.
  219. */
  220. intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
  221. if (HAS_PCH_SPLIT(dev)) {
  222. intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
  223. mode, adjusted_mode);
  224. return true;
  225. }
  226. /* Native modes don't need fitting */
  227. if (adjusted_mode->hdisplay == mode->hdisplay &&
  228. adjusted_mode->vdisplay == mode->vdisplay)
  229. goto out;
  230. /* 965+ wants fuzzy fitting */
  231. if (INTEL_INFO(dev)->gen >= 4)
  232. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  233. PFIT_FILTER_FUZZY);
  234. /*
  235. * Enable automatic panel scaling for non-native modes so that they fill
  236. * the screen. Should be enabled before the pipe is enabled, according
  237. * to register description and PRM.
  238. * Change the value here to see the borders for debugging
  239. */
  240. for_each_pipe(pipe)
  241. I915_WRITE(BCLRPAT(pipe), 0);
  242. drm_mode_set_crtcinfo(adjusted_mode, 0);
  243. switch (intel_lvds->fitting_mode) {
  244. case DRM_MODE_SCALE_CENTER:
  245. /*
  246. * For centered modes, we have to calculate border widths &
  247. * heights and modify the values programmed into the CRTC.
  248. */
  249. centre_horizontally(adjusted_mode, mode->hdisplay);
  250. centre_vertically(adjusted_mode, mode->vdisplay);
  251. border = LVDS_BORDER_ENABLE;
  252. break;
  253. case DRM_MODE_SCALE_ASPECT:
  254. /* Scale but preserve the aspect ratio */
  255. if (INTEL_INFO(dev)->gen >= 4) {
  256. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  257. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  258. /* 965+ is easy, it does everything in hw */
  259. if (scaled_width > scaled_height)
  260. pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
  261. else if (scaled_width < scaled_height)
  262. pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
  263. else if (adjusted_mode->hdisplay != mode->hdisplay)
  264. pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  265. } else {
  266. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  267. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  268. /*
  269. * For earlier chips we have to calculate the scaling
  270. * ratio by hand and program it into the
  271. * PFIT_PGM_RATIO register
  272. */
  273. if (scaled_width > scaled_height) { /* pillar */
  274. centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
  275. border = LVDS_BORDER_ENABLE;
  276. if (mode->vdisplay != adjusted_mode->vdisplay) {
  277. u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
  278. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  279. bits << PFIT_VERT_SCALE_SHIFT);
  280. pfit_control |= (PFIT_ENABLE |
  281. VERT_INTERP_BILINEAR |
  282. HORIZ_INTERP_BILINEAR);
  283. }
  284. } else if (scaled_width < scaled_height) { /* letter */
  285. centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
  286. border = LVDS_BORDER_ENABLE;
  287. if (mode->hdisplay != adjusted_mode->hdisplay) {
  288. u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
  289. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  290. bits << PFIT_VERT_SCALE_SHIFT);
  291. pfit_control |= (PFIT_ENABLE |
  292. VERT_INTERP_BILINEAR |
  293. HORIZ_INTERP_BILINEAR);
  294. }
  295. } else
  296. /* Aspects match, Let hw scale both directions */
  297. pfit_control |= (PFIT_ENABLE |
  298. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  299. VERT_INTERP_BILINEAR |
  300. HORIZ_INTERP_BILINEAR);
  301. }
  302. break;
  303. case DRM_MODE_SCALE_FULLSCREEN:
  304. /*
  305. * Full scaling, even if it changes the aspect ratio.
  306. * Fortunately this is all done for us in hw.
  307. */
  308. if (mode->vdisplay != adjusted_mode->vdisplay ||
  309. mode->hdisplay != adjusted_mode->hdisplay) {
  310. pfit_control |= PFIT_ENABLE;
  311. if (INTEL_INFO(dev)->gen >= 4)
  312. pfit_control |= PFIT_SCALING_AUTO;
  313. else
  314. pfit_control |= (VERT_AUTO_SCALE |
  315. VERT_INTERP_BILINEAR |
  316. HORIZ_AUTO_SCALE |
  317. HORIZ_INTERP_BILINEAR);
  318. }
  319. break;
  320. default:
  321. break;
  322. }
  323. out:
  324. /* If not enabling scaling, be consistent and always use 0. */
  325. if ((pfit_control & PFIT_ENABLE) == 0) {
  326. pfit_control = 0;
  327. pfit_pgm_ratios = 0;
  328. }
  329. /* Make sure pre-965 set dither correctly */
  330. if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
  331. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  332. if (pfit_control != intel_lvds->pfit_control ||
  333. pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
  334. intel_lvds->pfit_control = pfit_control;
  335. intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
  336. intel_lvds->pfit_dirty = true;
  337. }
  338. dev_priv->lvds_border_bits = border;
  339. /*
  340. * XXX: It would be nice to support lower refresh rates on the
  341. * panels to reduce power consumption, and perhaps match the
  342. * user's requested refresh rate.
  343. */
  344. return true;
  345. }
  346. static void intel_lvds_prepare(struct drm_encoder *encoder)
  347. {
  348. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  349. intel_lvds_disable(intel_lvds);
  350. }
  351. static void intel_lvds_commit(struct drm_encoder *encoder)
  352. {
  353. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  354. /* Always do a full power on as we do not know what state
  355. * we were left in.
  356. */
  357. intel_lvds_enable(intel_lvds);
  358. }
  359. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  360. struct drm_display_mode *mode,
  361. struct drm_display_mode *adjusted_mode)
  362. {
  363. /*
  364. * The LVDS pin pair will already have been turned on in the
  365. * intel_crtc_mode_set since it has a large impact on the DPLL
  366. * settings.
  367. */
  368. }
  369. /**
  370. * Detect the LVDS connection.
  371. *
  372. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  373. * connected and closed means disconnected. We also send hotplug events as
  374. * needed, using lid status notification from the input layer.
  375. */
  376. static enum drm_connector_status
  377. intel_lvds_detect(struct drm_connector *connector, bool force)
  378. {
  379. struct drm_device *dev = connector->dev;
  380. enum drm_connector_status status;
  381. status = intel_panel_detect(dev);
  382. if (status != connector_status_unknown)
  383. return status;
  384. return connector_status_connected;
  385. }
  386. /**
  387. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  388. */
  389. static int intel_lvds_get_modes(struct drm_connector *connector)
  390. {
  391. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  392. struct drm_device *dev = connector->dev;
  393. struct drm_display_mode *mode;
  394. if (intel_lvds->edid)
  395. return drm_add_edid_modes(connector, intel_lvds->edid);
  396. mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
  397. if (mode == NULL)
  398. return 0;
  399. drm_mode_probed_add(connector, mode);
  400. return 1;
  401. }
  402. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  403. {
  404. DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
  405. return 1;
  406. }
  407. /* The GPU hangs up on these systems if modeset is performed on LID open */
  408. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  409. {
  410. .callback = intel_no_modeset_on_lid_dmi_callback,
  411. .ident = "Toshiba Tecra A11",
  412. .matches = {
  413. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  414. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  415. },
  416. },
  417. { } /* terminating entry */
  418. };
  419. /*
  420. * Lid events. Note the use of 'modeset_on_lid':
  421. * - we set it on lid close, and reset it on open
  422. * - we use it as a "only once" bit (ie we ignore
  423. * duplicate events where it was already properly
  424. * set/reset)
  425. * - the suspend/resume paths will also set it to
  426. * zero, since they restore the mode ("lid open").
  427. */
  428. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  429. void *unused)
  430. {
  431. struct drm_i915_private *dev_priv =
  432. container_of(nb, struct drm_i915_private, lid_notifier);
  433. struct drm_device *dev = dev_priv->dev;
  434. struct drm_connector *connector = dev_priv->int_lvds_connector;
  435. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  436. return NOTIFY_OK;
  437. /*
  438. * check and update the status of LVDS connector after receiving
  439. * the LID nofication event.
  440. */
  441. if (connector)
  442. connector->status = connector->funcs->detect(connector,
  443. false);
  444. /* Don't force modeset on machines where it causes a GPU lockup */
  445. if (dmi_check_system(intel_no_modeset_on_lid))
  446. return NOTIFY_OK;
  447. if (!acpi_lid_open()) {
  448. dev_priv->modeset_on_lid = 1;
  449. return NOTIFY_OK;
  450. }
  451. if (!dev_priv->modeset_on_lid)
  452. return NOTIFY_OK;
  453. dev_priv->modeset_on_lid = 0;
  454. mutex_lock(&dev->mode_config.mutex);
  455. drm_helper_resume_force_mode(dev);
  456. i915_redisable_vga(dev);
  457. mutex_unlock(&dev->mode_config.mutex);
  458. return NOTIFY_OK;
  459. }
  460. /**
  461. * intel_lvds_destroy - unregister and free LVDS structures
  462. * @connector: connector to free
  463. *
  464. * Unregister the DDC bus for this connector then free the driver private
  465. * structure.
  466. */
  467. static void intel_lvds_destroy(struct drm_connector *connector)
  468. {
  469. struct drm_device *dev = connector->dev;
  470. struct drm_i915_private *dev_priv = dev->dev_private;
  471. if (dev_priv->lid_notifier.notifier_call)
  472. acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
  473. drm_sysfs_connector_remove(connector);
  474. drm_connector_cleanup(connector);
  475. kfree(connector);
  476. }
  477. static int intel_lvds_set_property(struct drm_connector *connector,
  478. struct drm_property *property,
  479. uint64_t value)
  480. {
  481. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  482. struct drm_device *dev = connector->dev;
  483. if (property == dev->mode_config.scaling_mode_property) {
  484. struct drm_crtc *crtc = intel_lvds->base.base.crtc;
  485. if (value == DRM_MODE_SCALE_NONE) {
  486. DRM_DEBUG_KMS("no scaling not supported\n");
  487. return -EINVAL;
  488. }
  489. if (intel_lvds->fitting_mode == value) {
  490. /* the LVDS scaling property is not changed */
  491. return 0;
  492. }
  493. intel_lvds->fitting_mode = value;
  494. if (crtc && crtc->enabled) {
  495. /*
  496. * If the CRTC is enabled, the display will be changed
  497. * according to the new panel fitting mode.
  498. */
  499. drm_crtc_helper_set_mode(crtc, &crtc->mode,
  500. crtc->x, crtc->y, crtc->fb);
  501. }
  502. }
  503. return 0;
  504. }
  505. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  506. .dpms = intel_lvds_dpms,
  507. .mode_fixup = intel_lvds_mode_fixup,
  508. .prepare = intel_lvds_prepare,
  509. .mode_set = intel_lvds_mode_set,
  510. .commit = intel_lvds_commit,
  511. };
  512. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  513. .get_modes = intel_lvds_get_modes,
  514. .mode_valid = intel_lvds_mode_valid,
  515. .best_encoder = intel_best_encoder,
  516. };
  517. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  518. .dpms = drm_helper_connector_dpms,
  519. .detect = intel_lvds_detect,
  520. .fill_modes = drm_helper_probe_single_connector_modes,
  521. .set_property = intel_lvds_set_property,
  522. .destroy = intel_lvds_destroy,
  523. };
  524. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  525. .destroy = intel_encoder_destroy,
  526. };
  527. static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  528. {
  529. DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
  530. return 1;
  531. }
  532. /* These systems claim to have LVDS, but really don't */
  533. static const struct dmi_system_id intel_no_lvds[] = {
  534. {
  535. .callback = intel_no_lvds_dmi_callback,
  536. .ident = "Apple Mac Mini (Core series)",
  537. .matches = {
  538. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  539. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  540. },
  541. },
  542. {
  543. .callback = intel_no_lvds_dmi_callback,
  544. .ident = "Apple Mac Mini (Core 2 series)",
  545. .matches = {
  546. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  547. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  548. },
  549. },
  550. {
  551. .callback = intel_no_lvds_dmi_callback,
  552. .ident = "MSI IM-945GSE-A",
  553. .matches = {
  554. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  555. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  556. },
  557. },
  558. {
  559. .callback = intel_no_lvds_dmi_callback,
  560. .ident = "Dell Studio Hybrid",
  561. .matches = {
  562. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  563. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  564. },
  565. },
  566. {
  567. .callback = intel_no_lvds_dmi_callback,
  568. .ident = "Dell OptiPlex FX170",
  569. .matches = {
  570. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  571. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  572. },
  573. },
  574. {
  575. .callback = intel_no_lvds_dmi_callback,
  576. .ident = "AOpen Mini PC",
  577. .matches = {
  578. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  579. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  580. },
  581. },
  582. {
  583. .callback = intel_no_lvds_dmi_callback,
  584. .ident = "AOpen Mini PC MP915",
  585. .matches = {
  586. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  587. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  588. },
  589. },
  590. {
  591. .callback = intel_no_lvds_dmi_callback,
  592. .ident = "AOpen i915GMm-HFS",
  593. .matches = {
  594. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  595. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  596. },
  597. },
  598. {
  599. .callback = intel_no_lvds_dmi_callback,
  600. .ident = "AOpen i45GMx-I",
  601. .matches = {
  602. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  603. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  604. },
  605. },
  606. {
  607. .callback = intel_no_lvds_dmi_callback,
  608. .ident = "Aopen i945GTt-VFA",
  609. .matches = {
  610. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  611. },
  612. },
  613. {
  614. .callback = intel_no_lvds_dmi_callback,
  615. .ident = "Clientron U800",
  616. .matches = {
  617. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  618. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  619. },
  620. },
  621. {
  622. .callback = intel_no_lvds_dmi_callback,
  623. .ident = "Clientron E830",
  624. .matches = {
  625. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  626. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  627. },
  628. },
  629. {
  630. .callback = intel_no_lvds_dmi_callback,
  631. .ident = "Asus EeeBox PC EB1007",
  632. .matches = {
  633. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  634. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  635. },
  636. },
  637. {
  638. .callback = intel_no_lvds_dmi_callback,
  639. .ident = "Asus AT5NM10T-I",
  640. .matches = {
  641. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  642. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  643. },
  644. },
  645. {
  646. .callback = intel_no_lvds_dmi_callback,
  647. .ident = "Hewlett-Packard HP t5740",
  648. .matches = {
  649. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  650. DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
  651. },
  652. },
  653. {
  654. .callback = intel_no_lvds_dmi_callback,
  655. .ident = "Hewlett-Packard t5745",
  656. .matches = {
  657. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  658. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  659. },
  660. },
  661. {
  662. .callback = intel_no_lvds_dmi_callback,
  663. .ident = "Hewlett-Packard st5747",
  664. .matches = {
  665. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  666. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  667. },
  668. },
  669. {
  670. .callback = intel_no_lvds_dmi_callback,
  671. .ident = "MSI Wind Box DC500",
  672. .matches = {
  673. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  674. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  675. },
  676. },
  677. {
  678. .callback = intel_no_lvds_dmi_callback,
  679. .ident = "Gigabyte GA-D525TUD",
  680. .matches = {
  681. DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  682. DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  683. },
  684. },
  685. {
  686. .callback = intel_no_lvds_dmi_callback,
  687. .ident = "Supermicro X7SPA-H",
  688. .matches = {
  689. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  690. DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  691. },
  692. },
  693. {
  694. .callback = intel_no_lvds_dmi_callback,
  695. .ident = "Fujitsu Esprimo Q900",
  696. .matches = {
  697. DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
  698. DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
  699. },
  700. },
  701. { } /* terminating entry */
  702. };
  703. /**
  704. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  705. * @dev: drm device
  706. * @connector: LVDS connector
  707. *
  708. * Find the reduced downclock for LVDS in EDID.
  709. */
  710. static void intel_find_lvds_downclock(struct drm_device *dev,
  711. struct drm_display_mode *fixed_mode,
  712. struct drm_connector *connector)
  713. {
  714. struct drm_i915_private *dev_priv = dev->dev_private;
  715. struct drm_display_mode *scan;
  716. int temp_downclock;
  717. temp_downclock = fixed_mode->clock;
  718. list_for_each_entry(scan, &connector->probed_modes, head) {
  719. /*
  720. * If one mode has the same resolution with the fixed_panel
  721. * mode while they have the different refresh rate, it means
  722. * that the reduced downclock is found for the LVDS. In such
  723. * case we can set the different FPx0/1 to dynamically select
  724. * between low and high frequency.
  725. */
  726. if (scan->hdisplay == fixed_mode->hdisplay &&
  727. scan->hsync_start == fixed_mode->hsync_start &&
  728. scan->hsync_end == fixed_mode->hsync_end &&
  729. scan->htotal == fixed_mode->htotal &&
  730. scan->vdisplay == fixed_mode->vdisplay &&
  731. scan->vsync_start == fixed_mode->vsync_start &&
  732. scan->vsync_end == fixed_mode->vsync_end &&
  733. scan->vtotal == fixed_mode->vtotal) {
  734. if (scan->clock < temp_downclock) {
  735. /*
  736. * The downclock is already found. But we
  737. * expect to find the lower downclock.
  738. */
  739. temp_downclock = scan->clock;
  740. }
  741. }
  742. }
  743. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  744. /* We found the downclock for LVDS. */
  745. dev_priv->lvds_downclock_avail = 1;
  746. dev_priv->lvds_downclock = temp_downclock;
  747. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  748. "Normal clock %dKhz, downclock %dKhz\n",
  749. fixed_mode->clock, temp_downclock);
  750. }
  751. }
  752. /*
  753. * Enumerate the child dev array parsed from VBT to check whether
  754. * the LVDS is present.
  755. * If it is present, return 1.
  756. * If it is not present, return false.
  757. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  758. */
  759. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  760. u8 *i2c_pin)
  761. {
  762. struct drm_i915_private *dev_priv = dev->dev_private;
  763. int i;
  764. if (!dev_priv->child_dev_num)
  765. return true;
  766. for (i = 0; i < dev_priv->child_dev_num; i++) {
  767. struct child_device_config *child = dev_priv->child_dev + i;
  768. /* If the device type is not LFP, continue.
  769. * We have to check both the new identifiers as well as the
  770. * old for compatibility with some BIOSes.
  771. */
  772. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  773. child->device_type != DEVICE_TYPE_LFP)
  774. continue;
  775. if (child->i2c_pin)
  776. *i2c_pin = child->i2c_pin;
  777. /* However, we cannot trust the BIOS writers to populate
  778. * the VBT correctly. Since LVDS requires additional
  779. * information from AIM blocks, a non-zero addin offset is
  780. * a good indicator that the LVDS is actually present.
  781. */
  782. if (child->addin_offset)
  783. return true;
  784. /* But even then some BIOS writers perform some black magic
  785. * and instantiate the device without reference to any
  786. * additional data. Trust that if the VBT was written into
  787. * the OpRegion then they have validated the LVDS's existence.
  788. */
  789. if (dev_priv->opregion.vbt)
  790. return true;
  791. }
  792. return false;
  793. }
  794. static bool intel_lvds_supported(struct drm_device *dev)
  795. {
  796. /* With the introduction of the PCH we gained a dedicated
  797. * LVDS presence pin, use it. */
  798. if (HAS_PCH_SPLIT(dev))
  799. return true;
  800. /* Otherwise LVDS was only attached to mobile products,
  801. * except for the inglorious 830gm */
  802. return IS_MOBILE(dev) && !IS_I830(dev);
  803. }
  804. /**
  805. * intel_lvds_init - setup LVDS connectors on this device
  806. * @dev: drm device
  807. *
  808. * Create the connector, register the LVDS DDC bus, and try to figure out what
  809. * modes we can display on the LVDS panel (if present).
  810. */
  811. bool intel_lvds_init(struct drm_device *dev)
  812. {
  813. struct drm_i915_private *dev_priv = dev->dev_private;
  814. struct intel_lvds *intel_lvds;
  815. struct intel_encoder *intel_encoder;
  816. struct intel_connector *intel_connector;
  817. struct drm_connector *connector;
  818. struct drm_encoder *encoder;
  819. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  820. struct drm_crtc *crtc;
  821. u32 lvds;
  822. int pipe;
  823. u8 pin;
  824. /*
  825. * Unlock registers and just leave them unlocked. Do this before
  826. * checking quirk lists to avoid bogus WARNINGs.
  827. */
  828. if (HAS_PCH_SPLIT(dev)) {
  829. I915_WRITE(PCH_PP_CONTROL,
  830. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  831. } else {
  832. I915_WRITE(PP_CONTROL,
  833. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  834. }
  835. if (!intel_lvds_supported(dev))
  836. return false;
  837. /* Skip init on machines we know falsely report LVDS */
  838. if (dmi_check_system(intel_no_lvds))
  839. return false;
  840. pin = GMBUS_PORT_PANEL;
  841. if (!lvds_is_present_in_vbt(dev, &pin)) {
  842. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  843. return false;
  844. }
  845. if (HAS_PCH_SPLIT(dev)) {
  846. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  847. return false;
  848. if (dev_priv->edp.support) {
  849. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  850. return false;
  851. }
  852. }
  853. intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
  854. if (!intel_lvds) {
  855. return false;
  856. }
  857. intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
  858. if (!intel_connector) {
  859. kfree(intel_lvds);
  860. return false;
  861. }
  862. if (!HAS_PCH_SPLIT(dev)) {
  863. intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
  864. }
  865. intel_encoder = &intel_lvds->base;
  866. encoder = &intel_encoder->base;
  867. connector = &intel_connector->base;
  868. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  869. DRM_MODE_CONNECTOR_LVDS);
  870. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  871. DRM_MODE_ENCODER_LVDS);
  872. intel_connector_attach_encoder(intel_connector, intel_encoder);
  873. intel_encoder->type = INTEL_OUTPUT_LVDS;
  874. intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
  875. if (HAS_PCH_SPLIT(dev))
  876. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  877. else
  878. intel_encoder->crtc_mask = (1 << 1);
  879. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  880. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  881. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  882. connector->interlace_allowed = false;
  883. connector->doublescan_allowed = false;
  884. /* create the scaling mode property */
  885. drm_mode_create_scaling_mode_property(dev);
  886. /*
  887. * the initial panel fitting mode will be FULL_SCREEN.
  888. */
  889. drm_connector_attach_property(&intel_connector->base,
  890. dev->mode_config.scaling_mode_property,
  891. DRM_MODE_SCALE_ASPECT);
  892. intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
  893. /*
  894. * LVDS discovery:
  895. * 1) check for EDID on DDC
  896. * 2) check for VBT data
  897. * 3) check to see if LVDS is already on
  898. * if none of the above, no panel
  899. * 4) make sure lid is open
  900. * if closed, act like it's not there for now
  901. */
  902. /*
  903. * Attempt to get the fixed panel mode from DDC. Assume that the
  904. * preferred mode is the right one.
  905. */
  906. intel_lvds->edid = drm_get_edid(connector,
  907. &dev_priv->gmbus[pin].adapter);
  908. if (intel_lvds->edid) {
  909. if (drm_add_edid_modes(connector,
  910. intel_lvds->edid)) {
  911. drm_mode_connector_update_edid_property(connector,
  912. intel_lvds->edid);
  913. } else {
  914. kfree(intel_lvds->edid);
  915. intel_lvds->edid = NULL;
  916. }
  917. }
  918. if (!intel_lvds->edid) {
  919. /* Didn't get an EDID, so
  920. * Set wide sync ranges so we get all modes
  921. * handed to valid_mode for checking
  922. */
  923. connector->display_info.min_vfreq = 0;
  924. connector->display_info.max_vfreq = 200;
  925. connector->display_info.min_hfreq = 0;
  926. connector->display_info.max_hfreq = 200;
  927. }
  928. list_for_each_entry(scan, &connector->probed_modes, head) {
  929. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  930. intel_lvds->fixed_mode =
  931. drm_mode_duplicate(dev, scan);
  932. intel_find_lvds_downclock(dev,
  933. intel_lvds->fixed_mode,
  934. connector);
  935. goto out;
  936. }
  937. }
  938. /* Failed to get EDID, what about VBT? */
  939. if (dev_priv->lfp_lvds_vbt_mode) {
  940. intel_lvds->fixed_mode =
  941. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  942. if (intel_lvds->fixed_mode) {
  943. intel_lvds->fixed_mode->type |=
  944. DRM_MODE_TYPE_PREFERRED;
  945. goto out;
  946. }
  947. }
  948. /*
  949. * If we didn't get EDID, try checking if the panel is already turned
  950. * on. If so, assume that whatever is currently programmed is the
  951. * correct mode.
  952. */
  953. /* Ironlake: FIXME if still fail, not try pipe mode now */
  954. if (HAS_PCH_SPLIT(dev))
  955. goto failed;
  956. lvds = I915_READ(LVDS);
  957. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  958. crtc = intel_get_crtc_for_pipe(dev, pipe);
  959. if (crtc && (lvds & LVDS_PORT_EN)) {
  960. intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
  961. if (intel_lvds->fixed_mode) {
  962. intel_lvds->fixed_mode->type |=
  963. DRM_MODE_TYPE_PREFERRED;
  964. goto out;
  965. }
  966. }
  967. /* If we still don't have a mode after all that, give up. */
  968. if (!intel_lvds->fixed_mode)
  969. goto failed;
  970. out:
  971. if (HAS_PCH_SPLIT(dev) &&
  972. !(dev_priv->quirks & QUIRK_NO_PCH_PWM_ENABLE)) {
  973. u32 pwm;
  974. pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0;
  975. /* make sure PWM is enabled and locked to the LVDS pipe */
  976. pwm = I915_READ(BLC_PWM_CPU_CTL2);
  977. if (pipe == 0 && (pwm & PWM_PIPE_B))
  978. I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~PWM_ENABLE);
  979. if (pipe)
  980. pwm |= PWM_PIPE_B;
  981. else
  982. pwm &= ~PWM_PIPE_B;
  983. I915_WRITE(BLC_PWM_CPU_CTL2, pwm | PWM_ENABLE);
  984. pwm = I915_READ(BLC_PWM_PCH_CTL1);
  985. pwm |= PWM_PCH_ENABLE;
  986. I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
  987. }
  988. dev_priv->lid_notifier.notifier_call = intel_lid_notify;
  989. if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
  990. DRM_DEBUG_KMS("lid notifier registration failed\n");
  991. dev_priv->lid_notifier.notifier_call = NULL;
  992. }
  993. /* keep the LVDS connector */
  994. dev_priv->int_lvds_connector = connector;
  995. drm_sysfs_connector_add(connector);
  996. intel_panel_setup_backlight(dev);
  997. return true;
  998. failed:
  999. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  1000. drm_connector_cleanup(connector);
  1001. drm_encoder_cleanup(encoder);
  1002. kfree(intel_lvds);
  1003. kfree(intel_connector);
  1004. return false;
  1005. }