intel_bios.c 21 KB

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  1. /*
  2. * Copyright © 2006 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21. * SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. *
  26. */
  27. #include <linux/dmi.h>
  28. #include <drm/drm_dp_helper.h>
  29. #include "drmP.h"
  30. #include "drm.h"
  31. #include "i915_drm.h"
  32. #include "i915_drv.h"
  33. #include "intel_bios.h"
  34. #define SLAVE_ADDR1 0x70
  35. #define SLAVE_ADDR2 0x72
  36. static int panel_type;
  37. static void *
  38. find_section(struct bdb_header *bdb, int section_id)
  39. {
  40. u8 *base = (u8 *)bdb;
  41. int index = 0;
  42. u16 total, current_size;
  43. u8 current_id;
  44. /* skip to first section */
  45. index += bdb->header_size;
  46. total = bdb->bdb_size;
  47. /* walk the sections looking for section_id */
  48. while (index < total) {
  49. current_id = *(base + index);
  50. index++;
  51. current_size = *((u16 *)(base + index));
  52. index += 2;
  53. if (current_id == section_id)
  54. return base + index;
  55. index += current_size;
  56. }
  57. return NULL;
  58. }
  59. static u16
  60. get_blocksize(void *p)
  61. {
  62. u16 *block_ptr, block_size;
  63. block_ptr = (u16 *)((char *)p - 2);
  64. block_size = *block_ptr;
  65. return block_size;
  66. }
  67. static void
  68. fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
  69. const struct lvds_dvo_timing *dvo_timing)
  70. {
  71. panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
  72. dvo_timing->hactive_lo;
  73. panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
  74. ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
  75. panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
  76. dvo_timing->hsync_pulse_width;
  77. panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
  78. ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
  79. panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
  80. dvo_timing->vactive_lo;
  81. panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
  82. dvo_timing->vsync_off;
  83. panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
  84. dvo_timing->vsync_pulse_width;
  85. panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
  86. ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
  87. panel_fixed_mode->clock = dvo_timing->clock * 10;
  88. panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
  89. if (dvo_timing->hsync_positive)
  90. panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
  91. else
  92. panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
  93. if (dvo_timing->vsync_positive)
  94. panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
  95. else
  96. panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
  97. /* Some VBTs have bogus h/vtotal values */
  98. if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
  99. panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
  100. if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
  101. panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
  102. drm_mode_set_name(panel_fixed_mode);
  103. }
  104. static bool
  105. lvds_dvo_timing_equal_size(const struct lvds_dvo_timing *a,
  106. const struct lvds_dvo_timing *b)
  107. {
  108. if (a->hactive_hi != b->hactive_hi ||
  109. a->hactive_lo != b->hactive_lo)
  110. return false;
  111. if (a->hsync_off_hi != b->hsync_off_hi ||
  112. a->hsync_off_lo != b->hsync_off_lo)
  113. return false;
  114. if (a->hsync_pulse_width != b->hsync_pulse_width)
  115. return false;
  116. if (a->hblank_hi != b->hblank_hi ||
  117. a->hblank_lo != b->hblank_lo)
  118. return false;
  119. if (a->vactive_hi != b->vactive_hi ||
  120. a->vactive_lo != b->vactive_lo)
  121. return false;
  122. if (a->vsync_off != b->vsync_off)
  123. return false;
  124. if (a->vsync_pulse_width != b->vsync_pulse_width)
  125. return false;
  126. if (a->vblank_hi != b->vblank_hi ||
  127. a->vblank_lo != b->vblank_lo)
  128. return false;
  129. return true;
  130. }
  131. static const struct lvds_dvo_timing *
  132. get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
  133. const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
  134. int index)
  135. {
  136. /*
  137. * the size of fp_timing varies on the different platform.
  138. * So calculate the DVO timing relative offset in LVDS data
  139. * entry to get the DVO timing entry
  140. */
  141. int lfp_data_size =
  142. lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
  143. lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
  144. int dvo_timing_offset =
  145. lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
  146. lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
  147. char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
  148. return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
  149. }
  150. /* get lvds_fp_timing entry
  151. * this function may return NULL if the corresponding entry is invalid
  152. */
  153. static const struct lvds_fp_timing *
  154. get_lvds_fp_timing(const struct bdb_header *bdb,
  155. const struct bdb_lvds_lfp_data *data,
  156. const struct bdb_lvds_lfp_data_ptrs *ptrs,
  157. int index)
  158. {
  159. size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
  160. u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
  161. size_t ofs;
  162. if (index >= ARRAY_SIZE(ptrs->ptr))
  163. return NULL;
  164. ofs = ptrs->ptr[index].fp_timing_offset;
  165. if (ofs < data_ofs ||
  166. ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
  167. return NULL;
  168. return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
  169. }
  170. /* Try to find integrated panel data */
  171. static void
  172. parse_lfp_panel_data(struct drm_i915_private *dev_priv,
  173. struct bdb_header *bdb)
  174. {
  175. const struct bdb_lvds_options *lvds_options;
  176. const struct bdb_lvds_lfp_data *lvds_lfp_data;
  177. const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
  178. const struct lvds_dvo_timing *panel_dvo_timing;
  179. const struct lvds_fp_timing *fp_timing;
  180. struct drm_display_mode *panel_fixed_mode;
  181. int i, downclock;
  182. lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
  183. if (!lvds_options)
  184. return;
  185. dev_priv->lvds_dither = lvds_options->pixel_dither;
  186. if (lvds_options->panel_type == 0xff)
  187. return;
  188. panel_type = lvds_options->panel_type;
  189. lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
  190. if (!lvds_lfp_data)
  191. return;
  192. lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
  193. if (!lvds_lfp_data_ptrs)
  194. return;
  195. dev_priv->lvds_vbt = 1;
  196. panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
  197. lvds_lfp_data_ptrs,
  198. lvds_options->panel_type);
  199. panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
  200. if (!panel_fixed_mode)
  201. return;
  202. fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
  203. dev_priv->lfp_lvds_vbt_mode = panel_fixed_mode;
  204. DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
  205. drm_mode_debug_printmodeline(panel_fixed_mode);
  206. /*
  207. * Iterate over the LVDS panel timing info to find the lowest clock
  208. * for the native resolution.
  209. */
  210. downclock = panel_dvo_timing->clock;
  211. for (i = 0; i < 16; i++) {
  212. const struct lvds_dvo_timing *dvo_timing;
  213. dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
  214. lvds_lfp_data_ptrs,
  215. i);
  216. if (lvds_dvo_timing_equal_size(dvo_timing, panel_dvo_timing) &&
  217. dvo_timing->clock < downclock)
  218. downclock = dvo_timing->clock;
  219. }
  220. if (downclock < panel_dvo_timing->clock && i915_lvds_downclock) {
  221. dev_priv->lvds_downclock_avail = 1;
  222. dev_priv->lvds_downclock = downclock * 10;
  223. DRM_DEBUG_KMS("LVDS downclock is found in VBT. "
  224. "Normal Clock %dKHz, downclock %dKHz\n",
  225. panel_fixed_mode->clock, 10*downclock);
  226. }
  227. fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
  228. lvds_lfp_data_ptrs,
  229. lvds_options->panel_type);
  230. if (fp_timing) {
  231. /* check the resolution, just to be sure */
  232. if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
  233. fp_timing->y_res == panel_fixed_mode->vdisplay) {
  234. dev_priv->bios_lvds_val = fp_timing->lvds_reg_val;
  235. DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
  236. dev_priv->bios_lvds_val);
  237. }
  238. }
  239. }
  240. /* Try to find sdvo panel data */
  241. static void
  242. parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
  243. struct bdb_header *bdb)
  244. {
  245. struct lvds_dvo_timing *dvo_timing;
  246. struct drm_display_mode *panel_fixed_mode;
  247. int index;
  248. index = i915_vbt_sdvo_panel_type;
  249. if (index == -1) {
  250. struct bdb_sdvo_lvds_options *sdvo_lvds_options;
  251. sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
  252. if (!sdvo_lvds_options)
  253. return;
  254. index = sdvo_lvds_options->panel_type;
  255. }
  256. dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
  257. if (!dvo_timing)
  258. return;
  259. panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
  260. if (!panel_fixed_mode)
  261. return;
  262. fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
  263. dev_priv->sdvo_lvds_vbt_mode = panel_fixed_mode;
  264. DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
  265. drm_mode_debug_printmodeline(panel_fixed_mode);
  266. }
  267. static int intel_bios_ssc_frequency(struct drm_device *dev,
  268. bool alternate)
  269. {
  270. switch (INTEL_INFO(dev)->gen) {
  271. case 2:
  272. return alternate ? 66 : 48;
  273. case 3:
  274. case 4:
  275. return alternate ? 100 : 96;
  276. default:
  277. return alternate ? 100 : 120;
  278. }
  279. }
  280. static void
  281. parse_general_features(struct drm_i915_private *dev_priv,
  282. struct bdb_header *bdb)
  283. {
  284. struct drm_device *dev = dev_priv->dev;
  285. struct bdb_general_features *general;
  286. general = find_section(bdb, BDB_GENERAL_FEATURES);
  287. if (general) {
  288. dev_priv->int_tv_support = general->int_tv_support;
  289. dev_priv->int_crt_support = general->int_crt_support;
  290. dev_priv->lvds_use_ssc = general->enable_ssc;
  291. dev_priv->lvds_ssc_freq =
  292. intel_bios_ssc_frequency(dev, general->ssc_freq);
  293. dev_priv->display_clock_mode = general->display_clock_mode;
  294. DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d\n",
  295. dev_priv->int_tv_support,
  296. dev_priv->int_crt_support,
  297. dev_priv->lvds_use_ssc,
  298. dev_priv->lvds_ssc_freq,
  299. dev_priv->display_clock_mode);
  300. }
  301. }
  302. static void
  303. parse_general_definitions(struct drm_i915_private *dev_priv,
  304. struct bdb_header *bdb)
  305. {
  306. struct bdb_general_definitions *general;
  307. general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
  308. if (general) {
  309. u16 block_size = get_blocksize(general);
  310. if (block_size >= sizeof(*general)) {
  311. int bus_pin = general->crt_ddc_gmbus_pin;
  312. DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
  313. if (bus_pin >= 1 && bus_pin <= 6)
  314. dev_priv->crt_ddc_pin = bus_pin;
  315. } else {
  316. DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
  317. block_size);
  318. }
  319. }
  320. }
  321. static void
  322. parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
  323. struct bdb_header *bdb)
  324. {
  325. struct sdvo_device_mapping *p_mapping;
  326. struct bdb_general_definitions *p_defs;
  327. struct child_device_config *p_child;
  328. int i, child_device_num, count;
  329. u16 block_size;
  330. p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
  331. if (!p_defs) {
  332. DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
  333. return;
  334. }
  335. /* judge whether the size of child device meets the requirements.
  336. * If the child device size obtained from general definition block
  337. * is different with sizeof(struct child_device_config), skip the
  338. * parsing of sdvo device info
  339. */
  340. if (p_defs->child_dev_size != sizeof(*p_child)) {
  341. /* different child dev size . Ignore it */
  342. DRM_DEBUG_KMS("different child size is found. Invalid.\n");
  343. return;
  344. }
  345. /* get the block size of general definitions */
  346. block_size = get_blocksize(p_defs);
  347. /* get the number of child device */
  348. child_device_num = (block_size - sizeof(*p_defs)) /
  349. sizeof(*p_child);
  350. count = 0;
  351. for (i = 0; i < child_device_num; i++) {
  352. p_child = &(p_defs->devices[i]);
  353. if (!p_child->device_type) {
  354. /* skip the device block if device type is invalid */
  355. continue;
  356. }
  357. if (p_child->slave_addr != SLAVE_ADDR1 &&
  358. p_child->slave_addr != SLAVE_ADDR2) {
  359. /*
  360. * If the slave address is neither 0x70 nor 0x72,
  361. * it is not a SDVO device. Skip it.
  362. */
  363. continue;
  364. }
  365. if (p_child->dvo_port != DEVICE_PORT_DVOB &&
  366. p_child->dvo_port != DEVICE_PORT_DVOC) {
  367. /* skip the incorrect SDVO port */
  368. DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
  369. continue;
  370. }
  371. DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
  372. " %s port\n",
  373. p_child->slave_addr,
  374. (p_child->dvo_port == DEVICE_PORT_DVOB) ?
  375. "SDVOB" : "SDVOC");
  376. p_mapping = &(dev_priv->sdvo_mappings[p_child->dvo_port - 1]);
  377. if (!p_mapping->initialized) {
  378. p_mapping->dvo_port = p_child->dvo_port;
  379. p_mapping->slave_addr = p_child->slave_addr;
  380. p_mapping->dvo_wiring = p_child->dvo_wiring;
  381. p_mapping->ddc_pin = p_child->ddc_pin;
  382. p_mapping->i2c_pin = p_child->i2c_pin;
  383. p_mapping->initialized = 1;
  384. DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
  385. p_mapping->dvo_port,
  386. p_mapping->slave_addr,
  387. p_mapping->dvo_wiring,
  388. p_mapping->ddc_pin,
  389. p_mapping->i2c_pin);
  390. } else {
  391. DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
  392. "two SDVO device.\n");
  393. }
  394. if (p_child->slave2_addr) {
  395. /* Maybe this is a SDVO device with multiple inputs */
  396. /* And the mapping info is not added */
  397. DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
  398. " is a SDVO device with multiple inputs.\n");
  399. }
  400. count++;
  401. }
  402. if (!count) {
  403. /* No SDVO device info is found */
  404. DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
  405. }
  406. return;
  407. }
  408. static void
  409. parse_driver_features(struct drm_i915_private *dev_priv,
  410. struct bdb_header *bdb)
  411. {
  412. struct drm_device *dev = dev_priv->dev;
  413. struct bdb_driver_features *driver;
  414. driver = find_section(bdb, BDB_DRIVER_FEATURES);
  415. if (!driver)
  416. return;
  417. if (SUPPORTS_EDP(dev) &&
  418. driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
  419. dev_priv->edp.support = 1;
  420. if (driver->dual_frequency)
  421. dev_priv->render_reclock_avail = true;
  422. }
  423. static void
  424. parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
  425. {
  426. struct bdb_edp *edp;
  427. struct edp_power_seq *edp_pps;
  428. struct edp_link_params *edp_link_params;
  429. edp = find_section(bdb, BDB_EDP);
  430. if (!edp) {
  431. if (SUPPORTS_EDP(dev_priv->dev) && dev_priv->edp.support)
  432. DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
  433. return;
  434. }
  435. switch ((edp->color_depth >> (panel_type * 2)) & 3) {
  436. case EDP_18BPP:
  437. dev_priv->edp.bpp = 18;
  438. break;
  439. case EDP_24BPP:
  440. dev_priv->edp.bpp = 24;
  441. break;
  442. case EDP_30BPP:
  443. dev_priv->edp.bpp = 30;
  444. break;
  445. }
  446. /* Get the eDP sequencing and link info */
  447. edp_pps = &edp->power_seqs[panel_type];
  448. edp_link_params = &edp->link_params[panel_type];
  449. dev_priv->edp.pps = *edp_pps;
  450. dev_priv->edp.rate = edp_link_params->rate ? DP_LINK_BW_2_7 :
  451. DP_LINK_BW_1_62;
  452. switch (edp_link_params->lanes) {
  453. case 0:
  454. dev_priv->edp.lanes = 1;
  455. break;
  456. case 1:
  457. dev_priv->edp.lanes = 2;
  458. break;
  459. case 3:
  460. default:
  461. dev_priv->edp.lanes = 4;
  462. break;
  463. }
  464. switch (edp_link_params->preemphasis) {
  465. case 0:
  466. dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_0;
  467. break;
  468. case 1:
  469. dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5;
  470. break;
  471. case 2:
  472. dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_6;
  473. break;
  474. case 3:
  475. dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5;
  476. break;
  477. }
  478. switch (edp_link_params->vswing) {
  479. case 0:
  480. dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_400;
  481. break;
  482. case 1:
  483. dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_600;
  484. break;
  485. case 2:
  486. dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_800;
  487. break;
  488. case 3:
  489. dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_1200;
  490. break;
  491. }
  492. }
  493. static void
  494. parse_device_mapping(struct drm_i915_private *dev_priv,
  495. struct bdb_header *bdb)
  496. {
  497. struct bdb_general_definitions *p_defs;
  498. struct child_device_config *p_child, *child_dev_ptr;
  499. int i, child_device_num, count;
  500. u16 block_size;
  501. p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
  502. if (!p_defs) {
  503. DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
  504. return;
  505. }
  506. /* judge whether the size of child device meets the requirements.
  507. * If the child device size obtained from general definition block
  508. * is different with sizeof(struct child_device_config), skip the
  509. * parsing of sdvo device info
  510. */
  511. if (p_defs->child_dev_size != sizeof(*p_child)) {
  512. /* different child dev size . Ignore it */
  513. DRM_DEBUG_KMS("different child size is found. Invalid.\n");
  514. return;
  515. }
  516. /* get the block size of general definitions */
  517. block_size = get_blocksize(p_defs);
  518. /* get the number of child device */
  519. child_device_num = (block_size - sizeof(*p_defs)) /
  520. sizeof(*p_child);
  521. count = 0;
  522. /* get the number of child device that is present */
  523. for (i = 0; i < child_device_num; i++) {
  524. p_child = &(p_defs->devices[i]);
  525. if (!p_child->device_type) {
  526. /* skip the device block if device type is invalid */
  527. continue;
  528. }
  529. count++;
  530. }
  531. if (!count) {
  532. DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
  533. return;
  534. }
  535. dev_priv->child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
  536. if (!dev_priv->child_dev) {
  537. DRM_DEBUG_KMS("No memory space for child device\n");
  538. return;
  539. }
  540. dev_priv->child_dev_num = count;
  541. count = 0;
  542. for (i = 0; i < child_device_num; i++) {
  543. p_child = &(p_defs->devices[i]);
  544. if (!p_child->device_type) {
  545. /* skip the device block if device type is invalid */
  546. continue;
  547. }
  548. child_dev_ptr = dev_priv->child_dev + count;
  549. count++;
  550. memcpy((void *)child_dev_ptr, (void *)p_child,
  551. sizeof(*p_child));
  552. }
  553. return;
  554. }
  555. static void
  556. init_vbt_defaults(struct drm_i915_private *dev_priv)
  557. {
  558. struct drm_device *dev = dev_priv->dev;
  559. dev_priv->crt_ddc_pin = GMBUS_PORT_VGADDC;
  560. /* LFP panel data */
  561. dev_priv->lvds_dither = 1;
  562. dev_priv->lvds_vbt = 0;
  563. /* SDVO panel data */
  564. dev_priv->sdvo_lvds_vbt_mode = NULL;
  565. /* general features */
  566. dev_priv->int_tv_support = 1;
  567. dev_priv->int_crt_support = 1;
  568. /* Default to using SSC */
  569. dev_priv->lvds_use_ssc = 1;
  570. dev_priv->lvds_ssc_freq = intel_bios_ssc_frequency(dev, 1);
  571. DRM_DEBUG_KMS("Set default to SSC at %dMHz\n", dev_priv->lvds_ssc_freq);
  572. }
  573. static int intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
  574. {
  575. DRM_DEBUG_KMS("Falling back to manually reading VBT from "
  576. "VBIOS ROM for %s\n",
  577. id->ident);
  578. return 1;
  579. }
  580. static const struct dmi_system_id intel_no_opregion_vbt[] = {
  581. {
  582. .callback = intel_no_opregion_vbt_callback,
  583. .ident = "ThinkCentre A57",
  584. .matches = {
  585. DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
  586. DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"),
  587. },
  588. },
  589. { }
  590. };
  591. /**
  592. * intel_parse_bios - find VBT and initialize settings from the BIOS
  593. * @dev: DRM device
  594. *
  595. * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
  596. * to appropriate values.
  597. *
  598. * Returns 0 on success, nonzero on failure.
  599. */
  600. bool
  601. intel_parse_bios(struct drm_device *dev)
  602. {
  603. struct drm_i915_private *dev_priv = dev->dev_private;
  604. struct pci_dev *pdev = dev->pdev;
  605. struct bdb_header *bdb = NULL;
  606. u8 __iomem *bios = NULL;
  607. init_vbt_defaults(dev_priv);
  608. /* XXX Should this validation be moved to intel_opregion.c? */
  609. if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt) {
  610. struct vbt_header *vbt = dev_priv->opregion.vbt;
  611. if (memcmp(vbt->signature, "$VBT", 4) == 0) {
  612. DRM_DEBUG_KMS("Using VBT from OpRegion: %20s\n",
  613. vbt->signature);
  614. bdb = (struct bdb_header *)((char *)vbt + vbt->bdb_offset);
  615. } else
  616. dev_priv->opregion.vbt = NULL;
  617. }
  618. if (bdb == NULL) {
  619. struct vbt_header *vbt = NULL;
  620. size_t size;
  621. int i;
  622. bios = pci_map_rom(pdev, &size);
  623. if (!bios)
  624. return -1;
  625. /* Scour memory looking for the VBT signature */
  626. for (i = 0; i + 4 < size; i++) {
  627. if (!memcmp(bios + i, "$VBT", 4)) {
  628. vbt = (struct vbt_header *)(bios + i);
  629. break;
  630. }
  631. }
  632. if (!vbt) {
  633. DRM_DEBUG_DRIVER("VBT signature missing\n");
  634. pci_unmap_rom(pdev, bios);
  635. return -1;
  636. }
  637. bdb = (struct bdb_header *)(bios + i + vbt->bdb_offset);
  638. }
  639. /* Grab useful general definitions */
  640. parse_general_features(dev_priv, bdb);
  641. parse_general_definitions(dev_priv, bdb);
  642. parse_lfp_panel_data(dev_priv, bdb);
  643. parse_sdvo_panel_data(dev_priv, bdb);
  644. parse_sdvo_device_mapping(dev_priv, bdb);
  645. parse_device_mapping(dev_priv, bdb);
  646. parse_driver_features(dev_priv, bdb);
  647. parse_edp(dev_priv, bdb);
  648. if (bios)
  649. pci_unmap_rom(pdev, bios);
  650. return 0;
  651. }
  652. /* Ensure that vital registers have been initialised, even if the BIOS
  653. * is absent or just failing to do its job.
  654. */
  655. void intel_setup_bios(struct drm_device *dev)
  656. {
  657. struct drm_i915_private *dev_priv = dev->dev_private;
  658. /* Set the Panel Power On/Off timings if uninitialized. */
  659. if ((I915_READ(PP_ON_DELAYS) == 0) && (I915_READ(PP_OFF_DELAYS) == 0)) {
  660. /* Set T2 to 40ms and T5 to 200ms */
  661. I915_WRITE(PP_ON_DELAYS, 0x019007d0);
  662. /* Set T3 to 35ms and Tx to 200ms */
  663. I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
  664. }
  665. }