psb_intel_lvds.c 24 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along with
  14. * this program; if not, write to the Free Software Foundation, Inc.,
  15. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  16. *
  17. * Authors:
  18. * Eric Anholt <eric@anholt.net>
  19. * Dave Airlie <airlied@linux.ie>
  20. * Jesse Barnes <jesse.barnes@intel.com>
  21. */
  22. #include <linux/i2c.h>
  23. #include <drm/drmP.h>
  24. #include "intel_bios.h"
  25. #include "psb_drv.h"
  26. #include "psb_intel_drv.h"
  27. #include "psb_intel_reg.h"
  28. #include "power.h"
  29. #include <linux/pm_runtime.h>
  30. /*
  31. * LVDS I2C backlight control macros
  32. */
  33. #define BRIGHTNESS_MAX_LEVEL 100
  34. #define BRIGHTNESS_MASK 0xFF
  35. #define BLC_I2C_TYPE 0x01
  36. #define BLC_PWM_TYPT 0x02
  37. #define BLC_POLARITY_NORMAL 0
  38. #define BLC_POLARITY_INVERSE 1
  39. #define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE)
  40. #define PSB_BLC_MIN_PWM_REG_FREQ (0x2)
  41. #define PSB_BLC_PWM_PRECISION_FACTOR (10)
  42. #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
  43. #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
  44. struct psb_intel_lvds_priv {
  45. /*
  46. * Saved LVDO output states
  47. */
  48. uint32_t savePP_ON;
  49. uint32_t savePP_OFF;
  50. uint32_t saveLVDS;
  51. uint32_t savePP_CONTROL;
  52. uint32_t savePP_CYCLE;
  53. uint32_t savePFIT_CONTROL;
  54. uint32_t savePFIT_PGM_RATIOS;
  55. uint32_t saveBLC_PWM_CTL;
  56. struct psb_intel_i2c_chan *i2c_bus;
  57. struct psb_intel_i2c_chan *ddc_bus;
  58. };
  59. /*
  60. * Returns the maximum level of the backlight duty cycle field.
  61. */
  62. static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev)
  63. {
  64. struct drm_psb_private *dev_priv = dev->dev_private;
  65. u32 ret;
  66. if (gma_power_begin(dev, false)) {
  67. ret = REG_READ(BLC_PWM_CTL);
  68. gma_power_end(dev);
  69. } else /* Powered off, use the saved value */
  70. ret = dev_priv->regs.saveBLC_PWM_CTL;
  71. /* Top 15bits hold the frequency mask */
  72. ret = (ret & BACKLIGHT_MODULATION_FREQ_MASK) >>
  73. BACKLIGHT_MODULATION_FREQ_SHIFT;
  74. ret *= 2; /* Return a 16bit range as needed for setting */
  75. if (ret == 0)
  76. dev_err(dev->dev, "BL bug: Reg %08x save %08X\n",
  77. REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL);
  78. return ret;
  79. }
  80. /*
  81. * Set LVDS backlight level by I2C command
  82. *
  83. * FIXME: at some point we need to both track this for PM and also
  84. * disable runtime pm on MRST if the brightness is nil (ie blanked)
  85. */
  86. static int psb_lvds_i2c_set_brightness(struct drm_device *dev,
  87. unsigned int level)
  88. {
  89. struct drm_psb_private *dev_priv =
  90. (struct drm_psb_private *)dev->dev_private;
  91. struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
  92. u8 out_buf[2];
  93. unsigned int blc_i2c_brightness;
  94. struct i2c_msg msgs[] = {
  95. {
  96. .addr = lvds_i2c_bus->slave_addr,
  97. .flags = 0,
  98. .len = 2,
  99. .buf = out_buf,
  100. }
  101. };
  102. blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
  103. BRIGHTNESS_MASK /
  104. BRIGHTNESS_MAX_LEVEL);
  105. if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
  106. blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
  107. out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
  108. out_buf[1] = (u8)blc_i2c_brightness;
  109. if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1) {
  110. dev_dbg(dev->dev, "I2C set brightness.(command, value) (%d, %d)\n",
  111. dev_priv->lvds_bl->brightnesscmd,
  112. blc_i2c_brightness);
  113. return 0;
  114. }
  115. dev_err(dev->dev, "I2C transfer error\n");
  116. return -1;
  117. }
  118. static int psb_lvds_pwm_set_brightness(struct drm_device *dev, int level)
  119. {
  120. struct drm_psb_private *dev_priv =
  121. (struct drm_psb_private *)dev->dev_private;
  122. u32 max_pwm_blc;
  123. u32 blc_pwm_duty_cycle;
  124. max_pwm_blc = psb_intel_lvds_get_max_backlight(dev);
  125. /*BLC_PWM_CTL Should be initiated while backlight device init*/
  126. BUG_ON(max_pwm_blc == 0);
  127. blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
  128. if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
  129. blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
  130. blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
  131. REG_WRITE(BLC_PWM_CTL,
  132. (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
  133. (blc_pwm_duty_cycle));
  134. dev_info(dev->dev, "Backlight lvds set brightness %08x\n",
  135. (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
  136. (blc_pwm_duty_cycle));
  137. return 0;
  138. }
  139. /*
  140. * Set LVDS backlight level either by I2C or PWM
  141. */
  142. void psb_intel_lvds_set_brightness(struct drm_device *dev, int level)
  143. {
  144. struct drm_psb_private *dev_priv = dev->dev_private;
  145. dev_dbg(dev->dev, "backlight level is %d\n", level);
  146. if (!dev_priv->lvds_bl) {
  147. dev_err(dev->dev, "NO LVDS backlight info\n");
  148. return;
  149. }
  150. if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
  151. psb_lvds_i2c_set_brightness(dev, level);
  152. else
  153. psb_lvds_pwm_set_brightness(dev, level);
  154. }
  155. /*
  156. * Sets the backlight level.
  157. *
  158. * level: backlight level, from 0 to psb_intel_lvds_get_max_backlight().
  159. */
  160. static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level)
  161. {
  162. struct drm_psb_private *dev_priv = dev->dev_private;
  163. u32 blc_pwm_ctl;
  164. if (gma_power_begin(dev, false)) {
  165. blc_pwm_ctl = REG_READ(BLC_PWM_CTL);
  166. blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
  167. REG_WRITE(BLC_PWM_CTL,
  168. (blc_pwm_ctl |
  169. (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  170. dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
  171. (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
  172. gma_power_end(dev);
  173. } else {
  174. blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
  175. ~BACKLIGHT_DUTY_CYCLE_MASK;
  176. dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
  177. (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
  178. }
  179. }
  180. /*
  181. * Sets the power state for the panel.
  182. */
  183. static void psb_intel_lvds_set_power(struct drm_device *dev, bool on)
  184. {
  185. struct drm_psb_private *dev_priv = dev->dev_private;
  186. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  187. u32 pp_status;
  188. if (!gma_power_begin(dev, true)) {
  189. dev_err(dev->dev, "set power, chip off!\n");
  190. return;
  191. }
  192. if (on) {
  193. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
  194. POWER_TARGET_ON);
  195. do {
  196. pp_status = REG_READ(PP_STATUS);
  197. } while ((pp_status & PP_ON) == 0);
  198. psb_intel_lvds_set_backlight(dev,
  199. mode_dev->backlight_duty_cycle);
  200. } else {
  201. psb_intel_lvds_set_backlight(dev, 0);
  202. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
  203. ~POWER_TARGET_ON);
  204. do {
  205. pp_status = REG_READ(PP_STATUS);
  206. } while (pp_status & PP_ON);
  207. }
  208. gma_power_end(dev);
  209. }
  210. static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
  211. {
  212. struct drm_device *dev = encoder->dev;
  213. if (mode == DRM_MODE_DPMS_ON)
  214. psb_intel_lvds_set_power(dev, true);
  215. else
  216. psb_intel_lvds_set_power(dev, false);
  217. /* XXX: We never power down the LVDS pairs. */
  218. }
  219. static void psb_intel_lvds_save(struct drm_connector *connector)
  220. {
  221. struct drm_device *dev = connector->dev;
  222. struct drm_psb_private *dev_priv =
  223. (struct drm_psb_private *)dev->dev_private;
  224. struct psb_intel_encoder *psb_intel_encoder =
  225. psb_intel_attached_encoder(connector);
  226. struct psb_intel_lvds_priv *lvds_priv =
  227. (struct psb_intel_lvds_priv *)psb_intel_encoder->dev_priv;
  228. lvds_priv->savePP_ON = REG_READ(LVDSPP_ON);
  229. lvds_priv->savePP_OFF = REG_READ(LVDSPP_OFF);
  230. lvds_priv->saveLVDS = REG_READ(LVDS);
  231. lvds_priv->savePP_CONTROL = REG_READ(PP_CONTROL);
  232. lvds_priv->savePP_CYCLE = REG_READ(PP_CYCLE);
  233. /*lvds_priv->savePP_DIVISOR = REG_READ(PP_DIVISOR);*/
  234. lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
  235. lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL);
  236. lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS);
  237. /*TODO: move backlight_duty_cycle to psb_intel_lvds_priv*/
  238. dev_priv->backlight_duty_cycle = (dev_priv->regs.saveBLC_PWM_CTL &
  239. BACKLIGHT_DUTY_CYCLE_MASK);
  240. /*
  241. * If the light is off at server startup,
  242. * just make it full brightness
  243. */
  244. if (dev_priv->backlight_duty_cycle == 0)
  245. dev_priv->backlight_duty_cycle =
  246. psb_intel_lvds_get_max_backlight(dev);
  247. dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
  248. lvds_priv->savePP_ON,
  249. lvds_priv->savePP_OFF,
  250. lvds_priv->saveLVDS,
  251. lvds_priv->savePP_CONTROL,
  252. lvds_priv->savePP_CYCLE,
  253. lvds_priv->saveBLC_PWM_CTL);
  254. }
  255. static void psb_intel_lvds_restore(struct drm_connector *connector)
  256. {
  257. struct drm_device *dev = connector->dev;
  258. u32 pp_status;
  259. struct psb_intel_encoder *psb_intel_encoder =
  260. psb_intel_attached_encoder(connector);
  261. struct psb_intel_lvds_priv *lvds_priv =
  262. (struct psb_intel_lvds_priv *)psb_intel_encoder->dev_priv;
  263. dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
  264. lvds_priv->savePP_ON,
  265. lvds_priv->savePP_OFF,
  266. lvds_priv->saveLVDS,
  267. lvds_priv->savePP_CONTROL,
  268. lvds_priv->savePP_CYCLE,
  269. lvds_priv->saveBLC_PWM_CTL);
  270. REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL);
  271. REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL);
  272. REG_WRITE(PFIT_PGM_RATIOS, lvds_priv->savePFIT_PGM_RATIOS);
  273. REG_WRITE(LVDSPP_ON, lvds_priv->savePP_ON);
  274. REG_WRITE(LVDSPP_OFF, lvds_priv->savePP_OFF);
  275. /*REG_WRITE(PP_DIVISOR, lvds_priv->savePP_DIVISOR);*/
  276. REG_WRITE(PP_CYCLE, lvds_priv->savePP_CYCLE);
  277. REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL);
  278. REG_WRITE(LVDS, lvds_priv->saveLVDS);
  279. if (lvds_priv->savePP_CONTROL & POWER_TARGET_ON) {
  280. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
  281. POWER_TARGET_ON);
  282. do {
  283. pp_status = REG_READ(PP_STATUS);
  284. } while ((pp_status & PP_ON) == 0);
  285. } else {
  286. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
  287. ~POWER_TARGET_ON);
  288. do {
  289. pp_status = REG_READ(PP_STATUS);
  290. } while (pp_status & PP_ON);
  291. }
  292. }
  293. int psb_intel_lvds_mode_valid(struct drm_connector *connector,
  294. struct drm_display_mode *mode)
  295. {
  296. struct drm_psb_private *dev_priv = connector->dev->dev_private;
  297. struct psb_intel_encoder *psb_intel_encoder =
  298. psb_intel_attached_encoder(connector);
  299. struct drm_display_mode *fixed_mode =
  300. dev_priv->mode_dev.panel_fixed_mode;
  301. if (psb_intel_encoder->type == INTEL_OUTPUT_MIPI2)
  302. fixed_mode = dev_priv->mode_dev.panel_fixed_mode2;
  303. /* just in case */
  304. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  305. return MODE_NO_DBLESCAN;
  306. /* just in case */
  307. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  308. return MODE_NO_INTERLACE;
  309. if (fixed_mode) {
  310. if (mode->hdisplay > fixed_mode->hdisplay)
  311. return MODE_PANEL;
  312. if (mode->vdisplay > fixed_mode->vdisplay)
  313. return MODE_PANEL;
  314. }
  315. return MODE_OK;
  316. }
  317. bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
  318. struct drm_display_mode *mode,
  319. struct drm_display_mode *adjusted_mode)
  320. {
  321. struct drm_device *dev = encoder->dev;
  322. struct drm_psb_private *dev_priv = dev->dev_private;
  323. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  324. struct psb_intel_crtc *psb_intel_crtc =
  325. to_psb_intel_crtc(encoder->crtc);
  326. struct drm_encoder *tmp_encoder;
  327. struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
  328. struct psb_intel_encoder *psb_intel_encoder =
  329. to_psb_intel_encoder(encoder);
  330. if (psb_intel_encoder->type == INTEL_OUTPUT_MIPI2)
  331. panel_fixed_mode = mode_dev->panel_fixed_mode2;
  332. /* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */
  333. if (!IS_MRST(dev) && psb_intel_crtc->pipe == 0) {
  334. printk(KERN_ERR "Can't support LVDS on pipe A\n");
  335. return false;
  336. }
  337. if (IS_MRST(dev) && psb_intel_crtc->pipe != 0) {
  338. printk(KERN_ERR "Must use PIPE A\n");
  339. return false;
  340. }
  341. /* Should never happen!! */
  342. list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
  343. head) {
  344. if (tmp_encoder != encoder
  345. && tmp_encoder->crtc == encoder->crtc) {
  346. printk(KERN_ERR "Can't enable LVDS and another "
  347. "encoder on the same pipe\n");
  348. return false;
  349. }
  350. }
  351. /*
  352. * If we have timings from the BIOS for the panel, put them in
  353. * to the adjusted mode. The CRTC will be set up for this mode,
  354. * with the panel scaling set up to source from the H/VDisplay
  355. * of the original mode.
  356. */
  357. if (panel_fixed_mode != NULL) {
  358. adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
  359. adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
  360. adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
  361. adjusted_mode->htotal = panel_fixed_mode->htotal;
  362. adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
  363. adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
  364. adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
  365. adjusted_mode->vtotal = panel_fixed_mode->vtotal;
  366. adjusted_mode->clock = panel_fixed_mode->clock;
  367. drm_mode_set_crtcinfo(adjusted_mode,
  368. CRTC_INTERLACE_HALVE_V);
  369. }
  370. /*
  371. * XXX: It would be nice to support lower refresh rates on the
  372. * panels to reduce power consumption, and perhaps match the
  373. * user's requested refresh rate.
  374. */
  375. return true;
  376. }
  377. static void psb_intel_lvds_prepare(struct drm_encoder *encoder)
  378. {
  379. struct drm_device *dev = encoder->dev;
  380. struct drm_psb_private *dev_priv = dev->dev_private;
  381. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  382. if (!gma_power_begin(dev, true))
  383. return;
  384. mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
  385. mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
  386. BACKLIGHT_DUTY_CYCLE_MASK);
  387. psb_intel_lvds_set_power(dev, false);
  388. gma_power_end(dev);
  389. }
  390. static void psb_intel_lvds_commit(struct drm_encoder *encoder)
  391. {
  392. struct drm_device *dev = encoder->dev;
  393. struct drm_psb_private *dev_priv = dev->dev_private;
  394. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  395. if (mode_dev->backlight_duty_cycle == 0)
  396. mode_dev->backlight_duty_cycle =
  397. psb_intel_lvds_get_max_backlight(dev);
  398. psb_intel_lvds_set_power(dev, true);
  399. }
  400. static void psb_intel_lvds_mode_set(struct drm_encoder *encoder,
  401. struct drm_display_mode *mode,
  402. struct drm_display_mode *adjusted_mode)
  403. {
  404. struct drm_device *dev = encoder->dev;
  405. struct drm_psb_private *dev_priv = dev->dev_private;
  406. u32 pfit_control;
  407. /*
  408. * The LVDS pin pair will already have been turned on in the
  409. * psb_intel_crtc_mode_set since it has a large impact on the DPLL
  410. * settings.
  411. */
  412. /*
  413. * Enable automatic panel scaling so that non-native modes fill the
  414. * screen. Should be enabled before the pipe is enabled, according to
  415. * register description and PRM.
  416. */
  417. if (mode->hdisplay != adjusted_mode->hdisplay ||
  418. mode->vdisplay != adjusted_mode->vdisplay)
  419. pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
  420. HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
  421. HORIZ_INTERP_BILINEAR);
  422. else
  423. pfit_control = 0;
  424. if (dev_priv->lvds_dither)
  425. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  426. REG_WRITE(PFIT_CONTROL, pfit_control);
  427. }
  428. /*
  429. * Detect the LVDS connection.
  430. *
  431. * This always returns CONNECTOR_STATUS_CONNECTED.
  432. * This connector should only have
  433. * been set up if the LVDS was actually connected anyway.
  434. */
  435. static enum drm_connector_status psb_intel_lvds_detect(struct drm_connector
  436. *connector, bool force)
  437. {
  438. return connector_status_connected;
  439. }
  440. /*
  441. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  442. */
  443. static int psb_intel_lvds_get_modes(struct drm_connector *connector)
  444. {
  445. struct drm_device *dev = connector->dev;
  446. struct drm_psb_private *dev_priv = dev->dev_private;
  447. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  448. struct psb_intel_encoder *psb_intel_encoder =
  449. psb_intel_attached_encoder(connector);
  450. struct psb_intel_lvds_priv *lvds_priv = psb_intel_encoder->dev_priv;
  451. int ret = 0;
  452. if (!IS_MRST(dev))
  453. ret = psb_intel_ddc_get_modes(connector, &lvds_priv->i2c_bus->adapter);
  454. if (ret)
  455. return ret;
  456. /* Didn't get an EDID, so
  457. * Set wide sync ranges so we get all modes
  458. * handed to valid_mode for checking
  459. */
  460. connector->display_info.min_vfreq = 0;
  461. connector->display_info.max_vfreq = 200;
  462. connector->display_info.min_hfreq = 0;
  463. connector->display_info.max_hfreq = 200;
  464. if (mode_dev->panel_fixed_mode != NULL) {
  465. struct drm_display_mode *mode =
  466. drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
  467. drm_mode_probed_add(connector, mode);
  468. return 1;
  469. }
  470. return 0;
  471. }
  472. /**
  473. * psb_intel_lvds_destroy - unregister and free LVDS structures
  474. * @connector: connector to free
  475. *
  476. * Unregister the DDC bus for this connector then free the driver private
  477. * structure.
  478. */
  479. void psb_intel_lvds_destroy(struct drm_connector *connector)
  480. {
  481. struct psb_intel_encoder *psb_intel_encoder =
  482. psb_intel_attached_encoder(connector);
  483. struct psb_intel_lvds_priv *lvds_priv = psb_intel_encoder->dev_priv;
  484. if (lvds_priv->ddc_bus)
  485. psb_intel_i2c_destroy(lvds_priv->ddc_bus);
  486. drm_sysfs_connector_remove(connector);
  487. drm_connector_cleanup(connector);
  488. kfree(connector);
  489. }
  490. int psb_intel_lvds_set_property(struct drm_connector *connector,
  491. struct drm_property *property,
  492. uint64_t value)
  493. {
  494. struct drm_encoder *encoder = connector->encoder;
  495. if (!encoder)
  496. return -1;
  497. if (!strcmp(property->name, "scaling mode")) {
  498. struct psb_intel_crtc *crtc =
  499. to_psb_intel_crtc(encoder->crtc);
  500. uint64_t curval;
  501. if (!crtc)
  502. goto set_prop_error;
  503. switch (value) {
  504. case DRM_MODE_SCALE_FULLSCREEN:
  505. break;
  506. case DRM_MODE_SCALE_NO_SCALE:
  507. break;
  508. case DRM_MODE_SCALE_ASPECT:
  509. break;
  510. default:
  511. goto set_prop_error;
  512. }
  513. if (drm_connector_property_get_value(connector,
  514. property,
  515. &curval))
  516. goto set_prop_error;
  517. if (curval == value)
  518. goto set_prop_done;
  519. if (drm_connector_property_set_value(connector,
  520. property,
  521. value))
  522. goto set_prop_error;
  523. if (crtc->saved_mode.hdisplay != 0 &&
  524. crtc->saved_mode.vdisplay != 0) {
  525. if (!drm_crtc_helper_set_mode(encoder->crtc,
  526. &crtc->saved_mode,
  527. encoder->crtc->x,
  528. encoder->crtc->y,
  529. encoder->crtc->fb))
  530. goto set_prop_error;
  531. }
  532. } else if (!strcmp(property->name, "backlight")) {
  533. if (drm_connector_property_set_value(connector,
  534. property,
  535. value))
  536. goto set_prop_error;
  537. else {
  538. #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
  539. struct drm_psb_private *devp =
  540. encoder->dev->dev_private;
  541. struct backlight_device *bd = devp->backlight_device;
  542. if (bd) {
  543. bd->props.brightness = value;
  544. backlight_update_status(bd);
  545. }
  546. #endif
  547. }
  548. } else if (!strcmp(property->name, "DPMS")) {
  549. struct drm_encoder_helper_funcs *hfuncs
  550. = encoder->helper_private;
  551. hfuncs->dpms(encoder, value);
  552. }
  553. set_prop_done:
  554. return 0;
  555. set_prop_error:
  556. return -1;
  557. }
  558. static const struct drm_encoder_helper_funcs psb_intel_lvds_helper_funcs = {
  559. .dpms = psb_intel_lvds_encoder_dpms,
  560. .mode_fixup = psb_intel_lvds_mode_fixup,
  561. .prepare = psb_intel_lvds_prepare,
  562. .mode_set = psb_intel_lvds_mode_set,
  563. .commit = psb_intel_lvds_commit,
  564. };
  565. const struct drm_connector_helper_funcs
  566. psb_intel_lvds_connector_helper_funcs = {
  567. .get_modes = psb_intel_lvds_get_modes,
  568. .mode_valid = psb_intel_lvds_mode_valid,
  569. .best_encoder = psb_intel_best_encoder,
  570. };
  571. const struct drm_connector_funcs psb_intel_lvds_connector_funcs = {
  572. .dpms = drm_helper_connector_dpms,
  573. .save = psb_intel_lvds_save,
  574. .restore = psb_intel_lvds_restore,
  575. .detect = psb_intel_lvds_detect,
  576. .fill_modes = drm_helper_probe_single_connector_modes,
  577. .set_property = psb_intel_lvds_set_property,
  578. .destroy = psb_intel_lvds_destroy,
  579. };
  580. static void psb_intel_lvds_enc_destroy(struct drm_encoder *encoder)
  581. {
  582. drm_encoder_cleanup(encoder);
  583. }
  584. const struct drm_encoder_funcs psb_intel_lvds_enc_funcs = {
  585. .destroy = psb_intel_lvds_enc_destroy,
  586. };
  587. /**
  588. * psb_intel_lvds_init - setup LVDS connectors on this device
  589. * @dev: drm device
  590. *
  591. * Create the connector, register the LVDS DDC bus, and try to figure out what
  592. * modes we can display on the LVDS panel (if present).
  593. */
  594. void psb_intel_lvds_init(struct drm_device *dev,
  595. struct psb_intel_mode_device *mode_dev)
  596. {
  597. struct psb_intel_encoder *psb_intel_encoder;
  598. struct psb_intel_connector *psb_intel_connector;
  599. struct psb_intel_lvds_priv *lvds_priv;
  600. struct drm_connector *connector;
  601. struct drm_encoder *encoder;
  602. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  603. struct drm_crtc *crtc;
  604. struct drm_psb_private *dev_priv = dev->dev_private;
  605. u32 lvds;
  606. int pipe;
  607. psb_intel_encoder =
  608. kzalloc(sizeof(struct psb_intel_encoder), GFP_KERNEL);
  609. if (!psb_intel_encoder) {
  610. dev_err(dev->dev, "psb_intel_encoder allocation error\n");
  611. return;
  612. }
  613. psb_intel_connector =
  614. kzalloc(sizeof(struct psb_intel_connector), GFP_KERNEL);
  615. if (!psb_intel_connector) {
  616. dev_err(dev->dev, "psb_intel_connector allocation error\n");
  617. goto failed_encoder;
  618. }
  619. lvds_priv = kzalloc(sizeof(struct psb_intel_lvds_priv), GFP_KERNEL);
  620. if (!lvds_priv) {
  621. dev_err(dev->dev, "LVDS private allocation error\n");
  622. goto failed_connector;
  623. }
  624. psb_intel_encoder->dev_priv = lvds_priv;
  625. connector = &psb_intel_connector->base;
  626. encoder = &psb_intel_encoder->base;
  627. drm_connector_init(dev, connector,
  628. &psb_intel_lvds_connector_funcs,
  629. DRM_MODE_CONNECTOR_LVDS);
  630. drm_encoder_init(dev, encoder,
  631. &psb_intel_lvds_enc_funcs,
  632. DRM_MODE_ENCODER_LVDS);
  633. psb_intel_connector_attach_encoder(psb_intel_connector,
  634. psb_intel_encoder);
  635. psb_intel_encoder->type = INTEL_OUTPUT_LVDS;
  636. drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs);
  637. drm_connector_helper_add(connector,
  638. &psb_intel_lvds_connector_helper_funcs);
  639. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  640. connector->interlace_allowed = false;
  641. connector->doublescan_allowed = false;
  642. /*Attach connector properties*/
  643. drm_connector_attach_property(connector,
  644. dev->mode_config.scaling_mode_property,
  645. DRM_MODE_SCALE_FULLSCREEN);
  646. drm_connector_attach_property(connector,
  647. dev_priv->backlight_property,
  648. BRIGHTNESS_MAX_LEVEL);
  649. /*
  650. * Set up I2C bus
  651. * FIXME: distroy i2c_bus when exit
  652. */
  653. lvds_priv->i2c_bus = psb_intel_i2c_create(dev, GPIOB, "LVDSBLC_B");
  654. if (!lvds_priv->i2c_bus) {
  655. dev_printk(KERN_ERR,
  656. &dev->pdev->dev, "I2C bus registration failed.\n");
  657. goto failed_blc_i2c;
  658. }
  659. lvds_priv->i2c_bus->slave_addr = 0x2C;
  660. dev_priv->lvds_i2c_bus = lvds_priv->i2c_bus;
  661. /*
  662. * LVDS discovery:
  663. * 1) check for EDID on DDC
  664. * 2) check for VBT data
  665. * 3) check to see if LVDS is already on
  666. * if none of the above, no panel
  667. * 4) make sure lid is open
  668. * if closed, act like it's not there for now
  669. */
  670. /* Set up the DDC bus. */
  671. lvds_priv->ddc_bus = psb_intel_i2c_create(dev, GPIOC, "LVDSDDC_C");
  672. if (!lvds_priv->ddc_bus) {
  673. dev_printk(KERN_ERR, &dev->pdev->dev,
  674. "DDC bus registration " "failed.\n");
  675. goto failed_ddc;
  676. }
  677. /*
  678. * Attempt to get the fixed panel mode from DDC. Assume that the
  679. * preferred mode is the right one.
  680. */
  681. psb_intel_ddc_get_modes(connector, &lvds_priv->ddc_bus->adapter);
  682. list_for_each_entry(scan, &connector->probed_modes, head) {
  683. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  684. mode_dev->panel_fixed_mode =
  685. drm_mode_duplicate(dev, scan);
  686. goto out; /* FIXME: check for quirks */
  687. }
  688. }
  689. /* Failed to get EDID, what about VBT? do we need this? */
  690. if (mode_dev->vbt_mode)
  691. mode_dev->panel_fixed_mode =
  692. drm_mode_duplicate(dev, mode_dev->vbt_mode);
  693. if (!mode_dev->panel_fixed_mode)
  694. if (dev_priv->lfp_lvds_vbt_mode)
  695. mode_dev->panel_fixed_mode =
  696. drm_mode_duplicate(dev,
  697. dev_priv->lfp_lvds_vbt_mode);
  698. /*
  699. * If we didn't get EDID, try checking if the panel is already turned
  700. * on. If so, assume that whatever is currently programmed is the
  701. * correct mode.
  702. */
  703. lvds = REG_READ(LVDS);
  704. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  705. crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
  706. if (crtc && (lvds & LVDS_PORT_EN)) {
  707. mode_dev->panel_fixed_mode =
  708. psb_intel_crtc_mode_get(dev, crtc);
  709. if (mode_dev->panel_fixed_mode) {
  710. mode_dev->panel_fixed_mode->type |=
  711. DRM_MODE_TYPE_PREFERRED;
  712. goto out; /* FIXME: check for quirks */
  713. }
  714. }
  715. /* If we still don't have a mode after all that, give up. */
  716. if (!mode_dev->panel_fixed_mode) {
  717. dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
  718. goto failed_find;
  719. }
  720. /*
  721. * Blacklist machines with BIOSes that list an LVDS panel without
  722. * actually having one.
  723. */
  724. out:
  725. drm_sysfs_connector_add(connector);
  726. return;
  727. failed_find:
  728. if (lvds_priv->ddc_bus)
  729. psb_intel_i2c_destroy(lvds_priv->ddc_bus);
  730. failed_ddc:
  731. if (lvds_priv->i2c_bus)
  732. psb_intel_i2c_destroy(lvds_priv->i2c_bus);
  733. failed_blc_i2c:
  734. drm_encoder_cleanup(encoder);
  735. drm_connector_cleanup(connector);
  736. failed_connector:
  737. kfree(psb_intel_connector);
  738. failed_encoder:
  739. kfree(psb_intel_encoder);
  740. }