gpio-ab8500.c 13 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2011
  3. *
  4. * Author: BIBEK BASU <bibek.basu@stericsson.com>
  5. * License terms: GNU General Public License (GPL) version 2
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/types.h>
  13. #include <linux/slab.h>
  14. #include <linux/init.h>
  15. #include <linux/module.h>
  16. #include <linux/err.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/gpio.h>
  19. #include <linux/irq.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/mfd/ab8500.h>
  22. #include <linux/mfd/abx500.h>
  23. #include <linux/mfd/ab8500/gpio.h>
  24. /*
  25. * GPIO registers offset
  26. * Bank: 0x10
  27. */
  28. #define AB8500_GPIO_SEL1_REG 0x00
  29. #define AB8500_GPIO_SEL2_REG 0x01
  30. #define AB8500_GPIO_SEL3_REG 0x02
  31. #define AB8500_GPIO_SEL4_REG 0x03
  32. #define AB8500_GPIO_SEL5_REG 0x04
  33. #define AB8500_GPIO_SEL6_REG 0x05
  34. #define AB8500_GPIO_DIR1_REG 0x10
  35. #define AB8500_GPIO_DIR2_REG 0x11
  36. #define AB8500_GPIO_DIR3_REG 0x12
  37. #define AB8500_GPIO_DIR4_REG 0x13
  38. #define AB8500_GPIO_DIR5_REG 0x14
  39. #define AB8500_GPIO_DIR6_REG 0x15
  40. #define AB8500_GPIO_OUT1_REG 0x20
  41. #define AB8500_GPIO_OUT2_REG 0x21
  42. #define AB8500_GPIO_OUT3_REG 0x22
  43. #define AB8500_GPIO_OUT4_REG 0x23
  44. #define AB8500_GPIO_OUT5_REG 0x24
  45. #define AB8500_GPIO_OUT6_REG 0x25
  46. #define AB8500_GPIO_PUD1_REG 0x30
  47. #define AB8500_GPIO_PUD2_REG 0x31
  48. #define AB8500_GPIO_PUD3_REG 0x32
  49. #define AB8500_GPIO_PUD4_REG 0x33
  50. #define AB8500_GPIO_PUD5_REG 0x34
  51. #define AB8500_GPIO_PUD6_REG 0x35
  52. #define AB8500_GPIO_IN1_REG 0x40
  53. #define AB8500_GPIO_IN2_REG 0x41
  54. #define AB8500_GPIO_IN3_REG 0x42
  55. #define AB8500_GPIO_IN4_REG 0x43
  56. #define AB8500_GPIO_IN5_REG 0x44
  57. #define AB8500_GPIO_IN6_REG 0x45
  58. #define AB8500_GPIO_ALTFUN_REG 0x45
  59. #define ALTFUN_REG_INDEX 6
  60. #define AB8500_NUM_GPIO 42
  61. #define AB8500_NUM_VIR_GPIO_IRQ 16
  62. enum ab8500_gpio_action {
  63. NONE,
  64. STARTUP,
  65. SHUTDOWN,
  66. MASK,
  67. UNMASK
  68. };
  69. struct ab8500_gpio {
  70. struct gpio_chip chip;
  71. struct ab8500 *parent;
  72. struct device *dev;
  73. struct mutex lock;
  74. u32 irq_base;
  75. enum ab8500_gpio_action irq_action;
  76. u16 rising;
  77. u16 falling;
  78. };
  79. /**
  80. * to_ab8500_gpio() - get the pointer to ab8500_gpio
  81. * @chip: Member of the structure ab8500_gpio
  82. */
  83. static inline struct ab8500_gpio *to_ab8500_gpio(struct gpio_chip *chip)
  84. {
  85. return container_of(chip, struct ab8500_gpio, chip);
  86. }
  87. static int ab8500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
  88. unsigned offset, int val)
  89. {
  90. struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
  91. u8 pos = offset % 8;
  92. int ret;
  93. reg = reg + (offset / 8);
  94. ret = abx500_mask_and_set_register_interruptible(ab8500_gpio->dev,
  95. AB8500_MISC, reg, 1 << pos, val << pos);
  96. if (ret < 0)
  97. dev_err(ab8500_gpio->dev, "%s write failed\n", __func__);
  98. return ret;
  99. }
  100. /**
  101. * ab8500_gpio_get() - Get the particular GPIO value
  102. * @chip: Gpio device
  103. * @offset: GPIO number to read
  104. */
  105. static int ab8500_gpio_get(struct gpio_chip *chip, unsigned offset)
  106. {
  107. struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
  108. u8 mask = 1 << (offset % 8);
  109. u8 reg = AB8500_GPIO_OUT1_REG + (offset / 8);
  110. int ret;
  111. u8 data;
  112. ret = abx500_get_register_interruptible(ab8500_gpio->dev, AB8500_MISC,
  113. reg, &data);
  114. if (ret < 0) {
  115. dev_err(ab8500_gpio->dev, "%s read failed\n", __func__);
  116. return ret;
  117. }
  118. return (data & mask) >> (offset % 8);
  119. }
  120. static void ab8500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
  121. {
  122. struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
  123. int ret;
  124. /* Write the data */
  125. ret = ab8500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, 1);
  126. if (ret < 0)
  127. dev_err(ab8500_gpio->dev, "%s write failed\n", __func__);
  128. }
  129. static int ab8500_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
  130. int val)
  131. {
  132. int ret;
  133. /* set direction as output */
  134. ret = ab8500_gpio_set_bits(chip, AB8500_GPIO_DIR1_REG, offset, 1);
  135. if (ret < 0)
  136. return ret;
  137. /* disable pull down */
  138. ret = ab8500_gpio_set_bits(chip, AB8500_GPIO_PUD1_REG, offset, 1);
  139. if (ret < 0)
  140. return ret;
  141. /* set the output as 1 or 0 */
  142. return ab8500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
  143. }
  144. static int ab8500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
  145. {
  146. /* set the register as input */
  147. return ab8500_gpio_set_bits(chip, AB8500_GPIO_DIR1_REG, offset, 0);
  148. }
  149. static int ab8500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
  150. {
  151. /*
  152. * Only some GPIOs are interrupt capable, and they are
  153. * organized in discontiguous clusters:
  154. *
  155. * GPIO6 to GPIO13
  156. * GPIO24 and GPIO25
  157. * GPIO36 to GPIO41
  158. */
  159. static struct ab8500_gpio_irq_cluster {
  160. int start;
  161. int end;
  162. } clusters[] = {
  163. {.start = 6, .end = 13},
  164. {.start = 24, .end = 25},
  165. {.start = 36, .end = 41},
  166. };
  167. struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
  168. int base = ab8500_gpio->irq_base;
  169. int i;
  170. for (i = 0; i < ARRAY_SIZE(clusters); i++) {
  171. struct ab8500_gpio_irq_cluster *cluster = &clusters[i];
  172. if (offset >= cluster->start && offset <= cluster->end)
  173. return base + offset - cluster->start;
  174. /* Advance by the number of gpios in this cluster */
  175. base += cluster->end - cluster->start + 1;
  176. }
  177. return -EINVAL;
  178. }
  179. static struct gpio_chip ab8500gpio_chip = {
  180. .label = "ab8500_gpio",
  181. .owner = THIS_MODULE,
  182. .direction_input = ab8500_gpio_direction_input,
  183. .get = ab8500_gpio_get,
  184. .direction_output = ab8500_gpio_direction_output,
  185. .set = ab8500_gpio_set,
  186. .to_irq = ab8500_gpio_to_irq,
  187. };
  188. static unsigned int irq_to_rising(unsigned int irq)
  189. {
  190. struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
  191. int offset = irq - ab8500_gpio->irq_base;
  192. int new_irq = offset + AB8500_INT_GPIO6R
  193. + ab8500_gpio->parent->irq_base;
  194. return new_irq;
  195. }
  196. static unsigned int irq_to_falling(unsigned int irq)
  197. {
  198. struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
  199. int offset = irq - ab8500_gpio->irq_base;
  200. int new_irq = offset + AB8500_INT_GPIO6F
  201. + ab8500_gpio->parent->irq_base;
  202. return new_irq;
  203. }
  204. static unsigned int rising_to_irq(unsigned int irq, void *dev)
  205. {
  206. struct ab8500_gpio *ab8500_gpio = dev;
  207. int offset = irq - AB8500_INT_GPIO6R
  208. - ab8500_gpio->parent->irq_base ;
  209. int new_irq = offset + ab8500_gpio->irq_base;
  210. return new_irq;
  211. }
  212. static unsigned int falling_to_irq(unsigned int irq, void *dev)
  213. {
  214. struct ab8500_gpio *ab8500_gpio = dev;
  215. int offset = irq - AB8500_INT_GPIO6F
  216. - ab8500_gpio->parent->irq_base ;
  217. int new_irq = offset + ab8500_gpio->irq_base;
  218. return new_irq;
  219. }
  220. /*
  221. * IRQ handler
  222. */
  223. static irqreturn_t handle_rising(int irq, void *dev)
  224. {
  225. handle_nested_irq(rising_to_irq(irq , dev));
  226. return IRQ_HANDLED;
  227. }
  228. static irqreturn_t handle_falling(int irq, void *dev)
  229. {
  230. handle_nested_irq(falling_to_irq(irq, dev));
  231. return IRQ_HANDLED;
  232. }
  233. static void ab8500_gpio_irq_lock(unsigned int irq)
  234. {
  235. struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
  236. mutex_lock(&ab8500_gpio->lock);
  237. }
  238. static void ab8500_gpio_irq_sync_unlock(unsigned int irq)
  239. {
  240. struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
  241. int offset = irq - ab8500_gpio->irq_base;
  242. bool rising = ab8500_gpio->rising & BIT(offset);
  243. bool falling = ab8500_gpio->falling & BIT(offset);
  244. int ret;
  245. switch (ab8500_gpio->irq_action) {
  246. case STARTUP:
  247. if (rising)
  248. ret = request_threaded_irq(irq_to_rising(irq),
  249. NULL, handle_rising,
  250. IRQF_TRIGGER_RISING,
  251. "ab8500-gpio-r", ab8500_gpio);
  252. if (falling)
  253. ret = request_threaded_irq(irq_to_falling(irq),
  254. NULL, handle_falling,
  255. IRQF_TRIGGER_FALLING,
  256. "ab8500-gpio-f", ab8500_gpio);
  257. break;
  258. case SHUTDOWN:
  259. if (rising)
  260. free_irq(irq_to_rising(irq), ab8500_gpio);
  261. if (falling)
  262. free_irq(irq_to_falling(irq), ab8500_gpio);
  263. break;
  264. case MASK:
  265. if (rising)
  266. disable_irq(irq_to_rising(irq));
  267. if (falling)
  268. disable_irq(irq_to_falling(irq));
  269. break;
  270. case UNMASK:
  271. if (rising)
  272. enable_irq(irq_to_rising(irq));
  273. if (falling)
  274. enable_irq(irq_to_falling(irq));
  275. break;
  276. case NONE:
  277. break;
  278. }
  279. ab8500_gpio->irq_action = NONE;
  280. ab8500_gpio->rising &= ~(BIT(offset));
  281. ab8500_gpio->falling &= ~(BIT(offset));
  282. mutex_unlock(&ab8500_gpio->lock);
  283. }
  284. static void ab8500_gpio_irq_mask(unsigned int irq)
  285. {
  286. struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
  287. ab8500_gpio->irq_action = MASK;
  288. }
  289. static void ab8500_gpio_irq_unmask(unsigned int irq)
  290. {
  291. struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
  292. ab8500_gpio->irq_action = UNMASK;
  293. }
  294. static int ab8500_gpio_irq_set_type(unsigned int irq, unsigned int type)
  295. {
  296. struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
  297. int offset = irq - ab8500_gpio->irq_base;
  298. if (type == IRQ_TYPE_EDGE_BOTH) {
  299. ab8500_gpio->rising = BIT(offset);
  300. ab8500_gpio->falling = BIT(offset);
  301. } else if (type == IRQ_TYPE_EDGE_RISING) {
  302. ab8500_gpio->rising = BIT(offset);
  303. } else {
  304. ab8500_gpio->falling = BIT(offset);
  305. }
  306. return 0;
  307. }
  308. unsigned int ab8500_gpio_irq_startup(unsigned int irq)
  309. {
  310. struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
  311. ab8500_gpio->irq_action = STARTUP;
  312. return 0;
  313. }
  314. void ab8500_gpio_irq_shutdown(unsigned int irq)
  315. {
  316. struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
  317. ab8500_gpio->irq_action = SHUTDOWN;
  318. }
  319. static struct irq_chip ab8500_gpio_irq_chip = {
  320. .name = "ab8500-gpio",
  321. .startup = ab8500_gpio_irq_startup,
  322. .shutdown = ab8500_gpio_irq_shutdown,
  323. .bus_lock = ab8500_gpio_irq_lock,
  324. .bus_sync_unlock = ab8500_gpio_irq_sync_unlock,
  325. .mask = ab8500_gpio_irq_mask,
  326. .unmask = ab8500_gpio_irq_unmask,
  327. .set_type = ab8500_gpio_irq_set_type,
  328. };
  329. static int ab8500_gpio_irq_init(struct ab8500_gpio *ab8500_gpio)
  330. {
  331. u32 base = ab8500_gpio->irq_base;
  332. int irq;
  333. for (irq = base; irq < base + AB8500_NUM_VIR_GPIO_IRQ ; irq++) {
  334. set_irq_chip_data(irq, ab8500_gpio);
  335. set_irq_chip_and_handler(irq, &ab8500_gpio_irq_chip,
  336. handle_simple_irq);
  337. set_irq_nested_thread(irq, 1);
  338. #ifdef CONFIG_ARM
  339. set_irq_flags(irq, IRQF_VALID);
  340. #else
  341. set_irq_noprobe(irq);
  342. #endif
  343. }
  344. return 0;
  345. }
  346. static void ab8500_gpio_irq_remove(struct ab8500_gpio *ab8500_gpio)
  347. {
  348. int base = ab8500_gpio->irq_base;
  349. int irq;
  350. for (irq = base; irq < base + AB8500_NUM_VIR_GPIO_IRQ; irq++) {
  351. #ifdef CONFIG_ARM
  352. set_irq_flags(irq, 0);
  353. #endif
  354. set_irq_chip_and_handler(irq, NULL, NULL);
  355. set_irq_chip_data(irq, NULL);
  356. }
  357. }
  358. static int __devinit ab8500_gpio_probe(struct platform_device *pdev)
  359. {
  360. struct ab8500_platform_data *ab8500_pdata =
  361. dev_get_platdata(pdev->dev.parent);
  362. struct ab8500_gpio_platform_data *pdata;
  363. struct ab8500_gpio *ab8500_gpio;
  364. int ret;
  365. int i;
  366. pdata = ab8500_pdata->gpio;
  367. if (!pdata) {
  368. dev_err(&pdev->dev, "gpio platform data missing\n");
  369. return -ENODEV;
  370. }
  371. ab8500_gpio = kzalloc(sizeof(struct ab8500_gpio), GFP_KERNEL);
  372. if (ab8500_gpio == NULL) {
  373. dev_err(&pdev->dev, "failed to allocate memory\n");
  374. return -ENOMEM;
  375. }
  376. ab8500_gpio->dev = &pdev->dev;
  377. ab8500_gpio->parent = dev_get_drvdata(pdev->dev.parent);
  378. ab8500_gpio->chip = ab8500gpio_chip;
  379. ab8500_gpio->chip.ngpio = AB8500_NUM_GPIO;
  380. ab8500_gpio->chip.dev = &pdev->dev;
  381. ab8500_gpio->chip.base = pdata->gpio_base;
  382. ab8500_gpio->irq_base = pdata->irq_base;
  383. /* initialize the lock */
  384. mutex_init(&ab8500_gpio->lock);
  385. /*
  386. * AB8500 core will handle and clear the IRQ
  387. * configre GPIO based on config-reg value.
  388. * These values are for selecting the PINs as
  389. * GPIO or alternate function
  390. */
  391. for (i = AB8500_GPIO_SEL1_REG; i <= AB8500_GPIO_SEL6_REG; i++) {
  392. ret = abx500_set_register_interruptible(ab8500_gpio->dev,
  393. AB8500_MISC, i,
  394. pdata->config_reg[i]);
  395. if (ret < 0)
  396. goto out_free;
  397. }
  398. ret = abx500_set_register_interruptible(ab8500_gpio->dev, AB8500_MISC,
  399. AB8500_GPIO_ALTFUN_REG,
  400. pdata->config_reg[ALTFUN_REG_INDEX]);
  401. if (ret < 0)
  402. goto out_free;
  403. ret = ab8500_gpio_irq_init(ab8500_gpio);
  404. if (ret)
  405. goto out_free;
  406. ret = gpiochip_add(&ab8500_gpio->chip);
  407. if (ret) {
  408. dev_err(&pdev->dev, "unable to add gpiochip: %d\n",
  409. ret);
  410. goto out_rem_irq;
  411. }
  412. platform_set_drvdata(pdev, ab8500_gpio);
  413. return 0;
  414. out_rem_irq:
  415. ab8500_gpio_irq_remove(ab8500_gpio);
  416. out_free:
  417. mutex_destroy(&ab8500_gpio->lock);
  418. kfree(ab8500_gpio);
  419. return ret;
  420. }
  421. /*
  422. * ab8500_gpio_remove() - remove Ab8500-gpio driver
  423. * @pdev : Platform device registered
  424. */
  425. static int __devexit ab8500_gpio_remove(struct platform_device *pdev)
  426. {
  427. struct ab8500_gpio *ab8500_gpio = platform_get_drvdata(pdev);
  428. int ret;
  429. ret = gpiochip_remove(&ab8500_gpio->chip);
  430. if (ret < 0) {
  431. dev_err(ab8500_gpio->dev, "unable to remove gpiochip: %d\n",
  432. ret);
  433. return ret;
  434. }
  435. platform_set_drvdata(pdev, NULL);
  436. mutex_destroy(&ab8500_gpio->lock);
  437. kfree(ab8500_gpio);
  438. return 0;
  439. }
  440. static struct platform_driver ab8500_gpio_driver = {
  441. .driver = {
  442. .name = "ab8500-gpio",
  443. .owner = THIS_MODULE,
  444. },
  445. .probe = ab8500_gpio_probe,
  446. .remove = __devexit_p(ab8500_gpio_remove),
  447. };
  448. static int __init ab8500_gpio_init(void)
  449. {
  450. return platform_driver_register(&ab8500_gpio_driver);
  451. }
  452. arch_initcall(ab8500_gpio_init);
  453. static void __exit ab8500_gpio_exit(void)
  454. {
  455. platform_driver_unregister(&ab8500_gpio_driver);
  456. }
  457. module_exit(ab8500_gpio_exit);
  458. MODULE_AUTHOR("BIBEK BASU <bibek.basu@stericsson.com>");
  459. MODULE_DESCRIPTION("Driver allows to use AB8500 unused pins to be used as GPIO");
  460. MODULE_ALIAS("platform:ab8500-gpio");
  461. MODULE_LICENSE("GPL v2");