sc520_freq.c 4.1 KB

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  1. /*
  2. * sc520_freq.c: cpufreq driver for the AMD Elan sc520
  3. *
  4. * Copyright (C) 2005 Sean Young <sean@mess.org>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. *
  11. * Based on elanfreq.c
  12. *
  13. * 2005-03-30: - initial revision
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/delay.h>
  19. #include <linux/cpufreq.h>
  20. #include <linux/timex.h>
  21. #include <linux/io.h>
  22. #include <asm/cpu_device_id.h>
  23. #include <asm/msr.h>
  24. #define MMCR_BASE 0xfffef000 /* The default base address */
  25. #define OFFS_CPUCTL 0x2 /* CPU Control Register */
  26. static __u8 __iomem *cpuctl;
  27. #define PFX "sc520_freq: "
  28. static struct cpufreq_frequency_table sc520_freq_table[] = {
  29. {0x01, 100000},
  30. {0x02, 133000},
  31. {0, CPUFREQ_TABLE_END},
  32. };
  33. static unsigned int sc520_freq_get_cpu_frequency(unsigned int cpu)
  34. {
  35. u8 clockspeed_reg = *cpuctl;
  36. switch (clockspeed_reg & 0x03) {
  37. default:
  38. printk(KERN_ERR PFX "error: cpuctl register has unexpected "
  39. "value %02x\n", clockspeed_reg);
  40. case 0x01:
  41. return 100000;
  42. case 0x02:
  43. return 133000;
  44. }
  45. }
  46. static void sc520_freq_set_cpu_state(unsigned int state)
  47. {
  48. struct cpufreq_freqs freqs;
  49. u8 clockspeed_reg;
  50. freqs.old = sc520_freq_get_cpu_frequency(0);
  51. freqs.new = sc520_freq_table[state].frequency;
  52. freqs.cpu = 0; /* AMD Elan is UP */
  53. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  54. pr_debug("attempting to set frequency to %i kHz\n",
  55. sc520_freq_table[state].frequency);
  56. local_irq_disable();
  57. clockspeed_reg = *cpuctl & ~0x03;
  58. *cpuctl = clockspeed_reg | sc520_freq_table[state].index;
  59. local_irq_enable();
  60. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  61. };
  62. static int sc520_freq_verify(struct cpufreq_policy *policy)
  63. {
  64. return cpufreq_frequency_table_verify(policy, &sc520_freq_table[0]);
  65. }
  66. static int sc520_freq_target(struct cpufreq_policy *policy,
  67. unsigned int target_freq,
  68. unsigned int relation)
  69. {
  70. unsigned int newstate = 0;
  71. if (cpufreq_frequency_table_target(policy, sc520_freq_table,
  72. target_freq, relation, &newstate))
  73. return -EINVAL;
  74. sc520_freq_set_cpu_state(newstate);
  75. return 0;
  76. }
  77. /*
  78. * Module init and exit code
  79. */
  80. static int sc520_freq_cpu_init(struct cpufreq_policy *policy)
  81. {
  82. struct cpuinfo_x86 *c = &cpu_data(0);
  83. int result;
  84. /* capability check */
  85. if (c->x86_vendor != X86_VENDOR_AMD ||
  86. c->x86 != 4 || c->x86_model != 9)
  87. return -ENODEV;
  88. /* cpuinfo and default policy values */
  89. policy->cpuinfo.transition_latency = 1000000; /* 1ms */
  90. policy->cur = sc520_freq_get_cpu_frequency(0);
  91. result = cpufreq_frequency_table_cpuinfo(policy, sc520_freq_table);
  92. if (result)
  93. return result;
  94. cpufreq_frequency_table_get_attr(sc520_freq_table, policy->cpu);
  95. return 0;
  96. }
  97. static int sc520_freq_cpu_exit(struct cpufreq_policy *policy)
  98. {
  99. cpufreq_frequency_table_put_attr(policy->cpu);
  100. return 0;
  101. }
  102. static struct freq_attr *sc520_freq_attr[] = {
  103. &cpufreq_freq_attr_scaling_available_freqs,
  104. NULL,
  105. };
  106. static struct cpufreq_driver sc520_freq_driver = {
  107. .get = sc520_freq_get_cpu_frequency,
  108. .verify = sc520_freq_verify,
  109. .target = sc520_freq_target,
  110. .init = sc520_freq_cpu_init,
  111. .exit = sc520_freq_cpu_exit,
  112. .name = "sc520_freq",
  113. .owner = THIS_MODULE,
  114. .attr = sc520_freq_attr,
  115. };
  116. static const struct x86_cpu_id sc520_ids[] = {
  117. { X86_VENDOR_AMD, 4, 9 },
  118. {}
  119. };
  120. MODULE_DEVICE_TABLE(x86cpu, sc520_ids);
  121. static int __init sc520_freq_init(void)
  122. {
  123. int err;
  124. if (!x86_match_cpu(sc520_ids))
  125. return -ENODEV;
  126. cpuctl = ioremap((unsigned long)(MMCR_BASE + OFFS_CPUCTL), 1);
  127. if (!cpuctl) {
  128. printk(KERN_ERR "sc520_freq: error: failed to remap memory\n");
  129. return -ENOMEM;
  130. }
  131. err = cpufreq_register_driver(&sc520_freq_driver);
  132. if (err)
  133. iounmap(cpuctl);
  134. return err;
  135. }
  136. static void __exit sc520_freq_exit(void)
  137. {
  138. cpufreq_unregister_driver(&sc520_freq_driver);
  139. iounmap(cpuctl);
  140. }
  141. MODULE_LICENSE("GPL");
  142. MODULE_AUTHOR("Sean Young <sean@mess.org>");
  143. MODULE_DESCRIPTION("cpufreq driver for AMD's Elan sc520 CPU");
  144. module_init(sc520_freq_init);
  145. module_exit(sc520_freq_exit);