umem.c 30 KB

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  1. /*
  2. * mm.c - Micro Memory(tm) PCI memory board block device driver - v2.3
  3. *
  4. * (C) 2001 San Mehat <nettwerk@valinux.com>
  5. * (C) 2001 Johannes Erdfelt <jerdfelt@valinux.com>
  6. * (C) 2001 NeilBrown <neilb@cse.unsw.edu.au>
  7. *
  8. * This driver for the Micro Memory PCI Memory Module with Battery Backup
  9. * is Copyright Micro Memory Inc 2001-2002. All rights reserved.
  10. *
  11. * This driver is released to the public under the terms of the
  12. * GNU GENERAL PUBLIC LICENSE version 2
  13. * See the file COPYING for details.
  14. *
  15. * This driver provides a standard block device interface for Micro Memory(tm)
  16. * PCI based RAM boards.
  17. * 10/05/01: Phap Nguyen - Rebuilt the driver
  18. * 10/22/01: Phap Nguyen - v2.1 Added disk partitioning
  19. * 29oct2001:NeilBrown - Use make_request_fn instead of request_fn
  20. * - use stand disk partitioning (so fdisk works).
  21. * 08nov2001:NeilBrown - change driver name from "mm" to "umem"
  22. * - incorporate into main kernel
  23. * 08apr2002:NeilBrown - Move some of interrupt handle to tasklet
  24. * - use spin_lock_bh instead of _irq
  25. * - Never block on make_request. queue
  26. * bh's instead.
  27. * - unregister umem from devfs at mod unload
  28. * - Change version to 2.3
  29. * 07Nov2001:Phap Nguyen - Select pci read command: 06, 12, 15 (Decimal)
  30. * 07Jan2002: P. Nguyen - Used PCI Memory Write & Invalidate for DMA
  31. * 15May2002:NeilBrown - convert to bio for 2.5
  32. * 17May2002:NeilBrown - remove init_mem initialisation. Instead detect
  33. * - a sequence of writes that cover the card, and
  34. * - set initialised bit then.
  35. */
  36. #undef DEBUG /* #define DEBUG if you want debugging info (pr_debug) */
  37. #include <linux/fs.h>
  38. #include <linux/bio.h>
  39. #include <linux/kernel.h>
  40. #include <linux/mm.h>
  41. #include <linux/mman.h>
  42. #include <linux/gfp.h>
  43. #include <linux/ioctl.h>
  44. #include <linux/module.h>
  45. #include <linux/init.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/timer.h>
  48. #include <linux/pci.h>
  49. #include <linux/dma-mapping.h>
  50. #include <linux/fcntl.h> /* O_ACCMODE */
  51. #include <linux/hdreg.h> /* HDIO_GETGEO */
  52. #include "umem.h"
  53. #include <asm/uaccess.h>
  54. #include <asm/io.h>
  55. #define MM_MAXCARDS 4
  56. #define MM_RAHEAD 2 /* two sectors */
  57. #define MM_BLKSIZE 1024 /* 1k blocks */
  58. #define MM_HARDSECT 512 /* 512-byte hardware sectors */
  59. #define MM_SHIFT 6 /* max 64 partitions on 4 cards */
  60. /*
  61. * Version Information
  62. */
  63. #define DRIVER_NAME "umem"
  64. #define DRIVER_VERSION "v2.3"
  65. #define DRIVER_AUTHOR "San Mehat, Johannes Erdfelt, NeilBrown"
  66. #define DRIVER_DESC "Micro Memory(tm) PCI memory board block driver"
  67. static int debug;
  68. /* #define HW_TRACE(x) writeb(x,cards[0].csr_remap + MEMCTRLSTATUS_MAGIC) */
  69. #define HW_TRACE(x)
  70. #define DEBUG_LED_ON_TRANSFER 0x01
  71. #define DEBUG_BATTERY_POLLING 0x02
  72. module_param(debug, int, 0644);
  73. MODULE_PARM_DESC(debug, "Debug bitmask");
  74. static int pci_read_cmd = 0x0C; /* Read Multiple */
  75. module_param(pci_read_cmd, int, 0);
  76. MODULE_PARM_DESC(pci_read_cmd, "PCI read command");
  77. static int pci_write_cmd = 0x0F; /* Write and Invalidate */
  78. module_param(pci_write_cmd, int, 0);
  79. MODULE_PARM_DESC(pci_write_cmd, "PCI write command");
  80. static int pci_cmds;
  81. static int major_nr;
  82. #include <linux/blkdev.h>
  83. #include <linux/blkpg.h>
  84. struct cardinfo {
  85. struct pci_dev *dev;
  86. unsigned char __iomem *csr_remap;
  87. unsigned int mm_size; /* size in kbytes */
  88. unsigned int init_size; /* initial segment, in sectors,
  89. * that we know to
  90. * have been written
  91. */
  92. struct bio *bio, *currentbio, **biotail;
  93. int current_idx;
  94. sector_t current_sector;
  95. struct request_queue *queue;
  96. struct mm_page {
  97. dma_addr_t page_dma;
  98. struct mm_dma_desc *desc;
  99. int cnt, headcnt;
  100. struct bio *bio, **biotail;
  101. int idx;
  102. } mm_pages[2];
  103. #define DESC_PER_PAGE ((PAGE_SIZE*2)/sizeof(struct mm_dma_desc))
  104. int Active, Ready;
  105. struct tasklet_struct tasklet;
  106. unsigned int dma_status;
  107. struct {
  108. int good;
  109. int warned;
  110. unsigned long last_change;
  111. } battery[2];
  112. spinlock_t lock;
  113. int check_batteries;
  114. int flags;
  115. };
  116. static struct cardinfo cards[MM_MAXCARDS];
  117. static struct timer_list battery_timer;
  118. static int num_cards;
  119. static struct gendisk *mm_gendisk[MM_MAXCARDS];
  120. static void check_batteries(struct cardinfo *card);
  121. static int get_userbit(struct cardinfo *card, int bit)
  122. {
  123. unsigned char led;
  124. led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
  125. return led & bit;
  126. }
  127. static int set_userbit(struct cardinfo *card, int bit, unsigned char state)
  128. {
  129. unsigned char led;
  130. led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
  131. if (state)
  132. led |= bit;
  133. else
  134. led &= ~bit;
  135. writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
  136. return 0;
  137. }
  138. /*
  139. * NOTE: For the power LED, use the LED_POWER_* macros since they differ
  140. */
  141. static void set_led(struct cardinfo *card, int shift, unsigned char state)
  142. {
  143. unsigned char led;
  144. led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
  145. if (state == LED_FLIP)
  146. led ^= (1<<shift);
  147. else {
  148. led &= ~(0x03 << shift);
  149. led |= (state << shift);
  150. }
  151. writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
  152. }
  153. #ifdef MM_DIAG
  154. static void dump_regs(struct cardinfo *card)
  155. {
  156. unsigned char *p;
  157. int i, i1;
  158. p = card->csr_remap;
  159. for (i = 0; i < 8; i++) {
  160. printk(KERN_DEBUG "%p ", p);
  161. for (i1 = 0; i1 < 16; i1++)
  162. printk("%02x ", *p++);
  163. printk("\n");
  164. }
  165. }
  166. #endif
  167. static void dump_dmastat(struct cardinfo *card, unsigned int dmastat)
  168. {
  169. dev_printk(KERN_DEBUG, &card->dev->dev, "DMAstat - ");
  170. if (dmastat & DMASCR_ANY_ERR)
  171. printk(KERN_CONT "ANY_ERR ");
  172. if (dmastat & DMASCR_MBE_ERR)
  173. printk(KERN_CONT "MBE_ERR ");
  174. if (dmastat & DMASCR_PARITY_ERR_REP)
  175. printk(KERN_CONT "PARITY_ERR_REP ");
  176. if (dmastat & DMASCR_PARITY_ERR_DET)
  177. printk(KERN_CONT "PARITY_ERR_DET ");
  178. if (dmastat & DMASCR_SYSTEM_ERR_SIG)
  179. printk(KERN_CONT "SYSTEM_ERR_SIG ");
  180. if (dmastat & DMASCR_TARGET_ABT)
  181. printk(KERN_CONT "TARGET_ABT ");
  182. if (dmastat & DMASCR_MASTER_ABT)
  183. printk(KERN_CONT "MASTER_ABT ");
  184. if (dmastat & DMASCR_CHAIN_COMPLETE)
  185. printk(KERN_CONT "CHAIN_COMPLETE ");
  186. if (dmastat & DMASCR_DMA_COMPLETE)
  187. printk(KERN_CONT "DMA_COMPLETE ");
  188. printk("\n");
  189. }
  190. /*
  191. * Theory of request handling
  192. *
  193. * Each bio is assigned to one mm_dma_desc - which may not be enough FIXME
  194. * We have two pages of mm_dma_desc, holding about 64 descriptors
  195. * each. These are allocated at init time.
  196. * One page is "Ready" and is either full, or can have request added.
  197. * The other page might be "Active", which DMA is happening on it.
  198. *
  199. * Whenever IO on the active page completes, the Ready page is activated
  200. * and the ex-Active page is clean out and made Ready.
  201. * Otherwise the Ready page is only activated when it becomes full.
  202. *
  203. * If a request arrives while both pages a full, it is queued, and b_rdev is
  204. * overloaded to record whether it was a read or a write.
  205. *
  206. * The interrupt handler only polls the device to clear the interrupt.
  207. * The processing of the result is done in a tasklet.
  208. */
  209. static void mm_start_io(struct cardinfo *card)
  210. {
  211. /* we have the lock, we know there is
  212. * no IO active, and we know that card->Active
  213. * is set
  214. */
  215. struct mm_dma_desc *desc;
  216. struct mm_page *page;
  217. int offset;
  218. /* make the last descriptor end the chain */
  219. page = &card->mm_pages[card->Active];
  220. pr_debug("start_io: %d %d->%d\n",
  221. card->Active, page->headcnt, page->cnt - 1);
  222. desc = &page->desc[page->cnt-1];
  223. desc->control_bits |= cpu_to_le32(DMASCR_CHAIN_COMP_EN);
  224. desc->control_bits &= ~cpu_to_le32(DMASCR_CHAIN_EN);
  225. desc->sem_control_bits = desc->control_bits;
  226. if (debug & DEBUG_LED_ON_TRANSFER)
  227. set_led(card, LED_REMOVE, LED_ON);
  228. desc = &page->desc[page->headcnt];
  229. writel(0, card->csr_remap + DMA_PCI_ADDR);
  230. writel(0, card->csr_remap + DMA_PCI_ADDR + 4);
  231. writel(0, card->csr_remap + DMA_LOCAL_ADDR);
  232. writel(0, card->csr_remap + DMA_LOCAL_ADDR + 4);
  233. writel(0, card->csr_remap + DMA_TRANSFER_SIZE);
  234. writel(0, card->csr_remap + DMA_TRANSFER_SIZE + 4);
  235. writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR);
  236. writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR + 4);
  237. offset = ((char *)desc) - ((char *)page->desc);
  238. writel(cpu_to_le32((page->page_dma+offset) & 0xffffffff),
  239. card->csr_remap + DMA_DESCRIPTOR_ADDR);
  240. /* Force the value to u64 before shifting otherwise >> 32 is undefined C
  241. * and on some ports will do nothing ! */
  242. writel(cpu_to_le32(((u64)page->page_dma)>>32),
  243. card->csr_remap + DMA_DESCRIPTOR_ADDR + 4);
  244. /* Go, go, go */
  245. writel(cpu_to_le32(DMASCR_GO | DMASCR_CHAIN_EN | pci_cmds),
  246. card->csr_remap + DMA_STATUS_CTRL);
  247. }
  248. static int add_bio(struct cardinfo *card);
  249. static void activate(struct cardinfo *card)
  250. {
  251. /* if No page is Active, and Ready is
  252. * not empty, then switch Ready page
  253. * to active and start IO.
  254. * Then add any bh's that are available to Ready
  255. */
  256. do {
  257. while (add_bio(card))
  258. ;
  259. if (card->Active == -1 &&
  260. card->mm_pages[card->Ready].cnt > 0) {
  261. card->Active = card->Ready;
  262. card->Ready = 1-card->Ready;
  263. mm_start_io(card);
  264. }
  265. } while (card->Active == -1 && add_bio(card));
  266. }
  267. static inline void reset_page(struct mm_page *page)
  268. {
  269. page->cnt = 0;
  270. page->headcnt = 0;
  271. page->bio = NULL;
  272. page->biotail = &page->bio;
  273. }
  274. /*
  275. * If there is room on Ready page, take
  276. * one bh off list and add it.
  277. * return 1 if there was room, else 0.
  278. */
  279. static int add_bio(struct cardinfo *card)
  280. {
  281. struct mm_page *p;
  282. struct mm_dma_desc *desc;
  283. dma_addr_t dma_handle;
  284. int offset;
  285. struct bio *bio;
  286. struct bio_vec *vec;
  287. int idx;
  288. int rw;
  289. int len;
  290. bio = card->currentbio;
  291. if (!bio && card->bio) {
  292. card->currentbio = card->bio;
  293. card->current_idx = card->bio->bi_idx;
  294. card->current_sector = card->bio->bi_sector;
  295. card->bio = card->bio->bi_next;
  296. if (card->bio == NULL)
  297. card->biotail = &card->bio;
  298. card->currentbio->bi_next = NULL;
  299. return 1;
  300. }
  301. if (!bio)
  302. return 0;
  303. idx = card->current_idx;
  304. rw = bio_rw(bio);
  305. if (card->mm_pages[card->Ready].cnt >= DESC_PER_PAGE)
  306. return 0;
  307. vec = bio_iovec_idx(bio, idx);
  308. len = vec->bv_len;
  309. dma_handle = pci_map_page(card->dev,
  310. vec->bv_page,
  311. vec->bv_offset,
  312. len,
  313. (rw == READ) ?
  314. PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
  315. p = &card->mm_pages[card->Ready];
  316. desc = &p->desc[p->cnt];
  317. p->cnt++;
  318. if (p->bio == NULL)
  319. p->idx = idx;
  320. if ((p->biotail) != &bio->bi_next) {
  321. *(p->biotail) = bio;
  322. p->biotail = &(bio->bi_next);
  323. bio->bi_next = NULL;
  324. }
  325. desc->data_dma_handle = dma_handle;
  326. desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle);
  327. desc->local_addr = cpu_to_le64(card->current_sector << 9);
  328. desc->transfer_size = cpu_to_le32(len);
  329. offset = (((char *)&desc->sem_control_bits) - ((char *)p->desc));
  330. desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset));
  331. desc->zero1 = desc->zero2 = 0;
  332. offset = (((char *)(desc+1)) - ((char *)p->desc));
  333. desc->next_desc_addr = cpu_to_le64(p->page_dma+offset);
  334. desc->control_bits = cpu_to_le32(DMASCR_GO|DMASCR_ERR_INT_EN|
  335. DMASCR_PARITY_INT_EN|
  336. DMASCR_CHAIN_EN |
  337. DMASCR_SEM_EN |
  338. pci_cmds);
  339. if (rw == WRITE)
  340. desc->control_bits |= cpu_to_le32(DMASCR_TRANSFER_READ);
  341. desc->sem_control_bits = desc->control_bits;
  342. card->current_sector += (len >> 9);
  343. idx++;
  344. card->current_idx = idx;
  345. if (idx >= bio->bi_vcnt)
  346. card->currentbio = NULL;
  347. return 1;
  348. }
  349. static void process_page(unsigned long data)
  350. {
  351. /* check if any of the requests in the page are DMA_COMPLETE,
  352. * and deal with them appropriately.
  353. * If we find a descriptor without DMA_COMPLETE in the semaphore, then
  354. * dma must have hit an error on that descriptor, so use dma_status
  355. * instead and assume that all following descriptors must be re-tried.
  356. */
  357. struct mm_page *page;
  358. struct bio *return_bio = NULL;
  359. struct cardinfo *card = (struct cardinfo *)data;
  360. unsigned int dma_status = card->dma_status;
  361. spin_lock_bh(&card->lock);
  362. if (card->Active < 0)
  363. goto out_unlock;
  364. page = &card->mm_pages[card->Active];
  365. while (page->headcnt < page->cnt) {
  366. struct bio *bio = page->bio;
  367. struct mm_dma_desc *desc = &page->desc[page->headcnt];
  368. int control = le32_to_cpu(desc->sem_control_bits);
  369. int last = 0;
  370. int idx;
  371. if (!(control & DMASCR_DMA_COMPLETE)) {
  372. control = dma_status;
  373. last = 1;
  374. }
  375. page->headcnt++;
  376. idx = page->idx;
  377. page->idx++;
  378. if (page->idx >= bio->bi_vcnt) {
  379. page->bio = bio->bi_next;
  380. if (page->bio)
  381. page->idx = page->bio->bi_idx;
  382. }
  383. pci_unmap_page(card->dev, desc->data_dma_handle,
  384. bio_iovec_idx(bio, idx)->bv_len,
  385. (control & DMASCR_TRANSFER_READ) ?
  386. PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
  387. if (control & DMASCR_HARD_ERROR) {
  388. /* error */
  389. clear_bit(BIO_UPTODATE, &bio->bi_flags);
  390. dev_printk(KERN_WARNING, &card->dev->dev,
  391. "I/O error on sector %d/%d\n",
  392. le32_to_cpu(desc->local_addr)>>9,
  393. le32_to_cpu(desc->transfer_size));
  394. dump_dmastat(card, control);
  395. } else if ((bio->bi_rw & REQ_WRITE) &&
  396. le32_to_cpu(desc->local_addr) >> 9 ==
  397. card->init_size) {
  398. card->init_size += le32_to_cpu(desc->transfer_size) >> 9;
  399. if (card->init_size >> 1 >= card->mm_size) {
  400. dev_printk(KERN_INFO, &card->dev->dev,
  401. "memory now initialised\n");
  402. set_userbit(card, MEMORY_INITIALIZED, 1);
  403. }
  404. }
  405. if (bio != page->bio) {
  406. bio->bi_next = return_bio;
  407. return_bio = bio;
  408. }
  409. if (last)
  410. break;
  411. }
  412. if (debug & DEBUG_LED_ON_TRANSFER)
  413. set_led(card, LED_REMOVE, LED_OFF);
  414. if (card->check_batteries) {
  415. card->check_batteries = 0;
  416. check_batteries(card);
  417. }
  418. if (page->headcnt >= page->cnt) {
  419. reset_page(page);
  420. card->Active = -1;
  421. activate(card);
  422. } else {
  423. /* haven't finished with this one yet */
  424. pr_debug("do some more\n");
  425. mm_start_io(card);
  426. }
  427. out_unlock:
  428. spin_unlock_bh(&card->lock);
  429. while (return_bio) {
  430. struct bio *bio = return_bio;
  431. return_bio = bio->bi_next;
  432. bio->bi_next = NULL;
  433. bio_endio(bio, 0);
  434. }
  435. }
  436. struct mm_plug_cb {
  437. struct blk_plug_cb cb;
  438. struct cardinfo *card;
  439. };
  440. static void mm_unplug(struct blk_plug_cb *cb)
  441. {
  442. struct mm_plug_cb *mmcb = container_of(cb, struct mm_plug_cb, cb);
  443. spin_lock_irq(&mmcb->card->lock);
  444. activate(mmcb->card);
  445. spin_unlock_irq(&mmcb->card->lock);
  446. kfree(mmcb);
  447. }
  448. static int mm_check_plugged(struct cardinfo *card)
  449. {
  450. struct blk_plug *plug = current->plug;
  451. struct mm_plug_cb *mmcb;
  452. if (!plug)
  453. return 0;
  454. list_for_each_entry(mmcb, &plug->cb_list, cb.list) {
  455. if (mmcb->cb.callback == mm_unplug && mmcb->card == card)
  456. return 1;
  457. }
  458. /* Not currently on the callback list */
  459. mmcb = kmalloc(sizeof(*mmcb), GFP_ATOMIC);
  460. if (!mmcb)
  461. return 0;
  462. mmcb->card = card;
  463. mmcb->cb.callback = mm_unplug;
  464. list_add(&mmcb->cb.list, &plug->cb_list);
  465. return 1;
  466. }
  467. static void mm_make_request(struct request_queue *q, struct bio *bio)
  468. {
  469. struct cardinfo *card = q->queuedata;
  470. pr_debug("mm_make_request %llu %u\n",
  471. (unsigned long long)bio->bi_sector, bio->bi_size);
  472. spin_lock_irq(&card->lock);
  473. *card->biotail = bio;
  474. bio->bi_next = NULL;
  475. card->biotail = &bio->bi_next;
  476. if (bio->bi_rw & REQ_SYNC || !mm_check_plugged(card))
  477. activate(card);
  478. spin_unlock_irq(&card->lock);
  479. return;
  480. }
  481. static irqreturn_t mm_interrupt(int irq, void *__card)
  482. {
  483. struct cardinfo *card = (struct cardinfo *) __card;
  484. unsigned int dma_status;
  485. unsigned short cfg_status;
  486. HW_TRACE(0x30);
  487. dma_status = le32_to_cpu(readl(card->csr_remap + DMA_STATUS_CTRL));
  488. if (!(dma_status & (DMASCR_ERROR_MASK | DMASCR_CHAIN_COMPLETE))) {
  489. /* interrupt wasn't for me ... */
  490. return IRQ_NONE;
  491. }
  492. /* clear COMPLETION interrupts */
  493. if (card->flags & UM_FLAG_NO_BYTE_STATUS)
  494. writel(cpu_to_le32(DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE),
  495. card->csr_remap + DMA_STATUS_CTRL);
  496. else
  497. writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16,
  498. card->csr_remap + DMA_STATUS_CTRL + 2);
  499. /* log errors and clear interrupt status */
  500. if (dma_status & DMASCR_ANY_ERR) {
  501. unsigned int data_log1, data_log2;
  502. unsigned int addr_log1, addr_log2;
  503. unsigned char stat, count, syndrome, check;
  504. stat = readb(card->csr_remap + MEMCTRLCMD_ERRSTATUS);
  505. data_log1 = le32_to_cpu(readl(card->csr_remap +
  506. ERROR_DATA_LOG));
  507. data_log2 = le32_to_cpu(readl(card->csr_remap +
  508. ERROR_DATA_LOG + 4));
  509. addr_log1 = le32_to_cpu(readl(card->csr_remap +
  510. ERROR_ADDR_LOG));
  511. addr_log2 = readb(card->csr_remap + ERROR_ADDR_LOG + 4);
  512. count = readb(card->csr_remap + ERROR_COUNT);
  513. syndrome = readb(card->csr_remap + ERROR_SYNDROME);
  514. check = readb(card->csr_remap + ERROR_CHECK);
  515. dump_dmastat(card, dma_status);
  516. if (stat & 0x01)
  517. dev_printk(KERN_ERR, &card->dev->dev,
  518. "Memory access error detected (err count %d)\n",
  519. count);
  520. if (stat & 0x02)
  521. dev_printk(KERN_ERR, &card->dev->dev,
  522. "Multi-bit EDC error\n");
  523. dev_printk(KERN_ERR, &card->dev->dev,
  524. "Fault Address 0x%02x%08x, Fault Data 0x%08x%08x\n",
  525. addr_log2, addr_log1, data_log2, data_log1);
  526. dev_printk(KERN_ERR, &card->dev->dev,
  527. "Fault Check 0x%02x, Fault Syndrome 0x%02x\n",
  528. check, syndrome);
  529. writeb(0, card->csr_remap + ERROR_COUNT);
  530. }
  531. if (dma_status & DMASCR_PARITY_ERR_REP) {
  532. dev_printk(KERN_ERR, &card->dev->dev,
  533. "PARITY ERROR REPORTED\n");
  534. pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
  535. pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
  536. }
  537. if (dma_status & DMASCR_PARITY_ERR_DET) {
  538. dev_printk(KERN_ERR, &card->dev->dev,
  539. "PARITY ERROR DETECTED\n");
  540. pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
  541. pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
  542. }
  543. if (dma_status & DMASCR_SYSTEM_ERR_SIG) {
  544. dev_printk(KERN_ERR, &card->dev->dev, "SYSTEM ERROR\n");
  545. pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
  546. pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
  547. }
  548. if (dma_status & DMASCR_TARGET_ABT) {
  549. dev_printk(KERN_ERR, &card->dev->dev, "TARGET ABORT\n");
  550. pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
  551. pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
  552. }
  553. if (dma_status & DMASCR_MASTER_ABT) {
  554. dev_printk(KERN_ERR, &card->dev->dev, "MASTER ABORT\n");
  555. pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
  556. pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
  557. }
  558. /* and process the DMA descriptors */
  559. card->dma_status = dma_status;
  560. tasklet_schedule(&card->tasklet);
  561. HW_TRACE(0x36);
  562. return IRQ_HANDLED;
  563. }
  564. /*
  565. * If both batteries are good, no LED
  566. * If either battery has been warned, solid LED
  567. * If both batteries are bad, flash the LED quickly
  568. * If either battery is bad, flash the LED semi quickly
  569. */
  570. static void set_fault_to_battery_status(struct cardinfo *card)
  571. {
  572. if (card->battery[0].good && card->battery[1].good)
  573. set_led(card, LED_FAULT, LED_OFF);
  574. else if (card->battery[0].warned || card->battery[1].warned)
  575. set_led(card, LED_FAULT, LED_ON);
  576. else if (!card->battery[0].good && !card->battery[1].good)
  577. set_led(card, LED_FAULT, LED_FLASH_7_0);
  578. else
  579. set_led(card, LED_FAULT, LED_FLASH_3_5);
  580. }
  581. static void init_battery_timer(void);
  582. static int check_battery(struct cardinfo *card, int battery, int status)
  583. {
  584. if (status != card->battery[battery].good) {
  585. card->battery[battery].good = !card->battery[battery].good;
  586. card->battery[battery].last_change = jiffies;
  587. if (card->battery[battery].good) {
  588. dev_printk(KERN_ERR, &card->dev->dev,
  589. "Battery %d now good\n", battery + 1);
  590. card->battery[battery].warned = 0;
  591. } else
  592. dev_printk(KERN_ERR, &card->dev->dev,
  593. "Battery %d now FAILED\n", battery + 1);
  594. return 1;
  595. } else if (!card->battery[battery].good &&
  596. !card->battery[battery].warned &&
  597. time_after_eq(jiffies, card->battery[battery].last_change +
  598. (HZ * 60 * 60 * 5))) {
  599. dev_printk(KERN_ERR, &card->dev->dev,
  600. "Battery %d still FAILED after 5 hours\n", battery + 1);
  601. card->battery[battery].warned = 1;
  602. return 1;
  603. }
  604. return 0;
  605. }
  606. static void check_batteries(struct cardinfo *card)
  607. {
  608. /* NOTE: this must *never* be called while the card
  609. * is doing (bus-to-card) DMA, or you will need the
  610. * reset switch
  611. */
  612. unsigned char status;
  613. int ret1, ret2;
  614. status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
  615. if (debug & DEBUG_BATTERY_POLLING)
  616. dev_printk(KERN_DEBUG, &card->dev->dev,
  617. "checking battery status, 1 = %s, 2 = %s\n",
  618. (status & BATTERY_1_FAILURE) ? "FAILURE" : "OK",
  619. (status & BATTERY_2_FAILURE) ? "FAILURE" : "OK");
  620. ret1 = check_battery(card, 0, !(status & BATTERY_1_FAILURE));
  621. ret2 = check_battery(card, 1, !(status & BATTERY_2_FAILURE));
  622. if (ret1 || ret2)
  623. set_fault_to_battery_status(card);
  624. }
  625. static void check_all_batteries(unsigned long ptr)
  626. {
  627. int i;
  628. for (i = 0; i < num_cards; i++)
  629. if (!(cards[i].flags & UM_FLAG_NO_BATT)) {
  630. struct cardinfo *card = &cards[i];
  631. spin_lock_bh(&card->lock);
  632. if (card->Active >= 0)
  633. card->check_batteries = 1;
  634. else
  635. check_batteries(card);
  636. spin_unlock_bh(&card->lock);
  637. }
  638. init_battery_timer();
  639. }
  640. static void init_battery_timer(void)
  641. {
  642. init_timer(&battery_timer);
  643. battery_timer.function = check_all_batteries;
  644. battery_timer.expires = jiffies + (HZ * 60);
  645. add_timer(&battery_timer);
  646. }
  647. static void del_battery_timer(void)
  648. {
  649. del_timer(&battery_timer);
  650. }
  651. /*
  652. * Note no locks taken out here. In a worst case scenario, we could drop
  653. * a chunk of system memory. But that should never happen, since validation
  654. * happens at open or mount time, when locks are held.
  655. *
  656. * That's crap, since doing that while some partitions are opened
  657. * or mounted will give you really nasty results.
  658. */
  659. static int mm_revalidate(struct gendisk *disk)
  660. {
  661. struct cardinfo *card = disk->private_data;
  662. set_capacity(disk, card->mm_size << 1);
  663. return 0;
  664. }
  665. static int mm_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  666. {
  667. struct cardinfo *card = bdev->bd_disk->private_data;
  668. int size = card->mm_size * (1024 / MM_HARDSECT);
  669. /*
  670. * get geometry: we have to fake one... trim the size to a
  671. * multiple of 2048 (1M): tell we have 32 sectors, 64 heads,
  672. * whatever cylinders.
  673. */
  674. geo->heads = 64;
  675. geo->sectors = 32;
  676. geo->cylinders = size / (geo->heads * geo->sectors);
  677. return 0;
  678. }
  679. static const struct block_device_operations mm_fops = {
  680. .owner = THIS_MODULE,
  681. .getgeo = mm_getgeo,
  682. .revalidate_disk = mm_revalidate,
  683. };
  684. static int __devinit mm_pci_probe(struct pci_dev *dev,
  685. const struct pci_device_id *id)
  686. {
  687. int ret = -ENODEV;
  688. struct cardinfo *card = &cards[num_cards];
  689. unsigned char mem_present;
  690. unsigned char batt_status;
  691. unsigned int saved_bar, data;
  692. unsigned long csr_base;
  693. unsigned long csr_len;
  694. int magic_number;
  695. static int printed_version;
  696. if (!printed_version++)
  697. printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n");
  698. ret = pci_enable_device(dev);
  699. if (ret)
  700. return ret;
  701. pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF8);
  702. pci_set_master(dev);
  703. card->dev = dev;
  704. csr_base = pci_resource_start(dev, 0);
  705. csr_len = pci_resource_len(dev, 0);
  706. if (!csr_base || !csr_len)
  707. return -ENODEV;
  708. dev_printk(KERN_INFO, &dev->dev,
  709. "Micro Memory(tm) controller found (PCI Mem Module (Battery Backup))\n");
  710. if (pci_set_dma_mask(dev, DMA_BIT_MASK(64)) &&
  711. pci_set_dma_mask(dev, DMA_BIT_MASK(32))) {
  712. dev_printk(KERN_WARNING, &dev->dev, "NO suitable DMA found\n");
  713. return -ENOMEM;
  714. }
  715. ret = pci_request_regions(dev, DRIVER_NAME);
  716. if (ret) {
  717. dev_printk(KERN_ERR, &card->dev->dev,
  718. "Unable to request memory region\n");
  719. goto failed_req_csr;
  720. }
  721. card->csr_remap = ioremap_nocache(csr_base, csr_len);
  722. if (!card->csr_remap) {
  723. dev_printk(KERN_ERR, &card->dev->dev,
  724. "Unable to remap memory region\n");
  725. ret = -ENOMEM;
  726. goto failed_remap_csr;
  727. }
  728. dev_printk(KERN_INFO, &card->dev->dev,
  729. "CSR 0x%08lx -> 0x%p (0x%lx)\n",
  730. csr_base, card->csr_remap, csr_len);
  731. switch (card->dev->device) {
  732. case 0x5415:
  733. card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG;
  734. magic_number = 0x59;
  735. break;
  736. case 0x5425:
  737. card->flags |= UM_FLAG_NO_BYTE_STATUS;
  738. magic_number = 0x5C;
  739. break;
  740. case 0x6155:
  741. card->flags |= UM_FLAG_NO_BYTE_STATUS |
  742. UM_FLAG_NO_BATTREG | UM_FLAG_NO_BATT;
  743. magic_number = 0x99;
  744. break;
  745. default:
  746. magic_number = 0x100;
  747. break;
  748. }
  749. if (readb(card->csr_remap + MEMCTRLSTATUS_MAGIC) != magic_number) {
  750. dev_printk(KERN_ERR, &card->dev->dev, "Magic number invalid\n");
  751. ret = -ENOMEM;
  752. goto failed_magic;
  753. }
  754. card->mm_pages[0].desc = pci_alloc_consistent(card->dev,
  755. PAGE_SIZE * 2,
  756. &card->mm_pages[0].page_dma);
  757. card->mm_pages[1].desc = pci_alloc_consistent(card->dev,
  758. PAGE_SIZE * 2,
  759. &card->mm_pages[1].page_dma);
  760. if (card->mm_pages[0].desc == NULL ||
  761. card->mm_pages[1].desc == NULL) {
  762. dev_printk(KERN_ERR, &card->dev->dev, "alloc failed\n");
  763. goto failed_alloc;
  764. }
  765. reset_page(&card->mm_pages[0]);
  766. reset_page(&card->mm_pages[1]);
  767. card->Ready = 0; /* page 0 is ready */
  768. card->Active = -1; /* no page is active */
  769. card->bio = NULL;
  770. card->biotail = &card->bio;
  771. card->queue = blk_alloc_queue(GFP_KERNEL);
  772. if (!card->queue)
  773. goto failed_alloc;
  774. blk_queue_make_request(card->queue, mm_make_request);
  775. card->queue->queue_lock = &card->lock;
  776. card->queue->queuedata = card;
  777. tasklet_init(&card->tasklet, process_page, (unsigned long)card);
  778. card->check_batteries = 0;
  779. mem_present = readb(card->csr_remap + MEMCTRLSTATUS_MEMORY);
  780. switch (mem_present) {
  781. case MEM_128_MB:
  782. card->mm_size = 1024 * 128;
  783. break;
  784. case MEM_256_MB:
  785. card->mm_size = 1024 * 256;
  786. break;
  787. case MEM_512_MB:
  788. card->mm_size = 1024 * 512;
  789. break;
  790. case MEM_1_GB:
  791. card->mm_size = 1024 * 1024;
  792. break;
  793. case MEM_2_GB:
  794. card->mm_size = 1024 * 2048;
  795. break;
  796. default:
  797. card->mm_size = 0;
  798. break;
  799. }
  800. /* Clear the LED's we control */
  801. set_led(card, LED_REMOVE, LED_OFF);
  802. set_led(card, LED_FAULT, LED_OFF);
  803. batt_status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
  804. card->battery[0].good = !(batt_status & BATTERY_1_FAILURE);
  805. card->battery[1].good = !(batt_status & BATTERY_2_FAILURE);
  806. card->battery[0].last_change = card->battery[1].last_change = jiffies;
  807. if (card->flags & UM_FLAG_NO_BATT)
  808. dev_printk(KERN_INFO, &card->dev->dev,
  809. "Size %d KB\n", card->mm_size);
  810. else {
  811. dev_printk(KERN_INFO, &card->dev->dev,
  812. "Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n",
  813. card->mm_size,
  814. batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled",
  815. card->battery[0].good ? "OK" : "FAILURE",
  816. batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled",
  817. card->battery[1].good ? "OK" : "FAILURE");
  818. set_fault_to_battery_status(card);
  819. }
  820. pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &saved_bar);
  821. data = 0xffffffff;
  822. pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, data);
  823. pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &data);
  824. pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, saved_bar);
  825. data &= 0xfffffff0;
  826. data = ~data;
  827. data += 1;
  828. if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, DRIVER_NAME,
  829. card)) {
  830. dev_printk(KERN_ERR, &card->dev->dev,
  831. "Unable to allocate IRQ\n");
  832. ret = -ENODEV;
  833. goto failed_req_irq;
  834. }
  835. dev_printk(KERN_INFO, &card->dev->dev,
  836. "Window size %d bytes, IRQ %d\n", data, dev->irq);
  837. spin_lock_init(&card->lock);
  838. pci_set_drvdata(dev, card);
  839. if (pci_write_cmd != 0x0F) /* If not Memory Write & Invalidate */
  840. pci_write_cmd = 0x07; /* then Memory Write command */
  841. if (pci_write_cmd & 0x08) { /* use Memory Write and Invalidate */
  842. unsigned short cfg_command;
  843. pci_read_config_word(dev, PCI_COMMAND, &cfg_command);
  844. cfg_command |= 0x10; /* Memory Write & Invalidate Enable */
  845. pci_write_config_word(dev, PCI_COMMAND, cfg_command);
  846. }
  847. pci_cmds = (pci_read_cmd << 28) | (pci_write_cmd << 24);
  848. num_cards++;
  849. if (!get_userbit(card, MEMORY_INITIALIZED)) {
  850. dev_printk(KERN_INFO, &card->dev->dev,
  851. "memory NOT initialized. Consider over-writing whole device.\n");
  852. card->init_size = 0;
  853. } else {
  854. dev_printk(KERN_INFO, &card->dev->dev,
  855. "memory already initialized\n");
  856. card->init_size = card->mm_size;
  857. }
  858. /* Enable ECC */
  859. writeb(EDC_STORE_CORRECT, card->csr_remap + MEMCTRLCMD_ERRCTRL);
  860. return 0;
  861. failed_req_irq:
  862. failed_alloc:
  863. if (card->mm_pages[0].desc)
  864. pci_free_consistent(card->dev, PAGE_SIZE*2,
  865. card->mm_pages[0].desc,
  866. card->mm_pages[0].page_dma);
  867. if (card->mm_pages[1].desc)
  868. pci_free_consistent(card->dev, PAGE_SIZE*2,
  869. card->mm_pages[1].desc,
  870. card->mm_pages[1].page_dma);
  871. failed_magic:
  872. iounmap(card->csr_remap);
  873. failed_remap_csr:
  874. pci_release_regions(dev);
  875. failed_req_csr:
  876. return ret;
  877. }
  878. static void mm_pci_remove(struct pci_dev *dev)
  879. {
  880. struct cardinfo *card = pci_get_drvdata(dev);
  881. tasklet_kill(&card->tasklet);
  882. free_irq(dev->irq, card);
  883. iounmap(card->csr_remap);
  884. if (card->mm_pages[0].desc)
  885. pci_free_consistent(card->dev, PAGE_SIZE*2,
  886. card->mm_pages[0].desc,
  887. card->mm_pages[0].page_dma);
  888. if (card->mm_pages[1].desc)
  889. pci_free_consistent(card->dev, PAGE_SIZE*2,
  890. card->mm_pages[1].desc,
  891. card->mm_pages[1].page_dma);
  892. blk_cleanup_queue(card->queue);
  893. pci_release_regions(dev);
  894. pci_disable_device(dev);
  895. }
  896. static const struct pci_device_id mm_pci_ids[] = {
  897. {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5415CN)},
  898. {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5425CN)},
  899. {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_6155)},
  900. {
  901. .vendor = 0x8086,
  902. .device = 0xB555,
  903. .subvendor = 0x1332,
  904. .subdevice = 0x5460,
  905. .class = 0x050000,
  906. .class_mask = 0,
  907. }, { /* end: all zeroes */ }
  908. };
  909. MODULE_DEVICE_TABLE(pci, mm_pci_ids);
  910. static struct pci_driver mm_pci_driver = {
  911. .name = DRIVER_NAME,
  912. .id_table = mm_pci_ids,
  913. .probe = mm_pci_probe,
  914. .remove = mm_pci_remove,
  915. };
  916. static int __init mm_init(void)
  917. {
  918. int retval, i;
  919. int err;
  920. retval = pci_register_driver(&mm_pci_driver);
  921. if (retval)
  922. return -ENOMEM;
  923. err = major_nr = register_blkdev(0, DRIVER_NAME);
  924. if (err < 0) {
  925. pci_unregister_driver(&mm_pci_driver);
  926. return -EIO;
  927. }
  928. for (i = 0; i < num_cards; i++) {
  929. mm_gendisk[i] = alloc_disk(1 << MM_SHIFT);
  930. if (!mm_gendisk[i])
  931. goto out;
  932. }
  933. for (i = 0; i < num_cards; i++) {
  934. struct gendisk *disk = mm_gendisk[i];
  935. sprintf(disk->disk_name, "umem%c", 'a'+i);
  936. spin_lock_init(&cards[i].lock);
  937. disk->major = major_nr;
  938. disk->first_minor = i << MM_SHIFT;
  939. disk->fops = &mm_fops;
  940. disk->private_data = &cards[i];
  941. disk->queue = cards[i].queue;
  942. set_capacity(disk, cards[i].mm_size << 1);
  943. add_disk(disk);
  944. }
  945. init_battery_timer();
  946. printk(KERN_INFO "MM: desc_per_page = %ld\n", DESC_PER_PAGE);
  947. /* printk("mm_init: Done. 10-19-01 9:00\n"); */
  948. return 0;
  949. out:
  950. pci_unregister_driver(&mm_pci_driver);
  951. unregister_blkdev(major_nr, DRIVER_NAME);
  952. while (i--)
  953. put_disk(mm_gendisk[i]);
  954. return -ENOMEM;
  955. }
  956. static void __exit mm_cleanup(void)
  957. {
  958. int i;
  959. del_battery_timer();
  960. for (i = 0; i < num_cards ; i++) {
  961. del_gendisk(mm_gendisk[i]);
  962. put_disk(mm_gendisk[i]);
  963. }
  964. pci_unregister_driver(&mm_pci_driver);
  965. unregister_blkdev(major_nr, DRIVER_NAME);
  966. }
  967. module_init(mm_init);
  968. module_exit(mm_cleanup);
  969. MODULE_AUTHOR(DRIVER_AUTHOR);
  970. MODULE_DESCRIPTION(DRIVER_DESC);
  971. MODULE_LICENSE("GPL");