ahci_platform.c 7.7 KB

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  1. /*
  2. * AHCI SATA platform driver
  3. *
  4. * Copyright 2004-2005 Red Hat, Inc.
  5. * Jeff Garzik <jgarzik@pobox.com>
  6. * Copyright 2010 MontaVista Software, LLC.
  7. * Anton Vorontsov <avorontsov@ru.mvista.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2, or (at your option)
  12. * any later version.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/gfp.h>
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/device.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/libata.h>
  22. #include <linux/ahci_platform.h>
  23. #include <linux/pm_runtime.h>
  24. #include "ahci.h"
  25. enum ahci_type {
  26. AHCI, /* standard platform ahci */
  27. IMX53_AHCI, /* ahci on i.mx53 */
  28. STRICT_AHCI, /* delayed DMA engine start */
  29. };
  30. static struct platform_device_id ahci_devtype[] = {
  31. {
  32. .name = "ahci",
  33. .driver_data = AHCI,
  34. }, {
  35. .name = "imx53-ahci",
  36. .driver_data = IMX53_AHCI,
  37. }, {
  38. .name = "strict-ahci",
  39. .driver_data = STRICT_AHCI,
  40. }, {
  41. /* sentinel */
  42. }
  43. };
  44. MODULE_DEVICE_TABLE(platform, ahci_devtype);
  45. static const struct ata_port_info ahci_port_info[] = {
  46. /* by features */
  47. [AHCI] = {
  48. .flags = AHCI_FLAG_COMMON,
  49. .pio_mask = ATA_PIO4,
  50. .udma_mask = ATA_UDMA6,
  51. .port_ops = &ahci_ops,
  52. },
  53. [IMX53_AHCI] = {
  54. .flags = AHCI_FLAG_COMMON,
  55. .pio_mask = ATA_PIO4,
  56. .udma_mask = ATA_UDMA6,
  57. .port_ops = &ahci_pmp_retry_srst_ops,
  58. },
  59. [STRICT_AHCI] = {
  60. AHCI_HFLAGS (AHCI_HFLAG_DELAY_ENGINE),
  61. .flags = AHCI_FLAG_COMMON,
  62. .pio_mask = ATA_PIO4,
  63. .udma_mask = ATA_UDMA6,
  64. .port_ops = &ahci_ops,
  65. },
  66. };
  67. static struct scsi_host_template ahci_platform_sht = {
  68. AHCI_SHT("ahci_platform"),
  69. };
  70. static int __devinit ahci_probe(struct platform_device *pdev)
  71. {
  72. struct device *dev = &pdev->dev;
  73. struct ahci_platform_data *pdata = dev_get_platdata(dev);
  74. const struct platform_device_id *id = platform_get_device_id(pdev);
  75. struct ata_port_info pi = ahci_port_info[id ? id->driver_data : 0];
  76. const struct ata_port_info *ppi[] = { &pi, NULL };
  77. struct ahci_host_priv *hpriv;
  78. struct ata_host *host;
  79. struct resource *mem;
  80. int irq;
  81. int n_ports;
  82. int i;
  83. int rc;
  84. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  85. if (!mem) {
  86. dev_err(dev, "no mmio space\n");
  87. return -EINVAL;
  88. }
  89. irq = platform_get_irq(pdev, 0);
  90. if (irq <= 0) {
  91. dev_err(dev, "no irq\n");
  92. return -EINVAL;
  93. }
  94. if (pdata && pdata->ata_port_info)
  95. pi = *pdata->ata_port_info;
  96. hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
  97. if (!hpriv) {
  98. dev_err(dev, "can't alloc ahci_host_priv\n");
  99. return -ENOMEM;
  100. }
  101. hpriv->flags |= (unsigned long)pi.private_data;
  102. hpriv->mmio = devm_ioremap(dev, mem->start, resource_size(mem));
  103. if (!hpriv->mmio) {
  104. dev_err(dev, "can't map %pR\n", mem);
  105. return -ENOMEM;
  106. }
  107. /*
  108. * Some platforms might need to prepare for mmio region access,
  109. * which could be done in the following init call. So, the mmio
  110. * region shouldn't be accessed before init (if provided) has
  111. * returned successfully.
  112. */
  113. if (pdata && pdata->init) {
  114. rc = pdata->init(dev, hpriv->mmio);
  115. if (rc)
  116. return rc;
  117. }
  118. ahci_save_initial_config(dev, hpriv,
  119. pdata ? pdata->force_port_map : 0,
  120. pdata ? pdata->mask_port_map : 0);
  121. /* prepare host */
  122. if (hpriv->cap & HOST_CAP_NCQ)
  123. pi.flags |= ATA_FLAG_NCQ;
  124. if (hpriv->cap & HOST_CAP_PMP)
  125. pi.flags |= ATA_FLAG_PMP;
  126. ahci_set_em_messages(hpriv, &pi);
  127. /* CAP.NP sometimes indicate the index of the last enabled
  128. * port, at other times, that of the last possible port, so
  129. * determining the maximum port number requires looking at
  130. * both CAP.NP and port_map.
  131. */
  132. n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
  133. host = ata_host_alloc_pinfo(dev, ppi, n_ports);
  134. if (!host) {
  135. rc = -ENOMEM;
  136. goto err0;
  137. }
  138. host->private_data = hpriv;
  139. if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss)
  140. host->flags |= ATA_HOST_PARALLEL_SCAN;
  141. else
  142. printk(KERN_INFO "ahci: SSS flag set, parallel bus scan disabled\n");
  143. if (pi.flags & ATA_FLAG_EM)
  144. ahci_reset_em(host);
  145. for (i = 0; i < host->n_ports; i++) {
  146. struct ata_port *ap = host->ports[i];
  147. ata_port_desc(ap, "mmio %pR", mem);
  148. ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
  149. /* set enclosure management message type */
  150. if (ap->flags & ATA_FLAG_EM)
  151. ap->em_message_type = hpriv->em_msg_type;
  152. /* disabled/not-implemented port */
  153. if (!(hpriv->port_map & (1 << i)))
  154. ap->ops = &ata_dummy_port_ops;
  155. }
  156. rc = ahci_reset_controller(host);
  157. if (rc)
  158. goto err0;
  159. ahci_init_controller(host);
  160. ahci_print_info(host, "platform");
  161. rc = ata_host_activate(host, irq, ahci_interrupt, IRQF_SHARED,
  162. &ahci_platform_sht);
  163. if (rc)
  164. goto err0;
  165. rc = pm_runtime_set_active(dev);
  166. if (rc) {
  167. dev_warn(dev, "Unable to set runtime pm active err=%d\n", rc);
  168. } else {
  169. pm_runtime_enable(dev);
  170. pm_runtime_forbid(dev);
  171. }
  172. return 0;
  173. err0:
  174. if (pdata && pdata->exit)
  175. pdata->exit(dev);
  176. return rc;
  177. }
  178. static int __devexit ahci_remove(struct platform_device *pdev)
  179. {
  180. struct device *dev = &pdev->dev;
  181. struct ahci_platform_data *pdata = dev_get_platdata(dev);
  182. struct ata_host *host = dev_get_drvdata(dev);
  183. ata_host_detach(host);
  184. if (pdata && pdata->exit)
  185. pdata->exit(dev);
  186. return 0;
  187. }
  188. #ifdef CONFIG_PM
  189. static int ahci_suspend(struct device *dev)
  190. {
  191. struct ahci_platform_data *pdata = dev_get_platdata(dev);
  192. struct ata_host *host = dev_get_drvdata(dev);
  193. struct ahci_host_priv *hpriv = host->private_data;
  194. void __iomem *mmio = hpriv->mmio;
  195. u32 ctl;
  196. int rc;
  197. if (pm_runtime_suspended(dev))
  198. return 0;
  199. if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
  200. dev_err(dev, "firmware update required for suspend/resume\n");
  201. return -EIO;
  202. }
  203. /*
  204. * AHCI spec rev1.1 section 8.3.3:
  205. * Software must disable interrupts prior to requesting a
  206. * transition of the HBA to D3 state.
  207. */
  208. ctl = readl(mmio + HOST_CTL);
  209. ctl &= ~HOST_IRQ_EN;
  210. writel(ctl, mmio + HOST_CTL);
  211. readl(mmio + HOST_CTL); /* flush */
  212. rc = ata_host_suspend(host, PMSG_SUSPEND);
  213. if (rc)
  214. return rc;
  215. if (pdata && pdata->suspend)
  216. return pdata->suspend(dev);
  217. return 0;
  218. }
  219. static int ahci_resume_common(struct device *dev)
  220. {
  221. struct ahci_platform_data *pdata = dev_get_platdata(dev);
  222. struct ata_host *host = dev_get_drvdata(dev);
  223. int rc;
  224. if (pdata && pdata->resume) {
  225. rc = pdata->resume(dev);
  226. if (rc)
  227. return rc;
  228. }
  229. if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
  230. rc = ahci_reset_controller(host);
  231. if (rc)
  232. return rc;
  233. ahci_init_controller(host);
  234. }
  235. ata_host_resume(host);
  236. return 0;
  237. }
  238. static int ahci_resume(struct device *dev)
  239. {
  240. int rc;
  241. rc = ahci_resume_common(dev);
  242. if (!rc) {
  243. pm_runtime_disable(dev);
  244. pm_runtime_set_active(dev);
  245. pm_runtime_enable(dev);
  246. }
  247. return rc;
  248. }
  249. static struct dev_pm_ops ahci_pm_ops = {
  250. .suspend = &ahci_suspend,
  251. .resume = &ahci_resume,
  252. .runtime_suspend = &ahci_suspend,
  253. .runtime_resume = &ahci_resume_common,
  254. };
  255. #endif
  256. static const struct of_device_id ahci_of_match[] = {
  257. { .compatible = "calxeda,hb-ahci", },
  258. { .compatible = "snps,spear-ahci", },
  259. { .compatible = "qcom,msm-ahci", },
  260. {},
  261. };
  262. MODULE_DEVICE_TABLE(of, ahci_of_match);
  263. static struct platform_driver ahci_driver = {
  264. .probe = ahci_probe,
  265. .remove = __devexit_p(ahci_remove),
  266. .driver = {
  267. .name = "ahci",
  268. .owner = THIS_MODULE,
  269. .of_match_table = ahci_of_match,
  270. #ifdef CONFIG_PM
  271. .pm = &ahci_pm_ops,
  272. #endif
  273. },
  274. .id_table = ahci_devtype,
  275. };
  276. static int __init ahci_init(void)
  277. {
  278. return platform_driver_register(&ahci_driver);
  279. }
  280. module_init(ahci_init);
  281. static void __exit ahci_exit(void)
  282. {
  283. platform_driver_unregister(&ahci_driver);
  284. }
  285. module_exit(ahci_exit);
  286. MODULE_DESCRIPTION("AHCI SATA platform driver");
  287. MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
  288. MODULE_LICENSE("GPL");
  289. MODULE_ALIAS("platform:ahci");