qpnp-regulator.h 7.4 KB

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  1. /*
  2. * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #ifndef __REGULATOR_QPNP_REGULATOR_H__
  14. #define __REGULATOR_QPNP_REGULATOR_H__
  15. #include <linux/regulator/machine.h>
  16. #define QPNP_REGULATOR_DRIVER_NAME "qcom,qpnp-regulator"
  17. /* Pin control enable input pins. */
  18. #define QPNP_REGULATOR_PIN_CTRL_ENABLE_NONE 0x00
  19. #define QPNP_REGULATOR_PIN_CTRL_ENABLE_EN0 0x01
  20. #define QPNP_REGULATOR_PIN_CTRL_ENABLE_EN1 0x02
  21. #define QPNP_REGULATOR_PIN_CTRL_ENABLE_EN2 0x04
  22. #define QPNP_REGULATOR_PIN_CTRL_ENABLE_EN3 0x08
  23. #define QPNP_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT 0x10
  24. /* Pin control high power mode input pins. */
  25. #define QPNP_REGULATOR_PIN_CTRL_HPM_NONE 0x00
  26. #define QPNP_REGULATOR_PIN_CTRL_HPM_EN0 0x01
  27. #define QPNP_REGULATOR_PIN_CTRL_HPM_EN1 0x02
  28. #define QPNP_REGULATOR_PIN_CTRL_HPM_EN2 0x04
  29. #define QPNP_REGULATOR_PIN_CTRL_HPM_EN3 0x08
  30. #define QPNP_REGULATOR_PIN_CTRL_HPM_SLEEP_B 0x10
  31. #define QPNP_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT 0x20
  32. /*
  33. * Used with enable parameters to specify that hardware default register values
  34. * should be left unaltered.
  35. */
  36. #define QPNP_REGULATOR_DISABLE 0
  37. #define QPNP_REGULATOR_ENABLE 1
  38. #define QPNP_REGULATOR_USE_HW_DEFAULT 2
  39. /* Soft start strength of a voltage switch type regulator */
  40. enum qpnp_vs_soft_start_str {
  41. QPNP_VS_SOFT_START_STR_0P05_UA,
  42. QPNP_VS_SOFT_START_STR_0P25_UA,
  43. QPNP_VS_SOFT_START_STR_0P55_UA,
  44. QPNP_VS_SOFT_START_STR_0P75_UA,
  45. QPNP_VS_SOFT_START_STR_HW_DEFAULT,
  46. };
  47. /* Current limit of a boost type regulator */
  48. enum qpnp_boost_current_limit {
  49. QPNP_BOOST_CURRENT_LIMIT_300_MA,
  50. QPNP_BOOST_CURRENT_LIMIT_600_MA,
  51. QPNP_BOOST_CURRENT_LIMIT_900_MA,
  52. QPNP_BOOST_CURRENT_LIMIT_1200_MA,
  53. QPNP_BOOST_CURRENT_LIMIT_1500_MA,
  54. QPNP_BOOST_CURRENT_LIMIT_1800_MA,
  55. QPNP_BOOST_CURRENT_LIMIT_2100_MA,
  56. QPNP_BOOST_CURRENT_LIMIT_2400_MA,
  57. QPNP_BOOST_CURRENT_LIMIT_HW_DEFAULT,
  58. };
  59. /**
  60. * struct qpnp_regulator_platform_data - qpnp-regulator initialization data
  61. * @init_data: regulator constraints
  62. * @pull_down_enable: 1 = Enable output pull down resistor when the
  63. * regulator is disabled
  64. * 0 = Disable pull down resistor
  65. * QPNP_REGULATOR_USE_HW_DEFAULT = do not modify
  66. * pull down state
  67. * @pin_ctrl_enable: Bit mask specifying which hardware pins should be
  68. * used to enable the regulator, if any
  69. * Value should be an ORing of
  70. * QPNP_REGULATOR_PIN_CTRL_ENABLE_* constants. If
  71. * the bit specified by
  72. * QPNP_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT is
  73. * set, then pin control enable hardware registers
  74. * will not be modified.
  75. * @pin_ctrl_hpm: Bit mask specifying which hardware pins should be
  76. * used to force the regulator into high power
  77. * mode, if any
  78. * Value should be an ORing of
  79. * QPNP_REGULATOR_PIN_CTRL_HPM_* constants. If
  80. * the bit specified by
  81. * QPNP_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT is
  82. * set, then pin control mode hardware registers
  83. * will not be modified.
  84. * @system_load: Load in uA present on regulator that is not captured
  85. * by any consumer request
  86. * @enable_time: Time in us to delay after enabling the regulator
  87. * @ocp_enable: 1 = Allow over current protection (OCP) to be
  88. * enabled for voltage switch type regulators so
  89. * that they latch off automatically when over
  90. * current is detected. OCP is enabled when in HPM
  91. * or auto mode.
  92. * 0 = Disable OCP
  93. * QPNP_REGULATOR_USE_HW_DEFAULT = do not modify
  94. * OCP state
  95. * @ocp_irq: IRQ number of the voltage switch OCP IRQ. If
  96. * specified the voltage switch will be toggled off
  97. * and back on when OCP triggers in order to handle
  98. * high in-rush current.
  99. * @ocp_max_retries: Maximum number of times to try toggling a voltage
  100. * switch off and back on as a result of
  101. * consecutive over current events.
  102. * @ocp_retry_delay_ms: Time to delay in milliseconds between each
  103. * voltage switch toggle after an over current
  104. * event takes place.
  105. * @boost_current_limit: This parameter sets the current limit of boost type
  106. * regulators. Its value should be one of
  107. * QPNP_BOOST_CURRENT_LIMIT_*. If its value is
  108. * QPNP_BOOST_CURRENT_LIMIT_HW_DEFAULT, then the
  109. * boost current limit will be left at its default
  110. * hardware value.
  111. * @soft_start_enable: 1 = Enable soft start for LDO and voltage switch
  112. * type regulators so that output voltage slowly
  113. * ramps up when the regulator is enabled
  114. * 0 = Disable soft start
  115. * QPNP_REGULATOR_USE_HW_DEFAULT = do not modify
  116. * soft start state
  117. * @vs_soft_start_strength: This parameter sets the soft start strength for
  118. * voltage switch type regulators. Its value
  119. * should be one of QPNP_VS_SOFT_START_STR_*. If
  120. * its value is QPNP_VS_SOFT_START_STR_HW_DEFAULT,
  121. * then the soft start strength will be left at its
  122. * default hardware value.
  123. * @auto_mode_enable: 1 = Enable automatic hardware selection of regulator
  124. * mode (HPM vs LPM). Auto mode is not available
  125. * on boost type regulators
  126. * 0 = Disable auto mode selection
  127. * QPNP_REGULATOR_USE_HW_DEFAULT = do not modify
  128. * auto mode state
  129. * @bypass_mode_enable: 1 = Enable bypass mode for an LDO type regulator so
  130. * that it acts like a switch and simply outputs
  131. * its input voltage
  132. * 0 = Do not enable bypass mode
  133. * QPNP_REGULATOR_USE_HW_DEFAULT = do not modify
  134. * bypass mode state
  135. * @hpm_enable: 1 = Enable high power mode (HPM), also referred to
  136. * as NPM. HPM consumes more ground current than
  137. * LPM, but it can source significantly higher load
  138. * current. HPM is not available on boost type
  139. * regulators. For voltage switch type regulators,
  140. * HPM implies that over current protection and
  141. * soft start are active all the time. This
  142. * configuration can be overwritten by changing the
  143. * regulator's mode dynamically.
  144. * 0 = Do not enable HPM
  145. * QPNP_REGULATOR_USE_HW_DEFAULT = do not modify
  146. * HPM state
  147. * @base_addr: SMPI base address for the regulator peripheral
  148. */
  149. struct qpnp_regulator_platform_data {
  150. struct regulator_init_data init_data;
  151. int pull_down_enable;
  152. unsigned pin_ctrl_enable;
  153. unsigned pin_ctrl_hpm;
  154. int system_load;
  155. int enable_time;
  156. int ocp_enable;
  157. int ocp_irq;
  158. int ocp_max_retries;
  159. int ocp_retry_delay_ms;
  160. enum qpnp_boost_current_limit boost_current_limit;
  161. int soft_start_enable;
  162. enum qpnp_vs_soft_start_str vs_soft_start_strength;
  163. int auto_mode_enable;
  164. int bypass_mode_enable;
  165. int hpm_enable;
  166. u16 base_addr;
  167. };
  168. #ifdef CONFIG_REGULATOR_QPNP
  169. /**
  170. * qpnp_regulator_init() - register spmi driver for qpnp-regulator
  171. *
  172. * This initialization function should be called in systems in which driver
  173. * registration ordering must be controlled precisely.
  174. */
  175. int __init qpnp_regulator_init(void);
  176. #else
  177. static inline int __init qpnp_regulator_init(void)
  178. {
  179. return -ENODEV;
  180. }
  181. #endif /* CONFIG_REGULATOR_QPNP */
  182. #endif