bfin_uart.c 40 KB

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  1. /*
  2. * Blackfin On-Chip Serial Driver
  3. *
  4. * Copyright 2006-2010 Analog Devices Inc.
  5. *
  6. * Enter bugs at http://blackfin.uclinux.org/
  7. *
  8. * Licensed under the GPL-2 or later.
  9. */
  10. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  11. #define SUPPORT_SYSRQ
  12. #endif
  13. #define DRIVER_NAME "bfin-uart"
  14. #define pr_fmt(fmt) DRIVER_NAME ": " fmt
  15. #include <linux/module.h>
  16. #include <linux/ioport.h>
  17. #include <linux/gfp.h>
  18. #include <linux/io.h>
  19. #include <linux/init.h>
  20. #include <linux/console.h>
  21. #include <linux/sysrq.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/tty.h>
  24. #include <linux/tty_flip.h>
  25. #include <linux/serial_core.h>
  26. #include <linux/gpio.h>
  27. #include <linux/irq.h>
  28. #include <linux/kgdb.h>
  29. #include <linux/slab.h>
  30. #include <linux/dma-mapping.h>
  31. #include <asm/portmux.h>
  32. #include <asm/cacheflush.h>
  33. #include <asm/dma.h>
  34. #define port_membase(uart) (((struct bfin_serial_port *)(uart))->port.membase)
  35. #define get_lsr_cache(uart) (((struct bfin_serial_port *)(uart))->lsr)
  36. #define put_lsr_cache(uart, v) (((struct bfin_serial_port *)(uart))->lsr = (v))
  37. #include <asm/bfin_serial.h>
  38. #ifdef CONFIG_SERIAL_BFIN_MODULE
  39. # undef CONFIG_EARLY_PRINTK
  40. #endif
  41. #ifdef CONFIG_SERIAL_BFIN_MODULE
  42. # undef CONFIG_EARLY_PRINTK
  43. #endif
  44. /* UART name and device definitions */
  45. #define BFIN_SERIAL_DEV_NAME "ttyBF"
  46. #define BFIN_SERIAL_MAJOR 204
  47. #define BFIN_SERIAL_MINOR 64
  48. static struct bfin_serial_port *bfin_serial_ports[BFIN_UART_NR_PORTS];
  49. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  50. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  51. # ifndef CONFIG_SERIAL_BFIN_PIO
  52. # error KGDB only support UART in PIO mode.
  53. # endif
  54. static int kgdboc_port_line;
  55. static int kgdboc_break_enabled;
  56. #endif
  57. /*
  58. * Setup for console. Argument comes from the menuconfig
  59. */
  60. #define DMA_RX_XCOUNT 512
  61. #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
  62. #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
  63. #ifdef CONFIG_SERIAL_BFIN_DMA
  64. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  65. #else
  66. static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  67. #endif
  68. static void bfin_serial_reset_irda(struct uart_port *port);
  69. #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  70. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  71. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  72. {
  73. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  74. if (uart->cts_pin < 0)
  75. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  76. /* CTS PIN is negative assertive. */
  77. if (UART_GET_CTS(uart))
  78. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  79. else
  80. return TIOCM_DSR | TIOCM_CAR;
  81. }
  82. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  83. {
  84. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  85. if (uart->rts_pin < 0)
  86. return;
  87. /* RTS PIN is negative assertive. */
  88. if (mctrl & TIOCM_RTS)
  89. UART_ENABLE_RTS(uart);
  90. else
  91. UART_DISABLE_RTS(uart);
  92. }
  93. /*
  94. * Handle any change of modem status signal.
  95. */
  96. static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
  97. {
  98. struct bfin_serial_port *uart = dev_id;
  99. unsigned int status = bfin_serial_get_mctrl(&uart->port);
  100. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  101. struct tty_struct *tty = uart->port.state->port.tty;
  102. UART_CLEAR_SCTS(uart);
  103. if (tty->hw_stopped) {
  104. if (status) {
  105. tty->hw_stopped = 0;
  106. uart_write_wakeup(&uart->port);
  107. }
  108. } else {
  109. if (!status)
  110. tty->hw_stopped = 1;
  111. }
  112. #endif
  113. uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
  114. return IRQ_HANDLED;
  115. }
  116. #else
  117. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  118. {
  119. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  120. }
  121. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  122. {
  123. }
  124. #endif
  125. /*
  126. * interrupts are disabled on entry
  127. */
  128. static void bfin_serial_stop_tx(struct uart_port *port)
  129. {
  130. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  131. #ifdef CONFIG_SERIAL_BFIN_DMA
  132. struct circ_buf *xmit = &uart->port.state->xmit;
  133. #endif
  134. while (!(UART_GET_LSR(uart) & TEMT))
  135. cpu_relax();
  136. #ifdef CONFIG_SERIAL_BFIN_DMA
  137. disable_dma(uart->tx_dma_channel);
  138. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  139. uart->port.icount.tx += uart->tx_count;
  140. uart->tx_count = 0;
  141. uart->tx_done = 1;
  142. #else
  143. #ifdef CONFIG_BF54x
  144. /* Clear TFI bit */
  145. UART_PUT_LSR(uart, TFI);
  146. #endif
  147. UART_CLEAR_IER(uart, ETBEI);
  148. #endif
  149. }
  150. /*
  151. * port is locked and interrupts are disabled
  152. */
  153. static void bfin_serial_start_tx(struct uart_port *port)
  154. {
  155. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  156. struct tty_struct *tty = uart->port.state->port.tty;
  157. /*
  158. * To avoid losting RX interrupt, we reset IR function
  159. * before sending data.
  160. */
  161. if (tty->termios->c_line == N_IRDA)
  162. bfin_serial_reset_irda(port);
  163. #ifdef CONFIG_SERIAL_BFIN_DMA
  164. if (uart->tx_done)
  165. bfin_serial_dma_tx_chars(uart);
  166. #else
  167. UART_SET_IER(uart, ETBEI);
  168. bfin_serial_tx_chars(uart);
  169. #endif
  170. }
  171. /*
  172. * Interrupts are enabled
  173. */
  174. static void bfin_serial_stop_rx(struct uart_port *port)
  175. {
  176. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  177. UART_CLEAR_IER(uart, ERBFI);
  178. }
  179. /*
  180. * Set the modem control timer to fire immediately.
  181. */
  182. static void bfin_serial_enable_ms(struct uart_port *port)
  183. {
  184. }
  185. #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
  186. # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
  187. # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
  188. #else
  189. # define UART_GET_ANOMALY_THRESHOLD(uart) 0
  190. # define UART_SET_ANOMALY_THRESHOLD(uart, v)
  191. #endif
  192. #ifdef CONFIG_SERIAL_BFIN_PIO
  193. static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
  194. {
  195. struct tty_struct *tty = NULL;
  196. unsigned int status, ch, flg;
  197. static struct timeval anomaly_start = { .tv_sec = 0 };
  198. status = UART_GET_LSR(uart);
  199. UART_CLEAR_LSR(uart);
  200. ch = UART_GET_CHAR(uart);
  201. uart->port.icount.rx++;
  202. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  203. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  204. if (kgdb_connected && kgdboc_port_line == uart->port.line
  205. && kgdboc_break_enabled)
  206. if (ch == 0x3) {/* Ctrl + C */
  207. kgdb_breakpoint();
  208. return;
  209. }
  210. if (!uart->port.state || !uart->port.state->port.tty)
  211. return;
  212. #endif
  213. tty = uart->port.state->port.tty;
  214. if (ANOMALY_05000363) {
  215. /* The BF533 (and BF561) family of processors have a nice anomaly
  216. * where they continuously generate characters for a "single" break.
  217. * We have to basically ignore this flood until the "next" valid
  218. * character comes across. Due to the nature of the flood, it is
  219. * not possible to reliably catch bytes that are sent too quickly
  220. * after this break. So application code talking to the Blackfin
  221. * which sends a break signal must allow at least 1.5 character
  222. * times after the end of the break for things to stabilize. This
  223. * timeout was picked as it must absolutely be larger than 1
  224. * character time +/- some percent. So 1.5 sounds good. All other
  225. * Blackfin families operate properly. Woo.
  226. */
  227. if (anomaly_start.tv_sec) {
  228. struct timeval curr;
  229. suseconds_t usecs;
  230. if ((~ch & (~ch + 1)) & 0xff)
  231. goto known_good_char;
  232. do_gettimeofday(&curr);
  233. if (curr.tv_sec - anomaly_start.tv_sec > 1)
  234. goto known_good_char;
  235. usecs = 0;
  236. if (curr.tv_sec != anomaly_start.tv_sec)
  237. usecs += USEC_PER_SEC;
  238. usecs += curr.tv_usec - anomaly_start.tv_usec;
  239. if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
  240. goto known_good_char;
  241. if (ch)
  242. anomaly_start.tv_sec = 0;
  243. else
  244. anomaly_start = curr;
  245. return;
  246. known_good_char:
  247. status &= ~BI;
  248. anomaly_start.tv_sec = 0;
  249. }
  250. }
  251. if (status & BI) {
  252. if (ANOMALY_05000363)
  253. if (bfin_revid() < 5)
  254. do_gettimeofday(&anomaly_start);
  255. uart->port.icount.brk++;
  256. if (uart_handle_break(&uart->port))
  257. goto ignore_char;
  258. status &= ~(PE | FE);
  259. }
  260. if (status & PE)
  261. uart->port.icount.parity++;
  262. if (status & OE)
  263. uart->port.icount.overrun++;
  264. if (status & FE)
  265. uart->port.icount.frame++;
  266. status &= uart->port.read_status_mask;
  267. if (status & BI)
  268. flg = TTY_BREAK;
  269. else if (status & PE)
  270. flg = TTY_PARITY;
  271. else if (status & FE)
  272. flg = TTY_FRAME;
  273. else
  274. flg = TTY_NORMAL;
  275. if (uart_handle_sysrq_char(&uart->port, ch))
  276. goto ignore_char;
  277. uart_insert_char(&uart->port, status, OE, ch, flg);
  278. ignore_char:
  279. tty_flip_buffer_push(tty);
  280. }
  281. static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
  282. {
  283. struct circ_buf *xmit = &uart->port.state->xmit;
  284. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  285. #ifdef CONFIG_BF54x
  286. /* Clear TFI bit */
  287. UART_PUT_LSR(uart, TFI);
  288. #endif
  289. /* Anomaly notes:
  290. * 05000215 - we always clear ETBEI within last UART TX
  291. * interrupt to end a string. It is always set
  292. * when start a new tx.
  293. */
  294. UART_CLEAR_IER(uart, ETBEI);
  295. return;
  296. }
  297. if (uart->port.x_char) {
  298. UART_PUT_CHAR(uart, uart->port.x_char);
  299. uart->port.icount.tx++;
  300. uart->port.x_char = 0;
  301. }
  302. while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
  303. UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
  304. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  305. uart->port.icount.tx++;
  306. }
  307. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  308. uart_write_wakeup(&uart->port);
  309. }
  310. static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
  311. {
  312. struct bfin_serial_port *uart = dev_id;
  313. while (UART_GET_LSR(uart) & DR)
  314. bfin_serial_rx_chars(uart);
  315. return IRQ_HANDLED;
  316. }
  317. static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
  318. {
  319. struct bfin_serial_port *uart = dev_id;
  320. spin_lock(&uart->port.lock);
  321. if (UART_GET_LSR(uart) & THRE)
  322. bfin_serial_tx_chars(uart);
  323. spin_unlock(&uart->port.lock);
  324. return IRQ_HANDLED;
  325. }
  326. #endif
  327. #ifdef CONFIG_SERIAL_BFIN_DMA
  328. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
  329. {
  330. struct circ_buf *xmit = &uart->port.state->xmit;
  331. uart->tx_done = 0;
  332. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  333. uart->tx_count = 0;
  334. uart->tx_done = 1;
  335. return;
  336. }
  337. if (uart->port.x_char) {
  338. UART_PUT_CHAR(uart, uart->port.x_char);
  339. uart->port.icount.tx++;
  340. uart->port.x_char = 0;
  341. }
  342. uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
  343. if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
  344. uart->tx_count = UART_XMIT_SIZE - xmit->tail;
  345. blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
  346. (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
  347. set_dma_config(uart->tx_dma_channel,
  348. set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
  349. INTR_ON_BUF,
  350. DIMENSION_LINEAR,
  351. DATA_SIZE_8,
  352. DMA_SYNC_RESTART));
  353. set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
  354. set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
  355. set_dma_x_modify(uart->tx_dma_channel, 1);
  356. SSYNC();
  357. enable_dma(uart->tx_dma_channel);
  358. UART_SET_IER(uart, ETBEI);
  359. }
  360. static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
  361. {
  362. struct tty_struct *tty = uart->port.state->port.tty;
  363. int i, flg, status;
  364. status = UART_GET_LSR(uart);
  365. UART_CLEAR_LSR(uart);
  366. uart->port.icount.rx +=
  367. CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
  368. UART_XMIT_SIZE);
  369. if (status & BI) {
  370. uart->port.icount.brk++;
  371. if (uart_handle_break(&uart->port))
  372. goto dma_ignore_char;
  373. status &= ~(PE | FE);
  374. }
  375. if (status & PE)
  376. uart->port.icount.parity++;
  377. if (status & OE)
  378. uart->port.icount.overrun++;
  379. if (status & FE)
  380. uart->port.icount.frame++;
  381. status &= uart->port.read_status_mask;
  382. if (status & BI)
  383. flg = TTY_BREAK;
  384. else if (status & PE)
  385. flg = TTY_PARITY;
  386. else if (status & FE)
  387. flg = TTY_FRAME;
  388. else
  389. flg = TTY_NORMAL;
  390. for (i = uart->rx_dma_buf.tail; ; i++) {
  391. if (i >= UART_XMIT_SIZE)
  392. i = 0;
  393. if (i == uart->rx_dma_buf.head)
  394. break;
  395. if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
  396. uart_insert_char(&uart->port, status, OE,
  397. uart->rx_dma_buf.buf[i], flg);
  398. }
  399. dma_ignore_char:
  400. tty_flip_buffer_push(tty);
  401. }
  402. void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
  403. {
  404. int x_pos, pos;
  405. dma_disable_irq_nosync(uart->rx_dma_channel);
  406. spin_lock_bh(&uart->rx_lock);
  407. /* 2D DMA RX buffer ring is used. Because curr_y_count and
  408. * curr_x_count can't be read as an atomic operation,
  409. * curr_y_count should be read before curr_x_count. When
  410. * curr_x_count is read, curr_y_count may already indicate
  411. * next buffer line. But, the position calculated here is
  412. * still indicate the old line. The wrong position data may
  413. * be smaller than current buffer tail, which cause garbages
  414. * are received if it is not prohibit.
  415. */
  416. uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
  417. x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
  418. uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
  419. if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
  420. uart->rx_dma_nrows = 0;
  421. x_pos = DMA_RX_XCOUNT - x_pos;
  422. if (x_pos == DMA_RX_XCOUNT)
  423. x_pos = 0;
  424. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
  425. /* Ignore receiving data if new position is in the same line of
  426. * current buffer tail and small.
  427. */
  428. if (pos > uart->rx_dma_buf.tail ||
  429. uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
  430. uart->rx_dma_buf.head = pos;
  431. bfin_serial_dma_rx_chars(uart);
  432. uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
  433. }
  434. spin_unlock_bh(&uart->rx_lock);
  435. dma_enable_irq(uart->rx_dma_channel);
  436. mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
  437. }
  438. static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
  439. {
  440. struct bfin_serial_port *uart = dev_id;
  441. struct circ_buf *xmit = &uart->port.state->xmit;
  442. spin_lock(&uart->port.lock);
  443. if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
  444. disable_dma(uart->tx_dma_channel);
  445. clear_dma_irqstat(uart->tx_dma_channel);
  446. /* Anomaly notes:
  447. * 05000215 - we always clear ETBEI within last UART TX
  448. * interrupt to end a string. It is always set
  449. * when start a new tx.
  450. */
  451. UART_CLEAR_IER(uart, ETBEI);
  452. uart->port.icount.tx += uart->tx_count;
  453. if (!uart_circ_empty(xmit)) {
  454. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  455. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  456. uart_write_wakeup(&uart->port);
  457. }
  458. bfin_serial_dma_tx_chars(uart);
  459. }
  460. spin_unlock(&uart->port.lock);
  461. return IRQ_HANDLED;
  462. }
  463. static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
  464. {
  465. struct bfin_serial_port *uart = dev_id;
  466. unsigned short irqstat;
  467. int x_pos, pos;
  468. spin_lock(&uart->rx_lock);
  469. irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
  470. clear_dma_irqstat(uart->rx_dma_channel);
  471. uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
  472. x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
  473. uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
  474. if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
  475. uart->rx_dma_nrows = 0;
  476. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
  477. if (pos > uart->rx_dma_buf.tail ||
  478. uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
  479. uart->rx_dma_buf.head = pos;
  480. bfin_serial_dma_rx_chars(uart);
  481. uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
  482. }
  483. spin_unlock(&uart->rx_lock);
  484. return IRQ_HANDLED;
  485. }
  486. #endif
  487. /*
  488. * Return TIOCSER_TEMT when transmitter is not busy.
  489. */
  490. static unsigned int bfin_serial_tx_empty(struct uart_port *port)
  491. {
  492. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  493. unsigned short lsr;
  494. lsr = UART_GET_LSR(uart);
  495. if (lsr & TEMT)
  496. return TIOCSER_TEMT;
  497. else
  498. return 0;
  499. }
  500. static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
  501. {
  502. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  503. u16 lcr = UART_GET_LCR(uart);
  504. if (break_state)
  505. lcr |= SB;
  506. else
  507. lcr &= ~SB;
  508. UART_PUT_LCR(uart, lcr);
  509. SSYNC();
  510. }
  511. static int bfin_serial_startup(struct uart_port *port)
  512. {
  513. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  514. #ifdef CONFIG_SERIAL_BFIN_DMA
  515. dma_addr_t dma_handle;
  516. if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
  517. printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
  518. return -EBUSY;
  519. }
  520. if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
  521. printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
  522. free_dma(uart->rx_dma_channel);
  523. return -EBUSY;
  524. }
  525. set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
  526. set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
  527. uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
  528. uart->rx_dma_buf.head = 0;
  529. uart->rx_dma_buf.tail = 0;
  530. uart->rx_dma_nrows = 0;
  531. set_dma_config(uart->rx_dma_channel,
  532. set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
  533. INTR_ON_ROW, DIMENSION_2D,
  534. DATA_SIZE_8,
  535. DMA_SYNC_RESTART));
  536. set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
  537. set_dma_x_modify(uart->rx_dma_channel, 1);
  538. set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
  539. set_dma_y_modify(uart->rx_dma_channel, 1);
  540. set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
  541. enable_dma(uart->rx_dma_channel);
  542. uart->rx_dma_timer.data = (unsigned long)(uart);
  543. uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
  544. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  545. add_timer(&(uart->rx_dma_timer));
  546. #else
  547. # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  548. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  549. if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
  550. kgdboc_break_enabled = 0;
  551. else {
  552. # endif
  553. if (request_irq(uart->rx_irq, bfin_serial_rx_int, 0,
  554. "BFIN_UART_RX", uart)) {
  555. printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
  556. return -EBUSY;
  557. }
  558. if (request_irq
  559. (uart->tx_irq, bfin_serial_tx_int, 0,
  560. "BFIN_UART_TX", uart)) {
  561. printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
  562. free_irq(uart->rx_irq, uart);
  563. return -EBUSY;
  564. }
  565. # ifdef CONFIG_BF54x
  566. {
  567. /*
  568. * UART2 and UART3 on BF548 share interrupt PINs and DMA
  569. * controllers with SPORT2 and SPORT3. UART rx and tx
  570. * interrupts are generated in PIO mode only when configure
  571. * their peripheral mapping registers properly, which means
  572. * request corresponding DMA channels in PIO mode as well.
  573. */
  574. unsigned uart_dma_ch_rx, uart_dma_ch_tx;
  575. switch (uart->rx_irq) {
  576. case IRQ_UART3_RX:
  577. uart_dma_ch_rx = CH_UART3_RX;
  578. uart_dma_ch_tx = CH_UART3_TX;
  579. break;
  580. case IRQ_UART2_RX:
  581. uart_dma_ch_rx = CH_UART2_RX;
  582. uart_dma_ch_tx = CH_UART2_TX;
  583. break;
  584. default:
  585. uart_dma_ch_rx = uart_dma_ch_tx = 0;
  586. break;
  587. };
  588. if (uart_dma_ch_rx &&
  589. request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
  590. printk(KERN_NOTICE"Fail to attach UART interrupt\n");
  591. free_irq(uart->rx_irq, uart);
  592. free_irq(uart->tx_irq, uart);
  593. return -EBUSY;
  594. }
  595. if (uart_dma_ch_tx &&
  596. request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
  597. printk(KERN_NOTICE "Fail to attach UART interrupt\n");
  598. free_dma(uart_dma_ch_rx);
  599. free_irq(uart->rx_irq, uart);
  600. free_irq(uart->tx_irq, uart);
  601. return -EBUSY;
  602. }
  603. }
  604. # endif
  605. # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  606. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  607. }
  608. # endif
  609. #endif
  610. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  611. if (uart->cts_pin >= 0) {
  612. if (request_irq(gpio_to_irq(uart->cts_pin),
  613. bfin_serial_mctrl_cts_int,
  614. IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
  615. 0, "BFIN_UART_CTS", uart)) {
  616. uart->cts_pin = -1;
  617. pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
  618. }
  619. }
  620. if (uart->rts_pin >= 0) {
  621. if (gpio_request(uart->rts_pin, DRIVER_NAME)) {
  622. pr_info("fail to request RTS PIN at GPIO_%d\n", uart->rts_pin);
  623. uart->rts_pin = -1;
  624. } else
  625. gpio_direction_output(uart->rts_pin, 0);
  626. }
  627. #endif
  628. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  629. if (uart->cts_pin >= 0) {
  630. if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int,
  631. IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
  632. uart->cts_pin = -1;
  633. dev_info(port->dev, "Unable to attach BlackFin UART Modem Status interrupt.\n");
  634. }
  635. /* CTS RTS PINs are negative assertive. */
  636. UART_PUT_MCR(uart, ACTS);
  637. UART_SET_IER(uart, EDSSI);
  638. }
  639. #endif
  640. UART_SET_IER(uart, ERBFI);
  641. return 0;
  642. }
  643. static void bfin_serial_shutdown(struct uart_port *port)
  644. {
  645. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  646. #ifdef CONFIG_SERIAL_BFIN_DMA
  647. disable_dma(uart->tx_dma_channel);
  648. free_dma(uart->tx_dma_channel);
  649. disable_dma(uart->rx_dma_channel);
  650. free_dma(uart->rx_dma_channel);
  651. del_timer(&(uart->rx_dma_timer));
  652. dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
  653. #else
  654. #ifdef CONFIG_BF54x
  655. switch (uart->port.irq) {
  656. case IRQ_UART3_RX:
  657. free_dma(CH_UART3_RX);
  658. free_dma(CH_UART3_TX);
  659. break;
  660. case IRQ_UART2_RX:
  661. free_dma(CH_UART2_RX);
  662. free_dma(CH_UART2_TX);
  663. break;
  664. default:
  665. break;
  666. };
  667. #endif
  668. free_irq(uart->rx_irq, uart);
  669. free_irq(uart->tx_irq, uart);
  670. #endif
  671. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  672. if (uart->cts_pin >= 0)
  673. free_irq(gpio_to_irq(uart->cts_pin), uart);
  674. if (uart->rts_pin >= 0)
  675. gpio_free(uart->rts_pin);
  676. #endif
  677. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  678. if (uart->cts_pin >= 0)
  679. free_irq(uart->status_irq, uart);
  680. #endif
  681. }
  682. static void
  683. bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
  684. struct ktermios *old)
  685. {
  686. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  687. unsigned long flags;
  688. unsigned int baud, quot;
  689. unsigned short val, ier, lcr = 0;
  690. switch (termios->c_cflag & CSIZE) {
  691. case CS8:
  692. lcr = WLS(8);
  693. break;
  694. case CS7:
  695. lcr = WLS(7);
  696. break;
  697. case CS6:
  698. lcr = WLS(6);
  699. break;
  700. case CS5:
  701. lcr = WLS(5);
  702. break;
  703. default:
  704. printk(KERN_ERR "%s: word lengh not supported\n",
  705. __func__);
  706. }
  707. /* Anomaly notes:
  708. * 05000231 - STOP bit is always set to 1 whatever the user is set.
  709. */
  710. if (termios->c_cflag & CSTOPB) {
  711. if (ANOMALY_05000231)
  712. printk(KERN_WARNING "STOP bits other than 1 is not "
  713. "supported in case of anomaly 05000231.\n");
  714. else
  715. lcr |= STB;
  716. }
  717. if (termios->c_cflag & PARENB)
  718. lcr |= PEN;
  719. if (!(termios->c_cflag & PARODD))
  720. lcr |= EPS;
  721. if (termios->c_cflag & CMSPAR)
  722. lcr |= STP;
  723. spin_lock_irqsave(&uart->port.lock, flags);
  724. port->read_status_mask = OE;
  725. if (termios->c_iflag & INPCK)
  726. port->read_status_mask |= (FE | PE);
  727. if (termios->c_iflag & (BRKINT | PARMRK))
  728. port->read_status_mask |= BI;
  729. /*
  730. * Characters to ignore
  731. */
  732. port->ignore_status_mask = 0;
  733. if (termios->c_iflag & IGNPAR)
  734. port->ignore_status_mask |= FE | PE;
  735. if (termios->c_iflag & IGNBRK) {
  736. port->ignore_status_mask |= BI;
  737. /*
  738. * If we're ignoring parity and break indicators,
  739. * ignore overruns too (for real raw support).
  740. */
  741. if (termios->c_iflag & IGNPAR)
  742. port->ignore_status_mask |= OE;
  743. }
  744. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  745. quot = uart_get_divisor(port, baud);
  746. /* If discipline is not IRDA, apply ANOMALY_05000230 */
  747. if (termios->c_line != N_IRDA)
  748. quot -= ANOMALY_05000230;
  749. UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
  750. /* Disable UART */
  751. ier = UART_GET_IER(uart);
  752. UART_DISABLE_INTS(uart);
  753. /* Set DLAB in LCR to Access DLL and DLH */
  754. UART_SET_DLAB(uart);
  755. UART_PUT_DLL(uart, quot & 0xFF);
  756. UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
  757. SSYNC();
  758. /* Clear DLAB in LCR to Access THR RBR IER */
  759. UART_CLEAR_DLAB(uart);
  760. UART_PUT_LCR(uart, lcr);
  761. /* Enable UART */
  762. UART_ENABLE_INTS(uart, ier);
  763. val = UART_GET_GCTL(uart);
  764. val |= UCEN;
  765. UART_PUT_GCTL(uart, val);
  766. /* Port speed changed, update the per-port timeout. */
  767. uart_update_timeout(port, termios->c_cflag, baud);
  768. spin_unlock_irqrestore(&uart->port.lock, flags);
  769. }
  770. static const char *bfin_serial_type(struct uart_port *port)
  771. {
  772. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  773. return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
  774. }
  775. /*
  776. * Release the memory region(s) being used by 'port'.
  777. */
  778. static void bfin_serial_release_port(struct uart_port *port)
  779. {
  780. }
  781. /*
  782. * Request the memory region(s) being used by 'port'.
  783. */
  784. static int bfin_serial_request_port(struct uart_port *port)
  785. {
  786. return 0;
  787. }
  788. /*
  789. * Configure/autoconfigure the port.
  790. */
  791. static void bfin_serial_config_port(struct uart_port *port, int flags)
  792. {
  793. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  794. if (flags & UART_CONFIG_TYPE &&
  795. bfin_serial_request_port(&uart->port) == 0)
  796. uart->port.type = PORT_BFIN;
  797. }
  798. /*
  799. * Verify the new serial_struct (for TIOCSSERIAL).
  800. * The only change we allow are to the flags and type, and
  801. * even then only between PORT_BFIN and PORT_UNKNOWN
  802. */
  803. static int
  804. bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  805. {
  806. return 0;
  807. }
  808. /*
  809. * Enable the IrDA function if tty->ldisc.num is N_IRDA.
  810. * In other cases, disable IrDA function.
  811. */
  812. static void bfin_serial_set_ldisc(struct uart_port *port, int ld)
  813. {
  814. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  815. unsigned short val;
  816. switch (ld) {
  817. case N_IRDA:
  818. val = UART_GET_GCTL(uart);
  819. val |= (IREN | RPOLC);
  820. UART_PUT_GCTL(uart, val);
  821. break;
  822. default:
  823. val = UART_GET_GCTL(uart);
  824. val &= ~(IREN | RPOLC);
  825. UART_PUT_GCTL(uart, val);
  826. }
  827. }
  828. static void bfin_serial_reset_irda(struct uart_port *port)
  829. {
  830. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  831. unsigned short val;
  832. val = UART_GET_GCTL(uart);
  833. val &= ~(IREN | RPOLC);
  834. UART_PUT_GCTL(uart, val);
  835. SSYNC();
  836. val |= (IREN | RPOLC);
  837. UART_PUT_GCTL(uart, val);
  838. SSYNC();
  839. }
  840. #ifdef CONFIG_CONSOLE_POLL
  841. /* Anomaly notes:
  842. * 05000099 - Because we only use THRE in poll_put and DR in poll_get,
  843. * losing other bits of UART_LSR is not a problem here.
  844. */
  845. static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
  846. {
  847. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  848. while (!(UART_GET_LSR(uart) & THRE))
  849. cpu_relax();
  850. UART_CLEAR_DLAB(uart);
  851. UART_PUT_CHAR(uart, (unsigned char)chr);
  852. }
  853. static int bfin_serial_poll_get_char(struct uart_port *port)
  854. {
  855. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  856. unsigned char chr;
  857. while (!(UART_GET_LSR(uart) & DR))
  858. cpu_relax();
  859. UART_CLEAR_DLAB(uart);
  860. chr = UART_GET_CHAR(uart);
  861. return chr;
  862. }
  863. #endif
  864. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  865. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  866. static void bfin_kgdboc_port_shutdown(struct uart_port *port)
  867. {
  868. if (kgdboc_break_enabled) {
  869. kgdboc_break_enabled = 0;
  870. bfin_serial_shutdown(port);
  871. }
  872. }
  873. static int bfin_kgdboc_port_startup(struct uart_port *port)
  874. {
  875. kgdboc_port_line = port->line;
  876. kgdboc_break_enabled = !bfin_serial_startup(port);
  877. return 0;
  878. }
  879. #endif
  880. static struct uart_ops bfin_serial_pops = {
  881. .tx_empty = bfin_serial_tx_empty,
  882. .set_mctrl = bfin_serial_set_mctrl,
  883. .get_mctrl = bfin_serial_get_mctrl,
  884. .stop_tx = bfin_serial_stop_tx,
  885. .start_tx = bfin_serial_start_tx,
  886. .stop_rx = bfin_serial_stop_rx,
  887. .enable_ms = bfin_serial_enable_ms,
  888. .break_ctl = bfin_serial_break_ctl,
  889. .startup = bfin_serial_startup,
  890. .shutdown = bfin_serial_shutdown,
  891. .set_termios = bfin_serial_set_termios,
  892. .set_ldisc = bfin_serial_set_ldisc,
  893. .type = bfin_serial_type,
  894. .release_port = bfin_serial_release_port,
  895. .request_port = bfin_serial_request_port,
  896. .config_port = bfin_serial_config_port,
  897. .verify_port = bfin_serial_verify_port,
  898. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  899. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  900. .kgdboc_port_startup = bfin_kgdboc_port_startup,
  901. .kgdboc_port_shutdown = bfin_kgdboc_port_shutdown,
  902. #endif
  903. #ifdef CONFIG_CONSOLE_POLL
  904. .poll_put_char = bfin_serial_poll_put_char,
  905. .poll_get_char = bfin_serial_poll_get_char,
  906. #endif
  907. };
  908. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  909. /*
  910. * If the port was already initialised (eg, by a boot loader),
  911. * try to determine the current setup.
  912. */
  913. static void __init
  914. bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
  915. int *parity, int *bits)
  916. {
  917. unsigned short status;
  918. status = UART_GET_IER(uart) & (ERBFI | ETBEI);
  919. if (status == (ERBFI | ETBEI)) {
  920. /* ok, the port was enabled */
  921. u16 lcr, dlh, dll;
  922. lcr = UART_GET_LCR(uart);
  923. *parity = 'n';
  924. if (lcr & PEN) {
  925. if (lcr & EPS)
  926. *parity = 'e';
  927. else
  928. *parity = 'o';
  929. }
  930. switch (lcr & 0x03) {
  931. case 0:
  932. *bits = 5;
  933. break;
  934. case 1:
  935. *bits = 6;
  936. break;
  937. case 2:
  938. *bits = 7;
  939. break;
  940. case 3:
  941. *bits = 8;
  942. break;
  943. }
  944. /* Set DLAB in LCR to Access DLL and DLH */
  945. UART_SET_DLAB(uart);
  946. dll = UART_GET_DLL(uart);
  947. dlh = UART_GET_DLH(uart);
  948. /* Clear DLAB in LCR to Access THR RBR IER */
  949. UART_CLEAR_DLAB(uart);
  950. *baud = get_sclk() / (16*(dll | dlh << 8));
  951. }
  952. pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
  953. }
  954. static struct uart_driver bfin_serial_reg;
  955. static void bfin_serial_console_putchar(struct uart_port *port, int ch)
  956. {
  957. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  958. while (!(UART_GET_LSR(uart) & THRE))
  959. barrier();
  960. UART_PUT_CHAR(uart, ch);
  961. }
  962. #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
  963. defined (CONFIG_EARLY_PRINTK) */
  964. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  965. #define CLASS_BFIN_CONSOLE "bfin-console"
  966. /*
  967. * Interrupts are disabled on entering
  968. */
  969. static void
  970. bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
  971. {
  972. struct bfin_serial_port *uart = bfin_serial_ports[co->index];
  973. unsigned long flags;
  974. spin_lock_irqsave(&uart->port.lock, flags);
  975. uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
  976. spin_unlock_irqrestore(&uart->port.lock, flags);
  977. }
  978. static int __init
  979. bfin_serial_console_setup(struct console *co, char *options)
  980. {
  981. struct bfin_serial_port *uart;
  982. int baud = 57600;
  983. int bits = 8;
  984. int parity = 'n';
  985. # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  986. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  987. int flow = 'r';
  988. # else
  989. int flow = 'n';
  990. # endif
  991. /*
  992. * Check whether an invalid uart number has been specified, and
  993. * if so, search for the first available port that does have
  994. * console support.
  995. */
  996. if (co->index < 0 || co->index >= BFIN_UART_NR_PORTS)
  997. return -ENODEV;
  998. uart = bfin_serial_ports[co->index];
  999. if (!uart)
  1000. return -ENODEV;
  1001. if (options)
  1002. uart_parse_options(options, &baud, &parity, &bits, &flow);
  1003. else
  1004. bfin_serial_console_get_options(uart, &baud, &parity, &bits);
  1005. return uart_set_options(&uart->port, co, baud, parity, bits, flow);
  1006. }
  1007. static struct console bfin_serial_console = {
  1008. .name = BFIN_SERIAL_DEV_NAME,
  1009. .write = bfin_serial_console_write,
  1010. .device = uart_console_device,
  1011. .setup = bfin_serial_console_setup,
  1012. .flags = CON_PRINTBUFFER,
  1013. .index = -1,
  1014. .data = &bfin_serial_reg,
  1015. };
  1016. #define BFIN_SERIAL_CONSOLE (&bfin_serial_console)
  1017. #else
  1018. #define BFIN_SERIAL_CONSOLE NULL
  1019. #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
  1020. #ifdef CONFIG_EARLY_PRINTK
  1021. static struct bfin_serial_port bfin_earlyprintk_port;
  1022. #define CLASS_BFIN_EARLYPRINTK "bfin-earlyprintk"
  1023. /*
  1024. * Interrupts are disabled on entering
  1025. */
  1026. static void
  1027. bfin_earlyprintk_console_write(struct console *co, const char *s, unsigned int count)
  1028. {
  1029. unsigned long flags;
  1030. if (bfin_earlyprintk_port.port.line != co->index)
  1031. return;
  1032. spin_lock_irqsave(&bfin_earlyprintk_port.port.lock, flags);
  1033. uart_console_write(&bfin_earlyprintk_port.port, s, count,
  1034. bfin_serial_console_putchar);
  1035. spin_unlock_irqrestore(&bfin_earlyprintk_port.port.lock, flags);
  1036. }
  1037. /*
  1038. * This should have a .setup or .early_setup in it, but then things get called
  1039. * without the command line options, and the baud rate gets messed up - so
  1040. * don't let the common infrastructure play with things. (see calls to setup
  1041. * & earlysetup in ./kernel/printk.c:register_console()
  1042. */
  1043. static struct __initdata console bfin_early_serial_console = {
  1044. .name = "early_BFuart",
  1045. .write = bfin_earlyprintk_console_write,
  1046. .device = uart_console_device,
  1047. .flags = CON_PRINTBUFFER,
  1048. .index = -1,
  1049. .data = &bfin_serial_reg,
  1050. };
  1051. #endif
  1052. static struct uart_driver bfin_serial_reg = {
  1053. .owner = THIS_MODULE,
  1054. .driver_name = DRIVER_NAME,
  1055. .dev_name = BFIN_SERIAL_DEV_NAME,
  1056. .major = BFIN_SERIAL_MAJOR,
  1057. .minor = BFIN_SERIAL_MINOR,
  1058. .nr = BFIN_UART_NR_PORTS,
  1059. .cons = BFIN_SERIAL_CONSOLE,
  1060. };
  1061. static int bfin_serial_suspend(struct platform_device *pdev, pm_message_t state)
  1062. {
  1063. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1064. return uart_suspend_port(&bfin_serial_reg, &uart->port);
  1065. }
  1066. static int bfin_serial_resume(struct platform_device *pdev)
  1067. {
  1068. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1069. return uart_resume_port(&bfin_serial_reg, &uart->port);
  1070. }
  1071. static int bfin_serial_probe(struct platform_device *pdev)
  1072. {
  1073. struct resource *res;
  1074. struct bfin_serial_port *uart = NULL;
  1075. int ret = 0;
  1076. if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
  1077. dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n");
  1078. return -ENOENT;
  1079. }
  1080. if (bfin_serial_ports[pdev->id] == NULL) {
  1081. uart = kzalloc(sizeof(*uart), GFP_KERNEL);
  1082. if (!uart) {
  1083. dev_err(&pdev->dev,
  1084. "fail to malloc bfin_serial_port\n");
  1085. return -ENOMEM;
  1086. }
  1087. bfin_serial_ports[pdev->id] = uart;
  1088. #ifdef CONFIG_EARLY_PRINTK
  1089. if (!(bfin_earlyprintk_port.port.membase
  1090. && bfin_earlyprintk_port.port.line == pdev->id)) {
  1091. /*
  1092. * If the peripheral PINs of current port is allocated
  1093. * in earlyprintk probe stage, don't do it again.
  1094. */
  1095. #endif
  1096. ret = peripheral_request_list(
  1097. (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
  1098. if (ret) {
  1099. dev_err(&pdev->dev,
  1100. "fail to request bfin serial peripherals\n");
  1101. goto out_error_free_mem;
  1102. }
  1103. #ifdef CONFIG_EARLY_PRINTK
  1104. }
  1105. #endif
  1106. spin_lock_init(&uart->port.lock);
  1107. uart->port.uartclk = get_sclk();
  1108. uart->port.fifosize = BFIN_UART_TX_FIFO_SIZE;
  1109. uart->port.ops = &bfin_serial_pops;
  1110. uart->port.line = pdev->id;
  1111. uart->port.iotype = UPIO_MEM;
  1112. uart->port.flags = UPF_BOOT_AUTOCONF;
  1113. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1114. if (res == NULL) {
  1115. dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
  1116. ret = -ENOENT;
  1117. goto out_error_free_peripherals;
  1118. }
  1119. uart->port.membase = ioremap(res->start, resource_size(res));
  1120. if (!uart->port.membase) {
  1121. dev_err(&pdev->dev, "Cannot map uart IO\n");
  1122. ret = -ENXIO;
  1123. goto out_error_free_peripherals;
  1124. }
  1125. uart->port.mapbase = res->start;
  1126. uart->tx_irq = platform_get_irq(pdev, 0);
  1127. if (uart->tx_irq < 0) {
  1128. dev_err(&pdev->dev, "No uart TX IRQ specified\n");
  1129. ret = -ENOENT;
  1130. goto out_error_unmap;
  1131. }
  1132. uart->rx_irq = platform_get_irq(pdev, 1);
  1133. if (uart->rx_irq < 0) {
  1134. dev_err(&pdev->dev, "No uart RX IRQ specified\n");
  1135. ret = -ENOENT;
  1136. goto out_error_unmap;
  1137. }
  1138. uart->port.irq = uart->rx_irq;
  1139. uart->status_irq = platform_get_irq(pdev, 2);
  1140. if (uart->status_irq < 0) {
  1141. dev_err(&pdev->dev, "No uart status IRQ specified\n");
  1142. ret = -ENOENT;
  1143. goto out_error_unmap;
  1144. }
  1145. #ifdef CONFIG_SERIAL_BFIN_DMA
  1146. spin_lock_init(&uart->rx_lock);
  1147. uart->tx_done = 1;
  1148. uart->tx_count = 0;
  1149. res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  1150. if (res == NULL) {
  1151. dev_err(&pdev->dev, "No uart TX DMA channel specified\n");
  1152. ret = -ENOENT;
  1153. goto out_error_unmap;
  1154. }
  1155. uart->tx_dma_channel = res->start;
  1156. res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  1157. if (res == NULL) {
  1158. dev_err(&pdev->dev, "No uart RX DMA channel specified\n");
  1159. ret = -ENOENT;
  1160. goto out_error_unmap;
  1161. }
  1162. uart->rx_dma_channel = res->start;
  1163. init_timer(&(uart->rx_dma_timer));
  1164. #endif
  1165. #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  1166. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  1167. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1168. if (res == NULL)
  1169. uart->cts_pin = -1;
  1170. else {
  1171. uart->cts_pin = res->start;
  1172. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  1173. uart->port.flags |= ASYNC_CTS_FLOW;
  1174. #endif
  1175. }
  1176. res = platform_get_resource(pdev, IORESOURCE_IO, 1);
  1177. if (res == NULL)
  1178. uart->rts_pin = -1;
  1179. else
  1180. uart->rts_pin = res->start;
  1181. #endif
  1182. }
  1183. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  1184. if (!is_early_platform_device(pdev)) {
  1185. #endif
  1186. uart = bfin_serial_ports[pdev->id];
  1187. uart->port.dev = &pdev->dev;
  1188. dev_set_drvdata(&pdev->dev, uart);
  1189. ret = uart_add_one_port(&bfin_serial_reg, &uart->port);
  1190. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  1191. }
  1192. #endif
  1193. if (!ret)
  1194. return 0;
  1195. if (uart) {
  1196. out_error_unmap:
  1197. iounmap(uart->port.membase);
  1198. out_error_free_peripherals:
  1199. peripheral_free_list(
  1200. (unsigned short *)pdev->dev.platform_data);
  1201. out_error_free_mem:
  1202. kfree(uart);
  1203. bfin_serial_ports[pdev->id] = NULL;
  1204. }
  1205. return ret;
  1206. }
  1207. static int __devexit bfin_serial_remove(struct platform_device *pdev)
  1208. {
  1209. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1210. dev_set_drvdata(&pdev->dev, NULL);
  1211. if (uart) {
  1212. uart_remove_one_port(&bfin_serial_reg, &uart->port);
  1213. iounmap(uart->port.membase);
  1214. peripheral_free_list(
  1215. (unsigned short *)pdev->dev.platform_data);
  1216. kfree(uart);
  1217. bfin_serial_ports[pdev->id] = NULL;
  1218. }
  1219. return 0;
  1220. }
  1221. static struct platform_driver bfin_serial_driver = {
  1222. .probe = bfin_serial_probe,
  1223. .remove = __devexit_p(bfin_serial_remove),
  1224. .suspend = bfin_serial_suspend,
  1225. .resume = bfin_serial_resume,
  1226. .driver = {
  1227. .name = DRIVER_NAME,
  1228. .owner = THIS_MODULE,
  1229. },
  1230. };
  1231. #if defined(CONFIG_SERIAL_BFIN_CONSOLE)
  1232. static __initdata struct early_platform_driver early_bfin_serial_driver = {
  1233. .class_str = CLASS_BFIN_CONSOLE,
  1234. .pdrv = &bfin_serial_driver,
  1235. .requested_id = EARLY_PLATFORM_ID_UNSET,
  1236. };
  1237. static int __init bfin_serial_rs_console_init(void)
  1238. {
  1239. early_platform_driver_register(&early_bfin_serial_driver, DRIVER_NAME);
  1240. early_platform_driver_probe(CLASS_BFIN_CONSOLE, BFIN_UART_NR_PORTS, 0);
  1241. register_console(&bfin_serial_console);
  1242. return 0;
  1243. }
  1244. console_initcall(bfin_serial_rs_console_init);
  1245. #endif
  1246. #ifdef CONFIG_EARLY_PRINTK
  1247. /*
  1248. * Memory can't be allocated dynamically during earlyprink init stage.
  1249. * So, do individual probe for earlyprink with a static uart port variable.
  1250. */
  1251. static int bfin_earlyprintk_probe(struct platform_device *pdev)
  1252. {
  1253. struct resource *res;
  1254. int ret;
  1255. if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
  1256. dev_err(&pdev->dev, "Wrong earlyprintk platform device id.\n");
  1257. return -ENOENT;
  1258. }
  1259. ret = peripheral_request_list(
  1260. (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
  1261. if (ret) {
  1262. dev_err(&pdev->dev,
  1263. "fail to request bfin serial peripherals\n");
  1264. return ret;
  1265. }
  1266. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1267. if (res == NULL) {
  1268. dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
  1269. ret = -ENOENT;
  1270. goto out_error_free_peripherals;
  1271. }
  1272. bfin_earlyprintk_port.port.membase = ioremap(res->start,
  1273. resource_size(res));
  1274. if (!bfin_earlyprintk_port.port.membase) {
  1275. dev_err(&pdev->dev, "Cannot map uart IO\n");
  1276. ret = -ENXIO;
  1277. goto out_error_free_peripherals;
  1278. }
  1279. bfin_earlyprintk_port.port.mapbase = res->start;
  1280. bfin_earlyprintk_port.port.line = pdev->id;
  1281. bfin_earlyprintk_port.port.uartclk = get_sclk();
  1282. bfin_earlyprintk_port.port.fifosize = BFIN_UART_TX_FIFO_SIZE;
  1283. spin_lock_init(&bfin_earlyprintk_port.port.lock);
  1284. return 0;
  1285. out_error_free_peripherals:
  1286. peripheral_free_list(
  1287. (unsigned short *)pdev->dev.platform_data);
  1288. return ret;
  1289. }
  1290. static struct platform_driver bfin_earlyprintk_driver = {
  1291. .probe = bfin_earlyprintk_probe,
  1292. .driver = {
  1293. .name = DRIVER_NAME,
  1294. .owner = THIS_MODULE,
  1295. },
  1296. };
  1297. static __initdata struct early_platform_driver early_bfin_earlyprintk_driver = {
  1298. .class_str = CLASS_BFIN_EARLYPRINTK,
  1299. .pdrv = &bfin_earlyprintk_driver,
  1300. .requested_id = EARLY_PLATFORM_ID_UNSET,
  1301. };
  1302. struct console __init *bfin_earlyserial_init(unsigned int port,
  1303. unsigned int cflag)
  1304. {
  1305. struct ktermios t;
  1306. char port_name[20];
  1307. if (port < 0 || port >= BFIN_UART_NR_PORTS)
  1308. return NULL;
  1309. /*
  1310. * Only probe resource of the given port in earlyprintk boot arg.
  1311. * The expected port id should be indicated in port name string.
  1312. */
  1313. snprintf(port_name, 20, DRIVER_NAME ".%d", port);
  1314. early_platform_driver_register(&early_bfin_earlyprintk_driver,
  1315. port_name);
  1316. early_platform_driver_probe(CLASS_BFIN_EARLYPRINTK, 1, 0);
  1317. if (!bfin_earlyprintk_port.port.membase)
  1318. return NULL;
  1319. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  1320. /*
  1321. * If we are using early serial, don't let the normal console rewind
  1322. * log buffer, since that causes things to be printed multiple times
  1323. */
  1324. bfin_serial_console.flags &= ~CON_PRINTBUFFER;
  1325. #endif
  1326. bfin_early_serial_console.index = port;
  1327. t.c_cflag = cflag;
  1328. t.c_iflag = 0;
  1329. t.c_oflag = 0;
  1330. t.c_lflag = ICANON;
  1331. t.c_line = port;
  1332. bfin_serial_set_termios(&bfin_earlyprintk_port.port, &t, &t);
  1333. return &bfin_early_serial_console;
  1334. }
  1335. #endif /* CONFIG_EARLY_PRINTK */
  1336. static int __init bfin_serial_init(void)
  1337. {
  1338. int ret;
  1339. pr_info("Blackfin serial driver\n");
  1340. ret = uart_register_driver(&bfin_serial_reg);
  1341. if (ret) {
  1342. pr_err("failed to register %s:%d\n",
  1343. bfin_serial_reg.driver_name, ret);
  1344. }
  1345. ret = platform_driver_register(&bfin_serial_driver);
  1346. if (ret) {
  1347. pr_err("fail to register bfin uart\n");
  1348. uart_unregister_driver(&bfin_serial_reg);
  1349. }
  1350. return ret;
  1351. }
  1352. static void __exit bfin_serial_exit(void)
  1353. {
  1354. platform_driver_unregister(&bfin_serial_driver);
  1355. uart_unregister_driver(&bfin_serial_reg);
  1356. }
  1357. module_init(bfin_serial_init);
  1358. module_exit(bfin_serial_exit);
  1359. MODULE_AUTHOR("Sonic Zhang, Aubrey Li");
  1360. MODULE_DESCRIPTION("Blackfin generic serial port driver");
  1361. MODULE_LICENSE("GPL");
  1362. MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
  1363. MODULE_ALIAS("platform:bfin-uart");